‘FuITSU mimi CMOS Gate Array (GENERAL INFORMATION @ Fujita CMOS gate array Family consists of twanty- jt daviea types which are fabeicated with advanced n gate CMOS technology. And more then 14 devies 8 coming, Fuitau CMOS gate array are conffaured In a matiix of Basic Cell arranged in columns posiloned side by side and Input/Output Calls on the devies periph ery. One Basle Cell ts equivalent to a 2input gate. The custom logic function i realized by interconnecting Unit Cells with double-layer matalization or siple-layer for largest anys. The Fujitsu CMOS gate array femily contains four tech- nology options: "H", “VN”, "AV", and "UH". ‘The "H'" is high performance and provides STTL spec Two versions using this technology re prepared: “H"™ and "HB", The complanity of "H” ranges from 440 gates up to 3800. The “HB” varsian ean provids high output drive onpabllity bocaute of ‘ts special output buffer design, The com ploxity ranges from 440 to 1440 gates, The “VH" Is very high performance end provides ECL speed vith CMOS powar consumption. There are three options fram 2640 to 8000 gate sizes, ‘The "AV" is the advanced "WH" technology. And thera are tives versions making uso of this tachnology: “AV, “pvMN, and “AV. The “AV version consists of & 6-15006UM Die, After Motaliztion 2595 Cole devices whth theie complexity of 2640 to. 8000 “gates, The “AVIM™ warsion is a gato array with a memory block on 2 chip, The device size ranges from 1504 ta 4087 gates with 1K or 2K RAM, o 2K or aK ROM. Just as “HE™, the "AVG" version can supply high drive capability, ‘The device size has variaty of 367 gates to 2052 patos The “UH™ technology can provide ultra high speed by its fine gate length. Thare sre sito. two. versione tor “UH: "UH" and "UM", The complexity of "UH" Iz 20160, The towar donsity “UH davices are now under develop mant, The “UM”, just es "AVM", integrates gpte arrey ‘and memory on one chip. The complexity of “UM” array fe 10080 gotee or 16120 gates with 22K or GK-bit RAM, respectively. ‘Fo assure quick, simple and error-fras_ implementation of the motal Intercannaction routing, Fujitsu utilizes unique Computer Aided Design (CAD) systern which fully automates LSI design. The CAD tystemn performs 3 complete logic simulation, Incorporating AG paramaters| ‘batad on the mask detign, prlor to the device fabrication Because of this design process, eirorfree LSI can be developed quietly. ©-2000 AVE Dio, After Motaltzationj FustTsu CMOS Gate Array Benen FEATURES ‘WBarray typas and mora array typat ta come High-speed Sillean Gate CMOS process Double-layer metalization, of Triplelayer mtallzation for C-20000UH, C-16008UM, and C-10012UM, ‘Variety of software macras called “F-MACRO", equivalent to MSI Functions ‘TTL compatible Input/Output, CMOS Input andl Schiitt-Trlggée Input High drive capability Qurput Buffer for "HB", “AVB", “UH, and "UM" Input pullup/pull-down options for “HB and “AVE redesigned Memory Macros for “AVI and “UM *#8V single power cupply Fast turn-eround on design Simplified customer interfaee (only logle design and test pattern Informatian required} Fully supported by Fujitsu GAD system (logic valldation, physical layout, metal intarconnection and test program) Detign Support on major CAE workstations ‘Wide variety of packaging options C-440H, C-700H, ¢-1275H, C-2000H, €-3900H, C-2600VH, C-3G00VH, and €-8000VH are altemate sourced by “Texas Instruments incorporated, USA. * {. Baslo Cell Equivalent Circuit jet \ Peeeees. & Fujitsu Gate Array, Replacing a Lot of MSI/SS1 Basie Cell Topology 2596 DOLem FUSITSU im CMOS Gate Array DEVICE DESCRIPTION “Tea salony noe name | Pat buamber comet ca Prepogation Beioy Signal ins Wo options Supelv® Valiage mae a cata | Mme | 440 gates carn | MBER | _ $00 germ C1276 | MamGatinn | 1480 got coco | wm cotex e300 | MBGIHE eaaoHe | MB AB er7oHie | MaezHernc | 900 gre e1z76a | west | 1440 gates va Ge2s0ovH | wiBeovHinn | 2840 get 2208 ‘cas0avH | MBGIVHiom | 9000 get 2200 eso0avH | MBEEVHaix | 8000 ox Bane Naver Butter Sach ‘GMOS input Input pull! ulm ‘alias tor ilcrectionst ‘Orver Output sve5% ote 70'e 4: input gs wequitent F/Q=2, 2ingut NAND ont 3: BV 4 108 ar ABV 4 208 spurtion paula ‘4 Wider tornperature operation poss PACKAGE OPTIONS For detalls, plone somtact Fue, or detalls, laste contact Feit Tach. rolony eaioH era76H ‘G200081 ‘ca000H Caton e770Re c176HB vH ‘Gas00vH (ca0c0VH ‘ea000vH 2597 p-02Pusrrsu CMOS Gate Array unui T Te Cherctortes oisgitin Toroann Toaswioe] tna tua | mpmio® oeeeerone | 32h Tosti [Ovpe ow] toma ti | np 3, see | Oyen | Opa tow | gaan | ep ute eon mt. con We 104A mas, ort] 42¥ min ‘eProat ieee rovin, | cave | Siers 4 ‘wimiiwe | "aR cae oh coat Ne cont sont. soni Tok po [ome ayia Ean [oe to0aWv ie. | ag awvein, | ovine, | Sua [cua va lon aid [soma] Ss [Cree Visor onal ti ae ack Br &: frum mer pro eee ampe pment Fucercime | PGSM | vteeod chin cue | Fin Aro Pos ie es Hae m[ |e [ol] lo | [|e] me] ew i] m0] me woe oe eee ot err whole oh Theo boP 700K | + + |e -€-3900H_ eho tet bb bb eo tobe ope tebe be be de 7 [7 eaeoown woh be toh thee beef caoowt . at bo casoovtt Prente package Praate (Shrink type DIP: Lose Spacing cantor to center: 0.07°) Plait PGA ocksges and more then 100-pn pleile FIa packages ae underdevelopment, Contact Fuitsu for avalltiity, 2590 «0-03FUJITSU Emm CMOS Gate Array DEVICE DESCRIPTION Tai, | omoname | lt, | como’ | rogtnen | yuor | vocotom | Sa" | Faro camoay | Ma esiox | seoene | tam | toe canny | Ms tin 1 ‘e500 | mo e2aax 1 0a | M8 tion 180 220608 | MB Bina “[hee] peer! av [exsonve ne 6m aE | sme | mare cexoqve | mp e740 48160) | ouraue casoave | Ma 6700 saeay | See C4200AVB | MB 672x%% 68 (68) Brireedonat e0ave | MB 67x mai oe eal inp gta equrant, F/O 2, Dinput NAND este. ‘Tha value ln parartess show the maximum numberof goat pls when no Bigh diving cepabalty (lq, = 10:0 mAbs ved, 5V + 10% operation pombe, For cot, plente contact Ful. Wider temperature opertion patible, Par desl, lance contact Pull. 1 2 4 6 PACKAGE OPTIONS eae orl In Flot Package igi, | Device Name 16 | 1 | 2 | 22 | 42 | aa [ea | ie | 20 | 2 | 20 | a ‘200080 = [ee [= [onal 1 + ‘50008 . 7 Can00Av canonay ay ea50Ave am [ow [ow fom [ow =| “lel lel: CHOAVE am [ew [oe [ow [om CO) ee CaS0AVE = [ew [om =] aft -[-[- eraAve ee [ee eaalena] a =f? fe CrenOAVE jen [en eaafera] : (C-2000AVE . eanfers| ot . 2599 D-O%FUJITSU mmm CMOS Gate Array DEVICE DESCRIPTION oalre Maxd Operating’ oe Device Name Part ‘Complaicity’ | Propagation | Numberof 110 Options ‘Tere. olay ite ear | areal ate | gan “a pm casozawe | mp 662xxx a tans 4 lopot: Rowe ‘Neral Butter Slack bri eee SehmieTioer a (Cu apt av | casoravs | mmc | PE” | ane 1m sveen | ome aenon Sota Butter Some 087 gr Biarttona easonaves | m0 6é6nnx | REE | sane wa aenon input prs squbalet, “Gr BV 10% apralion pons, For del, plewe contest Ful, F/O =2, input NAND prte,20 ni RAM sects time 6: Widar temperature operation poslbl, For deta, pleas oontet Fula, Ineluaing 7 RAM Tett ins or S ROM Tost Pew. PACKAGE OPTIONS yee | ar name Dual Instoe Package Fiat Peckape v6 | 16 | 20 | 22 | 24 | 26 | 40 | a2 ulela[ulale ereo2avin = [os [ew fowale aft . av [7 ezanave = [|_| [om |r . caonaava TC) DEVICE DESCRIPTION car? Wax, ‘Operating? Tas Pu 1 nvcstame | Eta, | comatey? | Propeiton | Humoazot | 1/0 Optont "Temp" raleay a fy” | Signa Pi Pinos caoc00un | see eon | zorea pee | 20% zo | wpa Nets wate Stour bawe ‘wing | 8% ut | cascosum | wosione | mee | Tanna | 210 | oupue ovien | aware RAMS | Semis Retr eater Beate ‘eoespe | 1B Bond orooizum | wmsitin | waite” | Wormae | a0 | Brier Oa mate | sear te 1 Papakea 3 BY “10% operation pie For datas, plane conte Fu, 2: Fi, 2leput WAND ox, 4: We ompmat opwatin pou Portal, itera Full PACKAGE OPTIONS : ‘asl indie Poekae ra Pa wet, | eis nia cor [| e[o["|a[@[olal[ela|w[m[ale eaan000H ua [7 ereoceunr eeo1a008 “7600 0-05FUJITSU NICROELECTRONICS 78C D MM 374972 GOORIS2 4 ER P- YD-/1-09 Laity FUJITSU CRIOS Gate Array wi = I = orate [Pagano [eugaie> egie? [asi | “Ext [over | oe a roe [emo Lose same Soe ean a oe females sore Saat ee eter iecaenicsmec| arm] ae iy [peae_Tenowe ma fm eve a Soak [ eran 100m we. Output Sets | C-2000AVE rt for Normal Butfar end Glock Driver Fares | SBS | sumasonp caer | Finn Arey Poke a sale ayeiet= |= [=] = eye] le ra «fe fe fo ‘C-8000AV 5 ele . | C-540AVE . le le + ae ‘C-BBOAVE SS $ cave . . mae . eo fe | (C-1600AVB + Caran pskoge Plane package 1: Plt (Shrink type DIP: Lead Spacing contr to cent Portis PGA package ond more than TOO}in paste F 2007") ks are underdevelopment, Contact Fuji for aalaiiy. _ 2601 0-06FUJITSU AECROELECTRONECS — 78C DMM 374972 OOD3ISI O EL ya y-04 AMES FUSITSU CMOS Gate Array tt ers ae oiterlon Taapatia orga tow] gue tion® | tittn® [lng tanane] aime | Ovtcenane | eS, teases joltage tag Voltage Voltage Current lessen stom 9 fee | oie 42vmin, | 04V mex HOuA max. a Sar ash © Yara or orm mat ae ao See eee a ates te pment ae ee eae reese | ES oi a «[~[s[olal«[«|=[«[@[o| oe] ws] i] mo] xe Se cama 1S aye La pact 01 om St Chenenta a inition Oxaoar i Tngut tig® | topes tov | aos tataoe Deventione | eh seat [ogaane 2 =e cr sovmin ey soomW tye. | atton= 22Vmin, | 0BVmax. | Buller crsooeum | UH ae shies och, —— soon ne. om fee ne ine etuetetien EE seo Ge | aaeaacnperer | Pmcna ny ra Coe a Device Name wl ela [ol=[«[al=] le] oo] oe | rx] io] me] me ae oo foe TP Seep * Rellosent 1 Pose (Swink type DIP: Lae Spacing cetar to centr: 0.07") ‘256.pin PGA: BO and 100 mil pin canter to center are aa 2602 po?FUJITSU MICROELECTRONICS. 78 D MM 37497b2 OOO39SY 2 mM ~Y2~11-09 SE FUsITSU : iniwm CIOS Gate Array CUSTOMER/FUJITSU INTERFACE DESIGN PROCEDURE DEVELOPMENT FLOW ON WORKSTATION. Customer’ Role Fuji Rote —________[titin foment sD} ‘oa Deion [Ten Data Dan [nematic coptr TORS [Fes | Leste Simaintion ae —_ ae CES a Ce} | rf = 2603 0-08FUJITSU MICROELECTRONICS —78C D mM A74I7LE 0003955 4 mM Poy, -09 man CMOS Gate Array FusITsu: an] NEW PACKAGE FOR GATE ARRAY 1G-LEAO PLASTIC FLAT PACKAGE. (CASE No FPT-oPaM0s) RAR ABBA soe anal 3488 eee J goon Ye rapt! “ee melt Re aura a (21905 FusiTau LmaireD Fred0eere ec) 20-LEAD PLASTIC FLAT PACKAGE (CASE Now FPT-20P4a02) ae [sano oFe1 BARRABRRER di lo aha lt sala sen1038) peepee — lee ~ Layers sais) wv Sues =| BD FeceritimeverFUJITSU MICROELECTRONICS 76C DMM 3749762 OO039SE & BM T-¥2.-4-09 (corms ti a finn CMOS Gate Array NEW PACKAGE FOR GATE ARRAY (Cont'd) 2E-LEAD PLASTIC CHIP CARRIER (CASE NO.: Loc 2eP-«01), or0301 "0tos} S4LEAD PLASTIC CHIP CARRIER (Case no.: Lecesaa03) O° TST ann Fee tos) 2605 D-1OFUJITSU MICROELECTRONICS 76C D mH 374972 DOIG? 8 MM T-Y¥3~1.99 CMOS Gate Array NEW PACKAGE FOR GATE ARRAY (Cont'd) S8PAD CERAMIC WETAL SEAL) LEADLESS CHIP CARRIER. (ASE Was Lcc-e8c-A0a) ocon.carve fn nos INDEX 2402 88g, State sso. 001250) STEEP 256-LEAD CERAMIC [METAL SEAL) PIN GRID ARRAY PACKAGE (CASE No: PGA-266¢-A01) A Tost 016 Fel 2606 9 D-1LEee ee EEE CE EERE FUJITSU MICROELECTRONICS 78C D mw 374972 DO03IS8 T MM 7-Y43-11-09 eau FUSITSU mmm CMOS Gate Array LOGIC CELL FAMILY (Inverter, Clock Butter Fay ‘mbar of Baie Gale DRM [AVIA] ave__[ vi ier 1 1 1 1 Power Ivar 1 1 . 7 Double Power erie i ae True fer “ium Power Bate Double Power Butt ‘Guserupa Poner Butler ‘lock Butter Power Cook Bafer Gated Cock AND) Bator Gated Clock (OR) Butfr (Gated Clock WWAND) Butor Gated Clock Butfor (024 + V36H Block Clk (OR) Butler Block Clos (OR x 1) Butter Block Glock Butter (Non dovering) Function (2) NANDIAND Family Nomar of Bai ale Caan [awiavin [ave [vi Finpa WAND 7 ower 2nput WAND Power 2input MAND pus NAN over Singur AND Power input WAND ‘input WAND Power input AND Power input MAND over input NAND over Binput AND Name Function Power init WAND 70 Powe iGinput HAND 2 ce 2607 = O12FUJITSU MICROELECTRONICS 78C D MM 374972 GOOSIST L MM PY ~/1-09 ee FUSITSU mimunia CMOS Gate Array (6) O-AND-nverar Faly ~ fun of i ae peers — UHM [AVIAVM | Ave ve 4 HB [-g23 | "aise 308 So AT aoe see ocean ats on ‘aia —[ vide OF tint OAT KS TB ‘cat | aah BOF nut OA afer eeepc sata nfo ‘aa | aangr 208 Aint OAT daar et fates fear faee Gat [enh BAND BOR Hips OAT ss oe [rotors (7) topic Foy oe ee mbar ofS ale arom [av] ave [vn [W]e [aa —| "Foner ano eae matin ef saga ang aap caren a 726 Power 2-AND Gonide Multiplexer 2 10. 3 o 9 9 a “Tae | Power 2:AND Gade Muli aa ean oyna T32__[ Power SAND 2-vide Multiplexer 6 3 mai |ae8 6 5 "a8 —| Poner 3AND hdr Muller eraser |eecpa eerie et “Tot | Pome BAND dae leer festa) enigma is fewer ioral ag 72 | Foner 4AND 2 Muller fae a “| Pome 4 AND 2s Mulia TE TT [Teepe 0 te ner a) saver arsenate] sa ona 423:3 AND vi Mair feoarslaceat sere oie omer 2.08 nde Muller Se oad [sion scenes Power 2.08 Guide Muiplner sealers 8 2 3 2 2 oer 2.0% 8d ullener =a aa Power 8-0R 2 wide Multiplexer = 5 3 5 5 3 132 | Power 3.07 3 wid Hulton ES also on ese ve ss | “Power 2.08 Ade ls Sl eto csp icp ea (Wa | Power 408 2 vide Maliponr Ed 1s | “Power OR 2d Huber Er onan [st Oo [ee | es | Poner OR rie Waser ie eo ee eae | s (0) Traemision Gate Data eectr Faily ‘ber Bs al [Nene Fonction Ta [A Av | aa aa Soper Sef nei sae | eases aa T2C_ Dusl 2:1 Sslector ~ = 4 4 Seca 4 20 | “a: eter Sera fargo cig ie VaA 1:2 Selector iz = 2 2 2 = = VaB ‘Dual 1:2 Selector eos 3 cna BoE = eA [4:1 Stor Sees crema erm es 6 2608 = -13FUJITSU MICROELECTRONICS 78C D mH A7NI7L2 DODO BMY TH Y2 1.09 Apesaies2) FusITSU CMOS Gate Array musi (9) NoR/OR Family ‘ib tc a a oe ‘uHiUM TAV/AVM AVE vi w co fan | “aingar tion —— Selertiaeiand Bat | Power ainpot OR a a Tat | PoverBiput NOR eee ea eae igen feoeced e ak | Power 2irput NOR ies enero fence eae [oe a Ta “bouble ones 2p OR Sees oan feces] roe [enoo ere an | Binput HOR Pica gu emg ap ora R&P_-| Power 31npui OR ice) es 3 s ae ee = ian | “Pov Siput NOR See oe rca] RAN | input NOR 2 2 2 2 2 Ra? —| “Foner din OR Sacer |ets [esos [acar| RaB Power 44nput NOR « 4 erect tees = 60 | “Foner Girt NOR Bia eg i Jape cps [saya a? —| “Foner @inpt OR é eae aoa fe Ree Power input NOR, 6 eases eaaataaiam ame aed OB | Foner Sinput NOR @ ee aera asa RCS Power 12input NOR 10. o o o a 2 R68 | Foner fein NOR raven ented een seater |e 8) EWOR/EOR Feniy sana damm! ‘unjum TAviave | Ave ve # He aW__| Beco NOR Se eee ff [ete | Power Bre NOR 7 SY el Ene a) a8 | Power Exclsia OA Zl er a Sa aE aH | Singur Exsave NOR seer aaa faca x38 Powor $input Exdutive = [= = = = ¥ait_[ Bing Excue OF fees fee |e fac 348 | Powe input iene eg) eee foe ee] saree oes a (6) ANDOnAnverter Fnity Nonier fb Gals | Nene Function nium [AVIAVM] ava | _VH # te Da 2ewida 2-AND S-input AOL eat 2 2 2 2 2 = Dia ‘Bewide 3-AND 4input AOL eae eee gee eae 2 2 a4 | _Bwide BAND input AOT ged) eats) esa eaieet| stars lond a4 | “Side BAND HnputAOT ee ohne iene serra eaeae 28] Sade BAND BinputAOT ier neereel ese feces is | “Bade 208 BAND input ROT sop == facie Note HL G4 not va fo C3808, C8408, 40%, 6-770H, C440NE, ad C77ON8 : BL sist ana Sit2 mort not be used together in on chip. under davlopmant ~ notable 4 2609 D-1hFUJITSU MICROELECTRONICS 76C D «MM 3749762 OOO3%b1L T TT 42 -09 : BEEN CMOS Gate Array (9) Flip-Fop Famty maaan — UHiUM TAVIAVM] Ave [VA 4 He 03 | Power OFF with PRESET = ° 3 2 3 2 ("Fs | Power OFF with CLEAR. ~ = 2 2 2 2 2 tigate tamara orrameR tt} tt ‘FOG | Positive edgo clocked OFF with CLEAR = 2 a 3 ° 3 FOM OFF = sé & 6 o 6 FON | _DFF with SET = oe 7 = 7 a FOO (DFF with RESET EE = LE 7 7 i cs [For | ~oFF with Tend RESET - ar fear onedlaane 3 z z ‘FDO ‘Abit OFF fae = 2 a a cs 21 FOR | abit DFF with CLEAR = 26, 26. 20 | 26 2 FOS “bit DFF ~ 20 20 20 = = Fa ‘Power JKFF with CLEAR ~ iW W Ww cae JS | Power JKFF with CLEAR and PRESET = ais | evan [se ames sta ‘SH [SCAN 2dnput OFF with Clesr and Glocknnibit | Ta = = = Sh Satan corestescne oe ee [see seataegr or orm eS Sa 'SDB__[ SCAN T.nput 4. OFF with Clock-innisnt ~~ az = = = = = we “SCAN ‘input Bbit DFF with Glock-Inhibit and fence a _ a a Sour r ao | Eas Bega oe es ee ee on | etsmmaneeweres Te Po = [ 301 [Pale SCAN DFF win CLEAR I 7 = Teo ‘Note: C47 isnot svat for C:250AV8, CS4OAVE, C440H, 0.770H, C44OH®, nd C70H8. EL sit sna itz must no b used together in ore el, under dvslepment = notavalaie 18 2610 E01FUJITSU MICROELECTRONICS 78C D mM 3749762 OOO3%G2 1» mw THYa-il-04 CISA PUSITSU SC ” imams CMOS Gate Array (10) Lateh Fait ‘Maa of ale Ca Nave cee Ta [RNAV [wa Ta [Em ae GEA Si eat ica laf aa tra | tai ba th aera ees eee eae ra | est ors er Sea tre | epi on ae |e at ine aaee a ioral siea Terk —|~ One Lar its LEAR Sa asia [saa [ao OE a Crit | bios ath win CEA ane [ae | | (00 soit Reser Fy ‘oni af eas ner finan: Aviawy Ave [va [+ ae. Fai |G Soran Pao Rr ef e |e |e | a eT Sipe eon aes econ soe] ea [ani Su Ragin Ayncronor Cod ee aj Span Pott ST Rae wth ; a4 | SCAN. Gear ‘st 36 = = = = = (12)count Famity doles bieeae! ‘uniuM [AviAviN[ Ave | | Rio or oan ——— Sarafsenniefeary Gai [AB Bins Arnona a aos a2 | “Fai Binwy Syncronon Coon =a ‘at [4a ny Syncronous Us aura Sao 25 — [abi Bnmy Syncronos Up Com =e Ger BA] tsi ens syrcvenou Us/oomn Com = [ce [We 4k Syrchrnou iary Up Counter ales 8c7 | Paras toad pate = ia ‘i Sypcivonon Bay Bown Coun with sce Parallel Load 7 ith a =~ | = in Bei [counter wh SCAN an LEAT fee (13) der Fniy =a oan Tar ____ era ve ve Hin |e nae pe [Cain [tate ae = saa fat | zai Fu Anse rn oo ‘ait | kai Fu Ado 8 woe [~ao ‘Act | any Loot Ata Tor FT Ar SOE SS SEE E= uaa a ” PeseeegeeeeeFUJITSU MICROELECTRONICS 7c D mm 3749762 OOO3%G3 3 mm (18) othe aa Nara ca a Caio AVIA] ave [vn _[ a [we “i grt Conpartor =~ [2 [e [a [aa asada See eestor asf eae er fe oder =e ss i Sah Sec are |e Ssh Tiger iow eo (EA RE RD ES EI Ber (ly Cal ieee eae cee eee utr (Oly Cel oes eran oer [are ~ batter sly Cah Sears ee oe eae en oe] Bar (ely Cal a a bie Even Pariy Gans TOReCar a Sit Od Party Generator Oheskr a fic pee fee fee ae f= ae ete en [= Sena eae it Even Parity Geneatn Check 2 [= Dia feats O85 Parity Gowatr Check aes (eee cesar oa Alga 01 Beta Slee See fee 7 4 Becoer with Enable Bes feeefere eel 3 to 8 Bocoer ith Enable ies eto ere aafeas Dye 2: Sera ee eae ef Foul Selec iste Bue 4 Slo ea ewoueeaan| een pana | eae Fourld at ec a 3 Selector ith Ensle a ee Four 4 Slstor wth Ese a Ninfld#:1 Sencor it Enable a a OZ | Lae Gat Fann =? ee ee 10] “OStck Gate fe [ete tone feof STi | 1 6ck Ge ee a a 700 | “OG a eee a 201 [1 6ip |i | eos] aa ea ana [ae Yat —|~ Speci a WFR RRAT ae a ‘Wa | Spi al aN & PT ee == ke ee ape ee ‘Yd —[ Speci at aR, aN, NaN, @poe us| “Sect al Lata) neces | Not:f] C47 fs not aalbo for C-350AV8, CS4OAV,C-440H, C-770H, C4€OHB, and C-770H8. 2612 18FUJTTSU MECROELECTRONECS 78C DM 37497K2 BOOSEY S HM +. 4471-09 EEE FusITSU ini CMOS Gate Array (18) Amory Macros For CAS02AVM 8 ©40024VH1 For €-18006UM 8 60012UM Name Funan Nene Fansin ‘R610 | Sr Sale Port sie RAN ROA | Ghnrx Sb Sg Port AN Wi Aaron SOA RII1_| 128 «185 Sing or Ste RAN R65 | Gi 109 Dusl Port RAM with Add SCAN ee a rr FRIGE | 2b 20h Duel Port RAM ity Adres SCAN — Foro 2a01Ave8 R77 | ¥280rx 180 Thre Port RAN wrth Adrn SCAN | Nene ae | ‘et | Gh 165 Sing Por Static RANT RVI | 1268 Single or Static RAN REG | Zt 4 Sng ort Stato RANT ‘YR | ~2660rx6 ROM (16) Yo cat Fmity Tro a Gl hati aed arom [AVIA] ave [vn [—®[ we 18 | “Gaspar Gre cae esc [ae eee ‘iL | PonerOuipt Bate nara) ope pe (026 | Output Gtr Feel a effec 2 | Foner Outpt ter Tra = sais [ee SET ‘2T__| Binguk AND tate Output ular on a ‘Gavi —| PonerSinput AND Traits Guin Buer ° Sea feneaefaeraae ‘at —[ Fatt Output trv oe eee aes fea fae ‘an | Foner Trista Ovput Bitter Unarar ie ae oe [| ‘O48 | “Binput AND Ouipu ater ° Saar [Coat —[ ks Op afr rad = ola ‘OaW—| PonorTestat Ovo Butter (eT =~ ‘iL | “Poner Sinout AND Gutout Bator as ‘O6t | “Trea Out Bur Cel 7 a ‘aw | Pomerat Oot Bf (eT aa Hat [Tbs Opa Troe, Input ron) Br om aw | “Ponor Testa Ov Tua, ng val Bar a HoT | “Tkstas Ouiput andi Bue (Tue Ta HSTO_| HBT with input Pulp ° Her | HBT with input Pl dome ° HEH_—| Power Tite Ovtut and input Bf Cewel | — =—[~o Hav_| Hew tr nou Puli = [oe HNO_|HBW th nput Pl do =—[“e vec | fy Output end COS Tro tout 7 SGU | “H86 with np Pl ian co #860 [HC with put Plidens =o wae | fe ine Out and OUO8 alas HEU Sian aa Tse Saale 19 2613 E04PT ee ee eee eee eee ae pee ee eee eee eee FUJITSU MICROELECTRONICS 78C D @ 3749762 GOO35LS 7 ma T-Y2-H-09 | (16) Yo al amity (Cont) CMOS Gate Array LE FUSITSU HOSEN Tro Be Ge a= Lacie uHroM TAVAvM | AVE « He Tia_| too Sar iar safieeeeal a= a 128 —| Toor Bur ron no os tga] 28 wth apt Pa Sais aaa a6 | TBE with Inne Pion : aaa Sala 12 [CHS inte Input Br ava [=o [ @[o i260 | Ta wth pe Pi == -e Sarid Ta60 | 1B wth insu Pus a Sale Shes 168 | Input Butfer (Complementary Output) —o = = = = 18 Fieedlocation IKB (verter) o = = es ea TB —[Fherdeeton IL rs) cae Se iia [tok input er irr ofa fo o|~s TKBO_| TRB whut Pally Se serene raed TKBO | 1KB with Input Pull-down Serer o = o TB [hot Ip terre o[-o fo a Tog | 148 with op Pilon ai lacr=l ae =a ano 18D | ILBwith input Pulldown = o = o [Tat fer for Simi = 3 7 TI [ “TT es nt Se ace =a ae ee - SPE ear [and (07._Yo ster Foi For Tins RA Nave Fonction = Sait —| “Sapa tre = [Coa “Tristete Output Buffer (inverter) £5 ant | Power Tas Ostet Bar vw = sit | “Tsste Guipat Bute Cre) = | Pon Fit Opt Ber Tl = it | “Yt Outpt Er, Int ue Bar 7 Hatt [Povo Tt Opt Cron nut Crue Bur = Tan | pt Ber vce 7 12 Input Buffer (True) eee = [ait [out ter oe = 14M Input Buffer (True) i o = = = = ca? Bi su nd SM2 must pot be ues together in ons chp, "under devopmant > ot avaabe 2614 = E05 not aalbi for C-360AVB, GHAOAVE, CA40H, C170R, CAUONB, and 6770N8,FUJITSU MICROELECTRONICS 78¢ D mH 37497L2 DOOSTEL FMM” T= 42-11-09 TEDSRIN RYO FUSITSU tummuiia CMOS Gate Array F-MACRO FAMILY MACRO Feri Nene Fupation Equinlort No.of 605 i Fonction Eulaent No, of 86s 00 741500 * 7 7497 . 02, 7aL802 = 0 548 % Fo 741504 = 59 5499 * Foe, 7aL802 = F100 74100) oo 10 741510 = F101 74107 . a 7aLstt ie Fra 7an02 ~ a0 741520 * 10a | 7409 . Far FaLsai = F106 7ani08 = a 7425, = 07 7aLsi07 * Fa TALS o F108 a8 . F30) 7ALS30 = 0 TALSIOSA, * a2 A892 * Fa TaLSH2A. = Fa Taste = Fug, 7austi3 = Fas THA 2 Fa EEN 7. Fad Tada 32 FING: 74116 a For TaLS8i 7 Fa) Tai o Fst TALS 2 Fras 7as136 : oe 6 FI? L137 co Fes 7aL866 . [rise TALst38 28 FT A157 . F129) 7ALS130 28 Fer 74864 2 Fa austa7 co 68, a8 3 Fae TALS 38 60) 7aLs60 7 F160) 78160 12 Fra 7aL579A . F161 TALSIST a 7 TaLS74A * Fie masts 5, 741575 2 Fis 7ats163 76. * Fi 7ai64 71 eB F166 TaLsi6s 7 FIST ~yats67 02 6 Fi68 Tats Fo, 50 Fi TAL SIG0R Fo 2 Fit TALSIBIA 6 aac aims Fez EIGSISIN 67 = FI EIN 0 a Fee 7aLs164 Fat e a waists For a Fi 7asi68 FOS, 3 Fr asi a [—Fe4 a7 Feo 74181095 74 Fo6 2 Gi 7ALSI7i o 6 = Gi 7aLsi74 w a a ieee aacFUSTTSU MICROELECTRONICS 78¢ DM 37097L2 0003947 Om ~42-/1-0' Omsiesaeit FUSITSU CMOS Gate Array mania Te Funaton Equiniant Neat Br FITS 7aL5175 3 FAT 7176 76 et77 74177 7 Fv 74178 a F178 a7 7 F160 78190) EN Fiat TaLsta F F162 __| vie Fie | gai Fiso_—[___7atst00 Foi 7aLSi91_ a F102 7ats102 F199 7aLs109 Fi EEN F195: TALSI95A F108 F196 F260) Fast TaLs264 Fas wats279 : £278 9278 nm F270) TaLse7e ie 260 7ats260 ol Za) TaLs288 F290) 7aLs290 35 a) TaLs209 F208 Te 3% F352 743362 2s 76 is976 ie Fa77 7408977 7 78 7418378 5 70 ~raLs7e 28 ee 182 F362 748982 201 a6 7aLS986 : Fa 7413360 a [e309 7aLs309 52 Fis 7415306 60 F290) 7aL8308 37 F300 7418399. a7 Not ‘dr dsvlopmant HD rot sie for C2808, CSAOAVE, C4408, -770H, 644048, na 6-704, 2616 «E-07