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Firmware Enhancements For Pcs Running Windows 7: September 21, 2009
Firmware Enhancements For Pcs Running Windows 7: September 21, 2009
Running Windows 7
September 21, 2009
Abstract
http://www.microsoft.com/whdc/system/platform/firmware/FirmwareEnhance_Win
7.mspx
Firmware Enhancements for PCs Running Windows 7 - 2
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Document History
Date Change
September 21, 2009 First publication
Contents
Background....................................................................................................................4
Proof of Concept.......................................................................................................4
Boot Performance Improvements.................................................................................5
Overview of the Boot Process...................................................................................5
High-Level Boot Improvement Timing Results..........................................................5
BIOS Boot Performance Improvements.....................................................................6
SEC Phase..............................................................................................................6
PEI Phase...............................................................................................................7
DXE Phase.............................................................................................................7
BDS Phase.............................................................................................................9
Other Performance Improvements.....................................................................10
User Experience Improvements...................................................................................12
Visual Improvements...............................................................................................12
Boot Graphics Timing..........................................................................................12
Boot Graphics Improvements.............................................................................12
Performance Impacts of Visual Improvements...................................................13
Fan Noise.................................................................................................................13
Windows Access to Firmware Settings........................................................................14
Problem Overview...................................................................................................14
Background
The boot user experience (UX) for Windows Vista® rated poorly compared to other
products because the experience was slow, fragmented, and included multiple
graphics-mode transitions with a low-resolution boot progress indicator. One of the
vision areas of Windows® 7 was to improve upon that experience by shortening and
refining the graphics experience that users see during the interval between when the
system power is turned on and when the logon screen is displayed.
To meet this goal, Windows 7 enhances the boot UX by initializing the graphics device
in high resolution, which eliminates most of the mode transitions. Also, Windows 7
uses a high-resolution background with some animation to indicate smooth,
continuous progress while the Windows 7 kernel is initialized. The boot speed of
Windows 7 was also improved by other new features that tuned the bootloader and
prefetcher.
Nevertheless, both the speed and appearance of the boot experience remain
dependent on firmware because the percentage of boot experience dependent on
firmware has increased. Apple Macintosh computers demonstrated that modern
Unified Extensible Firmware Interface (UEFI) firmware could be optimized to deliver
fast Power-On Self-Test (POST) times with streamlined user interface (UI). This has
increased expectations for PCs running Windows 7.
However, modern PC manufacturers have challenges that do not apply to Apple
Macintosh, most specifically the need to manage a large number of configurations
and price points, sometimes at narrow profit margins. The impact of these
requirements on performance and appearance goals is addressed in this paper.
This paper documents the creation of proofs of concept to investigate these topics
and describes the results that were achieved and how those results can be
reproduced.
Proof of Concept
This paper assumes some familiarity with Advanced Configuration and Power
Interface (ACPI)–compliant and UEFI-compliant basic input/output system (BIOS)
technology and concepts. See the “Appendix 3: References” section for more details
on ACPI and UEFI.
In 2008, Microsoft® worked closely with the Hewlett-Packard (HP) Consumer
Notebook Division to tune several DV3 (“Diablo”) and DV4 (“Blade”) configurations
running Windows Vista with Service Pack 1. As a result, we had access to many units
and were knowledgeable about Blade firmware, hardware, and drivers. Based on that
knowledge, we selected the Blade configuration (typically DV4-1145go, although we
also used other configurations) as the target for the creation of proofs of concept. We
also selected Insyde Software Corporation as a prototyping partner. HP’s original
device manufacturers (ODMs) had licensed InsydeH20 firmware to create the DV4
design.
Microsoft and Insyde implemented time measurements of UEFI firmware run times
by using Insyde’s benchmarking subroutines. We also measured circuit timing and
PEI. The Pre-EFI Initialization (PEI) phase finishes initializing the CPU, makes
permanent RAM (such as normal DRAM) available, and then determines the boot
mode (such as normal boot, ACPI “S3” resume from sleep, or ACPI “S4” resume
from hibernation).
DXE. The Driver Execution Environment (DXE) phase initializes the rest of the
system hardware (HW).
BDS. The Boot Device Selection (BDS) phase selects a boot device and then
boots an operating system from it.
SEC Phase
Code decompression. Code is largely compressed on ROM and is
decompressed during POST. Compression and decompression are ideally
asymmetric, because longer compression times are done only once at compile
time, whereas faster decompression times benefit every boot.
InsydeH2O firmware already has an optimized decompression
algorithm, so no further improvement was seen in this area of performance.
Although no change was required for our proof of concept, this topic is listed
here for completeness.
Cache. L1 cache as RAM is the fastest RAM available in the system, so early
initialization of cache and use of cache for stacks and variable storage is critical
for fast firmware initialization. Writing to NVRAM during SEC is strongly
discouraged.
InsydeH2O firmware already made extensive use of system cache
memory during SEC, so no further improvement was seen in this area of
performance. Although no change was required for our proof of concept, this
topic is listed here for completeness.
Throttling. CPU vendors provide mechanisms (such as Intel SpeedStep and
AMD Powernow!) to adjust CPU voltage and throttle CPU clocking in order to
manage power consumption and system heat. It is common for original design
manufacturers (ODMs) to adjust these mechanisms to a low level during
firmware initialization when adapting firmware to a new chipset or new chassis
thermal design. It is critical that the settings be reset as high as possible and as
early as possible during SEC after the chipset is known to be stable and the
thermal characteristics of the chassis are established. Although the operating
system will take control of these settings after boot, needlessly low settings
during firmware initialization can have a significant negative impact on boot
performance.
InsydeH2O firmware set SpeedStep to a high level early in SEC, so no
further improvement was seen in this area of performance. Although no
change was required for our proof of concept, this topic is listed here for
completeness.
Microcode. Most ODMs manage many designs simultaneously for their
original equipment manufacturer (OEM) partners. These designs may have
significant overlap. As a result, ODMs may seek to manage configuration
complexity by including a small number of firmware images that dynamically
adapt to the specific hardware configuration. Typically this involves maintaining a
large number of CPU microcode variations within the ROM and forcing firmware
to search for the correct microcode during SEC. The number of CPU microcode
variations must be kept as small as possible and the search algorithm must be
optimized.
PEI Phase
Memory initialization. In a typical power-on POST, the system memory is
dynamically detected, tested for errors, and then cleared to zero. Dynamic
detection is performed in case the user has physically changed the memory
configuration since the last boot. Memory testing and clearing is performed
mainly for historical reasons and is not required at every boot for modern
memory technology.
This project skipped the memory testing and did not clear memory to
zero. Memory testing can take as long as 10 seconds per gigabyte of DRAM.
However, the original Blade firmware was not performing a complete
memory test so we were only able to achieve a 500-msec improvement. Note
that a comprehensive system memory test can also be run in the BIOS setup
menu environment, giving a user the ability to run such a check on demand
without impact on every boot.
This project skipped dynamic detection of memory configuration by
hard coding memory DIMM attributes. This might not be practical for many
real-world system designs. However, whenever RAM is soldered to the
system board, rather than populated into DIMMs, this method should be
used to improve performance. In our case the time savings was 100 msec.
DXE Phase
USB topology exploration. In a typical POST, the USB host controllers are
reset by firmware and their endpoint devices detected. Some of these endpoint
devices can be USB hubs, which also need to have their endpoint devices
discovered. Some of the endpoint devices that are USB hubs may have additional
devices attached. Each USB hub requires a reset operation and a detection of the
endpoint devices. This can take three or more seconds for each device,
depending on the speed of the device.
This project supported discovery of USB hubs only on the
motherboard. No USB devices or hubs plugged into the USB ports were
discovered. Nested hubs on the motherboard were not discovered.
Blade hardware did not include nested USB hubs on the
motherboard, so the restriction above did not apply. In order to support this
methodology, the system design should always avoid nested USB hubs on the
motherboard.
Laptops theoretically could avoid the restriction above because they
always include an integrated pointing device and an integrated keyboard.
Desktop designers would need to include keyboard and mouse detection but
may still elect to eliminate discovery of external hubs and devices connected
to external hubs. Likewise, laptop designers may decide to provide discovery
of devices plugged into docking stations, but must be careful not to affect
typical laptop performance in support of the docking station scenario.
BDS Phase
HDD as single boot device. Normally during POST, each bootable device is
dynamically detected and the media examined to see whether it is bootable. It
takes 2–4 seconds for DVD/CD devices that have long latency times to spin up the
rotating media.
Our prototype attempted only to improve time booting from the
primary hard disk drive (HDD). The internal HDD was first in the boot order by
default. The time savings was 2.9 sec.
Some OEMs prefer to set the DVD drive as the default boot device
because users who are unable to boot from a DVD might not know how to
change the default boot settings and might generate a support call. To avoid
this, our prototype includes a predefined hotkey that provides the option to
boot from DVD. If the user presses the hotkey during POST, the DVD is
selected as the boot device. The hotkey should be displayed as early as
possible and the time-out value kept short, or the hotkey feature itself will
contribute boot delay.
Booting from USB requires that the USB boot device be detected
during DXE, which is a timing trade off. We suggest that detection of a USB
boot device be performed only if USB boot is selected by the user.
During all on and off transitions (such as power on, resume from S3
sleep, and resume from S4 hibernate), boot media should be spun up as early
as possible during initialization to reduce I/O latencies.
SSD to replace HDD.
All on and off transitions can benefit from solid-state memory to
store the system volume, rather than a rotating storage device, to avoid spin-
up latency.
We did not test this impact. The degree of improvement depends on
other factors (bus speed and bus enumeration cost, for instance), so system
timing analysis is required to determine the best boot device selection.
Obviously, some price points cannot support SSDs in place of HDDs.
Visual Improvements
then makes transitions in and out of text mode, resulting in flashing screens,
blank screens, or flashing cursors. These assumptions generally do not apply to
laptops or all-in-one desktop designs.
Blade has a native panel resolution of 1280 × 800 pixels and supports
32-bit color. Because we did not yet know of the decision to freeze
Windows 7 T4 resolution at 1024 × 768, we built proofs of concept that
initialized the graphics into both native panel resolution (1280 × 800 × 32)
and also 1024 × 768 × 32 resolution.
In both cases the operating system screen resolution was set to a
maximum of 1280 × 800 × 32. In both cases screen images were deemed to
be superior to the factory default.
Due to the “fade and fireflies” animation during Windows 7 boot, the
difference between 1024 × 768 and 1280 × 800 was not noticeable, and in
both cases transitions to 1280 × 800 during operating system loading were
considered satisfactory.
High-resolution boot image. Firmware typically displays a low-fidelity image
(usually a logo) at boot. A high-fidelity image is not usually an option due to the
low resolution of the graphics system during boot.
Initially we sought to display a boot image at full native screen
resolution (1280 × 800 × 32 bit) but we had limitations of ROM space. Rather
than rewrite more of the BIOS to allow for greater image storage, we
experimented with greater JPEG compression ratios. We discovered that
higher compression sometimes looked worse than lower resolution, and that
the best tradeoff was image dependent (some images looked good only at
low compression and high resolution, whereas others were more flexible).
Ultimately we decided to use 1024 × 768 × 24 bit as our standard
image setting.
Fan Noise
Default fan settings. Many systems have the fan on all the time as a default
setting. Users who cannot find the fan feature in the BIOS menu may complain
about the fan noise.
In our prototype we did not change any of the fan settings, but we
may investigate this in future projects. In general, the fan should not always
be on by default and the fan noise should not exceed 22 dB.
Problem Overview
Typical firmware allows the user to change BIOS settings by pressing a hotkey during
BDS to access a special BIOS boot menu. This is a vestige of the PC’s history as a
scientific and engineering instrument, but should be considered an advanced feature
impractical for most consumers to use.
Typical firmware is also rather generic, with multiple CPU microcodes, multiple video
drivers, and multiple hardware configurations either combined into a single image or
spread over multiple ROMs. The simplicity of managing the single BIOS image is
traded off against longer boot times and higher bill of materials (BOM) costs.
BOM Impacts
Shared ROM and other circuit tradeoffs. Our investigation was performed on
an Intel Montevina system, and these systems offer ODMs a cost reduction
option if the embedded controller and BIOS share the same ROM. The timing
impact is substantial (0.5 sec in one case and 2.0 sec in the other) as is the cost
savings (about US$0.25 per unit in the slower option). Other chipsets may offer
different tradeoffs than shared ROM. It’s important that when systems are
specified that ODMs know which tradeoff to take and not let the ODMs simply
take the lower cost option by default.
ROM size. Storing high-resolution images in ROM may become costly if the
same firmware is used across multiple SKUs and a larger ROM is required to store
multiple images for the various SKUs. See “Engineering Process Impacts,” below.
Appendix 3: References
Advanced Configuration and Power Interface (ACPI) specification v4.0
http://www.acpi.info/
Unified Extensible Firmware Interface Specification v2.3
http://www.uefi.org/
UEFI Platform Initialization Specification v1.2
http://www.uefi.org/
Beyond BIOS (Zimmer, Rothman, Hale)
http://www.intel.com/intelpress/sum_efi.htm
Simple Boot Flag Specification v2.1
http://www.microsoft.com/whdc/resources/respec/specs/simp_boot.mspx
Windows Preinstallation Environment
http://technet.microsoft.com/en-us/library/dd744548(WS.10).aspx
Insyde Software Corp.
http://www.insydesw.com/