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Cc3100 Simplelink™ Wi-Fi Network Processor, Internet-Of-Things Solution For Mcu Applications
Cc3100 Simplelink™ Wi-Fi Network Processor, Internet-Of-Things Solution For Mcu Applications
CC3100
SWAS031D – JUNE 2013 – REVISED FEBRUARY 2015
1.1
1
Features
• CC3100 SimpleLink Wi-Fi Consists of Wi-Fi – RX Sensitivity
Network Processor and Power-Management • –95.7 dBm @ 1 DSSS
Subsystems • –74.0 dBm @ 54 OFDM
• Wi-Fi CERTIFIED™ Chip – Application Throughput
• Wi-Fi Network Processor Subsystem • UDP: 16 Mbps
– Featuring Wi-Fi Internet-On-a-Chip™ • TCP: 13 Mbps
– Dedicated ARM MCU • Host Interface
Completely Offloads Wi-Fi and Internet – Interfaces with 8-, 16-, and 32-Bit MCU or
Protocols from the External Microcontroller ASICs Over SPI or UART Interface
– Wi-Fi Driver and Multiple Internet Protocols in – Low External Host Driver Footprint: Less Than
ROM 7KB of Code Memory and 700 B of RAM
– 802.11 b/g/n Radio, Baseband, and Medium Memory Required for TCP Client Application
Access Control (MAC), Wi-Fi Driver, and • Power-Management Subsystem
Supplicant – Integrated DC-DC Supports a Wide Range of
– TCP/IP Stack Supply Voltage:
• Industry-Standard BSD Socket Application • VBAT Wide-Voltage Mode: 2.1 to 3.6 V
Programming Interfaces (APIs) • Preregulated 1.85-V Mode
• 8 Simultaneous TCP or UDP Sockets – Advanced Low-Power Modes
• 2 Simultaneous TLS and SSL Sockets • Hibernate with RTC: 4 µA
– Powerful Crypto Engine for Fast, Secure Wi-Fi • Low-Power Deep Sleep (LPDS): 115 µA
and Internet Connections with 256-Bit AES
• RX Traffic (MCU Active): 53 mA @
Encryption for TLS and SSL Connections
54 OFDM
– Station, AP, and Wi-Fi Direct® Modes
• TX Traffic (MCU Active): 223 mA @
– WPA2 Personal and Enterprise Security 54 OFDM, Maximum Power
– SimpleLink Connection Manager for • Idle Connected: 690 µA @ DTIM = 1
Autonomous and Fast Wi-Fi Connections
• Clock Source
– SmartConfig™ Technology, AP Mode, and
– 40.0-MHz Crystal with Internal Oscillator
WPS2 for Easy and Flexible Wi-Fi Provisioning
– 32.768-kHz Crystal or External RTC Clock
– TX Power
• Package and Operating Temperature
• 18.0 dBm @ 1 DSSS
– 0.5-mm Pitch, 64-Pin, 9-mm × 9-mm QFN
• 14.5 dBm @ 54 OFDM
– Ambient Temperature Range: –40°C to 85°C
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
CC3100
SWAS031D – JUNE 2013 – REVISED FEBRUARY 2015 www.ti.com
1.2 Applications
• For Internet-of-Things applications, such as:
– Cloud Connectivity – Internet Gateway
– Home Automation – Industrial Control
– Home Appliances – Smart Plug and Metering
– Access Control – Wireless Audio
– Security Systems – IP Network Sensor Nodes
– Smart Energy
1.3 Description
Connect any low-cost, low-power microcontroller (MCU) to the Internet of Things (IoT). The CC3100
device is the industry's first Wi-Fi CERTIFIED chip used in the wireless networking solution. The CC3100
device is part of the new SimpleLink Wi-Fi family that dramatically simplifies the implementation of Internet
connectivity. The CC3100 device integrates all protocols for Wi-Fi and Internet, which greatly minimizes
host MCU software requirements. With built-in security protocols, the CC3100 solution provides a robust
and simple security experience. Additionally, the CC3100 device is a complete platform solution including
various tools and software, sample applications, user and programming guides, reference designs and the
TI E2E™ support community. The CC3100 device is available in an easy-to-layout QFN package.
The Wi-Fi network processor subsystem features a Wi-Fi Internet-on-a-Chip and contains an additional
dedicated ARM MCU that completely offloads the host MCU. This subsystem includes an 802.11 b/g/n
radio, baseband, and MAC with a powerful crypto engine for fast, secure Internet connections with 256-bit
encryption. The CC3100 device supports Station, Access Point, and Wi-Fi Direct modes. The device also
supports WPA2 personal and enterprise security and WPS 2.0. This subsystem includes embedded
TCP/IP and TLS/SSL stacks, HTTP server, and multiple Internet protocols.
The power-management subsystem includes integrated DC-DC converters supporting a wide range of
supply voltages. This subsystem enables low-power consumption modes, such as the hibernate with RTC
mode requiringabout 4 μA of current.
The CC3100 device can connect to any 8, 16, or 32-bit MCU over the SPI or UART Interface. The device
driver minimizes the host memory footprint requirements requiring less than 7KB of code memory and 700
B of RAM memory for a TCP client application.
MAC Processor
HOST I/F
SPI
Baseband
UART
Synthesizer
DC2DC
SYSTEM
PA
BAT Monitor
Oscillators
LNA Radio
SWAS031-A
User Application
SimpleLink Driver
Internet Protocols
TLS/SSL Embedded Internet
TCP/IP
Supplicant
Wi-Fi Driver
Wi-Fi MAC Embedded Wi-Fi
Wi-Fi Baseband
Wi-Fi Radio
Table of Contents
1 Device Overview ......................................... 1 4.12 External Interfaces .................................. 22
1.1 Features .............................................. 1 4.13 Host UART .......................................... 23
1.2 Applications ........................................... 2 5 Detailed Description ................................... 26
1.3 Description ............................................ 2 5.1 Overview ............................................ 26
1.4 Functional Block Diagram ............................ 3 5.2 Functional Block Diagram ........................... 27
2 Revision History ......................................... 4 5.3 Wi-Fi Network Processor Subsystem ............... 27
3 Terminal Configuration and Functions .............. 5 5.4 Power-Management Subsystem .................... 28
3.1 Pin Attributes ......................................... 5 5.5 Low-Power Operating Modes ....................... 29
4 Specifications ............................................ 8 5.6 Memory .............................................. 29
4.1 Absolute Maximum Ratings .......................... 8 6 Applications and Implementation ................... 31
4.2 Handling Ratings ..................................... 8 6.1 Application Information .............................. 31
4.3 Power-On Hours ...................................... 8 7 Device and Documentation Support ............... 35
4.4 Recommended Operating Conditions ................ 8 7.1 Device Support ...................................... 35
4.5 Brown-Out and Black-Out ............................ 9 7.2 Documentation Support ............................. 36
4.6 Electrical Characteristics (3.3 V, 25°C) ............. 10 7.3 Community Resources .............................. 36
4.7 WLAN Receiver Characteristics .................... 10 7.4 Trademarks.......................................... 36
4.8 WLAN Transmitter Characteristics .................. 10 7.5 Electrostatic Discharge Caution ..................... 36
4.9 Current Consumption ............................... 11 7.6 Glossary ............................................. 36
4.10 Thermal Characteristics for RGC Package ......... 13 8 Mechanical Packaging and Orderable
4.11 Timing and Switching Characteristics ............... 13 Information .............................................. 37
2 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
DCDC_ANA2_SW_N
DCDC_ANA2_SW_P
DCDC_PA_SW_N
DCDC_PA_SW_P
VIN_DCDC_ANA
DCDC_ANA_SW
VIN_DCDC_DIG
DCDC_DIG_SW
DCDC_PA_OUT
VIN_DCDC_PA
VDD_PA_IN
VDD_ANA1
VDD_ANA2
LDO_IN1
SOP0
SOP1
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
VDD_RAM 49 32 nRESET
UART1_nRTS 50 31 RF_BG
RTC_XTAL_P 51 30 RESERVED
RTC_XTAL_N 52 29 RESERVED
NC 53 28 NC
VIN_IO2 54 27 NC
UART1_TX 55 26 NC
VDD_DIG2 56 CC3100 25 LDO_IN2
UART1_RX 57 24 VDD_PLL
TEST_58 58 23 WLAN_XTAL_P
TEST_59 59 22 WLAN_XTAL_N
TEST_60 60 21 SOP2/TCXO_EN
UART1_nCTS 61 20 NC
TEST_62 62 19 RESERVED
NC 63 18 NC
NC 64 17 NC
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
HOST_SPI_MOSI
FLASH_SPI_MOSI
VDD_DIG1
VIN_IO1
HOST_SPI_MISO
FLASH_SPI_MISO
nHIB
RESERVED
FORCE_AP
HOST_SPI_nCS
FLASH_SPI_CS
HOSTINTR
NC
NC
HOST_SPI_CLK
FLASH_SPI_CLK
NOTE
If an external device drives a positive voltage to signal pads when the CC3100 device is not
powered, DC current is drawn from the other device. If the drive strength of the external
device is adequate, an unintentional wakeup and boot of the CC3100 device can occur. To
prevent current draw, TI recommends one of the following:
• All devices interfaced to the CC3100 device must be powered from the same power rail
as the CC3100 device.
• Use level-shifters between the CC3100 device and any external devices fed from other
independent rails.
• The nRESET pin of the CC3100 device must be held low until the VBAT supply to the
device is driven and stable.
(1) Using a configuration file stored on flash, the vendor can optionally block any possibility of bringing up AP using the FORCE_AP pin.
6 Terminal Configuration and Functions Copyright © 2013–2015, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: CC3100
CC3100
www.ti.com SWAS031D – JUNE 2013 – REVISED FEBRUARY 2015
4 Specifications
All measurements are referenced at the device pins, unless otherwise indicated. All specifications are over
process and voltage, unless otherwise indicated.
(3) To ensure WLAN performance, ripple on the 2.1- to 3.3-V supply must be less than ±300 mV.
(4) To ensure WLAN performance, ripple on the 1.85-V supply must be less than 2% (±40 mV).
In the brown-out condition, all sections of the device shut down except for the Hibernate module (including the
32-kHz RTC clock), which remains on. The current in this state can reach approximately 400 µA.
The black-out condition is equivalent to a hardware reset event in which all states within the device are lost.
Table 4-1 lists the brown-out and black-out voltage levels.
TA = +25°C, VBAT = 2.1 to 3.6 V. Parameters measured at SoC pin on channel 7 (2442 MHz). (1)
Parameter Condition (2) Min Typ Max Units
1 DSSS 18.0
2 DSSS 18.0
11 CCK 18.3
6 OFDM 17.3
Maximum RMS output power measured at
9 OFDM 17.3 dBm
1 dB from IEEE spectral mask or EVM
18 OFDM 17.0
36 OFDM 16.0
54 OFDM 14.5
MCS7 (MM) 13.0
Transmit center frequency accuracy –25 25 ppm
(1) Channel-to-channel variation is up to 2 dB. The edge channels (2412 and 2472 MHz) have reduced TX power to meet FCC emission
limits.
(2) In preregulated 1.85-V mode, maximum TX power is 0.25 to 0.75 dB lower for modulations higher than 18 OFDM.
(5) DTIM = 1
(6) For the 1.85-V mode, the Hibernate current is higher by 50 µA across all operating modes because of leakage into the PA and analog
power inputs.
(7) The complete calibration can take up to 17 mJ of energy from the battery over a time of 24 ms . Calibration is performed sparingly,
typically when coming out of Hibernate and only if temperature has changed by more than 20°C or the time elapsed from prior
calibration is greater than 24 hours.
1 DSSS
19.00 280.00
Color by 264.40
17.00
TX Power (dBm)
11.00 218.00
9.00 202.00
7.00 186.70
5.00 171.00
3.00 155.60
1.00 140.00
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
TX power level setting
Note: The area enclosed in the circle represents a significant reduction in current when transitioning from TX power
level 3 to 4. In the case of lower range requirements (14 dbm output power), TI recommends using TX power level 4
to reduce the current.
6 OFDM
19.00 280.00
Color by
17.00 264.40
TX Power (dBm)
11.00 218.00
9.00 202.00
7.00 186.70
5.00 171.00
3.00 155.60
1.00 140.00
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
TX power level setting
54 OFDM
19.00 280.00
Color by
17.00 264.40
TX Power (dBm)
11.00 218.00
9.00 202.00
7.00 186.70
5.00 171.00
3.00 155.60
1.00 140.00
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
TX power level setting
Figure 4-5. TX Power and IBAT vs TX Power Level Settings (54 OFDM)
Figure 4-6. First-Time Power-Up and Reset Removal Timing Diagram (32K XTAL)
Table 4-2 describes the timing requirements for the 32K XTAL first-time power-up and reset removal.
Table 4-2. First-Time Power-Up and Reset Removal Timing Requirements (32K XTAL)
Item Name Description Min Typ Max
Depends on
application board
T1 Supply settling time 3 ms
power supply, decap,
and so on
Hardware wakeup
T2 25 ms
time
32-kHz XTAL settling
+ firmware
T3 Initialization time 1.35 s
initialization time +
radio calibration
Figure 4-7. First-Time Power-Up and Reset Removal Timing Diagram (External 32K)
Table 4-3 describes the timing requirements for the external 32K first-time power-up and reset removal.
Table 4-3. First-Time Power-Up and Reset Removal Timing Requirements (External 32K)
Item Name Description Min Typ Max
Depends on
application board
T1 Supply settling time 3 ms
power supply, decap,
and so on
Hardware wakeup
T2 25 ms
time
Firmware initialization
T3 Initialization time time + radio 250 ms
calibration
NOTE
The 32.768-kHz XTAL is kept enabled by default when the chip goes to hibernate in response to
nHIB being pulled low.
(2) If temperature changes by more than 20°C, initialization time from HIB can increase by 200 ms due to radio calibration.
51
RTC_XTAL_P
10 pF
GND
32.768 kHz
52
RTC_XTAL_N
10 pF
GND
SWAS031-028
32.768 kHz
RTC_XTAL_P
Host system
VIO
100 K
RTC_XTAL_N
SWAS031-029
23
WLAN_XTAL_P
6.2 pF
GND
40 MHz
22
WLAN_XTAL_N
6.2 pF
GND
SWAS031-030
CC3200 XO (40MHz)
TCXO_EN EN
82 pF
WLAN_XTAL_P OUT
WLAN_XTAL_N
SWAS031-087
(1) Insertion loss directly impacts output power and sensitivity. At customer discretion, insertion loss can be relaxed to meet attenuation
requirements.
Copyright © 2013–2015, Texas Instruments Incorporated Specifications 19
Submit Documentation Feedback
Product Folder Links: CC3100
CC3100
SWAS031D – JUNE 2013 – REVISED FEBRUARY 2015 www.ti.com
4.11.4 Interfaces
This section describes the interfaces that are supported by the CC3100 device:
• Host SPI
• Flash SPI
• Host UART
I2
CLK
I6 I7
MISO
I9
I8
MOSI
SWAS032-017
I2
CLK
I6 I7
MISO
I9
I8
MOSI
SWAS032-017
FLASH_SPI_CLK SPI_CLK
FLASH_SPI_nCS SPI_CS
FLASH_SPI_MISO SPI_MISO
FLASH_SPI_MOSI SPI_MOSI
SWAS031-026
HOST_SPI_CLK SPI_CLK
HOST_SPI_nCS SPI_nCS
HOST_SPI_MISO SPI_MISO
HOST_SPI_MOSI SPI_MOSI
HOST_INTR INTR
nHIB GPIO
SWAS031-027
RTS RTS
CTS CTS
HOST MCU TX TX CC3100 SL
UART UART
RX RX
HOST_INTR(IRQ) HOST_INTR(IRQ)
SWAS031-088
This is the typical and recommended UART topology because it offers the maximum communication
reliability and flexibility between the host and the SimpleLink device.
RTS RTS
CTS CTS
HOST MCU TX TX CC3100 SL
UART UART
RX RX
H_IRQ X H_IRQ
SWAS031-089
RTS RTS
X
CTS CTS
HOST MCU TX TX CC3100 SL
UART UART
RX RX
H_IRQ X H_IRQ
SWAS031-090
• Host goes to sleep but the UART module has receiver start-edge detection for auto wakeup and does
not lose data.
• Host can always receive any amount of data transmitted by the SimpleLink device because there is no
flow control in this direction.
Because there is no full flow control, the host cannot stop the SimpleLink device to send its data; thus, the
following parameters must be carefully considered:
• Max baud rate
• RX character interrupt latency and low-level driver jitter buffer
• Time consumed by the user's application
5 Detailed Description
5.1 Overview
5.1.1.1 WLAN
• 802.11b/g/n integrated radio, modem, and MAC supporting WLAN communication as a BSS station
with CCK and OFDM rates in the 2.4-GHz ISM band
• Auto-calibrated radio with a single-ended 50-Ω interface enables easy connection to the antenna
without requiring expertise in radio circuit design.
• Advanced connection manager with multiple user-configurable profiles stored in an NVMEM allows
automatic fast connection to an access point without user or host intervention.
• Supports all common Wi-Fi security modes for personal and enterprise networks with on-chip security
accelerators
• SmartConfig technology: A 1-step, 1-time process to connect a CC3100-enabled device to the home
wireless network, removing dependency on the I/O capabilities of the host MCU; thus, it is usable by
deeply embedded applications.
• 802.11 transceiver mode: Allows transmitting and receiving of proprietary data through a socket
without adding MAC or PHY headers. This mode provides the option to select the working channel,
rate, and transmitted power. The receiver mode works together with the filtering options.
5.1.1.4 System
• Works from a single preregulated power supply or connects directly to a battery
• Ultra-low leakage when disabled (hibernate mode) with a current of less than 4 µA with the RTC
running
• Integrated clock sources
VCC
32 kHz
CC3100
MCU nHIB Network processor
HOST_INTR
SPI/UART
SWAS031-018
5.5.2 Hibernate
The hibernate mode is the lowest power mode in which all of the digital logic is power-gated. Only a small
section of the logic powered directly by the main input supply is retained. The real-time clock (RTC) is kept
running and the device wakes up once the nHIB line is asserted by the host driver. The wake-up time is
longer than LPDS mode at about 50 ms.
NOTE
Wake-up time can be extended to 75 ms if a patch is loaded from the serial flash.
5.6 Memory
All file types can have a maximum of 128 supported files in the file system. All files are stored in blocks of
4KB and thus use a minimum of 4KB of flash space. Encrypted files with fail-safe support and optional
security are twice the original size and use a minimum of 8KB. Encrypted files are counted as fail safe in
terms of space. The maximum file size is 16MB.
Table 5-2 lists the SFLASH size recommendations.
The CC3100 device supports JEDEC specification SFDP (serial flash device parameters). The following
SFLASH devices are verified for functionality with the CC3100 device in addition to the ones in the
reference design:
• Micron (N25Q128-A13BSE40): 128Mb
• Spansion (S25FL208K): 8Mb
• Winbond (W25Q16V): 16Mb
• Adesto (AT25DF081A): 8Mb
• Macronix (MX25L12835F-M2): 128Mb
For compatibility with the CC3100 device, the SFLASH device must support the following commands:
• Command 0x9F (read the device ID [JEDEC]). Procedure: SEND 0x9F, READ 3 bytes.
• Command 0x05 (read the status of the SFLASH). Procedure: SEND 0x05, READ 1 byte. Assume bit 0
is busy and bit 1 is write enable.
• Command 0x06 (set write enable). Procedure: SEND 0x06, read status until write-enable bit is set.
• Command 0xC7 (chip erase). Procedure: SEND 0xC7, read status until busy bit is cleared.
• Command 0x03 (read data). Procedure: SEND 0x03, SEND 24-bit address, read n bytes.
• Command 0x02 (write page). Procedure: SEND 0x02, SEND 24-bit address, write n bytes (0<n<256).
• Command 0x20 (sector erase). Procedure: SEND 0x20, SEND 24-bit address, read status until busy
bit is cleared. Sector size is assumed to be always 4K.
VBAT
VBAT VBAT
R1
100k
C27 C26 C6
100uF 100uF C2 C3 C4 C5
0.1uF
4.7uF 4.7uF 4.7uF 0.1uF C1
0.1uF FL1
2.4GHz Filter
DEA202450BT-1294C1-H
Feed
37
39
44
54
10
32
U1 L2 3.6nH E1
1 3 2.45GHz Ant
VIN_DCDC_ANA
VIN_DCDC_PA
VIN_DCDC_DIG
VIN_IO2
VIN_IO1
nRESET
IN OUT AH316M245001-T
GND1
GND2
C8
1.0pF
4
VBAT
Antenna match
50 Ohm (Depends on type of
31 antenna)
RF_BG
L1 2.2uH R75
38 100k
DCDC_ANA_SW U2 VBAT
C7 VBAT
48 14 1 8
10uF VDD_ANA1 FLASH_SPI_CSn CS VCC
13 2 7
C9 FLASH_SPI_MISO DOUT RESET C10
0.1uF 12 5 3 0.1uF
FLASH_SPI_MOSI DIN WP
11 6 4 R79
36 FLASH_SPI_CLK CLK GND
LDO_IN1 100k
R76 100k
25
LDO_IN2 nRESET
R77 100k 8M (1M x 8)
UART1_nCTS
61 M25PX80-VMN6TP
CC_UART1_CTS Flash programming
C11 C12
0.1uF 0.1uF 50
(Connect TP to UART, nRESET
UART1_nRTS CC_UART1_RTS to be driven by external programmer)
UART1_TX
55
CC_UART1_TX RTS/CTS optional
57
L3 UART1_RX CC_UART1_RX
40
DCDC_PA_SW_P 58 TP1
1uH 41 TEST_58 R78
DCDC_PA_SW_N 59 TP2
TEST_59 100k
42
DCDC_PA_OUT
Needed only when using
C13 C14 33 60 TP3
UART as host interface
VDD_PA_IN TEST_60
22uF 22uF 62 TP4
C15 TEST_62
1.0uF
63
NC
64
L4 2.2uH NC
43 3 R84
DCDC_DIG_SW RESERVED 100k
9 4 R83
C16 VDD_DIG1 FORCE_AP 100k
C17 56
10uF VDD_DIG2
0.1uF C18
2
nHIB CC_nHIB
0.1uF
HOST_SPI_nCS
8
CC_SPI_CS
HOST INTERFACE
45
DCDC_ANA2_SW_P (Do not leave nHIB floating.
5
46 HOST_SPI_CLK CC_SPI_CLK Always connect to host)
DCDC_ANA2_SW_N 6
47 HOST_SPI_MOSI CC_SPI_DIN
VDD_ANA2 7
HOST_SPI_MISO CC_SPI_DOUT
15
HOSTINTR CC_IRQ
49 R81 10k
VDD_RAM
24 R82 100k
C21 VDD_PLL
C20 18
0.1uF 27 RESERVED
0.1uF NC_27
28
NC_28
26 23
NC_26 WLAN_XTALP
C22
22
52 WLAN_XTALM
RTC_XTAL_N Y2
10pF 53
Y1 NC_53
TCXO_EN/SOP2
Crystal 29
32.768KHz 51 NC_29
RESERVED
C23 RTC_XTAL_P
GND_TAB
ABS07-32.768KHZ-T 30
NC_30
NC_20
NC_16
NC_17
SOP0
SOP1
1 C25
NC_01 C24
10pF 6.2pF
6.2pF
35
34
21
19
20
16
17
65
CC3100R
2
40 MHz
Q24FA20H00396
40MHz, ESR < 50, CL = 8pF, 20ppm
R9
100k
R4
R10 R11 100k
100k 10k
Table 6-1 lists the bill of materials for an application using the CC3100 wide-voltage mode.
Table 6-1. Bill of Materials for CC3100 Wide Voltage Mode ApplicationTable 6-1
Item Qty Reference Value Manufacturer Part Number Description
1 12 C1 C5 C6 C9 0.1 µF Taiyo Yuden LMK105BJ104KV-F CAP CER 0.1 µF 10 V 10% X5R 0402
C10 C11 C12
C17 C18 C20
C21 C28
2 3 C2 C3 C4 4.7 µF Samsung Electro- CL05A475MQ5NRNC CAP CER 4.7 µF 6.3 V 20% X5R 0402
Mechanics
America, Inc
3 1 C8 1.0 pF Murata Electronics GJM1555C1H1R0BB01D CAP CER 1 pF 50 V NP0 0402
North America
4 1 C13 22 µF Taiyo Yuden AMK107BBJ226MAHT CAP CER 22 µF 4 V 20% X5R 0603
5 1 C16 10 µF Murata Electronics GRM188R60J106ME47D CAP CER 10 µF 6.3 V 20% X5R 0603
North America
6 2 C22 C23 10 pF Murata Electronics GRM1555C1H100FA01D CAP CER 10 pF 50 V 1% NP0 0402
North America
7 2 C24 C25 6.2 pF Kemet CBR04C609B1GAC CAP CER 6 pF 100 V NP0 0402
8 2 C26 C27 100 µF TDK Corportation C3216X5R0J107M160AB CAP CER 100 µF 6.3 V 20% X5R 1206
9 1 E1 2.45G Taiyo Yuden AH316M245001-T ANT BLUETOOTH WLAN ZIGBEE
Hz Ant WIMAX
10 1 FL1 2.4G Hz TDK-Epcos DEA202450BT-1294C1-H FILTER BANDPASS 2.45 GHZ WLAN
Filter SMD
11 1 L2 3.6 nH Murata Electronics LQP15MN3N6B02D INDUCTOR 3.6 nH 0.1 nH 0402
North America
12 1 L4 2.2 µH Murata Electronics LQM2HPN2R2MG0L INDUCTOR 2.2 µH 20% 1300 mA 1008
North America
13 1 U1 CC3100 Texas Instruments CC3100R1 802.11bg Wi-Fi Processor
14 1 U2 8M (1M Winbond W25Q80BWZPIG IC FLASH 8 Mb 75 MHZ 8WSON
x 8)
15 1 Y1 Crystal Abracon ABS07-32.768KHZ-T CRYSTAL 32.768 KHZ 12.5 pF SMD
Corporation
16 1 Y2 Crystal Epson Q24FA20H00396 CRYSTAL 40 MHZ 8 pF SMD
NOTE
Use any 5% tolerance resistor 0402 or higher package.
5 4 3 2 1
1.85V
1.85V 1.85V
R1
100k
C27 C26 C6
100uF 100uF C2 C3 C4 C5
0.1uF
4.7uF 4.7uF 4.7uF 0.1uF C1
D D
0.1uF FL1
2.4GHz Filter
DEA202450BT-1294C1-H
Feed
37
39
44
54
10
32
U3 L2 3.6nH E1
1 3 2.45GHz Ant
VIN_DCDC_ANA
VIN_DCDC_PA
VIN_DCDC_DIG
VIN_IO2
VIN_IO1
nRESET
IN OUT AH316M245001-T
GND1
GND2
C8
1.0pF
4
1.85V
1.85V
Antenna match
50 Ohm (Depends on type of
31 antenna)
RF_BG
R75
38 100k
DCDC_ANA_SW U2 1.85V
48 14 1 8 1.85V
VDD_ANA1 FLASH_SPI_CSn CS VCC
13 2 7
C9 FLASH_SPI_MISO DOUT RESET C10
0.1uF 12 5 3 0.1uF
FLASH_SPI_MOSI DIN WP
11 6 4 R79
36 FLASH_SPI_CLK CLK GND
LDO_IN1 100k
R76 100k
25
LDO_IN2 nRESET
R77 100k 8M (1M x 8)
C7
UART1_nCTS
61 W25Q80BWZPIG
CC_UART1_CTS Flash programming
C11 C12
4.7uF 0.1uF 0.1uF 50 (Connect TP to UART, nRESET
UART1_nRTS CC_UART1_RTS to be driven by external programmer)
UART1_TX
55
CC_UART1_TX RTS/CTS optional
57
UART1_RX CC_UART1_RX
C 40 C
DCDC_PA_SW_P 58 TP1
41 TEST_58 R78 Needed only when using
DCDC_PA_SW_N 59 TP2 UART as host interface
TEST_59 100k
42
DCDC_PA_OUT
33 60 TP3
VDD_PA_IN TEST_60
C13 62 TP4
TEST_62
22uF
63
NC
64
L4 2.2uH NC
43 3 R83 100k
DCDC_DIG_SW RESERVED
9 4 R84 100k
C16 VDD_DIG1 FORCE_AP
C17 56
10uF VDD_DIG2
0.1uF C18
2
nHIB CC_nHIB
0.1uF
HOST_SPI_nCS
8
CC_SPI_CS
HOST INTERFACE
45
DCDC_ANA2_SW_P (Do not leave nHIB floating.
5
46 HOST_SPI_CLK CC_SPI_CLK Always connect to host)
DCDC_ANA2_SW_N 6
47 HOST_SPI_MOSI CC_SPI_DIN
VDD_ANA2 7
HOST_SPI_MISO CC_SPI_DOUT
15
HOSTINTR CC_IRQ
49 R81 10k
VDD_RAM
24 R82 100k
C21 VDD_PLL
C20 18
0.1uF 27 RESERVED
B 0.1uF NC_27 B
28
NC_28
26 23
NC_26 WLAN_XTALP
C22
22
52 WLAN_XTALM
RTC_XTAL_N Y2
10pF 53
Y1 NC_53
TCXO_EN/SOP2
3
Crystal 29
32.768KHz 51 NC_29
RESERVED
C23 RTC_XTAL_P
GND_TAB
ABS07-32.768KHZ-T 30
NC_30
NC_20
NC_16
NC_17
SOP0
SOP1
1 C25
NC_01 C24
10pF 6.2pF
6.2pF
35
34
21
19
20
16
17
65
CC3100
4
40 MHz
Q24FA20H00396
40MHz, ESR < 50, CL = 8pF, 20ppm
R9
100k R4
100k
R10 R11
100k 10k
A A
5 4 3 2 1
Table 6-1 lists the bill of materials for an application using the CC3100 preregulated 1.85-V mode.
Table 6-2. Bill of Materials for CC3100 Preregulated 1.85-V Mode Application
Item Qty Reference Value Manufacturer Part Number Description
1 12 C1 C5 C6 C9 0.1 µF Taiyo Yuden LMK105BJ104KV-F Capacitor, Ceramic: 0.1 µF 10 V 10%
C10 C11 C12 X5R 0402
C17 C18 C20
C21 C28
2 4 C2 C3 C4 C7 4.7 µF Samsung Electro- CL05A475MQ5NRNC Capacitor, Ceramic: 4.7 µF 6.3 V 20%
Mechanics X5R 0402
America, Inc
3 1 C8 1.0 pF Murata Electronics GJM1555C1H1R0BB01D Capacitor, Ceramic: 1 pF 50 V NP0 0402
North America
4 1 C13 22 µF Taiyo Yuden AMK107BBJ226MAHT Capacitor, Ceramic: 22 µF 4 V 20% X5R
0603
5 1 C16 10 µF Murata Electronics GRM188R60J106ME47D Capacitor, Ceramic: 10 µF 6.3 V 20%
North America X5R 0603
6 2 C22 C23 10 pF Murata Electronics GRM1555C1H100FA01D Capacitor, Ceramic: 10 pF 50 V 1% NP0
North America 0402
7 2 C24 C25 6.2 pF Kemet CBR04C609B1GAC Capacitor, Ceramic: 6 pF 100 V NP0
0402
8 2 C26 C27 100 µF TDK Corportation C3216X5R0J107M160AB Capacitor, Ceramic: 100 µF 6.3 V 20%
X5R 1206
9 1 E1 2.45- Taiyo Yuden AH316M245001-T Antenna, Bluetooth: WLAN ZigBee
GHz WIMAX
Ant
10 1 FL1 2.4- TDK-Epcos DEA202450BT-1294C1-H Filter, Bandpass: 2.45 GHz WLAN SMD
GHz
Filter
11 1 L2 3.6 nH Murata Electronics LQP15MN3N6B02D Inductor: 3.6 nH 0.1 nH 0402
North America
12 1 L4 2.2 µH Murata Electronics LQM2HPN2R2MG0L Inductor: 2.2 µH 20% 1300 mA 1008
North America
13 1 U1 CC3100 Texas Instruments CC3100R1 802.11bg Wi-Fi Processor
14 1 U2 8M Winbond W25Q80BWZPIG IC Flash 8 Mb 75 MHz 8WSON
(1M x
8)
15 1 Y1 Crystal Abracon ABS07-32.768KHZ-T Crystal 32.768 kHz 12.5 pF SMD
Corporation
16 1 Y2 Crystal Epson Q24FA20H00396 Crystal 40 MHZ 8 pF SMD
NOTE
Use any 5% tolerance resistor 0402 or higher package.
X CC 3 1 0 0 R 1 1M RGC R
PREFIX
X = perproduction device PACKAGING
no prefix = production device R = tape/reel
T = small reel
DEVICE FAMILY
CC = wireless connectivity
PACKAGE
RGC = 9x9 QFN
SERIES NUMBER
3 = Wi-Fi Centric
7.4 Trademarks
SimpleLink, Internet-On-a-Chip, SmartConfig, E2E are trademarks of Texas Instruments.
Wi-Fi CERTIFIED is a trademark of Wi-Fi Alliance.
Wi-Fi, Wi-Fi Direct are registered trademarks of Wi-Fi Alliance.
All other trademarks are the property of their respective owners.
7.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
Copyright © 2013–2015, Texas Instruments Incorporated Mechanical Packaging and Orderable Information 37
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Product Folder Links: CC3100
PACKAGE OPTION ADDENDUM
www.ti.com 7-Feb-2020
PACKAGING INFORMATION
Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) (6) (3) (4/5)
CC3100R11MRGC ACTIVE VQFN RGC 64 260 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 CC3100R1
& no Sb/Br)
CC3100R11MRGCR ACTIVE VQFN RGC 64 2500 TBD Call TI Call TI -40 to 85 CC3100R1
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
GENERIC PACKAGE VIEW
RGC 64 VQFN - 1 mm max height
9 x 9, 0.5 mm pitch PLASTIC QUAD FLATPACK - NO LEAD
Images above are just a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.
4224597/A
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