Homework Problem Set for Weeks 6 and 7

1a) Sketch the major features of a TFT in cross-section. Include typical materials.

Source Channel Drain

Al a-Si Al

SiNx Al ITO

1b) Sketch the cross-section of a color, active matrix, TFT TN LCD. Show the color
filters, the pixel electrodes (both sides), the alignment layer on each side and the address
conductors.

CF Substrate

TFT Substrate

1c) What material provides the pixel electrode? What is the special optical property
required of the material?

ITO -- Transparent
1d) What is the typical method for setting the alignment direction of the alignment layer?

Polyimide layer and a buffing wheel.

2a) Illustrate the distributed electrical model of a single row line.

Total Line Resistance Rline

Total Line Capacitance Cline

2b) To what are the capacitors referenced?

Partly to Vcom, partly to the column lines partly to the pixel through Cgd and if
connected to the gate line, Cs.

3a) Illustrate the distributed electrical model of a single column line.

Total Line Resistance Rline

Total Line Capacitance Cline

3b) To what are the capacitors referenced?

Partly to Vcom, partly to the row lines.

4a) Referring to the figure, derive the equation relating V to Vgate.

Cgd

V
Vgate Cstore
Clc

1
sC1
I(s)
V1(s) 1
sC2 V2(s)

v1(t)
v2(t) =
C2
1+
C1

Since C2 = CLC + CS

vg
v =
Clc + Cs
1+
Cgd

vgCgd
v =
Cgd+ Clc + Cs
4b) Assuming that Clc is a function of GL voltage, derive the following equation from the
equation derived in 4a above:

Cgd  V gate Cgd  V gate

 V(GL )  
C gd  Clc min  C s (C + C
gd lc min +Cs ) [(Cgd + Clc(GL)+Cs )/(Clc(GL) – Clc min )]
5a) Sketch the row signal timing. Show the row clock and the OE signal.

OE

Row N

Row N + 1

Row N + 2

Row N + 3
Line N Line N+1 Line N+2 Line N+3

5b) What is the function of the OE signal and why is it needed?

OE shortens the row signal to assure it reaches the end of the line before the CD data
changes.

6) Given the equation below, assuming that:

Cgd = 0.1 pf
Cs = 1.2 pF
Vgate 1-2 = 30 volts
what voltage does Vgate 2-3 need to be in order to null V?

 C gd  Vgate ( n ) _12  CS  Vgate ( n1) _ 23 

Vtotal  
 C gd  Clc  Cs 

(0.1pf x 30volts)/(1.2 pf) = 2.5 volts