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EEA051 - Digital Logic • Boolean Algebra (formulated by E.V.

Huntington, 1904)
數位邏輯 A set of elements B={0,1} and two binary operators + and ‧
• Huntington postulates
1. Closure w.r.t. the operator + (‧)
x, y ∈ B ⇒ x+y ∈B; x, y ∈ B ⇒ x‧y ∈B
2. Associative w.r.t. + (‧)
(x+y)+z = x + (y + z); (x‧y)‧z = x ‧ (y‧z)
3. Commutative w.r.t. + (‧)
x+y = y+x; x‧y = y‧x
4. An identity element w.r.t. + (‧)
吳俊興 0+x = x+0 = x; 1‧x = x‧1= x
5. ∀ x ∈ B, ∃ x' ∈ B (complement of x)
高雄大學 資訊工程學系 x+x'=1; x‧x'=0
6. ‧ is distributive over + : x‧(y+z)=(x‧y)+(x‧z)
+ is distributive over ‧: x+ (y‧z)=(x+ y)‧(x+ z)
September 2004 Duality principle: remains valid if the operators and identity elements
are interchanged

‧= AND
+ = OR
2-1 Basic Definitions
‘ = NOT
2-2 Axiomatic Definition of Boolean Algebra
2-3 Basic Theorems and Properties
2-4 Boolean Functions Distributive law: x‧(y+z)=(x‧y)+(x‧z)

2-5 Canonical and Standard Forms


2-6 Other Logic Operations
2-7 Digital Logic Gates
2-8 Integrated Circuits
Operator Precedence
1. parentheses
2. NOT
3. AND
4. OR

A table of all possible combinations of the variables showing the


relation between the variable values and the result of the operation
Theorem 6(a) Absorption

Theorem 5. DeMorgan
Logic Circuit ⇔ Boolean Function

Boolean Functions
F1 = x + (y’z) F2 = x’y’z + x’yz + xy’

2-variable DeMorgan’s Theorem


(x + y)’ = x’y’ and (xy)’ = x’ + y’
3-variable DeMorgan’s Theorem

Generalized DeMorgan’s Theorem

F2 = x’y’z + x’yz + xy’


•Complement of a variable x is x’ (0 ⇒ 1 and 1 ⇒ 0) • Minterms and Maxterms
– Expressing combinations of 0’s and 1’s with binary variables
•The complement of a function F is F’ and is obtained from an
(normal form x or complement form x’)
interchange of 0’s for 1’s and 1’s for 0’s in the value of F
• Logic circuit ⇔ Boolean function ⇔ Truth table
•The dual of a function is obtained from the interchange of AND
and OR operators and 1’s and 0’s – Any Boolean function can be expressed as a sum of minterms
– Any Boolean function can be expressed as a product of
maxterms
•Finding the complement of a function F • Canonical and Standard Forms
9Applying DeMorgan’s theorem as many times as necessary
9complementing each literal of the dual of F

Minterm (or standard product): Maxterm (or standard sum):


– = n variables combined with AND – = n variables combined with OR
– n variables can be combined to – A variable of a maxterm is
form 2n minterms • unprimed if the corresponding
• two variables: x’y’, x’y, xy’, and xy bit is a 0
– A variable of a minterm is • and primed if a 1
001 => x’y’z
• primed if the corresponding bit of 100 => xy’z’
the binary number is a 0, mj’ = Mj 111 => xyz
• and unprimed if a 1
Expressing Truth Table in Boolean Function Expressing Boolean Function in Sum of
• Any Boolean function Minterms (Method 2 – Truth Table)
can be expressed as
a sum of minterms or
a product of maxterms
(either 0 or 1 for each term)
• said to be in a canonical
form
• n variables
⇒ 2n minterms
⇒ 22n possible functions

(x+y’+z’)
F(A, B, C) = Σ(1, 4, 5, 6, 7) = Π(0, 2, 3)
F’(A, B, C) = Σ(0, 2, 3) = Π(1, 4, 5, 6, 7)

Expressing Boolean Function in Sum of Expressing Boolean Function in Product of


Minterms (Method 1 - Supplementing) Maxterms
¾ Canonical conversion procedure
• Canonical forms: each minterm or maxterm must
Consider: F(A, B, C) = Σ(1, 4, 5, 6, 7)
contain all the variables
F’: Complement of F = F’(A, B, C) = Σ(0, 2, 3) = m0 + m2 + m3 • Standard forms: the terms that form the function
Compute complement of F’ by DeMorgan’s Theorem may contain one, two, or any number of literals
F = (F’)’ = (m0 + m2 + m3)’ = (m0’ + m2’ + m3’) (variables)
= m0’⋅ m2’⋅ m3’ = M0M2M3 = Π(0, 2, 3) • Two types of standard forms (2-level)
– sum of products
¾ Summary F1 = y’ + xy + x’yz’
• mj’ = Mj
– product of sums
• Conversion between product of maxterms and sum of minterms
F2 = x(y’ + z)(x’ + y + z’)
Σ(1, 4, 5, 6, 7) = Π(0, 2, 3)
• Shown by truth table (Table 2-5)
• Canonical forms ⇔ Standard forms
– Sum of minterms, Product of maxterms
– Sum of products, Product of sums

¾Boolean expression: F(x, y, z) = xy + x’z


¾Deriving the truth table

¾Expressing in canonical forms F1 = y’ + xy + x’yz’ F2 = x(y’ + z)(x’ + y + z’)


F(x, y, z) = Σ(1, 3, 6, 7) = Π(0, 2, 4, 5)
Nonstandard form: Standard form:
F3 = AB + C(D+E) F3 = AB + CD + CE
A two-level implementation is preferred: produces the least amount of delay
through the gates when the signal propagates from the inputs to the output

• There are 22n functions for n binary


variables Figure 2-5 Digital Logic Gates
• For n=2
– there are 16 possible functions
1. Two are equal to a constant
– AND and OR operators are two of them: x⋅y and x+y
2. Four are repeated twice
• Subdivided into three categories:
3. Two, Inhibition and implication, are
impractical

The gates can be extended to have


more than two inputs except for the
inverter and buffer
• NAND and NOR functions are Digital ICs are often categorized according to their circuit
communicative but not associative complexity as measured by the number of logic gates in a
single package
– Small-scale integration (SSI)
– Define multiple NOR (or NAND) gate as a • the inputs and outputs of the gates are connected directly to the pins
in the package
complemented OR (or AND) gate (Section 3-6) • usually fewer than 10 gates, limited by the number of pins available
– Medium-scale integration (MSI)
• 10 to 1,000 gates in a package
• usually perform specific elementary digital operations
XOR and equivalence gates are both – Large-scale integration (LSI)
• Thousands of gates
communicative and associative • Include digital systems such as processors, memory chips, and
programmable logic devices
– uncommon, usually constructed with other gates
– Very large-scale integration (VLSI)
– XOR is an odd function (Section 3-8) • Hundred of thousands of gates

Chapter 2 Boolean Algebra and Logic Gates


• 2-1 Basic Definitions
• 2-2 Axiomatic Definition of Boolean Algebra
• 2-3 Basic Theorems and Properties
• 2-4 Boolean Functions
• 2-5 Canonical and Standard Forms
• 2-6 Other Logic Operations
• 2-7 Digital Logic Gates
• 2-8 Integrated Circuits

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