Tutorial 2: CC118 Computer Organisation and Architecture

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CC118 Computer Organisation and Architecture

TUTORIAL 2
CHAPTER 2

1. What is register? Briefly describe the names and functions of two main important
registers in CPU.
A register is one of a small set of data holding places that are part of the computer
processor. A register may hold an instruction, a storage address, or any kind of data
(such as a bit sequence or individual characters).
The two main important registers are; -
i. Memory Address Register (MAR): This register holds the address of
memory where CPU wants to read or write data. When CPU wants to
store some data in memory or reads the data from the memory, it places
the address of the required memory location in the MAR.
ii. I/O Address Register (I/O Register): It specifies the address of a
particular I/O device.

2. Compare and contrast between registers and main memory.


The register holds the data that CPU is currently processing. Register holds the small
amount of data around 32-bits to 64-bits. CPU can operate on register contents at the
rate of more than one operation in one clock cycle. Example: Accumulator register,
Program counter, Instruction register, Address register, etc.
Whereas, the main memory holds program instruction and data that the program
requires for execution. Main memory of the computer can range from some GB to
TB. CPU accesses memory at the slower rate than register. Example: RAM.

3. Assume that there is an instruction to add two values; a and b. Discuss how this
instruction can be carried out by instruction execution steps.
i. Fetch next instruction from memory i.e. a into instruction register.
ii. Change program counter to point to next instruction.
iii. Determine type of instruction just fetched.
iv. If instructions use word in memory, determine where Fetch word, if needed,
into CPU register.
v. Execute the instruction
vi. Go to step 1 to begin executing next instruction.
vii. Fetch next instruction from memory i.e. an add instruction into instruction
register.
viii. Change program counter to point to next instruction.
ix. Determine type of instruction just fetched.
x. If instructions use word in memory, determine where Fetch word, if needed,
into CPU register.
xi. Execute the instruction
xii. Go to step 1 to begin executing next instruction.
xiii. Fetch next instruction from memory i.e. b into instruction register.
xiv. Change program counter to point to next instruction.
xv. Determine type of instruction just fetched.
xvi. If instructions use word in memory, determine where Fetch word, if needed,
into CPU register.
xvii. Now add a and b.
CC118 Computer Organisation and Architecture

xviii. Execute the instruction.

4. There are two general CPU designs are used today: namely Complex Instruction Set
Computing (CISC) and Reduced Instruction Set Computing (RISC). Discuss both
CPU designs in details and draw instruction processing diagrams for RISC and CISC
CPU.
Complex Instruction Set Computing (CISC): The CISC approach attempts to
minimize the number of instructions per program, sacrificing the number of cycles
per instruction. Computers based on the CISC architecture are designed to decrease
the memory cost. As the large programs need more storage, it results in the
increment of the memory cost and large memory becomes more expensive. When the
CPU gets a command, it assigns specific instructions to different parts of the chip.
When a command is finished and the next command is received, the CPU uses the
same parts of the chip it used before.
Reduced Instruction Set Computing (RISC): RISC is used in portable devices due to
its power efficiency. For Example, Apple iPod and Nintendo DS. RISC is a type of
microprocessor architecture that uses highly-optimized set of instructions. RISC does
the opposite, reducing the cycles per instruction at the cost of the number of
instructions per program Pipelining is one of the unique features of RISC. It is
performed by overlapping the execution of several instructions in a pipeline fashion.
It has a high-performance advantage over CISC.

5. What is the difference between instruction-level parallelism and processor-level


parallelism?
Instruction-level parallelism Processor-level parallelism

Overlap individual machine Having separate processors getting


operations (add, mul, load…) so that separate chunks of the program
they execute in parallel. (processors programmed to do so).
They are transparent to the user. Non-transparent to the user.

Their main goal is to speed up Their main Goal is to speed up and


execution. quality up.

6. If a memory has 10 cells, how many addresses do the memory has?


If a memory has 10 cells, then it has 0 to 9 addresses.
CC118 Computer Organisation and Architecture

7. How many different bit combinations can memory cell hold if the cell consists of 27
bit?
If a memory cell consists of 27 bits, then it has 134217728 different bit
combinations.

8. What is the purpose of step 2 in instruction execution steps? What would happen if
this step were omitted?
The purpose of step 2 in instruction execution steps is to change the program counter
(PC) so as to point to the given instructions as the program counter must increment
point out the next instruction or data. If this step were omitted then the initial
instruction would be executed by computer system forever and no new instruction
would be fetched.

9. On computer 1, all instructions take 10 nsec to execute. On computer 2, they all take
5 nsec to execute. Can you say for certain that computer 2 is faster? Discuss.
We cannot say anything for sure. If computer 1 has a five-stage pipeline, it can issue
up to 500 million instructions/second. If computer 2 is not pipelined, it cannot do
any better than 200 million instructions/sec. Thus, without more information, it
highly unpredictable to judge which is faster.

10. As one goes down the five-level memory hierarchy discussed in the text, the access
time increases. Make a reasonable guess about the ratio of the access time of optical
disk to that of register memory. Assume that the disk is already on-line.
As one goes down the five-levels of the hierarchy of memory thus the accessing time
increases and becomes a few nanoseconds. Next in case for the optical disk the
access time of the optical disk to that of the register memory is a few hundred's
milliseconds that is about a ratio of 10^8.

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