Carry Lookahead Adder

Full adder with two half adders

Full adder with two half adders
Full adder with two half adders

2 gate levels
Four-bit binary parallel adder
 Four-bit binary parallel adder

From C0 to C4: 8 gate levels

For n-bit adder, 2n gate levels from input carry to output carry
Carry output of each stage
Logic diagram of carry lookahead generator

All output carries are generated after a delay of

2 gate levels.
4-bit adder with carry lookahead
Summary
• A carry lookahead adder (CLA) is a type of adder used in digital logic
to reduce carry propagation time.
• Advantage:
• Improves speed by reducing the amount of time required to determine the
carry bits
• Disadvantage:
• Complex circuits for carry outputs over more than 4-bits