Analysis and Comparison of Space Vector Modulation Schemes for a

Four-Leg Voltage Source Inverter

V.Himamshu Prasad, Dushan Boroyevich and Richard Zhang
Virginia Power Electronic Center,
The Bradley Department of Electrical Engineering,
VPI&SU, Blacksburg, VA 24061.
Abstract- Three space vector modulation schemes are Each vector corresponds to a particular switching
analyzed for a four-leg voltage source inverter. The analysis is combination which is denoted with a four letter code (e.g.
performed with respect to switching losses and total harmonic pnpp) corresponding to the four nodes (a,b,c,f),
distortion under both balanced and unbalanced load
respectively, being connected either to the positive (p) or
conditions over the entire range of modulation index values
and over varying load power factor angle. The analysis has
the negative (n) dc rail. The projection of these sixteen
been verified using simulation. SSV’s into the a,/ plane forms the switching state
hexagon shown in Fig. 3.
INTRODUCTION
vy=w
There is an increased interest in four-leg inverters vy =2V@
for their use under unbalanced load conditions [1,2]
especially in UPS and power systems applications. This
paper deals with the comparison of space vector
modulation schemes for a four-leg inverter with respect to: vy = vg3
Y
1) total harmonic distortion (THD), and 2) switching
losses. Three modulation schemes have been analyzed in
this paper, with respect to these factors over the entire vy=O ct
range of modulation index values and varying load power
factors. The analysis is performed for both balanced and
unbalanced load conditions. The analysis has been verified
using simulation. vy = -V@
The schematic diagram of a four-leg inverter is
shown in Fig. 1. As compared to the traditional three leg
inverter which has eight switching state vectors [3], the
four-leg inverter has sixteen switching state vectors
(SSV’s). These SSV’s are shown in Fig. 2. in the space of
transformed phase voltages {Vaf, Vbf, Vcf), where a.p vy = -vg t
plane is the plane in which Vaf + Vbf + Vcf = 0, and y is nnnp
the axis of the zero sequence component. Fig. 2 Switching vectors ofafour-leg Inverter
P

E Fig. I Four leg voltage source inverter

Fig. 3 Projection of the sixteen vectors into a,P plane

0-7803-3704-2/97 $ 1 0.00 0 1 997 IEEE 864

 PULSE WIDTH MODULATION P P P P ” P P P P P P P P ” P P P P
p p n n n n n p p p p n n n n n p p
p n n n n n n n p p n n n n n n n p
The reference voltage vector ‘V’ in the four-leg a , ~ P ,, ~~ ~ ~ ~ , P , P , P , P , P , P P, , ~ ~ ~ ~ , P
inverter can be unbalanced and therefore is a vector in the
b
apy space shown in Fig. 2. Suppose that at a given instant
the projection of the reference vector ‘V’ in the ap plane, C
I
V n p , is in the sector 1 as shown in Fig. 4, then the duty
cycles of the vectors V1 and V2 in Fig. 4 can be found f
from
DI * VI + 0 2 * V2 = VM = m VgeJa dO
-
4 2 2
d3 -
-
2 2
d3
dO -
2 2
dl -
d2 -
- dO
2 4
d0 -
- dl -
4
d2
2 2
d3
- dO
2
d3
- -
2 2
d2 dl
-
2
- -dO
2 4
D1 + 0 2 + DO = 1 Ts
4 TS L1
t
(1) Fig 5 - Scheme1
where 0 5 m I 1 ,is the modulation index.
However, each of the vectors V1 and V2 in Fig. 4 Scheme 2 (Highest Current not Switched): This scheme is
is a projection of two switching vectors. So there are four based on the fact that the switching losses are
active vectors in each sector. It is shown in [l] that only approximately proportional to the magnitude of the current
three out of these four vectors are required for PWM. If the being switched and hence it would be advantageous to
three active vectors are ‘ppnp’, ‘pnnp’, ‘pnnn’, their avoid switching the inverter leg with the highest
respective duty cycles could be obtained from instantaneous current. This is possible in most cases,
because all adjacent SSV’s differ in the state of switches in
d3 + d2 = DI only one leg. Hence, by using only one zero vector, nnnn or
dl = D2 pppp within a given sector, one of the legs does not have to
dO = DO be switched at all, as shown in Fig. 7.
I_ -d _l - 2d2 + TI
d3 = lbl However, since the choice of the non-zero SSVs is
made based on the desired output voltage vector and the
where D, and D2 are given by (1) of sector 1 and dz is phase and magnitude of the current is determined by the
duty cycle of the y component of the rotating vector ‘V’. load, it is not always possible to avoid switching the phase
carrying the highest current. In such a case the phase
f v2 (ppnx) carrying the second highest current is not switched but the
switching loss savings are reduced. For example, the choice
x (p,n>
of zero vectors in sector 1 is determined using Fig. 6.
D 2 * V 2 b ~

V1 (pnnx) nnnn

D1 * V 1
Fig. 4 Projection of the reference vector into a,p plane in sector I .

The duty cycles for all the other sectors could be derived on Fig. 6 Choice of zero vector
a similar basis.
The splitting of active vectors about the zero vector as
SWITCHING SEQUENCE SCHEMES: shown below results in a significant reduction in the THD.
The number of commutations in one cycle is six.
The schemes which are analyzed are similar to the
one’s found in literature for a three leg inverter operating
under balanced load conditions [4,5,6]. All of the schemes
assume digital implementation, where the duty cycles are
precalculated at the beginning of the cycle.

Scheme I (Symmetric): The sequence of vectors applied

in this scheme is shown in Fig. 5 for sector 1. This scheme
is expected to have low THD because of the symmetry in
the waveforms. The number of commutations in one
sampling period is eight.

Fig. 7 - Scheme 2

865
Sclieme 3 (Alfernating Zero Vector): In this scheme the SIMULATION RESULTS
zero vectors are used alternatively in adjacent cycles so
that the effective switching frequency is halved, as shown A 150 kW inverter was simulated for both
in Fig. 8.However, the sampling period is still Ts, same as balanced and unbalanced load conditions. The parameters
in the other schemes. The number of commutations in one used were L = 1.25 mH, C = 210 uF, Vg = 850 V, f, = 60
Ts is four and hence the switching losses are expected to Hz, f, = 2160 Hz, The phase current waveform and its
reduce. Current THD is significantly higher due to the spectrum for each of the schemes for balanced load
existence of the harmonics at half the sampling fiequency. conditions are shown in Fig.9
lpnnn 1 pnnp I ppnp pppp j ppnp 1 pnnp j pnnn nnnn j The simulated phase currents, output voltages and
i
I :
" I
I
the current through the neutral leg for balanced and
I unbalanced load conditions are shown in Fig. 10. Scheme 1
b j I
j
was used for Fig. 10 The load was assumed to be 255 A
peak for the balanced case. For the unbalanced case the
load currents were assumed to be 2 5 5 ~ 0 ' A ,127.5L60' A, and
63.75.dA for the three phases 'a', 'b', and 'c'.

Fig. 8 - Scheme3

Scheme1

Scheme2

Scheme3

Fig. 9 a) Phase current, b) Spectrum ofphase current

Phase currents

Output voltages

-- .&
! !
.b 6
!
- - - I .._.

..~ Current through

-.-
- neutral leg
--
-- .b .
A. 4
.. .. P *- ..-,
(4
Fig IO a) Balanced load, b) Unbalanced Load

866
 The Fourier coefficients of the phase current can be
obtained by
ANALYSIS - cnphav_volfqe
Cnphme-currenl - (6)
2”

A. Performance Comparisonfor Balanced Loads: where z, is the line impedance.

The modulation schemes are analyzed for their
harmonic performance using an algorithm [4] where the Fig. 12 shows the variation of THD (of phase voltage and
Fourier components of the output voltage are calculated by phase current ) with modulation index for all the
summing up the Fourier components of the individual schemes,
pulses. The harmonics of the line currents are calculated by
using the load impedance information. The complete 2.2 . . “............ . .. .... . ..... ..
...,...... .... ... .......... . . ,.. .
algorithm is given in appendix.

Total Harmonic Distortion:

The total harmonic distortion is defined as

1-

The analysis of THD is done based on an OR

Modulation index 1
algorithm where the Fourier coefficients of all the pulses
of a given line/phase voltage are summed up. The analysis (a)
is valid for all integral f,/f,, where f, is the switching 0.10

frequency and f, is the fundamental frequency at the 0.16

output.
eo14
Considering a pulse shown in Fig.11 with 3’
fimdamental period To = l/f, its Fourier coefficients at
frequency nf, are given by

0.08 Scheme 1

O.OR I
. . . . , .
0 Modulation index 1

hfl = 3,a s (s
)- (- M(’
2nx
(d,T,+T,))) (4) (b)
nx 5 5 Fig. 12 (a) THD of Phase voltage
(6) THD ofphase current.

The results are similar to the three leg inverter case, [5].

Switching loss:
The switching losses are assumed to be proportional
Fig. 11 Output voltage pulse to the product of the voltage across the switch and the
current through the switch at the instant of switching. Since
where dm is the pulse duty cycle, T, is the pulse delay the voltage across the switch is the bus voltage, it is
time, V, is the pulse magnitude, and T, = l/f, considered to be a constant. Thus the losses are
A typical line/ phase voltage can be split into a proportional to the current during switching.
number of pulses equal to the ratio of f,/f, = N, with a
period To. This is illustrated for scheme 1 in Appendix. Under balanced load conditions the neutral leg
Thus the Fourier coefficients of the voltage can be found carries only the high ii-equency ripple as shown in Fig. 10.
using: Hence the switching losses are expected to be similar to the
three leg inverters. Losses for schemes 1 and 3 are
independent of the load whereas for scheme 2 the losses
c, = 1 C o n 2+
,=I
X bn2
,=I
depend on the load power factor and its loss performance
has been optimized using the flow chart presented in Fig.6.

867
 The Fourier coefficients of the phase current can be
obtained by
ANALYSIS - n' phm_voltap
Cnpho.s_curreni - (6)
Z"
A. Performance Comparisonfor Balanced Loads: where z, is the line impedance.
The modulation schemes are analyzed for their
harmonic performance using an algorithm [4] where the Fig. 12 shows the variation of THD (of phase voltage and
Fourier components of the output voltage are calculated by phase current ) with modulation index for all the
summing up the Fourier components of the individual schemes,
pulses. The harmonics of the line currents are calculated by
using the load impedance information. The complete
algorithm is given in appendix.

Total Harmonic Distortion:

The total harmonic distortion is defined as

The analysis of THD is done based on an 0 1

Modulation index
algorithm where the Fourier coefficients of all the pulses
of a given line/phase voltage are summed up. The analysis (4
010-
is valid for all integral f,/fo, where f, is the switching
frequency and fo is the fundamental frequency at the
output.
Considering a pulse shown in Fig.11 with U

fundamental period To = l/fo its Fourier coefficients at 8012

E
a
L

frequency nf, are given by

0 08 Scheme 1

0 Modulation index 1

(b)
(4) Fig. 12 (a) THD of Phase voltage
(b) THD ofphase current.

A
4
n r
The results are similar to the three leg inverter case, [SI.

Fig 1I Output voltage pulse
where dm is the pulse duty cycle, T, is the pulse delay
time, V, is the pulse magnitude, and T, = l/f,
A typical line/ phase voltage can be split into a
number of pulses equal to the ratio of fJf, = N, with a
period To. This is illustrated for scheme 1 in Appendix.
Thus the Fourier coefficients of the voltage can be found
using:
I.,
(5)
Switching loss:
The switching losses are assumed to be proportional
to the product of the voltage across the switch and the
current through the switch at the instant of switching. Since
the voltage across the switch is the bus voltage, it is
considered to be a constant. Thus the losses are
proportional to the current during switching.
Under balanced load conditions the neutral leg
carries only the high fi-equency ripple as shown in Fig. 10.
Hence the switching losses are expected to be similar to the
three leg inverters. Losses for schemes 1 and 3 are
independent of the load whereas for scheme 2 the losses
depend on the load power factor and its loss performance
has been optimized using the flow chart presented in Fig.6.

868
 Fig. 13 shows the relative variation of losses with
load power factor for the three schemes.
scheme 1

g
- 08

Scheme 2
.
c 0.5
0

z115-
0.4 >
$ 11-
* Scheme 2
----
0.1
0.2 i .
PSI
1
-80
. .
-60 -40 -20 0 20
Load power factor
40 60 80
r l t , , ~; ,
Scheme 1
~ /
Fig 13 Relative switching losses as a function of loadpowerfactor 09
100% Load power 10%
B. Performance Comparison for Unbalanced Load: Fig. 15 Variation of THD ofphase voltage with loadpower
Total Harmonic Distortion:
Depending on the load and load power factor Switching Losses:
angle (lpf) there are several cases of unbalance that could Load power factor angle unbalance: Here though
be studied. Two cases are presented here. the load currents are all of the same magnitude the currents
(1) Load power factor angle unbalance: Here each of the through the filter inductors and hence the switches are
three phases are assumed to be carrying full load current, dependent on the load power factor. Fig.16 shows the
however the lpf of ‘phase a’ is assumed to vary from -90 variation of switching losses with load power factor.
to 90. Fig. 14 shows the variation of THD of phase voltage
when the lpf is leading and lagging.
1Zr . . .

Load power factor angle

(4
16

17-
14-

16-

15-

040 io i o inio io 0
Load power factor angle
(b)
0 Load power factor angle 90 Fig. 16 Relative switching lossfor
(b) (a) Leading loadpowerfactors
Fig 14 Variation of THD ofphase voltage with loadpowerfactor (b) Lagging loadpower factors
a) leading, b) lagging

869
 I Modulation schemes Scheme 1 Scheme 2 Scheme 3
Symmetric Highest Current Alternating Zero
not Switched Vector
No of commutations in Ts 8 6 4
Number of switching states in Ts * 10 7 4
Dominant harmonic fs fs &I2

Relative Losses 1 0.5-0.63** I 0.5

THD at low mod. Index least I

Relative losses - lpf ( leading 0 - 90 ) 1 - 1.41 0.5 - 0.95 0.5 - 0.70

Relative losses - lpf ( lagging 0 - 90) -
1 1.58 0.5 - 0.95 0.5 - 0.79
THD at leading Ipf*** least highest
THD at lagging lpf *** least highest

* Important in the design of digital modulator.

** Depending on load power factor.
*** Exact values are dependent on modulation index

CONCLUSIONS
This paper analyzes the most important
modulation schemes for both balanced and unbalanced
load conditions for a four-leg inverter. The analysis was
performed over the entire range of modulation index and
over the entire range of load power factor for the balanced
load conditions. Two typical unbalance conditions - load
power factor angle and load magnitude, were studied for
harmonic distortion and switching losses. Table 1
summarizes the results of the analysis. The analysis clearly
brings out the trade off s to be observed between the THD
and switching losses i.e., a scheme with low THD usually
has high losses. Also the design of filter inductance must
be done for the worst case unbalance situation. The study
of unbalanced load conditions reveals that both THD and
losses increase. Overall scheme 1 should be used at low
switching frequencies where the switching loss is small. At
high switching frequencies scheme 2 is recommended.
REFERENCES
[l] Richard Zhang, Dushan Boroyevich, V.Himamshu Prasad,
Hengchun Mao, Fred C lee, and Stephen Dubovsky,” A Three-phase
Inverter with a Neutral Leg with space vector modulation”, Conference
Record of IEEE APEC 1997.
[2] Thomas M. Jahns, R. W. De Doncker, et al,” System Design
Considerations for a High-Power Aerospace Resonant Link Converter,”
IEEE Transactions on Power Electronics, Vo1.8, No.4, 1993
[3] H.W. van der Broeck, H.C. Skudelny, and G.V.Stanke, “ Analysis
and realization of a Pulse Width Modulator based on Voltage Space
Vector ,” IEEE Trans. on Ind. App.,vol 24, no. 1, pp.142-150, 1988. [4]
V. Himamshu Prasad, Dushan Boroyevich and Stephen Dubovsky,
“ Comparison of high frequency PWM algorithms for a Voltage Source
Inverter,” Proc VPEC 1996 Ann Meet,pp. 115-122.
[ 5 ] D.G.Holmes ,“ The Significance of Zero Space Vector for Carrier
based PWM Schemes,” Proc. IEEE-IAS 1995 Ann.Meet.,pp. 245 1 -
2458.
[6] Victor R. Stefanovic, and Slobodan N. Vukosavic,” Space vector
PWM Voltage Control with Optimized Switching Strategy,” IEEE IAS-
1992 Ann Meet,pp.l025 - 1033.

870
 APPENDIX

The neutral point potential (Vf) can be 0 or Vg,

depending on the SSV’s. Hence the phase voltages (Vaf, for the right pulse
Vbf, Vcf - voltages between the inverter output and the
neutral point) can be accurately calculated as shown in (A.3)
Table A. 1 for sector 1. I
I
’
!

Decomposition of the phase voltage switching

waveform for scheme1 into sum of pulses with period To
shown in Fig.11 is illustrated. Fig.A.l shows
decomposition of a typical phase voltage in the kth kTs
kTs (k-l)Ts
switching interval from beginning of the phase voltage (k-1)Ts lirS (k-1)Ts
Fig. A.1 Phase voltage decomposition in one sampling period
period, where
The duty cycles d l , d2,d3 and dO are calculated using (1)
O < k < -fs- I (A. 1) and (2). The Fourier components of these pulses are
fo
Comparing each of the component pulses with Fig. 11 one obtained from (4).
can find that for the left pulse

Table A. 1

87 1