PIC Microcontrollers

Chapter 5: BRANCH, CALL, AND TIME DELAY LOOP

Gaby Abou Haidar M.S. Fall 2017 - 2018

 • Looping in PIC
▫ Repeating a sequence of instructions a certain number of times is called a
loop.
• DECFSZ Instruction and looping
▫ The DECFSZ (decrement fileReg skip zero) instruction is a widely used
instruction supported across all PIC families of microcontrollers.
DECFSZ file Reg , d ;decrement fileReg and skip next instruction if 0

Gaby Abou Haidar M.S. Fall 2017 - 2018

 • Example: Write a program to (a) clear WREG, and (b) add 3 to
WREG ten times and place the result in SFR of PORTB. Use the
DECFSZ instruction to perform looping.
• Solution:
COUNT EQU 0x25 ;use loc 25H for counter
MOVLW d’l0’ ;WREG = 10 (decimal) for counter
MOVWF COUNT ;load the counter
MOVLW 0 ;WREG = 0
AGAIN ADDLW 3 ;add 03 to WREG (WREG = sum)
DECFSZ COUNT,F ;decrement counter, skip if count == 0
GOTO AGAIN ;repeat until count becomes 0
MOVWF PORTB ;send sum to PORTB SFR

Gaby Abou Haidar M.S. Fall 2017 - 2018

 • Using instruction BNZ for looping
▫ The BNZ (branch if not zero) instruction is supported by the PIC18
family and not earlier families such as PIC16 or PIC12.
▫ It uses the zero flag in the status register.

BACK ;start of the loop

……………. ;body of the loop
……………. ;body of the loop
DECF ;decrement fileReg, Z = 1 if fileReg = 0
BNZ BACK ;branch to BACK if Z = 0

Gaby Abou Haidar M.S. Fall 2017 - 2018

 • Example: Write a program to (a) clear WREG, then (b) add 3 to
WREG ten times. Use the zero flag and BNZ.
• Solution:
COUNT EQU 0x25 ;use loc 25H for counter
MOVLW d'10 ' ;WREG = 10 (decimal) for counter
MOVWF COUNT ;load the counter
MOVLW 0 ;WREG = 0
AGAIN ADDLW 3 ;add 03 to WREG (WREG = sum)
DECF COUNT, F ;decrement counter
BNZ AGAIN ;repeat until COUNT= 0
MOVWF PORTB ;send sum to PORTB SFR

Gaby Abou Haidar Fall 2017 - 2018

 • Example: What is the maximum number of times that the loop in the
previous example can be repeated?
• Solution:
▫ Because location COUNT in fileReg is an 8-bit register, it can hold a
maximum of FFH (255 decimal); therefore, the loop can be repeated a
maximum of 255 times.

Gaby Abou Haidar Fall 2017 - 2018

 • Example: Write a program to (a) load the PORTB SFR register with
the value 55H, and (b) complement Port B 700 times.
• Solution:
▫ Because 700 is larger than 255, we use two registers to hold the count.
The following code shows how to use fileReg locations 25H and 26H as a
register for counters.
Rl EQU 0x25
R2 EQU 0x26
COUNTl EQU d'l0'
COUNT2 EQU d'70'
MOVLW 0x55 ;WREG = 55h
MOVWF PORTB ;PORTB = 55h
MOVLW COUNT1 ;WREG = 10, outer loop count value
MOVWF Rl ;load 10 into loc 25H (outer loop count)
LOOP1 MOVLW COUNT2 ;WREG = 70, inner loop count value
MOVWF R2 ;load 70 into loc 26H
LOOP2 COMPF PORTE, F ;complement Port B SFR
DECF R2, F ;dec fileReg loc 26 (inner loop)
BNZ LOOP2 ;repeat it 70 times
DECF Rl, F ;dec fileReg lac 25 (outer loop)
Gaby Abou Haidar M.S. BNZ LOOP1 ;repeat
Fall 2017 it 10 times
- 2018
 • Example: Find the sum of the values 79H, F5H, and E2H. Put the sum in fileReg
locations 5 (low byte) and 6 (high byte).
• Solution:
L_Byte EQU 0x5
H_Byte EQU 0x6
ORG 0h
MOVLW 0x0
MOVWF H_Byte
ADDLW 0x79
BNC N_1
INCF H_Byte,F
N_1 ADDLW 0xF5
BNC N_2
INCF H_Byte,F
N_2 ADDLW 0xE2
BNC OVER
INCF H_Byte,F
OVER MOVWF L_Byte
END

Gaby Abou Haidar M.S. Fall 2017 - 2018

 • Unconditional branch instruction:
▫ GOTO (GOTO is a long jump)
 GOTO is an unconditional jump that can go to any memory location in the 2M
address space of the PIC18.
 It is a 4-byte (32-bit) instruction in which 12 bits are used for the opcode, and
the other 20 bits represent the 20-bit address of the target location.
 The 20-bit target address allows a jump to lM of memory locations from
00000 to FFFFFH, instead of 2M. This problem is solved by making the
lowest bit of the program counter A0 = 0, and the 20-bit target address of the
GOTO becomes address bits A21- A1. In this way, the GOTO can cover the
entire 2M address space of 00000-1FFFFH and also makes sure that the target
address lands on an even address location.
 Because all the PIC18 instructions are 2-byte or 4-byte instructions, the GOTO
will not land at the middle of an instruction.

Gaby Abou Haidar M.S. Fall 2017 - 2018

Gaby Abou Haidar M.S. Fall 2017 - 2018
 • BRA (branch)
▫ In this 2-byte instruction, the first 5 bits are the opcode and the rest (lower
11 bits) is the relative address of the target location.
▫ The relative address range of 000-FFFH is divided into forward and
backward jumps; that is, within -1024 to + 1023 bytes of memory relative
to the address of the current PC (program counter).
▫ If the jump is forward, then the target address is positive. If the jump is
backward, then the target address is negative.

Gaby Abou Haidar Fall 2017 - 2018

 • GOTO to itself using $ sign
HERE GOTO HERE
we can use the following:
GOTO $
This will also work for the BRA instruction, as shown below:
OVER BRA OVER
which is the same as:
BRA $ ;$ means same line

Gaby Abou Haidar M.S. Fall 2017 - 2018

 • CALL
▫ In this 4-byte (32-bit) instruction, the 12 bits are used for the opcode and
the other 20 bits, A2l-Al, are used for the address of the target subroutine.
▫ Therefore, CALL can be used to call subroutines located anywhere within
the 2M address space of 00000-1FFFFH for the PIC 18.
• Stack and stack pointer in the PIC18
▫ The stack is read/write memory (RAM) used by the CPU to store some
very critical information temporarily.
▫ This information usually is an address, but it could be data as well.
▫ The stack in the PlCl8 is 21-bit because the program counter is 21-bit.
▫ It is used for the CALL instruction to make sure that the PIC knows
where to come back to after execution of the called subroutine.

Gaby Abou Haidar M.S. Fall 2017 - 2018

 • How stacks are accessed in the PIC18
▫ The storing of CPU information such as the program counter on the stack is
called a PUSH, and loading the contents of the stack back into a CPU register is
called a POP.

• Pushing onto the stack

▫ In the PIC, the stack pointer (SP) is pointing to the last used location of the stack.
▫ The last-used location of the stack is referred to as the top of the stack (TOS).
▫ As data is pushed onto the stack, the stack pointer is incremented.
▫ Notice that for every program counter saved on the stack, SP is incremented only
once.
• Popping from the stack
▫ Popping the contents of the stack back into a given register such as the program
counter is the opposite process of pushing.
▫ When the RETURN instruction at the end of the subroutine is executed, the top
location of the stack is copied back to the program counter and the stack pointer
is decremented once.

Gaby Abou Haidar M.S. Fall 2017 - 2018

Gaby Abou Haidar M.S. Fall 2017 - 2018
 • CALL instruction and the role of the stack
▫ The following points should be noted for the program in the Example:
 Notice the DELAY subroutine. Upon executing the first "CALL DELAY", the
address of the instruction right below it, "MOVLW 0xAA", is pushed onto the
stack, and the PIC starts to execute instructions at address 000300H.
 In the DELAY subroutine, first the counter MYREG is set to 255 (MYREG =
FFH); therefore, the loop is repeated 256 times. When MYREG becomes 0,
control falls to the RETURN instruction, which pops the address from the top
of the stack into the program counter and resumes executing the instructions
after the CALL.

Gaby Abou Haidar M.S. Fall 2017 - 2018

 • Delay calculation for the PIC18
▫ In creating a time delay using Assembly language instructions, one must
be mindful of two factors that can affect the accuracy of the delay:
 The crystal frequency: The frequency of the crystal oscillator connected to the
OSC1 and OSC2 input pins is one factor in the time delay calculation. The
duration of the clock period for the instruction cycle is a function of this
crystal frequency.
 The PIC design: One might wonder how microprocessors such as PIC are able
to execute an instruction in one cycle. There are three ways to do that:
(a) Use Harvard architecture to get the maximum amount of code and data
into the CPU,
(b) use RISC architecture features such as fixed-size instructions, and finally
(c) use pipelining to overlap fetching and execution of instructions.

Gaby Abou Haidar M.S. Fall 2017 - 2018

 • pipelining.

Gaby Abou Haidar Fall 2017 - 2018

 • Instruction cycle time for the PIC
▫ In the PIC, this time is referred to as instruction cycles (referred to as
machine cycles in some other CPUs).
▫ Because all the instructions in the PIC 18 are either 2-byte or 4-byte, most
instructions take no more than one or two instruction cycles to execute.
(Notice, however, that some instructions such as BTFSS could take up to
three instruction cycles.)
▫ In the PIC family, the length of the instruction cycle depends on the
frequency of the oscillator connected to the PTC system.
▫ The crystal oscillator, along with on-chip circuitry, provide the clock
source for the PIC CPU.
▫ In the PIC18, one instruction cycle consists of four oscillator periods.
▫ Therefore, to calculate the instruction cycle for the PIC, we take 1/4 of
the crystal frequency, then take its inverse.

Gaby Abou Haidar M.S. Fall 2017 - 2018

 • Example
▫ The following shows the crystal frequency for three different PIC-based
systems. Find the period of the instruction cycle in each case.
(a) 4 MHz (b) 16 MHz (c) 20 MHz

• Solution:
▫ (a) 4/4 = 1 MHz; instruction cycle is 1/1 MHz= 1 μs (microsecond)
▫ (b) 16 MHz/4 = 4 MHz; instruction cycle = 1/4 MHz= 0.25 μs = 250 ns
▫ (c) 20 MHz/4 = 5 MHz; instruction cycle= 115 MHz= 0.2 μs = 200 ns

Gaby Abou Haidar M.S. Fall 2017 - 2018

 • Branch penalty
▫ For the concept of pipelining to work, we need a buffer or queue in which an
instruction is prefetched and ready to be executed.
▫ In some circumstances, the CPU must flush out the queue.
▫ For example, when a branch instruction is executed, the CPU starts to fetch codes
from the new memory location and the code in the queue that was fetched
previously is discarded.
▫ In this case, the execution unit must wait until the fetch unit fetches the new
instruction.
▫ This is called a branch penalty.
▫ The penalty is an extra instruction cycle to fetch the instruction from the target
location instead of executing the instruction right below the branch.
▫ Remember that the instruction below the branch has already been fetched and is
next in line to be executed when the CPU branches to a different address.
▫ This means that while the vast majority of PIC instructions take only one
instruction cycle, some instructions take two or three instruction cycles.
▫ These are GOTO, BRA, CALL, and all the conditional branch instructions

Gaby Abou Haidar Fall 2017 - 2018

Gaby Abou Haidar M.S. Fall 2017 - 2018
Gaby Abou Haidar M.S. Fall 2017 - 2018
Gaby Abou Haidar M.S. Fall 2017 - 2018
Gaby Abou Haidar M.S. Fall 2017 - 2018
 • Loop inside a loop delay
▫ Another way to get a large delay is to use a loop inside a loop, which is
also called a nested loop.
▫ For a instruction cycle of 1μs, find the time delay in the following
subroutine:

Gaby Abou Haidar M.S. Fall 2017 - 2018

 • Solution:
▫ For the HERE loop, we have (5 x 250) 1 μs = 1250 μs.
▫ The AGAIN loop repeats the HERE loop 200 times; therefore, we have 200 x
1250 μs = 250000 μs, if we do not include the overhead.
▫ However, the following instructions of the outer loop add to the delay:

▫ The above instructions at the beginning and end of the AGAIN loop add 5 x 200
x 1 μs = 1000 μs to the time delay.
▫ We should also subtract 200 μs for the times BNZ HERE falls through.
▫ As a result we have 250000 + 1000 - 200 = 250800 μs = 250.8 milliseconds for
the total time delay associated with the above DELAY subroutine.
▫ Notice that in the case of a nested loop, as in all other time delay loops, the time
is approximate because we have ignored the first few instructions and the last
instruction, RETURN, in the subroutine.
Gaby Abou Haidar M.S. Fall 2017 - 2018
 • Example: Find the time delay for the following subroutine, assuming a
crystal frequency of 4 MHz. Discuss the disadvantage of this example

Gaby Abou Haidar M.S. Fall 2017 - 2018

 • Solution:
▫ The time delay inside the AGAIN loop is [200(13 + 2)] x 1 μs = 3000 μs.
▫ NOP is a 2-byte instruction, even though it does not do anything except to
waste cycle time.
▫ There are 17 instructions in the above DELAY program, and all the
instructions are 2-byte instructions.
▫ This means the loop delay takes 34 bytes of ROM code space, and gives
us only a 3000 μs delay.
▫ That is the reason we use a nested loop instead of NOP instructions to
create a time delay. Next chapters shows how to use PIC timers to create
delays much more efficiently.

Gaby Abou Haidar M.S. Fall 2017 - 2018

 • Example
▫ Write a program to toggle all the bits of SFR PORTB every 1 s. Assume
that the crystal frequency is 10 MHz and the system is using a PIC18F458

Gaby Abou Haidar M.S. Fall 2017 - 2018

Gaby Abou Haidar M.S. Fall 2017 - 2018