Exam 2 – Spring 2012 Name: _______________________________________

Closed book. No calculators.

1. For the following 16 values, give the hexadecimal digit and the equivalent binary digits.
(4 pts. total)

decimal hex binary decimal hex binary

0 ____ ________ 8 ____ ________

1 ____ ________ 9 ____ ________

2 ____ ________ 10 ____ ________

3 ____ ________ 11 ____ ________

4 ____ ________ 12 ____ ________

5 ____ ________ 13 ____ ________

6 ____ ________ 14 ____ ________

7 ____ ________ 15 ____ ________

2. Convert these numbers between signed decimal and 16-bit two's complement
representation. (4 pts. each)

signed decimal two's complement

a. +113 _________

b. ________ 0x0145

c. -113 _________

d. ________ 0xfbae

3. Give the most negative 8-bit two's complement number in two formats: (4 pts. each)

a. hexadecimal representation (two's complement): __________

b. decimal representation: ____________

4. Give the most positive 8-bit two's complement number in two formats: (4 pts. each)

a. hexadecimal representation (two's complement): ___________

b. decimal representation: _______________

5. Show the hexadecimal results of binary addition and subtraction of signed 16-bit two's
complement numbers. Identify any signed overflows. (4 pts ea).

a. 0x6235 b. 0x5732 c. 0x3778

+ 0x2ace + 0x9ced - 0x7855
------------- ------------ ------------

6. Show the hexadecimal results of logic operations on 16-bit binary numbers

(3 pts each)

a. 0x6517 b. 0x6517 c. 0x6517 shift d. 0x6517 shift

or 0x5555 and 0x5555 right logical by 1 left by 4
 Trace the following code segment (show the contents of the named 32-bit registers in
response to each instruction executed). (15 pts. total)

r0 r1 r2
? ? ?

mov r0, 0xf5d ________________ _________________ __________________

orr r1, r0,0x123 ________________ _________________ __________________

and r2, r0,0x971 ________________ _________________ __________________

sub r1, r0,0x82 ________________ _________________ __________________

mov r2, r0, lsl #2 ________________ _________________ __________________

7. Give a sequence of ARM shift and orr instructions to rotate the value in register r0 by 4
bits to the left and place the result in register r1. You may use registers r2 and r3 as
temporaries. (As one example, if r0 contains 0x12345678, the result in r1 should be
0x23456781. However, your answer must work for any given value in r0.) (5 pts.)
8. Show the HARDWARE steps required in multiplication of two unsigned 4-bit binary
numbers, 1110 times 1101. (1110 is the multiplicand and 1101 is the multiplier.) The
details of mulscc are not required, but you should show the 3-register format of ACC,
MQ, and MDR, and be sure to place the multiplicand and multiplier in the correct
registers. (12 pts.)
9. Show the big-endian and little-endian byte ordering of the following data values. Start
the byte numbering of m at address 102. (8 pts.)

short int m = 0x353; /* short int is 16-bit half word */

char c[4] = {'a', 'r', 'c', '\0'};
short int n = 0x42a;

byte address: 102 103 104 105 106 107 108 109

little-endian ordering: ____ ____ ____ ____ ____ ____ ____ ____

big-endian ordering: ____ ____ ____ ____ ____ ____ ____ ____

Extra Credit

XC. Show how restoring division handles the division of an unsigned 8-bit binary
dividend, 11001001, by a 4-bit unsigned binary divisor, 0011. First, show the 3-
register format of ACC, MQ, and MDR, and be sure to place the dividend and
divisor in the correct registers. Then explain what happens. (5 pts.)