Colegio de San Juan de Letran

Calamba
Ipil – ipil St. Bucal, Calamba City, Laguna, 4027

School of Engineering

GROUP NO. : LGCIRA111L / LGCIRB111L – Group 5&7

PROPONENTS : DE CLARO, Ellaine P.

BYRD, Brett Erickson
CANTAVIEJA, Jean Paola
JOVIDA, Rommel Jr.

TOPIC : STATIC POWER SUPPLY AND ELECTRONIC DICE

PROJECT DESCRIPTION:

Dice was implemented using a 555 Timer in a stable

configuration, a 4026 Binary Coding Decimal (BCD) counter and decoder,
and a seven segment display. The 555 Timer remained the driver for the
circuit with the pause switch for triggering the dice to roll. The resistors
were chosen to make the frequency of the clock high with R1=R2=10K Ω,
C=0.47 uF. The 555 Timer output was then connected to the clock input of
the 4026. 4026 was configured to count from 0 – 9 then reset itself
automatically. But since we were making an Electronic dice the 4026 was
required to reset itself after the number ‘6’. For this reason a logic was
constructed. Observe the behavior of ‘b’ segment output in the Table. On
reset, at count 0 until count 4, the segment ‘b’ output is high. At count 5 it
changes to low level and remains so during count 6. However, at start of
count 7, the output goes from low to high state. A differentiated sharp high
pulse through C-R combination of C4-R5 is applied to reset pin 15 of IC2 to
reset the output to ‘0’ for a fraction of a pulse period (which is not visible on
the 7-segment display). Thus, if the clock stops at seventh count, the
display will read zero. There is a probability of one chance in seven that
display would show ‘0.’ In such a situation, the concerned player is given
another chance until the display is nonzero. Digital electronics components
were investigated and a 555 timer, a BCD counter\Decoder and a seven
segment display were combined to form a digital timer circuit. Different
methods were analyzed to determine the best technique for creating an
efficient DICE until one was chosen and the circuit was designed. The
chosen circuit was verified through simulation using Proteus. This design
was then implemented and modified to suit the needs of the project.
Problems were analyzed and repaired where necessary until it was
concluded that the circuit had met the design criteria of the project.

BLOCK DIAGRAM:

Figure 1. Block diagram of a design of combinational logic circuit for

Greenhouse Monitoring Device
SCHEMATIC / LOGIC DIAGRAM:

Figure 1. Schematic diagram for power supply.

 Figure 2. Schematic diagram for electronic dice

Figure 3. Logic diagram or simulation of a design of static power

supply and electronic dice.