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Flip Flops
Flip Flops
Flip Flops
Inputs
Combinational outputs
circuit
Memory element
Sequential circuit
Flop-Flips
R (Reset)
1 Q
2 Q
S (Set)
R-S Truth Table
R S Q Q State
0 0 NC NC No change
0 1 1 0 Set
1 0 0 1 Reset
1 1 invalid invalid
R Q
S Q
Symbol
S (Set)
1
2
R (Reset)
RS Truth table
R S Qn+1 Q
1 1 NC (Qn ) NC
1 0 1 0
0 1 0 1
0 0 invalid
High Edge Clocked RS Flip-Flop
R
Q
Clock
Q
S
High Edge
Low Edge
Clocked RS
CLK S R Q Q---
0 0 0 NC NC
0 1 0 NC NC
1 0 1 0 1
1 1 1 invalid
1 1 0 1 0
1 0 1 0 1
1 0 0 NC NC
Low Edge RS Flip-Flop
Clock
D Flip-Flop
D
Q
D
Clock Flip-Flop
Q
K
Q
Clock
Q
J
J JK Q
Flip-Flop
CLK
K Q
Truth Table
Logic Symbol
CLK J K Qn+1
0 1 0 Qn
1 1 0 1
1 0 1 0
1 1 1 Toggle
T Flip-Flop
Logic 1 (VCC)
Clock
Preset
Clear