1- using vhdl code design a 4 bit BCD up counter using sequential statements.

2- design the following digram using vhdl code to implement it.

3- using vhdl code, write a program to implement the seven segment display to
counter from (0 to 9)

4- Design the following digram using vhdl code to implement the following figure
behaviorally to turn on the LEDs

5- design the following state diagram using finite state machine positive edge
detector

6- design the following digram using vhdl code to implement the following figure
behaviorally

7- write vhdl code using structural model to implement 4-bit adder as shown in
figure below

8- an 8-bit up counter with active high enable that rolls at

40(0,1,2,.....39,0,1,2,....) the signal cnt_reg should hold the counter, the signal
enable should be used as the enable. write vhdl code using concurrent signal
assignement statement

9- write VHDL code using structural model to implement 4-bit adder