Design Optimization of a High Step-Up DC-DC
Converter for Photovoltaic Microinverters
Lenon Schmitz, Odair J. Custodio
Gustavo C. Knabben, Inergiae Conversores Estáticos
Denizar C. Martins, Florianópolis, Brazil
Roberto F. Coelho
Federal University of Santa Catarina
Florianópolis, Brazil
Abstract—A design optimization of a generalized high step-up
dc-dc converter applied as front-stage in a photovoltaic (PV)
microinverter is proposed. The design methodology optimizes the
weighted California Energy Commission (CEC) efficiency of the
generalized converter considering not only the classical
parameters, as turns ratio and switching frequency, but also the
topology structure through different connections of voltage
multiplier cells. Two design optimizations have been carried out.
The first maximizes only the CEC efficiency, obtaining results
around 98%. In the second it was added terms related to cost and
volume in the objective function, which results in a converter
with lower CEC efficiencies – around 96% - but with a higher
power density and lower cost.
Keywords— design optimization; high step-up dc-dc converter;
PV microinverter; weighted efficiency.
I. INTRODUCTION
Microinverters (or ac-modules) have become an important
portion of the photovoltaic (PV) market, reaching an estimated
market share of about 2% in 2015 [1]. Although still distant
from string inverters (37%) and central inverters (61%) due to
its current higher energy cost, the microinverters present some
interesting advantages that help its market increase such as, for
example:
 Less reduction on global power due shading, because
the reduction of power is restricted to the micro-inverter
whose panel is shaded;
 Individual maximum power point tracking (MPPT) and
consequent increase in the system efficiency;
 Individual maintenance of panels without need for
complete disconnection;
 Flexible initial installation cost;
 Facilitated expansion, panel by panel; and
 Requirement of only an ac network on rooftop.
978-1-5386-1019-0/17/$31.00 © 2017 IEEE
Renato Z. de Medeiros,
Alexandre L. Ferreira
Empresa de Luz e Força Santa Maria
Colatina, Brazil
Commercial PV microinverters commonly use single-phase
architecture and adopt single-stage or two-stage system
configurations. Nevertheless, to avoid the usage of electrolytic
capacitors as power decoupling storage elements, the two-stage
solution has shown to be the best alternative [2]. In this
configuration, normally a dc-dc converter with high step-up
gain is used to adapt the low PV module voltage to the required
dc bus voltage of the dc-ac converter employed for ac utility
connection. Such high step-up dc-dc converter can be isolated
or non-isolated, however, the non-isolated ones are capable of
achieving higher efficiency levels and lower cost [3].
In the last decade several high step-up non-isolated dc-dc
converters have been proposed in the literature [4]-[12]. Many
of these converters are based on the classical Boost converter
and use the same high-step-up techniques, as coupled inductors
and voltage multiplier cells. Due to such plethora of similar
converters, in [13] it was developed a generalization, which
resulted in the so-called Boost Converter with Gain Cell
(BCGC). This generalized approach opened the possibility to
apply the converter structure as a design feature. For example,
a question that may appear in a project involving the necessity
of high voltage gain is whether is better to increase the
transformer ratio of the coupled inductor or to use more voltage
multiplier cells. This is a classic optimization problem that is
not easy to answer; it will depend of several variables and the
desired characteristics of the project. To solve this issue, this
paper proposes a design optimization algorithm to maximize
the efficiency of the BGCG applied to PV microinverters, in a
way that the gain cell is used as a design parameter (an
independent variable) together with the turns ratio, the
switching frequency, the magnetizing inductance, as well as,
electrical components and materials.
The remainder of this study is organized as follows.
Initially, section II introduces the BCGC. Afterward, in section
III, it is presented the design optimization problem, followed
by a description of the loss models in section IV. Lastly,
section V presents some experimental results to validate the
study and the conclusions are drawn in section VI.
432 INTELEC 2017
 II. GENERALIZED HIGH STEP-UP BOOST-BASED DC-DC
CONVERTER WITH GAIN CELL
The BCGC proposed by [13] is illustrated in Fig. 1, so that
the gain cell can assume different configurations through the
combination of coupled inductor and voltage multiplier
techniques (an example of gain cell is shown in Fig. 2). The
static gain of the BCGC in continuous conduction mode
Fig. 1. Simplified switching model of the BCGC [13].
(CCM) is given by

1  an   a  b  nD
M CCM  , (1)
1 D

where D is the duty cycle, n is the turns ratio of the coupled

inductor, and a and b are specific indexes of each gain cell, so
that {a,b ∈ Գ| |a - b| ≤ 1}. To guarantee the operation at CCM
the magnetizing inductance Lm must be higher than its critical
value Lm,crit:
Fig. 2. Example of gain cell (abcp = 2321).

D 1  D  Vo 2
2

Lm  Lm ,crit  . (2) B. Objective Function

2ko Po f s 1  an   a  b  nD  1  bn 
An interesting characteristic of the BCGC is that all the
current and voltage stresses, necessary for its design, can be
generically equated by including two additional indexes c and
p specific for each gain cell, where {c ∈ Գ | c ≤ max(a,b)} and
p ∈ {-1,1}. This generalized approach opens the possibility to
apply the gain cell concept as a design feature and answers
some question as whether is better to increase the turns ratio n
or the indexes a and b to have a larger voltage gain [see (1)].
III. OPTIMIZATION PROBLEM
In this section, the proposed optimization approach will be
formulated to maximize the efficiency of the BCGC while
considering the following specifications: input voltage (Vi),
output voltage (Vo), output power (Po), and ambient
temperature (Ta). The optimization algorithm overview is
shown in Fig. 3 in a flowchart form.
In power electronics the efficiency is used maximized for a
fixed operating point – normally the nominal power. In this
case, the objective function for a design optimization of the
BCGC could be defined by:
Po
min f  x   (x)   . (5)
Po  Ploss (x)
However, in photovoltaic applications, it is important that
the converter has the best possible efficiency in practically the
entire power range, since the processed power is proportional
to the solar irradiation. In fact, in such applications, the
converters tend to operate between 30% and 80% of their
nominal power during 80% of the time [14]. To overcome this
issue, one can employ weighted efficiencies as, for example,
the California Energy Commission (CEC) efficiency ηCEC (6),
and the European efficiency ηEUR (7).

0.0410%  0.0520%  0.1230%  

A. Design Variables CEC  (6)
0.2150%  0.5375%  0.05100%
The design variables are the coupled inductor turns ratio n,
the switching frequency fs, the magnetizing factor km defined
0.035%  0.0610%  0.1320%  
by  EUR  (7)
0.1030%  0.4850%  0.20100%
Lm
km  , (3)
Lm , crit Considering the weighted CEC efficiency, the objective
function (5) can be rewritten as follows:
and the gain cell indexes abcp:
 Po k P 
min f  x   CEC (x)    T
 k CEC , (8)
x  n fs km abcp  . (4) P k
 o P  P loss ( x, k )
P 

433
where:

k CEC   0.05 0.53 0.21 0.12 0.05 0.04 , (9)

k P  100% 75% 50% 30% 20% 10%  . (10)

It should point out that the division symbol in (8) represents

a term by term division, since vector division is not defined.

C. Constraints
The design variables are subjected to several constraints
defined according to the design specifications, physical
limitations, and component safety operating areas:
 The lower boundary for the switching frequency is 50
kHz and the upper boundary is 150 kHz.
 The lower and upper boundary of the turns ratio
depends of the gain cell indexes and must guarantee that
0.2 ≤ D ≤ 0.7.
 The voltage/current ratings of the semiconductor
devices must be at least 150% of the maximum applied
voltage/current.
 The magnetizing inductance should be between 100%
and 200% of the critical magnetizing inductance at 10%
of the output power (ko = 0.1).
 The peak value of the flux density in the coupled
inductor core cannot exceed the maximum value
defined by its material.
 The current density in the windings wires must stay
between 200 e 600 A/cm2.
 The estimated junction temperature must be no more
than 90% of the maximum junction temperature. No
heat sink is considered. Fig. 3. Optimization algorithm overview.

 The windings should fit in the available window area of

the core with a filling factor between 0.3 and 0.7. Pcond  I Sef 2 rds _ on . (12)

IV. POWER LOSS MODELS 2) Switching Losses

The accuracy of the power loss models is extremely The most common expression to estimate the switching
important for the design optimization. In the proposed losses in a MOSFET is:
algorithm the following models have been considered:
1 1
A. Active Switch Psw  I S , pk VS , pk  ton  toff  f s  CossVS , pk 2 , (13)
2 2
The power losses in the active switch can be divided into
conduction losses (Pcond) and switching losses (Psw): however, recent works [15] indicates that the Coss power loss
term is redundant and, as stated in [13], the BCGC presents
PS  Pcond  Psw . (11) ZVS turn-on for the switch S1. Therefore, in proposed
algorithm the following equation has been considered for the
1) Conduction Losses switching losses model:
Considering the usage of a MOSFET, the conduction losses
are given by (12), where rds_on is the drain-source on-state 1
resistance. Psw  I S , pkVS , pk toff f s . (14)
2

434
 The turn-off time toff has been obtained by: so that m is the harmonic number, Rdc is the dc resistance, and
Rac is ac resistance of the windings. Such resistances can be
Qsw calculated by [18]:
toff  , (15)
Ig
N ( w )  20 1   20 Tmax  20   MLT
Rdc ( w )  , (24)
Vgs  VP n( w )
Ig  . (16)
Rg
  4nl ( w ) 2  1 n( w) 2 
where Ig is the gate current, Vgs is the gate-source supply Rac ( w )  Rdc ( w )  FR , m  GR , m  k F    , (25)
  12d s 2 2 2 d t ( w ) 
voltage, VP is the Plateau voltage, and Rg is total gate  
resistance.
 ber0 ( m )bei1 ( m )  ber0 ( m )ber1 ( m ) 
 
 ber1 ( m ) 2  bei1 ( m ) 2
B. Diodes FR , m  m   , (26)
The diode loss model will be resumed in conduction losses: 4 2  bei 0 ( m )ber1 ( m )  bei 0 ( m )bei1 ( m ) 
 
 ber1 ( m ) 2  bei1 ( m ) 2 
PD  I D , rms 2 rD  I D , avVT . (17)
 ber2 ( m )ber1 ( m )  ber2 ( m )bei1 ( m ) 
 
so that rD is the dynamic resistance and VT is the threshold  m  2 d cu 2  ber0 ( m ) 2  bei 0 ( m ) 2  . (27)
GR , m 
voltage: 2 2  bei 2 ( m )bei1 ( m )  bei 2 ( m )ber1 ( m ) 
 
 ber0 ( m ) 2  bei 0 ( m ) 2 
rD  rDO  kr T j , (18)
where:
VT  VTO  kvT j . (19)
d cu
m  , (28)
m 2
C. Coupled Inductor
As any magnetic device, the losses in the coupled inductor
1 
can be divided into core losses and copper losses: m   , (29)
  mf s   0  m
Pm  Pcore  Pcopper . (20)
MLT is the mean length per turn, N(w) is the number of turns,
n(w) is the number of litz-wire strands, dt is the diameter of the
1) Core Losses litz wire, dcu is the copper diameter of each strand, ds is the
The core losses were calculated by the NSE method [16] (or total diameter of each strand, nl(w) is the number of layers, ρ20,
iGSE [17]): α20, and σ are well-known parameters of the copper wire. The
correction field factor kF proposed by [19] is given by:
Pcore  k N  2 f s   B   D1  1  D 1  Ve ,
 
(21)
  3.44  0.505     0.688
2

kF  . (30)

k
kN  2
, (22)
2 t w  3d wl
 2 
 1 

0
cos  d  
3 w
. (31)

where α, β, and k are the Steinmetz parameters, ΔB is the so that dwl is the distance between the windings and the core
peak-to-peak magnetic induction, and Ve is the volume of the leg, tw is the windings thickness, and w is the width of the core
core. window.
D. Capacitors
2) Copper Losses
The copper losses in each winding (w) can be calculated by: The capacitor losses were calculated by (32), where rESR is
the resistance of its equivalent series resistor.

Pcopper ( w)  Rdc ( w) I ( w) ,rms 2   Rac ( w), m I ( w) ,m , rms 2 , (23) PC  rESR I C , rms 2 (32)
m 1

435
 TABLE I. RESULTS OF OPTIMIZATION I TABLE II. RESULTS OF OPTIMIZATION II

abcp 1101 abcp 1101

n 7.11 n 7
fs 100 kHz fs 100 kHz
Lm 55 µH Lm 30 µH
Core E55/28/21 – EPCOS N87 Core 2(//) x NPQ-32/20 – THORTON IP12R
Primary 9T 982xAWG41 Primary 10T 150xAWG38
Secondary 64T 86xAWG41 Secondary 35T 30xAWG38
S1 FDB035N10A S1 IPB039N10N3
D1 V12P10 D1 V10P10
D2 , Dgc SCS215AJ D2 , Dgc ES3G
C1 22 µF / 100 V ceramic C1 22 µF / 100 V ceramic
Cgc 2(–) x 22 µF / 100 V ceramic Cgc 2(–) x 22 µF / 100 V ceramic
C2 2(//) x 1 µF / 500 V film C2 2(//) x 1 µF / 500 V film
Ci 4(//) x 22 µF / 100 V ceramic Ci 4(//) x 22 µF / 100 V ceramic

Fig. 4. Effiency results of the BCGC from Optimization I. Fig. 5. Effiency results of the BCGC from Optimization II.

V. OPTIMIZATION RESULTS
The optimizations were performed by the GlobalSearch
method presented in the Toolbox Global Optimization [20] of
the software Matlab®. For the viability of a continuous
variable approach the gain cell indexes abcp are fixed and the
same algorithm is run for different index values (with
max(a,b) = 3). Two design optimizations results are described
below. It should point out that for both the optimizations the
capacitors were preselected; the other devices are chosen from
a database.
A. Optimization I
The following specifications were considered for the first
optimization design: Vi = 20-30 V (the middle value is taken in
the optimization algorithm), Vo = 400 V, Po = 200 W, and
Ta = 40 oC. Table I presents the optimal results. Fig. 4 shows
the efficiency curves of the obtained design. The solid line
represents the theoretical curve calculated by the power loss
model depicted in section IV, whereas the dotted line is
obtained from experimental results. The weighted CEC
efficiencies are also illustrated in Fig. 4, demonstrating results
around 98%.
One can see from Table I that a BCGC with only one
voltage multiplier cell was chosen, probably due to its lower
component count. In addition, it is possible to note that, since
no volume or cost restriction was considered, the optimization
resulted in a large E55/28/21 core and in some overrated
devices (e.g., the diode SCS215AJ has a current rating of 15 A,
much higher than needed). To overcome these issues, a second
optimization was carried out.
B. Optimization II
A second optimization has been carried out considering
also cost and volume terms in the objective function:
min f  x    k1CEC (x)  k2Ve  k3 c$ , (27)
so that k1, k2, and k3 are constants for weighting (in this case
was considered k1 = k2 = k3 = 1/3), Ve is the volume of the
core, and c$ is the cost sum of all selected components.
The following specifications were considered for the
second optimization design: Vi = 20-40 V (the middle value is
taken in the optimization algorithm), Vo = 400 V, Po = 250 W,
and Ta = 40 oC. Table II presents the optimal results. Fig. 5
shows the experimental efficiency curves of the obtained
design. The weighted CEC efficiencies are also illustrated in
Fig. 5, demonstrating results around 96%.
One can note that the second optimization also brought
about only one voltage multiplier cell, demonstrating again that
a lower component count results in a better efficiency
performance in the case of the BCGC. Moreover, due to the
inclusion of cost and volume terms in the objective function the
efficiency results have reduced in comparison with the ones
from Optimization I; although the slightly difference in the
specifications.

436
 Fig. 6 shows a photograph of the BCGC from Optimization
II applied as front-stage in a 250-W microinverter.
VI. CONCLUSION
This paper has proposed a design optimization algorithm
for the generalized Boost converter with gain cell applied to
photovoltaic microinverters. Besides the classical ones (turns
ratio, switching frequency, and so on), the proposed design
optimization also considers the gain cell as a design parameter.
Two optimized designs were performed. The first demonstrated
the accuracy of the power loss models and had CEC efficiency
results near to 98%. The second showed the flexibility of the
design optimization in allowing the modification of the
objective function to include volume and cost merits. Finally,
although recent works have proposed converters with
increasing static gain, the proposed optimization design has
shown that for the highest efficiency is better to increase the
turns ratio than add more voltage multiplier cells.
ACKNOWLEDGMENT
The authors would like to thank the financial support given
by the National Council for Scientific and Technological
Development (CNPq) and by the Company Luz e Força Santa
Maria (ELFSM) within the ANEEL R&D Program (project
0381-0007/2015).
REFERENCES
[1] “Photovoltaics report,” Fraunhofer ISE, Jun. 2016.
[2] A. Hu, S. Harb, N. Kutkut, I. Batarseh, and Z. J. Shen, “A review of
power decoupling techniques for microinverters with three different
decoupling capacitor locations in PV systems,” IEEE Trans. Power
Electron., vol. 28, no. 6, pp. 2711-2726, Jun. 2013.
[3] W. Li, and X. He, “Review of nonisolated high step-up dc/dc converters
in photovoltaic grid-connected applications,” IEEE Trans. Ind.
Electron., vol. 58, no. 4, pp. 1239-1250, April 2011.
[4] Q. Zhao and F. C. Lee, “High-efficiency, high step-up dc-dc
converters,” IEEE Trans. Power. Electron., vol. 18, no. 1, pp. 65-73,
Jan. 2003.
[5] K. C. Tseng and T. J. Liang, “Novel high-efficiency step-up converter,”
IEE Proc. Elect. Power Appl., vol. 151, no. 2, pp. 182-190, Mar. 2004.
[6] Y. Zhao, W. Li, Y. Deng, X. N. He, S. Lambert, and V. Pickert, “High
step-up boost converter with coupled inductor and switched capacitor,”
in Proc. IET PEMD, 2010, pp. 1-6.
[7] Y.-P. Hsieh, J.-F. Chen, T.-J. Liang, and L.-S. Yang, “A novel high step-
up dc-dc converter for a microgrid system,” IEEE Trans. Power
Electron., vol. 26, no. 4, pp. 1127-1136, April 2011.
[8] Y.-P. Hsieh, J.-F. Chen, T.-J. Liang, and L.-S. Yang, “Novel high step-
up dc-dc converter with coupled-inductor and switched-capacitor
techniques for a sustainable energy system,” IEEE Trans. Power
Electron., vol. 26, no. 12, pp. 3481-3490, Dec. 2011.
[9] T.-J. Liang, S.-M. Chen, L.-S. Yang, J.-F. Chen, and A. Ioinovici,
“Ultra-large gain step-up switched-capacitor dc-dc converter with
437
Fig. 6. Prototype photografy of a 250-W microinverter with the dc-dc
converter designed by the Optimization II.
coupled inductor for alternative sources of energy,” IEEE Trans.
Circuits Syst. I, Reg. Papers, vol. 59, no. 4, pp. 864-874, April 2012.
[10] Y.-P. Hsieh, J.-F. Chen, T.-J. Liang, and L.-S. Yang, “Novel high step-
up dc-dc converter with coupled-inductor and switched-capacitor
techniques,” IEEE Trans. Ind. Electron., vol. 59, no. 2, pp. 998-1007,
Fev. 2012.
[11] Y.-P. Hsieh, J.-F. Chen, T.-J. Liang, and L.-S. Yang, “Novel high step-
up dc-dc converter for distributed generation system,” IEEE Trans. Ind.
Electron., vol. 60, no. 4, pp. 1473-1482, April 2013.
[12] Y. Berkovich and B. Axelrod, “High step-up dc-dc converter based on
the switched-coupled-inductor boost converter and diode-capacitor
multiplier,” in Proc. IET PEMD, 2012, pp. 1-5.
[13] L. Schmitz, D. C. Martins, R. F. Coelho, “Generalized high step-up dc-
dc boost-based converter with gain cell,” IEEE Trans. Circuits Syst. I,
Reg. Papers, vol. 64, no. 2, pp. 480-493, Feb. 2017.
[14] A. C. Nanakos, G. C. Christidis, E. C. Tatakis, “Weighted efficiency
optimization of flyback microinverter under improved boundary
conduction mode (i-BCM)” IEEE Trans. Power Electon., vol. 30, no.
10, pp. 5548-5564.
[15] Y. Xiong, S. Sun, H. Jia, P. Shea, and Z. J. Shen, “New physical insights
on power MOSFET switching losses,” IEEE Trans. Power Electron.,
vol. 24, no. 2, pp. 525-531, Feb. 2009.
[16] A. V. Bossche, V. C. Valchev, and G. B. Georgiev, “Measurement and
loss model of ferrites with non-sinusoidal waveforms,” in Proc. IEEE
PESC, Jun. 2004, pp. 4814-4818.
[17] X. Nan and C. R. Sullivan, “An improved calculation of proximity-
effect loss in high-frequency windings of round conductors,” in Proc.
IEEE PESC, Jun. 2003, pp. 853-860.
[18] J. Muhlethaler, J. W. Kolar, and A. Ecklebe, “Loss modeling of
inductive components employed in power electronics systems,” in Proc.
IEEE ECCE, Jun. 2011, pp. 945-952.
[19] A. V. Bossche and V. C. Valchev, Inductors and transformers for power
electronics, Boca Raton, FL, USA: Taylor & Francis, 2005.
[20] “Global optimization toolbox user’s guide,” The MathWorks, Inc.,
2014.