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ELETTRONICA DEI SISTEMI DIGITALI

CORSO DI STUDIO IN INGEGNERIA


ELETTRONICA
Prof. MAURIZIO ZAMBONI
DIPARTIMENTO DI ELETTRONICA E TLC
Tel : 011 090 4079
E-mail : maurizio.zamboni@polito.it

ANNO ACCADEMICO 2019/2020

2020 1 MZ
ELETTRONICA DEI SISTEMI DIGITALI

ORARIO II p.d.
LEZIONI
Martedi’ 16:00 – 19:00
Giovedi’ 11:30-13:00
Venerdi’ 8:30 – 11:30

LABORATORIO
(LED5 - 2^ piano scavalco SUD)
Lunedi’ 8:30 – 10:00 (10:00-11:30) (sq. A)
Lunedi’ 11:30-13:00 (13:00-14:30) (sq. B)
Mercoledi’ 8:30 – 10:00 (10:00-11:30) (sq. C)
Mercoledi’ 11:30 – 13:00 (13:00-14:30) (sq. D)

2020 2 MZ
ELETTRONICA DEI SISTEMI DIGITALI
SQUADRE DI LABORATORIO
SQUADRA A : Lunedi’ alle 8:30 ! (FIS + ELN)
SQUADRA B : Lunedi’ alle 11:30 ! (ELN + Eln Meas)
SQUADRA C: Mercoledi’ alle 8:30 ! (ELN + Tirocinio + LM)
SQUADRA D: Mercoledi’ alle 11:30 ! (ELN con Eln Meas)
La tabella con l’allocazione studente/squadra e’ disponibile sul Portale
DOVETE PRENOTARVI SUL SITO DEL LED PER I LABORATORI
(NON APPENA POSSIBILE DATO CHE SI PARTE DALLA
SETTIMANA PROSSIMA !!!!!!!)
Docenti di laboratorio:
Prof. Maurizio Martina maurizio.martina@polito.it 011 090 4205
Ph.D. Giovanna Turvani giovanna.turvani@polito.it 011 090 4241
Ing. Yuri Ardesi yuri.ardesi@polito.it
Ing. Gianni Cirillo giovanni_cirillo@polito.it
Ing. Andrea Coluccio, Ing. Umberto Garlando
2020 3 MZ
ELETTRONICA DEI SISTEMI DIGITALI

Textbooks about Digital Design


• Fundamentals of Digital Logic with VHDL
Design, 3rd edition, by Stephen Brown and
Zvonko Vranesic, McGraw Hill, 2008. (lectures,
exercises and Lab sessions are based on this
book)
• Logic and Computer Design Fundamentals, 4th
edition, by M. Morris Mano and C.R.
Kime,Prentice Hall, 2008 (additional textbook,
with a lot of exercises and theoretical aspects)
• The Designer’s guide to VHDL, by P.J.Ashenden,
J. Lewes, 3rd ed (a very good VHDL book with
exercices and tricks: up to date)
2020 4 MZ
ELETTRONICA DEI SISTEMI DIGITALI

Additional Material (available on


the “Portale della didattica”)
• All the slides are available on the “Portale della Didattica” in the
“Elettronica dei Sistemi Digitali” course pages:
• Slides divided in 4 categories:
➡ LECTURES (Starting with Lx_something)
– Shown and commented during lectures
– Hidden during lectures but available in pdf (not numbered but
marked “X” - not too much relevant)
– Marked as HOMEWORK during lessons: not explained BUT
REQUIRED TO BE STUDIED (sometimes they have a reference
on text books to help You)
➡ COMPLEMENTARY LECTURES (Starting with LCx_something)
- Not considered for time reasons but FUNDAMENTAL for good
2020
engineers!! 5 MZ
ELETTRONICA DEI SISTEMI DIGITALI

Additional Material (available on


the “Portale della didattica”)

• VHDL COOKBOOK (A very concise VHDL


guide for Beginners)
• Tutorials for the ALTERA DE2 board use and
programming
• Tutorials for QUARTUS II tool (FPGA
development / simulation / synthesis)
• A set of examples and solved problems

• A FORUM is available for Q&A!!!

2020 6 MZ
ELETTRONICA DEI SISTEMI DIGITALI

Labs on Digital Design


• Lab sessions will be held at the LED laboratory
• DE2 evaluation boards, kindly donated by ALTERA
( thank You!!!!! J ), will be used to test the digital
circuits we will design, using VHDL language
• Lab sessions attendance is a must: Lab grade will be
part of final grade!!!!!
• To obtain good results, you must work at home to
prepare the lab designs in advance before the lab
sessions.
• A written report on each lab session work is required,
including the description of the problem, the proposed
solution and the VHDL coding.

2020 7 MZ
ELETTRONICA DEI SISTEMI DIGITALI

Labs on Digital Design


• Altera QUARTUS II development tools are available
free of charge for students on the ALTERA web site
( http://www.altera.com/education/univ ) .
• You can download them directly or copy them from
the web site of the course (We set the links You have
to use to download the correct versions!!!) .
• I suggest you to download both Quartus II – Web
Edition Software and MODELSIM-ALTERA Edition
• On the “Portale” you may find a file with the
information on how….
• You may be requested to register to the Altera web
site to obtain temporary licences.

2020 8 MZ
ELETTRONICA DEI SISTEMI DIGITALI

Labs procedure
• Each week a Lab session is presented;
• Except for the first week, when a tutorial on the tools will be used
to practice with the development programs, from the second
week on the procedure is:
– Each week Lab exercises will be available on the web together with
additional material.
– Students must do their exercises (VHDL coding and report writing) in
advance so that the following week they will test and evaluate the circuits
on the DE2 evaluation board.
– Within the end of each Lab session, the circuits must work properly and
their correctness must be certified by the Lab assistants.
– The report of the homework of each Lab session is due within the end of
each lab session.
– Of course it is forbidden to copy the VHDL code / report (I found a very
good tool anti plagiarism!!!!!). In any case you will be tested on VHDL
coding during the exam…therefore……
2020 9 MZ
ELETTRONICA DEI SISTEMI DIGITALI

Textbooks about uC Systems

• Slides from “Portale della Didattica” in the course pages

• “Mastering STM32”, Carmine Noviello, 2017, available


for selling at http://leanpub.com/mastering-stm32

• “Microcontrollers”, Franco Zappa, Esculapio

• Reference manuals of STM32 uC that will be available


together with NUCLEO/Tool Chain materials on the
“Portale della Didattica”

2020 10 MZ
ELETTRONICA DEI SISTEMI DIGITALI
Complementary Textbooks about uC
Systems (with different uCs)

• Embedded software Lecture notes (from “Portale della


Didattica”)

• W. Valvano, “Introduction to Embedded Systems - Real


Time interfacing” - CENGAGE learning (very good text to
be considered as a reference text in the
Microcontrollers world!!!)

2020 11 MZ
ELETTRONICA DEI SISTEMI DIGITALI

Labs on uC Systems

ANALOG DISCOVERY BOARDS


• Lab sessions will be held at the LED laboratory
• NUCLEO STM32F401 evaluation boards, kindly

AVAILABLE AT LED!!!!
donated by ST ( thank You!!!!! J ), will be used to
develop and design microcontroller systems.
• If You want, the board can be bought online at low
price.
• Lab sessions attendance is a must: Lab grade will be
part of final grade!!!!!
• To obtain good results, you must work at home to
prepare the lab designs in advance before the lab
sessions.
• A written report on each lab session work is required,
including the description of the problem, the
2020
proposed solution and the microcontroller coding. 12 MZ
STM32F401RE Nucleo Board

2020 13 MZ
ELETTRONICA DEI SISTEMI DIGITALI

Labs procedure
• Each week a Lab session is presented;
• Except for the first week, when a class tutorial on the tools
will be held, from the second week on the procedure is:
– Each week Lab exercises will be available on the web together
with additional material.
– Students must do their exercises (uC ASM/C coding and report
writing) in advance so that the following week they will test and
evaluate the circuits on the NUCLEO evaluation board.
– Within the end of each Lab session, the circuits must work properly
and their correctness must be certified by the Lab assistants.
– The report of the homework of each Lab session is due within the
end of each lab session.
– Of course it is forbidden to copy the ASM/C code / report (I found a
very good tool anti plagiarism!!!!!). In any case you will be tested on
ASM/C coding during the exam…therefore……

2020 14 MZ
ELETTRONICA DEI SISTEMI DIGITALI

Exams
• Written exam (4 hours long) about:
– Digital Design part on Lectures, Exercises and VHDL coding
– uC Systems part on Lectures, Exercises and uC ASM/C coding
• A final grade is made for the two parts (written grade >= 18 to proceed)
• An oral exam will take place to further ascertain VHDL/ uC practice/
theory knowledge by means of exercises/theory questions.
• Lab. sessions will be considered for the final Grade!!!!!
• The final grade will be calculated as follows:
a.a 18-19

Final_Grade = Oral_coefficient x (0.95 x Written_grade +


0.25 x Lab_grade – 4)

2020 15 MZ
ELETTRONICA DEI SISTEMI DIGITALI

Exams
• Written exam (4 hours long) about:
– Digital Design part on Lectures, Exercises and VHDL coding
– uC Systems part on Lectures, Exercises and uC ASM/C coding
• A final grade is made for the two parts (written grade >= 18 to proceed)
• An oral exam will take place to further ascertain VHDL/ uC practice/
theory knowledge by means of exercises/theory questions.
• Lab. sessions will be considered for the final Grade!!!!!
• The final grade will be calculated as follows:
a.a 19-20

Final_Grade = Oral_coefficient x (0.95 x Written_grade +


0.25 x Lab_grade – 4) x (CPD_fill_factor - 0.75)

2020 16 MZ

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