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IGBT/MOSFET Gate Drive Optocoupler: Optocouplers and Solid-State Relays
IGBT/MOSFET Gate Drive Optocoupler: Optocouplers and Solid-State Relays
IGBT/MOSFET Gate Drive Optocoupler: Optocouplers and Solid-State Relays
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G
When driving inductive loads, the device under goes higher
stress. Hence, it makes sense to study the turn-on and
turn-of time of the IGBT/MOSFET when driving inductive
loads.
The IGBT’s internal input capacitance (CGE) and Miller
capacitance (CGC) impacts the IGBT turn-on behavior. But
E
the CGC effect is very small and negligible. Figure 3
Fig. 1 - Simplified IGBT Equivalent Circuit illustrates the parasitic IGBT capacitances.
C C
CGC
APPLICATION NOTE
E CGE
E
Fig. 2 - IGBT Symbols
E
The equivalent circuit for the input of IGBT is the same as a
MOSFET and is purely capacitive. This allows the use of a Fig. 3 - IGBT Parasitic Capacitances
IC
TABLE 2 - IGBT AND MOSFET CAPACITANCE
CCG
CAPACITANCE IGBTS POWER MOSFETS
Rgate
Input Ciss = CGE + CGC Ciss = CGS + CGD
dV/dt
Reverse transfer Crss = CGC Crss = CGD
Output Coss = CGC + CCE Coss = CGD + CDS IC = CCG x dV/dt
CGE
The turn-on behavior of the IGBT is identical to the power
MOSFET, since the IGBT acts as a MOSFET during most of
the turn-on interval. When a gate signal is applied, the gate E
emitter voltage of the IGBT rises from zero to VGE(TH), as Fig. 5 - Rgate Effect on dV/dt
shown in figure 4. This voltage rise is due to the gate
resistance (Rgate) and the CGE. The turn-off behavior of the IGBT, as shown in figure 6, has
a dual characteristic of both power MOSFET and BJT
devices.
VGE
QGE QCG
VCE
IC VGE/TH)
VGE = 0 V
I(t) V(t)
IC = 0 A VCE(sat) VCE
ti-rise tv-fall IC
19892 V(t) I(t)
IC-tail
Fig. 4 - IGBT Turn-On Sequence
VCE
IC = 0 A
The turn-on time is a function of the output impedance of the trise tfall
drive circuit and the applied gate voltage. Hence, it is
possible to control the turn-on speed of the device by Fig. 6 - IGBT Turn-Off Sequence
choosing an appropriate value of gate resistance (Rgate).
In other words, by varying the Rgate it is possible to vary the At turn-off, the gate voltage begins to decrease until it
time constant of the parasitic net equal to Rgate x (CGE+CCG) reaches the value when the Miller effect occurs; during this
and then dV/dt. Therefore, the Rgate value strongly impacts time the VCE voltage increases changing the output
the power losses, since its variation also affects the dV/dt characteristics with constant IC.
slopes as illustrated in figure 5. Next, the Miller effect and the VGE voltage remain constant
APPLICATION NOTE
Tj = TC + Ptot × θ JC (1)
To select a heat sink, which keeps the junction temperature
E
at or below a given temperature, the following equation can
be used: Fig. 7 - FWD is used with IGBT to Adjust Switching Speed
IGBT SWITCHING POWER LOSSES ESW ( on) = ∫ i-rise VCE × I C (t ) × dt + ∫ v-fall VCE (t ) × I C × dt
APPLICATION NOTE
(7)
When turning an IGBT on or off, the level of VGE and Rgate
affects the switching losses of the device. The effect of
increasing VGE or reducing Rgate is to reduce the delay time,
1
rise time, and fall times of the device and hence to reduce ESW ( on ) = × VCE × I C × (ti-rise + tv-fall ) (8)
the switching losses. Reducing the level of VGE or increasing 2
Rgate results in increased switching losses but can reduce
electromagnetic interference (EMI). Other factors affecting
the switching losses include the anti parallel diode (FWD),
circuit inductance, snubbers, device junction temperature,
ESW ( off ) = ∫ v-rise VCE (t ) × I C × dt + ∫ i-fall VCE × I C (t ) × dt (9)
operating voltage, and current. The use of FWD is illustrated
in figure 7.
Rev. 1.3, 24-Oct-11 3 Document Number: 81227
For technical questions, contact: optocoupleranswers@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Application Note 91
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Vishay Semiconductors
Where: VCC
PSW = switching power loss
fSW = switching frequency
Power dissipated during turn-on is calculated as follows:
1
Rgate
2
Figure 6 indicates that the power dissipated during turn-off
is due to two factors.
19894-1 VEE
The first such factor is the speed at which the collector Fig. 8 - Simplified IGBT Gate Driver
voltage reaches its maximum value. The second factor is the
duration of the tail of the collector current. The collector tail The value of the gate resistance (Rgate) has a significant
current is due to the recombination of the minority carriers impact on the dynamic performance of the IGBTs. A smaller
that cannot be extracted from the base of the PNP BJT Rgate charges and discharges the IGBT input capacitance
section that is already open. The length of this “tail” faster, which reduces the switching time and hence the
depends on the lifetime of these carriers and causes the switching losses and provides immunity to dV/dt turn on.
major part of the switching losses. But, a small Rgate can cause oscillation between the IGBT
Hence, the turn-off power losses can be approximated as input capacitance and parasitic lead inductance.
follows: The minimum peak current capability of the gate drive
1 power source and the average power required to drive an
PSW (Off ) ≈ × VCE × f SW × ( I C × tv-rise+ I C −tail × t i-fall ) (14) IGBT is as follows:
2
Δ VGE
APPLICATION NOTE
PEmitter = I F × VF × D (21)
QGE QGC
Where:
D = maximum LED duty cycle
IF = LED forward current
VF = LED forward voltage
Qgate (C)
The amount of power dissipated in the IGBT driver internal
Fig. 9 - Total IGBT Gate Charge Waveform During Switching
circuitry is:
First, the CGE is charged (the CGC is also being charged, but PInternal = ICC × (VCC - VEE ) (22)
the amount of charge is very low and negligible). Once the
CGE is charged up to the gate threshold voltage (VGE(TH)), the Where:
device begins to turn on and the current ramps up to the full ICC = Supply current, output open
value of current in the circuit. Once the full current is
reached, the VCE voltage begins to collapse and the gate The total gate driver IC power losses are:
voltage becomes flat due to CGC being charged and the
collector voltage falling off. After the collector voltage has Pgate −driver (tot ) = POutput + PEmitter + PInternal (23)
fallen to its final level, the CGE and CGC are charged to the
gate drive voltage.
To better understand gate charge, it can be shown with the In many applications, the gate drive circuitry needs to be
following equations. isolated from the control circuit to provide level shifting and
improve noise immunity and safety. This is what the Vishay
IGBT driver provides by means of optical isolation.
Qgate = VGE × C gate (17)
+ VDC
Qgate
LOAD
VGE
APPLICATION NOTE
NC
Vout
Shield
0.1 µF
Where:
A VO
Qgate = total gate charge Rgate
Cgate = total gate capacitance
VGE = driver’s supply voltage
C VO
This means that the charging and discharging the IGBT gate NC
can be seen as the charging and discharging a capacitor. VEE
1 2
Pgate = × C gate ×VGE × f SW (19) - VDC
VCC
VCC
CGC
Igate = IGC + IGE
Rgate
CGE
VEE
VEE
The IOL is specified when output voltage is low, i.e. when the The following equation can be used to calculate the
gate drive optocoupler is charging the IGBT gate. appropriate Rgate value:
Hence, the load draws the highest output current. The
required IOL or Igate to switch the IGBT can be calculated by VCC −VEE −VOL
using the gate capacitances of the IGBT. Rgate = (29)
I OL ( peack )
1
VGE / GC = × ∫ I GE / GC (t )dt (24)
Where:
CGE / GC VOL = low-level output voltage of the gate driver optocoupler
UVLO
1 (25) The minimum acceptable gate drive voltage for an IGBT is
VGE / GC = × I GE / GC × t SW important because falling below this value will result in
CGE / GC
switching from on state to a highly dissipative linear mode.
Hence, the Vishay IGBT drivers have under-voltage lock-out
VGE / GC × CGE / GC (UVLO) to ensure that gate drive is removed for low drive
I GE / GC = (26)
APPLICATION NOTE
condition. This will prevent the IGBT from entering the linear
t SW conductive mode.
VCC
A high-CMTR LED drive circuit needs to keep the LED off
NC
(VF < VF(OFF)) during common mode transients. As long as
Shield
C VO + VDC
Load
VCC
VDD
NC VEE
NC
Vout
Shield
0.1 µF
A VO
Fig. 13 - Vishay IGBT Driver Rgate
All these paths should be very short in length to reduce Since all IGBT/MOSFET driver ICs have some losses, it is
inductance. Also, these paths should be as wide as possible necessary to calculate the power dissipated in the driver for
to reduce resistance. In addition, these ground paths need to a worst-case condition. The total power dissipated in the
be kept separate to avoid returning ground current from the IGBT driver IC (as described previously) is:
load to affect the logic line. It is very important to note that all
ground points in the circuit should return to the same physical Pgate −driver (tot ) = POutput + PEmitter + PInternal (23)
point to avoid generating differential ground potentials.
Power Supply By-Passing Where:
Since turning an IGBT/MOSFET on and off amounts to
2
charging and discharging large capacitive loads, the peak POutput = C gate × VGE × f SW (20)
charge current need to be within the capability of drive
circuit. At the same time the driver will have to draw this PEmitter = I F × VF × D (21)
current from its power supply in a short period of time. This
means that using of proper by-pass capacitors for the PInternal = ICC × (VCC - VEE ) (22)
power supply becomes very important. A pair of by-pass
capacitors of at least 10 times the load capacitance with
complementary impedance, used in parallel and very close Since ambient temperature in the vicinity of the
to the VCC pin, can take care of this issue. These by-pass IGBT/MOSFET driver will have an effect on the actual power
capacitors should have the lowest possible equivalent dissipation capability of the driver, the maximum allowable
series resistance (ESR) and equivalent series inductance power dissipation at this temperature will need to be
(ESL) and the capacitor lead lengths should be as short as derated accordingly (in comparison to room temperature).
possible. The selected IGBT/MOSFET driver can only be used if the
maximum allowable power dissipation at this temperature is
Mismatch of Driver to the Driven IGBT/MOSFET
within the capability of this IGBT/MOSFET driver.
Floating supply
RIN NC
Shield
Open 0.1 µF
collector
Control A VO
input Rgate
6
GND 1 C VO
NC 3-Phase
AC
VIN VCC4
APPLICATION NOTE
RIN NC
Shield
Open 0.1 µF
collector
A VO
Control
input Rgate
- High Voltage
DC
GND 1 C VO
NC
+ High Voltage
DC
VIN VCC1
RIN NC +
Shield
Open 0.1 µF
collector _
Control A VO
input Rgate
GND C VO
NC 3-Phase
AC
VEE1
- High Voltage
DC
+ VDC
VIN VCC
RIN NC
0.1 µF +
Shield
Open
collector High Voltage
Control A VO DC
input Rgate -
C VO
GND
NC
- VDC