Jagdamba Education Society's

S. N. D. College Of Engineering & Research Center, Babhulgaon

Tal: Yeola Dist: Nashik - 423401
Department Of Electrical Engineering
2013-2014 (Even Semester)
UNIT-III (Part A - PPI 8255)
Q.1 The two widely used general-purpose programmable devices, can be compatible with ____
microprocessor

A] 8085 B] 8086

C] Any D] None of the above

Q.2 The signals exchanged between microprocessor and a peripheral prior to actual data transfer; these
signals are__________

A] Control Signals B] Handshake Signals

C] Status Signal D] Data Transfer Signals

Q.3 A programmable I/O devices likely to have which of the following devices:

A] A control register in which the MPU can B] Chip Select Logic

write an instruction

C] Handshake signals and interrupt logic D] All of the above

Q.4 8255 has ________ I/O pins

A] 40 B] 16

C] 24 D] 28

Q.5 If chip select logic of 8255 is connected to the A7 line through NOT gate and A0 and A1 of 8255
connected to the A0 and A1 of the system address bus, then assuming A6 to A2 at logic 0, what will
be the address of Port C ?

A] 80H B] 81H

C] 82H D] 83H

Q.6 I/O function or bit set/reset function of 8255 are classified by the_____ bit of control word register

A] D7 B] D0

C] D6 D] D6 and D5

Q.7 Which of the following statements are true

A] Port C operates in the Bit set/reset mode B] BSR control word does not affect the
function of Port A and B
C] Both A and B are True D] All of the above

Prof. Tambe S. S.
Department of Electrical Engineering
S.N.D. C.O.E. & R.C.
Q.8 In which of the following modes, ports does not have handshake or interrupt capability

A] Mode 1 B] Mode 0

C] Mode 2 D] None of the above

Q.9 Identify the Mode 0 control word to configure port A and port Cu as output ports and port B and
port CL as input ports.

A] 83 B] 82

C] 81 D] 80

Q.10 8255 is interfaced with 8085 in memory mapped I/O scheme. If this 8255 chip is selected when
A15 line is high and A0 and A1 lines are used to select Port A, B, C and Control Word register then,
assuming all don’t care address lines at logic 0, the address of Control Word register is:

A] 83H B] 8003H

C] 8383H D] 82H

Q.11 If 8255 is interfaced in Memory mapped I/O scheme. The Addresses of Port A,B,C and CWR are
4000H,4001H,4002H and 4003H respectively, then which of the following instructions will
configure the all the ports as output port in Mode0 ?

A] MVI A, 83H B] MVI A, 80H

STA 4003H OUT CWR
C] MVI A, 80H D] MVI A, 80H
STA 4003H LDA 4003H

Q.12 If the 8255 system is reset then:

A] It clears the control register B] Sets all the ports in the output mode

C] Sets all the ports in the input mode D] Both A and C.

Q.13 The addresses for Port A,B,C and CWR are 80H,81H, 82H and 83H respectively.

MVI A, 80H
OUT 83H
XRA A
OUT 82H
ORI 0FH
OUT 83H

What will be the content of Port C after execution of above instructions ?

A] 80H B] 81H

C] 82H D] 83H

Prof. Tambe S. S.
Department of Electrical Engineering
S.N.D. C.O.E. & R.C.
Q.14 To set/reset bits in port C, a control word is written in to
A] Port C B] Control word register

C] Both A and B D] Can’t be predicted

Q.15 A BSR Control word affects

A] Only Port A B] Only Port B

C] Only Port C D] All of above ports

Q.16 In mode 0

A] 8 bits of Port A, B ,Cu and CL can be B] Ports A and B are used as simple 8-bit
programmed as either input or output I/O ports

C] Port C as two 4-bit ports D] Both A and B

Q.17 In mode 1

A] Two ports A and B function as 8-bit I/O B] Input data are latched
ports

C] Output data are latched D] All of above

Q.18 The bits of Port C used for handshaking when ports A and B are configured as input port in
mode1 are:
A] PC0, PC1 and PC3 B] PC4, PC5 and PC6

C] PC3, PC4 and PC5 D] PC2, PC1 and PC0

Q.19 In 8255 mode1, Which signal generated by a peripheral device to indicate that it has transmitted a
byte of data?
A] B] IBF

C] INTR D] INTE

Q.20 A control word to set up Port A and Port B of 8255 in Mode 1 is

A] B4 B] C4

C] 4B D] Can’t be predicted

Q.21 8255 has ______parallel ports

A] Three 4-bit B] Two 8- bit

C] Two 4 bit D] Three 8- bit

Prof. Tambe S. S.
Department of Electrical Engineering
S.N.D. C.O.E. & R.C.
Q.22 8255 has _____ I/O modes

A] 3 B] 2

C] 1 D] 4

Q.23 A high on _____ line causes all 24 lines of three 8 –bit ports to be in the input mode.

A] B] RESET

C] GND D]

Q.24 If______, the control word is taken as a I/O mode definition word

A] D7 = 1 B] D7 = 0

C] D0 = 1 D] D0 = 0

Q.25 If______, the control word is taken as a Bit set/reset word

A] D7 = 1 B] D7 = 0

C] D0 = 1 D] D0 = 0

Q.26 On activation of _____, the 8255 loads data from the input port lines into the input buffer of that
port.
A] B] IBF

C] D] None of these

Q.27 8255 sets INTR when , IBF and INTE for input control signals are ________ respectively

A] 1, 0 and 1 B] 1, 1 and 0

C] 1, 1 and 1 D] 0, 1 and 1

Q.28 Which of the following port can be programmed in Mode 0,1 and 2 ?

A] Port A B] Port B

C] Port C D] Both A and B

Q.29 _____ is a general purpose programmable I/O device used for parallel data transfer.

A] 8254 B] 8255

C] 0808 D] 8051

Q.30 Mode 1 of 8255 I/O mode is:

A] Input/output with handshake B] Simple input/output

C] Both A and B D] None of these

Prof. Tambe S. S.
Department of Electrical Engineering
S.N.D. C.O.E. & R.C.
 *Answer Key*

Q. No. Ans Q. No. Ans Q. No. Ans Q. No. Ans

1 C 9 A 17 D 25 B
2 B 10 B 18 C 26 B
3 D 11 C 19 A 27 C
4 C 12 D 20 A 28 A
5 C 13 A 21 D 29 B
6 A 14 B 22 A 30 A
7 D 15 C 23 B
8 B 16 D 24 A

Prof. Tambe S. S.
Department of Electrical Engineering
S.N.D. C.O.E. & R.C.