Assignment 1: Riphah College of Engineering & Technology

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Riphah College of Engineering & Technology

DEPARTMENT OF ELECTRICAL ENGINEERING

Assignment 1
3rd Semester: Fall-2017 B.Sc. Electrical Engineering
EE-143: Digital Logic Design Total Marks: 10
Issue Date: 30th October, 2017 nd
Due Date: 2 November, 2017

Q.1 a) Prove the Huntington postulates? 10

C2
CLO1
PLO1

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