EE 435 Final Project: DAC Isaac C Klein

Final Project: Digital to Analog Converter

Report by: ___________________Isaac_C_Klein_________________________

Date: ________________________4/30/2020____________________________

Report submission date:

Lab Section: Wed 6:00 – 9:00 PM

Graded by ________________________________________________________

Score ____________________________________________________________

Introduction:
For the capstone final project of EE435 we had the decision to either design a 7 bit Digital to
Analog Converter or a 7 bit Analog to Digital Converter. Since I am a digital type of guy, I went
with the Digital to Analog converter design. For the design choice I decided to have 7 inputs
each connected to a double resistance load a serial separated by half that resistance size. To
buffer the output and to showcase Analog Vlsi design I connected the output to a 5T Op amp to
complete the design. This design is based on the R2R Ladder Architecture design.
EE 435 Final Project: DAC Isaac C Klein

Design of the 5T Op Amp

Part 1: Determine the number of degrees of freedom in this design and list the
design variables.
Initially in Practical Parameter Domain: { VEB1, VEB3, VEB9, P}
After calculation only one degree of freedom remained { VEB9 }
Part 2: Design an operational amplifier using the architecture of Fig. 2. that can
drive a capacitive load of 10pF using an analytic formulation for the amplifier. This
design should result in determining all of the natural design parameters for this
circuit. The amplifier should have a GB of at least 10MHz and a p-p output swing
of 1V.
EE 435 Final Project: DAC Isaac C Klein

Part 4: Make minor changes, if necessary, in the design so that the simulated
performance meets the design requirements.
Multiplied sizes by 4 to fit with transistor block sizes.
EE 435 Final Project: DAC Isaac C Klein

5TCM OP AMP
EE 435 Final Project: DAC Isaac C Klein

Part 3: Simulate the amplifier you designed in Part 2 in Specrtre using the TSMC
0.18u CMOS process. Compare the dc gain, the GB, the output signal swing, and
the SR with what you obtained by the analytical formulation.

Basic bench, added an itest between vout and vin to test gain and bandwhidth.
For Signal Swing and Slew Rate used a Vpulse input with a transient simulation.
EE 435 Final Project: DAC Isaac C Klein

Gain and Bandwhidth (Found 2 ps)

EE 435 Final Project: DAC Isaac C Klein

Transient Vpulse Input

EE 435 Final Project: DAC Isaac C Klein

Part 5: Layout the circuit that you have designed and compare the post-layout
extracted performance with that of your circuit schematic. Resolve the reasons for
any discrepancies between the original schematic simulation and that of the
extracted circuit.
Layout Extracted
EE 435 Final Project: DAC Isaac C Klein

Seven Bit Digital to Analog Converter:

In designing of the digital to analog converter, I needed resistors to separate the inputs. In order
to keep the device consistent and minimally sized I decided to make the resistors diode
connected resistors by using nmos transistors and connecting the drain to the gate and turning the
source into the output. By utilizing the transistor like this it acts as a resistor and the length will
add to its resistance.

7B DAC Schematic

7B DAC Symbol
EE 435 Final Project: DAC Isaac C Klein

7B DAC Testbench

7B DAC Simulation

I used each input to build pretty much a truth table for every possible input, and as the inputs
from left to right to left turn on the output approached full voltage. So, there is a possible
voltage for every 7 bit combination in the output of this device.
EE 435 Final Project: DAC Isaac C Klein

7B DAC Layout

7B DAC Extracted
EE 435 Final Project: DAC Isaac C Klein

Seven Bit Digital Analog Converter with 5T Op Amp

Since both the 5T op amp has been shown operational as well as the 7 bit digital analog
converter, we will place them together to get a boosted output on our digital inputs.
7B DAC 5T Schematic

7B DAC 5T Symbol
EE 435 Final Project: DAC Isaac C Klein

7B DAC 5T Testbench

7B DAC 5T Simulation
EE 435 Final Project: DAC Isaac C Klein

7B DAC 5T 10 PF Testbench

7B DAC 5T 10 PF Simulation

For the simulation of the 7 bit dac with the 5t op amp I set each binary bit to 100mV and set the
power supplies of the op amp to +- 2V, additionally I set VB2 to -560 mV and placed a 10p cap
on it. Running the full 128uS for the simulation we see the output go from 0 to 12 V for each
binary input.
EE 435 Final Project: DAC Isaac C Klein

7B DAC 5T Layout

7B DAC 5T Extracted