DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

CAT-1 JULY 2019 CAT-1 JULY 2019

Year/Sem : II / III Date : 23.07.2019 Year/Sem : II / III Date : 23.07.2019

Class/Section : ECE A Setion Duration : 3 Hours Class/Section : ECE A Setion Duration : 3 Hours
Faculty : Max. Marks : 100 Faculty : Max. Marks : 100

Answer ALL Questions Answer ALL Questions

Part – A (10*2=20) Part – A (10*2=20)

1. Explain the Principles of duality with the help of example. 1. Explain the Principles of duality with the help of example.
2. State and Prove Demorgan’s law. 2. State and Prove Demorgan’s law.
3. Express F= A+B’C as sum of minterms. 3. Express F= A+B’C as sum of minterms.
4. Define minterms and maxterms. Give examples. 4. Define minterms and maxterms. Give examples.
5. If A and B are Boolean variable and if A=1 and (A+B)’ = 0 , find B. 5. If A and B are Boolean variable and if A=1 and (A+B)’ = 0 , find B.
6. What is Demux? 6. What is Demux?
7. Draw a 2 to 1 multiplexer circuit. 7. Draw a 2 to 1 multiplexer circuit.
8. What is a combinational circuit? Give an example. 8. What is a combinational circuit? Give an example.
9. Subtract 3610 - 610 using 2’s complement. 9. Subtract 3610 - 610 using 2’s complement.
10. Convert 12110 into octal. 10. Convert 12110 into octal.

Part-B (5*13=65) Part-B (5*13=65)

11. A) solve by k map f(ABCDE)=∑(1,4,8,10,11,20,22,24,25,26)+d(0,12,16,17) 11. A) solve by k map f(ABCDE)=∑(1,4,8,10,11,20,22,24,25,26)+d(0,12,16,17)
Or Or
B) solve by tabulation method f(abcd) = ∑(0,1,4,5,9,10,12,14,15) + d(2,8,13) B) solve by tabulation method f(abcd) = ∑(0,1,4,5,9,10,12,14,15) + d(2,8,13)
12. A) solve by k map Y= a’c+b’c+ab’c’+a’b 12. A) solve by k map Y= a’c+b’c+ab’c’+a’b
OR OR
B) Implement the following circuit by using NAND and NOR gates. B) Implement the following circuit by using NAND and NOR gates.
Y = a’b+ac+ac’d+b’cd’ Y = a’b+ac+ac’d+b’cd’
13. A) Prove that 1. (AB+C+D)(C’+D)(C’+D+E)=ABC’+D (7) 13. A) Prove that 1. (AB+C+D)(C’+D)(C’+D+E)=ABC’+D (7)
2. (A+B)(A’+B)(B+) = (A+B) (A’+C) (6) 2. (A+B)(A’+B)(B+) = (A+B) (A’+C) (6)
OR OR
B) Design a 3 to 8 decoder and list its pros and cons. B) Design a 3 to 8 decoder and list its pros and cons.
14. A) Design a Full adder and Full Subtractor. 14. A) Design a Full adder and Full Subtractor.
OR OR
B) Design a binary to gray code converter. B) Design a binary to gray code converter.
15. A) Implement the following using 4:1 Mux f(ABCD) = ∑ ( 2,3,5,7,8,9,12,13,14,15) 15. A) Implement the following using 4:1 Mux f(ABCD) = ∑ ( 2,3,5,7,8,9,12,13,14,15)
OR OR
B) Design a gray to binary code converter using Decoder. B) Design a gray to binary code converter using Decoder.

Part-C (1*15=15) Part-C (1*15=15)

16. A) Design BCD to Binary code converter. 16. A) Design BCD to Binary code converter.
(or) (or)
B) F(ABCDE) = ∑( 6,9,13,18,19,25,27,29,41,45,57,61) solve by quine mcclusky method B) F(ABCDE) = ∑( 6,9,13,18,19,25,27,29,41,45,57,61) solve by quine mcclusky method