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A Current-Tripler dc/dc Converter

Ming Xu, Jinghai Zhou, and Fred C. Lee, Fellow, IEEE

Abstract—This paper proposes a novel zero-voltage-switching during the freewheeling period is reduced. However, as the cur-
(ZVS) current-tripler dc/dc converter. Compared to the con- rent continuously goes up, the SR conduction losses also in-
ventional phase-shifted ZVS full-bridge dc/dc converter with crease by a power of two. Conventionally, the current-doubler
current-doubler rectifier, the proposed current-tripler dc/dc
converter reduces the synchronous rectifier (SR) conduction loss with more semiconductor devices in parallel is used to lower the
as well as the transformer winding loss. Furthermore, the pro- on-resistance of the SR, and a distributed magnetic is also used
posed transformer structure is very compact, and thus the power to reduce the transformer winding losses. However, those solu-
density of the converter could be greatly increased. Analysis and tions have their limitations.
experimental results show that the proposed topology offers great
advantages when the converter output current goes higher and a) Increased cost.
the voltage goes lower, as demanded by future microprocessors b) Larger footprint and lower power density.
and telecommunications systems. A 48-V/1.0-V, 100-A, 300-kHz c) More devices mean greater driver loss.
prototype is implemented, and the experimental results show that These issues pose significant challenges for future high-cur-
it can achieve 87% efficiency at full load. rent, low-voltage dc/dc converters for microprocessors as well
Index Terms—Conduction loss, current-tripler, dc/dc, ZVS. as telecommunications applications.
The forward rectifier can be considered as a single-phase
secondary topology, and the current-doubler can be treated as
I. INTRODUCTION
a two-phase interleaving topology. Can the current-doubler be

I T IS WELL known that the power supply for micropro-


cessors and telecommunications equipment demands higher
current and lower output voltage. As the current goes up to 130
extended to three phases so that there are three MOSFETs
sharing the load current during the freewheeling period? The-
oretically, it will have lower RMS current through each device,
A and even higher in the future, the total conduction loss of the and lower secondary conduction loss is expected. Based on
converter is significantly increased, which causes severe thermal this concept, the current-tripler secondary topology is pro-
issues. High efficiency and high power density are the general posed, as shown in Fig. 1. The proposed topology can easily
requirements for 48-V-input dc/dc converters. achieve zero-voltage-switching (ZVS) for all the MOSFETs,
For low-voltage and high-current applications, the sec- therefore, switching loss is significantly reduced. In this paper,
ondary-side power losses have a major impact on efficiency. the operating principle of the proposed current-tripler dc/dc
Firstly, synchronous rectification, with specifically designed converter is analyzed in detail. The benefits of this topology for
low-voltage metal oxide semiconductor field effect transistors high-current, low-voltage applications are discussed as well.
(MOSFETs), is widely used to dramatically improve the Experimental results are given to verify those advantages.
efficiency of low-voltage dc/dc converters [1]–[3]. Secondly,
proper secondary-side topologies should be selected to reduce II. OPERATING PRINCIPLE OF THE PROPOSED TOPOLOGY
the RMS current through the synchronous rectifiers (SRs).
The proposed current-tripler dc/dc converter is shown in
There are three major secondary-side topologies: forward
Fig. 1. There are three switch legs at the primary side. In
rectifier, center-tapped rectifier and current-doubler rectifier.
each switch leg, the top and bottom switches are operating
Among these three topologies, the current-doubler rectifier is
complementarily. The required isolation of the primary side and
the most suitable for high-current, low-voltage applications. Be-
the secondary side is achieved by a high-frequency three-phase
cause of its simpler transformer structure and two-times-lower
transformer, which has delta connections at both sides. At the
inductor currents and transformer secondary currents, the
secondary side, a structure including three SRs, which is called
current-doubler topology can offer lower conduction losses
the current-tripler, is proposed to reduce the conduction loss of
than the conventional center-tapped topology [4].
the secondary side.
The reason for the lower RMS current of the current-doubler
In order for the proposed topology to achieve ZVS, a com-
rectifier is that during the freewheeling period (when there is
plementary control is adopted [5]. The switch-timing diagrams
no input-output energy transfer), the two SR switches share
for the primary switches and secondary synchronous
the load current. As a result, the total rectifier conduction loss
rectifier switches are shown in Fig. 2. Based on the
switch-timing diagram, there are 12 operating modes during one
switching cycle.
Manuscript received May 30, 2003; revised November 17, 2003. Recom-
mended by Associate Editor F. Blaabjerg. Mode1 : The leakage inductor of the transformer
The authors are with the Center for Power Electronics Systems, The resonates with the output capacitors of and . The output
Bradley Department of Electrical and Computer Engineering, Virginia Poly- capacitor of is discharged and that of is charged. At cer-
technic Institute and State University, Blacksburg VA, 24061 USA (e-mail:
mingxu@vt.edu). tain load conditions, the energy stored in the leakage inductor is
Digital Object Identifier 10.1109/TPEL.2004.826492 sufficient to achieve ZVS for .

© 2004 IEEE. Reprinted, with permission, from IEEE Transactions on Power Electronics 2004.
37
Fig. 1. Proposed ZVS current-tripler dc/dc converter.

Fig. 5. Implementation by a three-leg core.

Fig. 6. Magnetic core structure.

Mode2 : During this time interval, the energy is


transferred from the primary side to the secondary side. The
current flows through , winding bc and ba, then and .
Fig. 2. Control strategy of proposed current-tripler dc/dc converter. Mode3 : At , is turned off, and the load current
is used to charge the output capacitor of and to discharge the
output capacitor of to achieve ZVS for .
Mode4 : During this interval, the energy stored in
the leakage inductor of the transformer is freewheeling through
the path of , winding bc and ba, and and . From to
, leg b completes its two switching transitions that are both
ZVS.
From t4 to t8, another switch leg, leg c, executes its two ZVS
transitions with the same operation principle as leg b. From t8
to t12, leg a executes the same function.

Fig. 3. Implementation by three discrete cores. III. COMPACT MAGNETIC STRUCTURE FOR THE PROPOSED
CURRENT-TRIPLER TOPOLOGY
A major benefit of the current-tripler concept is the magnetic
structure of the transformer. It is basically an integrated magnetic
core with distributed windings. In Fig. 1, the three-phase
transformer has three sets of primary-secondary windings. Both
the primary and secondary windings are delta-connected. A
simple way to implement this transformer structure is to use
three separated cores, as shown in Fig. 3. In Fig. 3, ,
and represent the three primary windings. , and
are the secondary windings. , and represent
Fig. 4. Voltage waveforms of three primary windings. the ac flux through the magnetic cores.
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(a)

(b)
Fig. 7. (a) Equivalent circuit during the load transient. (b) Winding voltages during the load transient.

Fig. 4 shows the voltage waveforms across the three primary


windings at steady state. It is easily observed that

(1)

According to Faraday’s law, the induced voltage (V) of an


N-turns winding from a time-changing magnetic field is

(2)

Therefore, for each primary winding, the winding voltage is

(3)

(4)

(5)

Adding (3)–(5), and substituting the right side of the equation


with (1) yields Fig. 8. Two primary topologies for dc/dc converters: (a) conventional full
bridge primary and (b) three-phase bridge primary.

(6)
because is always valid. For example,
which means that the ac flux of the three magnetic cores is can- in Fig. 7, during the period , , and are conducting.
celled out. The magnetic structure can be simplified as one core Terminal c of winding and terminal of winding are
with three legs, as shown in Fig. 5. This structure is very similar shorted through and . Suppose a load transient happens
to a three-phase 60-Hz transformer with three magnetic legs [6]. during , so the duty cycle of the control MOSFET changes
The removal of the fourth leg is possible due to the automatic accordingly. Since both terminals of windings and are
ac flux balance between the three legs, as derived above. connected, no matter how the duty cycle varies, the variation
This compact transformer structure reduces the core loss be- of the winding voltages of the two windings remains the same.
cause the total volume of the core is reduced. Fig. 6 shows an Therefore, the proposed magnetic structure is still functional
example of this core structure. The cross-sections of the three during the load transient.
legs are identical, so the flux density of each leg is the same. Another concern in the delta-delta connection is the loop cur-
During the load transient, the duty cycle changes accordingly. rent around the windings. According to the voltage waveforms
The proposed transformer structure retains the ac flux balance, in Fig. 4, Fourier analysis can determine whether or not there are
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TABLE I
RMS CURRENT AND THE TURN OFF CURRENT OF EACH DEVICE

Fig. 9. SR conduction loss comparison between (a) current-doubler and (b) current-tripler.

any 3n harmonics that will cause loop current along the wind-
ings. For one winding voltage, , the Fourier expression is

(7)

and

(8)
where is the dc component, and is the magnitude of the
harmonic. Substituting into (8) yields:
Fig. 10. Current waveforms through one MOSFET: (a) current-doubler and
(b) current-tripler. (9)
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Fig. 11. Copper winding dc resistance calculation.

Fig. 13. Current waveforms through secondary windings: (a) current-doubler


and (b) current-tripler.

where and are the transformer turns ratios for the current-
tripler and the current-doubler converters, respectively. Table I
lists the RMS current through each device and the turn off cur-
rent of each device, in which is the load current.
According to Table I, the total conduction loss of the phase-
shift full bridge primary is:

(12)

and the total conduction loss of the current-tripler converter pri-


mary is:

(13)

Fig. 12. Secondary winding structure for (a) current-doubler and where is the on resistance of the primary side MOSFET.
(b) current-tripler.
According to (11), (12) and (13) are identical, which means that
the current-tripler can not reduce the primary side conduction
There is no loop current along the windings as long as the loss. Fortunately, in the 48 V input application, the primary side
winding voltages are equal as shown in Fig. 4. conduction loss is not the major part of the total power loss; the
trade off is made to reduce the secondary-side conduction loss
IV. PRIMARY-SIDE LOSS ANALYSIS as discussed in the following session.
The primary-side conduction loss and switching loss of two
topologies are compared: one topology is the conventional V. SECONDARY-SIDE CONDUCTION LOSS ANALYSIS
phase-shift full-bridge converter with a current-doubler recti-
The secondary-side conduction loss of two topologies is
fier, and the other one is the proposed three-phase converter compared: one topology is the phase-shift full-bridge converter
with a current-tripler rectifier. Both can achieve ZVS under with a current-doubler rectifier, and the other one is the pro-
certain load conditions. It is assumed that the output current is posed three-phase converter with a current-tripler rectifier. It is
the same, and the output inductor current ripple is ignored for
assumed that the output current is the same, and the number of
simplification. The primary side topologies are illustrated in
rectifier devices is also the same, as illustrated in Fig. 9. For
Fig. 8.
the current-doubler topology [Fig. 9(a)], each switch leg has
For a given input voltage range, both of the circuits need to
three MOSFETs in parallel. For the current-tripler topology
meet the following requirement for a same output voltage:
[Fig. 9(b)], two MOSFETs in parallel form one switch leg.
The average current through each MOSFET is for both
(10) the current-doubler and the current-tripler. However, the RMS
current is different. In order to simplify the calculation of RMS
where n is the transformer turns ratio, and is the maximum current through one MOSFET, the current ripple of the inductor
duty cycle the converter can run at. Based on our previous anal- current is ignored. Therefore, for both topologies the current
ysis, for the current-tripler converter is 1/3, while for the waveforms through one MOSFET can be derived, as shown in
current-doubler converter is 0.5. Therefore, Fig. 10. The RMS current through one device can be calculated
as follows. For the current-doubler, the RMS current through
(11) one MOSFET is . For the current-tripler, the RMS
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Fig. 14. Prototype using a customized current-tripler transformer.

Fig. 17. Measured efficiency.

winding shapes are round, as shown in Fig. 11. Also assume the
winding copper thickness t is smaller than the skin depth. The
dc resistance of the winding can be calculated by integrating
the incremental admittance of the slim copper loop with the
width of dx. The incremental admittance of a copper loop
with radius x and width dx is

(14)

where is the resistivity of the copper. The winding admittance


is the integration of from to , such that

(15)
Fig. 15. Drain-source voltages of three switch legs (50 V/div, 0.5 s=div ).

so the dc resistance R is

(16)

Equation (12) shows that the dc resistance of a round winding


is inversely proportional to . If for example the current
doubles, in order to keep the same conduction loss, the dc re-
sistance needs to be reduced to one quarter. The outer radius
must increase so that

(17)

Suppose , then will be . The outer radius


of the winding increases significantly in order to maintain
the same conduction loss. This is also true for other winding
shapes. One solution for this issue is the distributed windings.
For the current-doubler, three secondary windings are in
Fig. 16. Transformer winding voltage (50 V/div, 0.5 s=div ).
parallel. For the current-tripler, three secondary windings are
delta-connected (Fig. 12). The secondary-side winding current
current is . The total SR conduction loss savings waveforms for both topologies are shown in Fig. 13. The
of the current-tripler is 20%. RMS current through one current-doubler transformer sec-
Similarly, the transformer secondary winding conduction ondary-side winding is , and that for the current-tripler
losses need to be considered. A current-doubler single sec- is . The total winding conduction loss savings of the
ondary winding transformer is analyzed first. Assume the current-tripler is 12.5%.
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TABLE II
COMPONENT COUNTS BREAKDOWN

VI. EXPERIMENTAL RESULTS VII. CONCLUSION

A prototype is developed to verify the theoretical analysis. This paper proposed a novel ZVS current-tripler dc/dc con-
The specifications are as follows. verter. The proposed topology has the following advantages.
a) Soft switching for primary switches.
a) Input voltage: 48 V.
b) Reduced synchronous rectifier conduction loss.
b) Output voltage: 1.0 V.
c) Reduced transformer winding loss.
c) Maximum load current: 100 A at .
d) Reduced transformer core loss.
d) Switching frequency: 300 kHz.
e) Compact transformer structure, as compared with dis-
A customized core is used as the current-tripler transformer.
tributed magnetic.
A conventional EI32 core is machined as follows. Firstly, the
f) Reduced output ripple current compared with current-dou-
center leg is symmetrically grounded so that the cross-sectional
bler rectifiers.
areas of the three legs are identical. Because the effective
The circuit operating principle is analyzed. The transformer
cross-sectional area of the EI32 core is much larger than what
magnetic structure is derived theoretically. Both the SR conduc-
is needed here, it is then cut into one-third. The high-current
tion loss and the transformer winding loss are discussed and
winding length is reduced. Fig. 14 shows a picture of the
compared with the conventional full-bridge phase-shifted dc/dc
developed prototype. The six primary MOSFETs are Hitachi’s
converter that uses the current-doubler rectifier. Finally, a pro-
HAT2173H, and the 12 secondary devices are HAT2160H.
totype is built to demonstrate the concept of the current-tripler
Four MOSFETs in parallel form one switch leg. The inductance
dc/dc converter, which has a maximum efficiency of 87% at
of the output inductor is 200-nH/channel.
1.0-V/100-A output.
Fig. 15 shows the drain-source voltages of the three control
The topology and control strategy in this paper is the subject
MOSFETs at the primary side. They have a 120 phase shift.
of a patent pending.
Basically, it is a three-phase interleaving topology, which means
that it has all the benefits of the multiphase interleaving tech-
REFERENCES
nique that is widely used for nonisolated 12-V-input voltage
[1] C. Blake, D. Kinzer, and P. Wood, “Synchronous rectifier versus
regulators. Schottky diodes: a comparison of the losses of a synchronous rectifier
Fig. 16 shows the primary-side transformer winding voltages. versus the losses of a Schottky diode rectifier,” in Proc. IEEE APEC’94
Due to the ZVS, the waveforms are very clean. Fig. 16 also Conference, 1994, pp. 17–23.
[2] M. T. Zhang, “Electrical, Thermal, and EMI Designs of High-Density,
matches the theoretical waveforms given in Fig. 4. Low Profile Power Supplies,” Dissertation, VPI&SU, Blacksburg, VA,
A typical industry design is chosen as the benchmark to Feb. 1997.
compare the efficiency, size and cost with the proposed cur- [3] A. J. Zhang et al., “Synchronous Rectifier Circuit,” U.S. Patent
6 370 044, April 9, 2002.
rent-tripler dc/dc converter. It is a phase shift ZVS full bridge [4] Y. Panov and M. Jovanovic, “Design and performance evaluation of
primary side topology with conventional current-doubler syn- low-voltage/high-current dc/dc on-board modules,” IEEE Trans. Power
chronous rectifiers. Fig. 17 shows the efficiency curves of the Electron., vol. 16, pp. 26–33, Jan. 2001.
[5] L. Xiao and R. Oruganti, “Soft switched PWM dc/dc converter with
proposed current-tripler dc/dc converter and the conventional synchronous rectifiers,” in Proc. 18th International Telecommunications
current-doubler dc/dc converter. Both of them are running Energy Conference (INTELEC’96), 1996, pp. 476–484.
at 300 kHz switching frequency, and have the same output [6] S. J.Stephen J. Chapman, Electric Machine and Power System Funda-
mentals. New York: McGraw-Hill, 2002.
voltage, 1.0 V. About 4% efficiency improvement is achieved.
Table II shows the major component counts breakdown for
both converters. It can be seen that from components cost point Ming Xu received the B.S. degree in electrical engi-
of view, the two converters are very similar. However, the cur- neering from Nanjing University of Aeronautics and
rent-tripler dc/dc converter can deliver more current under a Astronautics, Nanjing, China, in 1991 and the M.S.
and Ph.D. degrees in electrical engineering from Zhe-
same thermal limitation because of higher efficiency and better jiang University, Zhejiang, China, in 1994 and 1997,
thermal distribution than its current-doubler counterpart, which respectively.
means less dollar per ampere. He is currently a Research Assistant Professor at
the Center for Power Electronics Systems (CPES),
Another comparison is made about the total size of the two Virginia Polytechnic Institute and State University,
circuits. Both of them are two-board structure with the con- Blacksburg.He holds seven Chinese patents and five
trol and protection circuit in one board and the power stage U.S. pending patents. He has published one book and
in the other. The measured footprint of the current-tripler is over 40 technical papers in journals and conferences. His research interests in-
clude high-frequency power conversion, distributed power system, power factor
4.86 , which is about 45% footprint reduction compared correction techniques, low voltage high current conversion techniques, high-fre-
with the current-doubler benchmark. quency magnetics, and modeling and control of converters.

43
Jinghai Zhou received the B.S. degree and the M.S. Fred C. Lee (S’72–M’74–SM’87–F’90) received
degree in electrical engineering from Zhejiang Uni- the B.S. degree in electrical engineering from the
versity, Zhejiang, China, in 1995 and 1998, respec- National Cheng Kung University, Taiwan, R.O.C.,
tively, and is currently pursuing the PhD degree at in 1968 and the M.S. and Ph.D. degrees in electrical
the Center for Power Electronics Systems (CPES), engineering from Duke University, Durham, NC, in
Virginia Polytechnic Institute and State University, 1971 and 1974, respectively.
Blacksburg. He is a University Distinguished Professor with
He holds two U.S. pending patents. He has Virginia Polytechnic Institute and State University
published over 10 technical papers in journals and (Virginia Tech), Blacksburg, and prior to that he was
conferences. His research interests include high-fre- the Lewis A. Hester Chair of Engineering at Virginia
quency power conversion, distributed power system, Tech. He directs the Center for Power Electronics
low voltage high current conversion techniques, high-frequency magnetics, Systems (CPES), a National Science Foundation engineering research center
and electronic ballast for HID lamps. whose participants include five universities and over 100 corporations. In
addition to Virginia Tech, participating CPES universities are the University
of Wisconsin-Madison, Rensselaer Polytechnic Institute, North Carolina A&T
State University, and the University of Puerto Rico-Mayaguez. He is also
the Founder and Director of the Virginia Power Electronics Center (VPEC),
one of the largest university-based power electronics research centers in
the country. VPEC’s Industry-University Partnership Program provides an
effective mechanism for technology transfer, and an opportunity for industries
to profit from VPEC’s research results. VPEC’s programs have been able to
attract world-renowned faculty and visiting professors to Virginia Tech who,
in turn, attract an excellent cadre of undergraduate and graduate students.
Total sponsored research funding secured by him over the last 20 years
exceeds $35 million. His research interests include high-frequency power
conversion, distributed power systems, space power systems, power factor
correction techniques, electronics packaging, high-frequency magnetics, device
characterization, and modeling and control of converters. He holds 19 U.S.
patents, and has published over 120 journal articles in refereed journals and
more than 300 technical papers in conference proceedings.
Dr. Lee received the Society of Automotive Engineering’s Ralph R.
Teeter Education Award (1985), Virginia Tech’s Alumni Award for Research
Excellence (1990), and its College of Engineering Dean’s Award for Excellence
in Research (1997), in 1989, the William E. Newell Power Electronics
Award, the highest award presented by the IEEE Power Electronics Society
for outstanding achievement in the power electronics discipline, the Power
Conversion and Intelligent Motion Award for Leadership in Power Electronics
Education (1990), the Arthur E. Fury Award for Leadership and Innovation in
Advancing Power Electronic Systems Technology (1998), the IEEE Millennium
Medal, and honorary professorships from Shanghai University of Technology,
Shanghai Railroad and Technology Institute, Nanjing Aeronautical Institute,
Zhejiang University, and Tsinghua University. He is an active member in the
professional community of power electronics engineers. He chaired the 1995
International Conference on Power Electronics and Drives Systems, which took
place in Singapore, and co-chaired the 1994 International Power Electronics
and Motion Control Conference, held in Beijing. During 1993-1994, he
served as President of the IEEE Power Electronics Society and, before that,
as Program Chair and then Conference Chair of IEEE-sponsored power
electronics specialist conferences.

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