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RL
D1 D2
ID1 ID2

Chapter 20 – Current Mirrors

• Input side
E E 480 – Introduction to Analog – Diode-connected M1, converts current into voltage
and Digital VLSI – R establishes current ID1 = (VDD – VGS)/R
Paul M. Furth • Output side
New Mexico State University – M2 has exact same VGS as M1, so ID2 = ID1
– VD2 = VDD – ID2 RL
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• One input current can make many output currents,

• Except that IO is not ideal, it is real, with a scaling the output value by transistor sizing.
resistance R = ROUT = ro in parallel with it! • Generally, increase multiplicity or number of fingers of a
“unit” transistor, in this case 15/2

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• The “secret” to good current mirroring:

• IO = IREF exactly when
• Adding dummy strips makes every used transistor “feel” like it’s in
– VGS1 = VGS2 (always true) the middle of the array.
– VDS1 = VDS2 (only true if VO = VDS1 = VGS1) • Larger undercutting happens on the array edge. The “edge effect”
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• Common-
centroid is
better than • Good
inter- matching
digitation of M1/M2
• Good requires
transistors
matching of scaled with
transistors multiplicity,
M1/M2 or number
requires: of fingers
– Large area • Better
transistors matching
places M1
– Transistors
between
“close” to
the two M2
each other
transistors

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Beta-Multiplier Reference

• PMOS Mirror M3/M4 assures

same current in both branches
• NMOS Mirror has
– R in source of M2
– M2 is K times bigger than M1
• After much algebra
2  1 
I REF  1 
R  KPn (W1 / L1 )  K
• A “reference” current source:
• Independent of VDD
– Does not vary with VDD or Temperature
– Does not vary with process (SS, FF, TT)
• Not independent of process (KPn)
• The simple current source with resistor R: • Not independent of temperature
– Not good reference, since IO increases linearly with VDD.
(R, KPn)

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Startup Circuit

• All references have a second stable state, IREF = 0.

• Startup circuit makes the state IREF = 0 unstable. • Typical reference behavior
• After IREF increases to be > 0, startup circuit turns off. – 0 output for VDD too low
• Use resistor RSU instead of diode-connected MSU2, where – Ideally constant reference current for high enough VDD
RSU = 1.5 VDD / IREF
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• Op-amp (amplifier) assures mirror M3/M4 have same VSD

– Mirroring is much improved, that is, IREF1 = IREF2 more exactly
• Op-Amp (amplifier) implementation
– Contains both positive and negative feedback • Self-biased, since input voltages V+ and V– set the
currents through each branch (equal to IREF)

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• Current reference simulation

– IREF = 0 for VDD very low, i.e., < 0.2 V
• PMOSCAP MCP needed for stability – IREF1=IREF2 for VDD large enough, i.e., > 0.5 V
– Generally choose L <= 30 m, not 100 m – Awesome flatness, so independent of VDD
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• Simple Current Mirror • Cascode current mirror

– low output resistance, since IO not constant with VO – much higher ROUT, since IO is constant with VO, e.g., for VO > 1.2V
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ro4

ro2

• Cascode mirror
– ROUT ≡ vT / iT = (gm4ro4)ro2 + ro2 + ro4 ≈ (gm4ro4)ro2
• Draw hybrid- small-signal models of M2, M4 – increases output resistance by intrinsic gain (gmro) of
cascading transistor M4
• DC sources at gates, so put both gates at ground
– In long-channel process, gmro ≈ 600-750
• Apply test voltage and measure test current
– In short-channel process, gmro ≈ 25-50
• ROUT ≡ vT / iT = (gm4ro4)ro2 + ro2 + ro4 ≈ (gm4ro4)ro2

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• Regular
Cascode
Mirror
• VO > VGS
+ VDS,sat

• Low-
Voltage
Cascode Biasing the Low-Voltage Current Mirror (Long-Channel)
Mirror • VG4 = VDSsat2 + VGS4 = VDSsat2 + (VTHN + VDSsat4)
• VGSWS = VG4 = 2 VDSsat + VTHN
• Minimum
• IDWS = 0.5 KPn (W/LWS) (VGSWS – VTHN)2
VO is
= 0.5 KPn (W/LWS) (2 VDSsat)2
2VDS,sat
• LWS = 4L
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• In short-channel, 1/4 or 1/5 (W/L) for transistor MWS

isn’t enough
• Implement MWS by placing 4 (or 5) transistors sized W/L • Use 1/25 (W/L) of M2/M4 for MWS, that is, place 25 (W/L)
in series (again, for long-channel model) transistors in series!
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Short-Channel
• Beta-multiplier
reference
current circuit
(top)
• Low-voltage
cascode
current mirror
circuits,
generating 8
bias voltages
• We’ll use 4 of
those bias
voltages in a
later chapters

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