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IEEE JOURNAL OF PHOTOVOLTAICS
A Voltage Equalizer Circuit to Reduce Partial
Shading Effect in Photovoltaic String
Majid Tahmasbi-Fard , Mehrdad Tarafdar-Hagh, Senior Member, IEEE,
Saman Pourpayam, and Amir-Aslan Haghrah
Abstract—Partial shading is one of the main causes in reducing
the output power of photovoltaic (PV) systems. This paper proposes
a circuit to recover the energy of shaded PV modules during partial
shading condition (PSC). The proposed circuit, which is a combina-
tion of a buck–boost converter and the switched-capacitor (BBSC)
circuits, equalizes the voltage of PV modules and prevents by-
pass diodes from bypassing the shaded modules in a string. Hence,
shaded PV modules can have a contribution in output generated
power instead of being bypassed. The main features of the BBSC
are the utilization of the reduced number of switches in comparison
with buck–boost and switched-capacitor circuits, a simple switch-
ing control strategy, and fast voltage equalization. In addition, a
BBSC circuit is almost a lossless circuit during uniform shading
conditions. To validate the effectiveness of the proposed BBSC
circuit, both simulation results in PSCAD/EMTDC software and
experimental results are presented.
Index Terms—Buck–boost converter, maximum power point
tracking (MPPT), partial shading, switched-capacitor (SC), volt-
age equalization.
I. INTRODUCTION
HOTOVOLTAIC (PV) systems are almost clean power
P conversion units, and therefore, this is the main reason why
their installed capacity over the past decade has been increasing
dramatically [1]. It is of crucial importance to harvest the maxi-
mum available solar energy with the highest possible efficiency.
Any nonuniform solar irradiation striking series-connected PV
modules is referred to partial shading condition (PSC). The par-
tial shading on PVs gives rise to a reduction of generated energy
and hot spot heating, which necessitates adding a parallel cur-
rent path for shaded PV modules to prevent hot spot heating in
PSC [2]. The antiparallel diode of the shaded module results in
multipeak PV characteristic with local and global peaks [3], [4].
Perturb and observe (P&O), incremental conductance, and hill
climbing are some of the common maximum power point track-
ing (MPPT) methods [5]–[7]. However, unfortunately, they are
Manuscript received December 16, 2017; revised February 18, 2018; accepted
March 29, 2018. (Corresponding author: Majid Tahmasbi-Fard.)
M. Tahmasbi-Fard, S. Pourpayam, and A.-A. Haghrah are with the Faculty
of Electrical and Computer Engineering, University of Tabriz, Tabriz 51665-
15813, Iran (e-mail:, majidtahmasbi@yahoo.com; spourpayam@gmail.com;
amiraslanhaghrah@gmail.com).
M. Tarafdar-Hagh is with the Faculty of Electrical and Computer Engineer-
ing, University of Tabriz, Tabriz 51665-15813, Iran, and also with the Engineer-
ing Faculty, Near East University, Nicosia 99138, Turkey (e-mail:, tarafdar@
tabrizu.ac.ir).
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/JPHOTOV.2018.2823984
2156-3381 © 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See http://www.ieee.org/publications standards/publications/rights/index.html for more information.
1
incompetent in finding maximum power point (MPP) of mul-
tipeak characteristics. The voltage mismatch in substrings will
reduce the maximum extractable power [3], even if complex
methods such as partial swarm optimization [8], ant colony [9]
or firefly algorithm [2], [10] are employed to find global maxi-
mum successfully.
Several topologies have been proposed and reported in the
literature to maximize generated power during PSC. They can
mainly be divided into two topologies: 1) module-integrated
converters (MICs) [11]–[14]; and 2) energy recovery based cir-
cuits [15]–[17].
In MICs, a dc–dc converter is used for every single module,
which results in exact MPPT of each module, independent from
others. The main drawback of these circuits is high power loss,
even during unshaded conditions [11]. Although this problem
is solved in [14] by using differential power processing (DPP)
architectures, the number of MPPT blocks, as well as voltage
and current measurement units, is proportional to that of PV
modules.
On the other hand, in energy recovery based topologies, which
can be employed with single central converter, part of the shaded
PVs current is compensated by unshaded PVs to move their op-
erating point closer to the MPP. In [15], a PV equalizer circuit
with a single inductor is proposed for partially shaded PVs. The
complexity of control as well as the number of switches and
diodes are increased significantly (eight switches and ten diodes
for four modules) in [15], even though only a single inductor
is used. Despite the advantages of simplicity, with open-loop
control system and fixed duty cycle of 50% for all switches, the
proposed energy recovery circuit in [16] is only applicable for
2n (n is an integer) number of modules. Some DPP architectures
are presented and compared in [18] with local MPPT. Although
a fraction of power is processed in DPP converters, local MPPT
increases complexity and cost. A notable reduction of switches
number is achieved in [3], where a single-switch voltage equal-
izer using multistacked buck–boost converters is proposed. The
ripple of the inductor current, the voltage, and current ratings of
switches and diodes, however, are increased by the number of
PV modules in a string which consequently increases the rating
of the components.
Another simple voltage equalizing method is switched-
capacitor (SC) [17], [19]. A capacitor is connected in parallel
with shaded and unshaded modules with a fixed duty cycle of
50% to equalize the modules operating voltage. The cost and
the size of components in the SC-based method are favorable.
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2 IEEE JOURNAL OF PHOTOVOLTAICS

Fig. 2. Buck–boost circuit: (a) Charging mode and (b) discharging mode of
Fig. 1. Proposed BBSC circuit (buck–boost circuit in black, SC in gray).
the inductors.

However, relatively high number of switches is the main disad-

vantage.
In this paper, a circuit is proposed to increase the PV modules
output power during PSC combining buck–boost converter and
switched-capacitor (BBSC) architecture. The proposed topol-
ogy offers an almost lossless circuit under uniform irradiance
condition with reduced number of switches, simple control sys-
tem, DPP, low voltage and current rating components, and sat-
isfactory equalizing speed.
This paper is organized as follows. In Section II, the descrip-
tion of the proposed system is presented by dividing its operation
into downward and upward energy transfer using buck–boost
and SC circuits, respectively. In Section III, simulation results
for a string consisting of five series-connected PV modules are
presented. In Section IV, experimental results on a small-scale
setup are presented. Finally, the conclusion is given in Section V.
Fig. 3. Buck–boost circuit. (a) Gate pulses. (b) Inductor current. (c) Capacitors
II. PROPOSED BUCK–BOOST CONVERTER AND average voltage. (d) Diodes reverse voltage.
SWITCHED-CAPACITOR CIRCUIT
The proposed circuit for five series-connected PV modules is The overall power transfer direction of BBSC is depicted
shown in Fig. 1. The gray color in Fig. 1 is used to distinguish by arrows in Fig. 1. While buck–boost converters are used for
the switched-capacitor circuit (SCC). From the black-colored voltage equalization in a downward path, SCs are utilized for
components, S1 , S3 , D2 , D4 , L1 , L2 , L3 , and L4 operate in the power transfer in a reverse direction. Thus, BBSC can operate in
buck–boost circuit exclusively, while S2 , S4 , C13 , C35 , D3 , and either direction. Downward equalization between, for instance,
D6 are shared by both buck–boost and SC circuits. PV1 and PV2 in Fig. 1 means that the lower positioned PV
During partial shading condition, BBSC should create a lat- (PV2 ) is under PSC (lower voltage) and the energy transfer
eral path for mismatch current of shaded and unshaded PVs direction can be from upper PV (PV1 ) to lower one (PV2 ).
to flow and to preclude bypass diodes from conducting. The Buck–boost and switched-capacitor circuits are described in the
open-loop control of the proposed system makes it easy to im- following sections to elucidate the operation of the BBSC and
plement, and all switches will be switched with fixed 50% duty equalization direction.
cycle. For the sake of simplicity, the output power of PV string
is represented by a constant current source [16].
A. Buck–Boost Circuit
The BBSC will start to operate as soon as the PSC is detected.
Therefore, either during unshaded or uniform shaded conditions, Buck–boost circuit is illustrated with black color in Fig. 1
BBSC is OFF, and it would not have any conducting or switching and its operation can be divided into two charging and discharg-
power loss. ing modes. The capacitors (C13 and C35 ) also have contribution
The PSC, which is followed by the voltage drop of shaded PV in downward power transfer operation. The equivalent circuit
modules, can be easily detected by a trigger circuit that monitors for each mode is depicted in Fig. 2, assuming decreasing irra-
the PVs voltage [16]. Since the shaded PVs are known formerly diation level from top to bottom of PV string. Inductors’ and
in our studies, triggers are sent manually, and detection circuit capacitors’ currents as well as diodes reverse voltage waveforms
has not been implemented here. corresponding to each switching mode are shown in Fig. 3.
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TAHMASBI-FARD et al.: VOLTAGE EQUALIZER CIRCUIT TO REDUCE PARTIAL SHADING EFFECT IN PHOTOVOLTAIC STRING 3

1) Inductor Charging Mode: As shown in Fig. 2(a), switches

S1 –S4 are turned ON in charging state. Meanwhile, inductors are
connected in parallel with PV modules and the constant voltage
applied to them gives rise to charge inductors and increase their
current linearly [see Fig. 3(b)]. Although inductors’ currents
have different dc offsets depending on shading condition on two
adjacent PVs, their overall waveforms are the same as depicted
in Fig. 3(b). The capacitors average voltage is shown in Fig. 3(c),
where the average voltage of C13 is a bit higher than that of C35
since irradiation is getting reduced from PV1 to PV5 . In this
mode of operation, diodes D1 –D4 are reverse biased. The ripple
current of inductors and reverse voltage across the kth diode
during charging period can be calculated as follows:
Fig. 4. SCC: (a) Charging mode and (b) discharging mode of capacitors.
VPV(k )
ΔIL (k ) = DTs (1)
L(k )
VD (k ) = VPV(k ) + VPV(k +1)  2VPV (2)
where ΔIL (k ) and L(k ) are ripple current and inductance of
the kth inductor, respectively. VPV(k ) is the kth PV module’s
voltage, D is the duty cycle, and Ts is the switching period.
During the current mode of operation, C13 and C35 are con-
nected in parallel with PV1 and PV3 , respectively. Thus, the
capacitors current can be calculated as
VPV(2k −1) − VC (2k −1,2k +1)
IC (2k −1,2k +1),ave = (3)
Req
where Req is the equivalent resistance of switch, diode, and
internal resistance of the capacitor.
The capacitors are switched with duty cycle of D = 0.5 in
parallel with two PVs. Therefore, the capacitor voltage in steady
state will be an average of corresponding PV modules voltage.
Replacing capacitor voltage in (3) gives the following expres-
Fig. 5. SCC. (a) Gate pulses. (b) Inductor current. (c) Capacitors voltage. (d)
sion for the average charging current of the capacitor: Diodes reverse voltage.
VPV(2k −1) − VPV(2k +1)
IC (2k −1,2k +1),ave = ± (4)
2Req of capacitors can also be obtained by using (4) with the minus
where the plus sign is only for this mode of operation and the sign.
minus sign will be used in other discharging modes. Assuming the continuous conduction mode, current ripple
2) Inductor Discharging Mode: As the switches S1 –S4 are in both charging and discharging periods must be equal, from
turned OFF at the end of the first half of switching period, diodes which we conclude that
D1 –D4 are forward-biased, and the voltage across them is almost VPV(k ) D
zero. From this time onward in the switching cycle, inductors = . (7)
VPV(k +1) (1 − D)
current continue to flow through diodes and capacitors. The
negative voltage applied across inductors brings about current Setting D = 0.5 results in equal voltage across PV(k ) and
reduction in this mode linearly [see Fig. 3(b)]. The ripple current PV(k +1) in steady state.
of inductors and voltage across the switches in this mode can be
obtained as B. Switched-Capacitor Circuit
VPV(k +1)
ΔIL (k ) =− (1 − D) Ts (5) The switches in SCC are switched with fixed 50% duty cycle
L(k ) similar to the buck–boost converter. The SCC has two opera-
VS (k ) = VPV(k ) + VPV(k +1)  2VPV (6) tional modes in which their equivalent circuit for each mode is
depicted in Fig. 4 separately and corresponding current and volt-
where VS (k ) is the voltage across the kth switch. age waveforms are shown in Fig. 5. Green dashed lines show
C13 and C35 are connected in parallel with PV3 and PV5 , that which voltage is applied to capacitors in each switching
respectively. The voltage across PV3 and PV5 is lower than state. The switches S2 , S4 , S5 , and S6 are involved in upward
VC13 and VC35 , respectively. The average discharging current energy transfer so that S2 and S4 are complementary with S5 and
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4 IEEE JOURNAL OF PHOTOVOLTAICS
Fig. 6. Proposed BBSC circuit for even number of PV modules (buck–boost
circuit in black; SC in gray).
S6 . The capacitors voltage will be an average of corresponding
PV modules voltage.
1) Capacitor Charging Mode: As displayed in Fig. 4(a), S5
and S6 are turned ON in this mode of operation. Diodes D1 and
D3 are forward-biased because the capacitors C13 and C35 are in
lower voltage level compared with their corresponding parallel
PV modules PV3 and PV5 , respectively. The charging current,
which is supplied through both inductors and diodes, gives rise
to increase in the capacitor voltage [see Fig. 5(c)]. The current
flow through D1 and D3 will continue until the voltage across
them falls below the forward voltage drop level. After that, the
capacitors C13 and C35 will solely charge through inductors L1
and L3 , respectively.
The average charging current of capacitors in steady state can
be obtained from (4) with the minus sign, since the connection
points of capacitors are similar to the discharging mode of the
buck–boost converter with current flow in a reverse direction.
2) Capacitor Discharging Mode: As shown in Fig. 5(a), the
switches S5 and S6 are turned OFF at the end of the charging
mode. Meanwhile, S2 and S4 receive gate pulses to turn ON.
Each capacitor (C13 and/or C35 in Fig. 4) has been charged
with unshaded PV module in the previous mode of operation,
and the voltage across the capacitor is higher than that of the
shaded PV module. Hence, as illustrated in Figs. 4(b) and 5(d),
diodes D5 and D6 are forward-biased, and they are conducting
in this mode. Capacitors are discharged on shaded PV modules
during this mode, and as a consequence, their voltage level will
decrease. Finally, in steady state, the average discharging current
of capacitors can be calculated from (4).
C. Generalized Buck–Boost Converter and
Switched-Capacitor for Even Number of Photovoltaics
If the number of PVs in a string were even, the proposed
circuit would be modified as shown in Fig 6. In this circum-
stance, two adjacent PV modules, which are highlighted with
cyan color, are considered to be one unit, and an SCC is re-
sponsible for transferring power between two adjacent units.
Hence, the voltage across the switches in SCC is equal to the
sum of the voltages across two adjacent PV modules, similar to
TABLE I
PVS CHARACTERISTIC USED FOR SIMULATION STUDIES
the case with an odd number of PVs, and this should be consid-
ered in design procedure. The buck–boost circuit has remained
unchanged, and its operation is identical to what is described in
Section II-A.
As pointed out earlier in Section II, the SC circuit is responsi-
ble for energy transfer in an upward direction. Fig. 6 illustrates
power transfer direction between groups of PVs. The capacitor
C(i,j )(m ,n ) is switched between units (PVi , PVj ) and (PVm ,
PVn ). The SCC also has two charging and discharging modes
of operation similar to what is explained in Section II-B. The
only difference is power transfer between groups of PVs instead
of individual ones.
III. SIMULATION RESULTS
To verify the proposed BBSC system, simulation and exper-
imental studies are conducted. The system parameters for both
case studies are listed in Table II in the Appendix. A PV sys-
tem consisting of five series-connected modules is designed and
simulated in PSCAD/EMTDC software and the proposed BBSC
circuit is mounted on (see Fig. 1). The P&O method with the
sampling interval of 0.02 s is exploited to find the MPP of PVs,
and a boost converter is used between PV modules and resistive
load to set the operating point of overall PVs.
The switches of BBSC circuit are switched with a frequency
of 50 kHz and duty cycle of 50% as soon as the partial shading
condition is detected.
Two scenarios are considered as summarized in Table I. The
short-circuit currents IS.C. , open-circuit voltages VO.C. , and the
currents of MPP IM PP for different irradiation levels are also
provided in Table I. The irradiation levels in both test cases are
considered so that the results represent the operation of buck–
boost and SC circuits in BBSC separately and clearly.
In the first case of simulation, upper PVs receive more irra-
diance than lower ones and a decreasing irradiance is assumed
from PV1 to PV5 . As a consequence, the buck–boost con-
verter should be triggered to perform downward energy transfer
function.
To illustrate the operation of BBSC more clearly, gate pulses
for switches of BBSC are being sent after Δt = 30 s from the
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TAHMASBI-FARD et al.: VOLTAGE EQUALIZER CIRCUIT TO REDUCE PARTIAL SHADING EFFECT IN PHOTOVOLTAIC STRING
Fig. 7. Operation of buck–boost converters (from top to bottom): (a) PV
modules voltage, PV modules current, and output power of the string; (b)
inductors current and capacitors current.
time at which the PSC is occurred. Therefore, as shown in Fig. 7,
partial shading condition according to the first case of Table I
occurs at t = 20 s but BBSC starts to operate at t = 50 s. From
t = 20 s until t = 50 s, BBSC is OFF.
Fig. 7(a) shows, from top to bottom, the PV voltage, the
PV current, and the overall output power of the string. As the
PSC occurs at t = 20 s, all PVs have the same current, and they
operate at different voltage levels. This contradicts the fact that
during PSC, PV modules should operate in almost the same
voltage levels and, consequently, corresponding MPP currents
to generate maximum available power. At t = 50 s, gate pulses
are sent to switches S1 –S4 (see Fig. 1), and the buck–boost
circuit is activated. Since a fixed 50% duty cycle is used for
switching, the MPPT block sets the output current of the string
to the average current of PV modules [16], and buck–boost
circuit equalizes the voltage of PVs. The delay of MPPT block
in reaching the steady state is shown with tdM PP . This delay
time is almost long since BBSC is not activated intentionally
and MPP voltage deviates largely.
The output power in Fig. 7(a) increases by 171 W to reach
614 W, whereas maximum available power from Table I is
632 W.
Current waveforms for inductors and capacitors are shown in
Fig. 7(b). All inductor currents have positive dc offset, and the
average of capacitor currents during a switching cycle is zero in
steady state which results in a constant voltage of capacitors.
The second scenario is designed to test the operation of the
SCC in upward energy transfer and voltage equalization when
5
Fig. 8. Operation of SC converters (from top to bottom): (a) PV modules
voltage, PV modules current, and output power of the string; (b) inductors
current and capacitors current.
upper PVs receive less irradiance compared with lower ones.
Irradiation levels for the second test case are summarized in
Table I, and simulation results are shown in Fig. 8.
As depicted in Fig. 8(a), PSC is applied to the PV string at
t = 20 s, and the PV module with the lowest amount of received
irradiation dictates the current and operating point of all PVs.
Distribution of irradiation on PV string necessitates the switches
S2 , S4 , S5, and S6 to involve in voltage equalization task. At
t = 50 s, pulse trains for S2 , S4 and complementary signals for
S5 , S6 are sent and the SC circuit is activated.
It can also be seen from Fig. 8(a) that after t = 50 s, PV
modules’ voltages are equalized and PVs operate in almost three
different current levels as a result of three irradiation levels that
have been applied to them.
In Fig. 8(a), the output power trace for the second test case
shows that after utilizing the proposed circuit, output power
increases by 221 W from 449 W to reach 670 W, whereas
maximum available power from Table I is 692 W.
Inductor and capacitor currents are illustrated in Fig. 8(b).
All inductors have negative dc offset and their waveforms
confirm the analyses presented in Section II-B. The average
current of C13 and C35 in positive and negative half cycles,
which can be calculated from (4), is almost equal because
MPP voltage of PV modules deviates so slightly as a result of
different irradiation levels.
1) Voltage Balancing Speed: One of the main factors in
studying voltage equalizing circuits is the balancing speed. PV
voltage equalizing circuit should be fast to such an extent that
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6 IEEE JOURNAL OF PHOTOVOLTAICS

Fig. 9. Experimental setup.

it does not affect the operation of the MPPT system in tracking

varying irradiation levels. Therefore, balancing speed should be
more than the speed of the MPPT system.
Although sampling frequency of a few hertzs is reasonable, Fig. 10. Experimental results for shading applied to PV 3 . (a) Inductor cur-
based on the overall simulation time, sampling frequency of rent IL 1 and voltage on diode (−V D 1 ). (b) Inductor current IL 2 and voltage
on switch V S 2 . (c) Voltage across PV 1 and PV 2 . (d) Voltage across PV 2
50 Hz is selected for the MPPT block. Nevertheless, it is obvious and PV 3 .
from PV voltage traces of Fig. 8(a) and (b) that the proposed
circuit equalizes the voltage in both energy transfer directions
in very little time compared with the MPPT algorithm’s delay.

IV. EXPERIMENTAL RESULTS

To demonstrate the correctness of the proposed system, a
small-scale experimental setup consisting of three 20-W PV
modules is used and the proposed circuit is tested on. The lab-
oratory prototype is shown in Fig. 9 and the parameters of the
experimental system are listed in Table II.
The switches of the proposed circuit are switched with a con-
stant 30 kHz frequency and 50% duty cycle. The boost converter
is also switched in 30 kHz, and the P&O method is used to find
the MPP.
The same as the simulation studies, two scenarios are tested
on an experimental setup to investigate the operation of buck–
boost and SC circuits separately.
In the first test case, the third PV module is covered to simulate
the partial shading condition. As a result, to equalize the voltage
between PV2 and PV3 , both the switches S1 and S2 are switched.
The experimental waveforms are shown in Fig. 10, where in
Fig. 10(a) the inductor current IL2 is depicted with the voltage Fig. 11. Experimental results for shading applied to PV 1 . (a) Capacitor cur-
across the diode D1 , and in Fig. 10(b), the inductor current IL2 rent IC 1 3 . (b) Inductor current IL 1 . (c) Voltage across PV 1 . (d) Voltage across
is depicted with the voltage across the switch S2 . The positive PV 2 and PV 3 .
dc offset of the inductor current is due to the downward energy
transfer direction. The voltage across the diode D1 is the sum transfer. Therefore, complementary gate signals are sent to S2
of the voltages across PV1 and PV2 and the voltage across and S3 to activate the SCC. The experimental waveforms for this
the switch S2 is the sum of VPV2 and VPV3 . Fig. 10(c) and test are depicted in Fig. 11, where the capacitor and inductor
(d) shows the voltage across the PVs that are almost equalized IL2 currents are shown in Fig. 11(a) and (b), respectively.
successfully. PV modules’ voltages are shown in Fig. 11(c) and (d). It
The second scenario is to apply shadow to the first PV module is clear that the proposed circuit equalizes the PV modules’
and test the function of the proposed circuit in upward energy voltages successfully.
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TAHMASBI-FARD et al.: VOLTAGE EQUALIZER CIRCUIT TO REDUCE PARTIAL SHADING EFFECT IN PHOTOVOLTAIC STRING
V. CONCLUSION
In this paper, a new circuit for equalizing voltages of PV
modules in a series string was presented. Although the proposed
BBSC circuit is a combination of the traditional buck–boost and
SC circuits, the main advantage of BBSC is using less switching
devices compared with buck–boost and SC circuits. Not only an
example application of BBSC for a PV string consisting of five
series-connected modules was described in details, a generalized
circuit for an even number of PVs was also presented. The
circuit can be easily utilized for any desired number of PV
modules by just repeating the BBSC structure on a string. The
proposed circuit has a simple open-loop control system, and all
switches are switched with a constant frequency and duty cycle.
In addition to PSCAD simulation results, the results of tests
on a small experimental setup were presented. These results
demonstrated the energy recovery capability of the proposed
circuit in both upward and downward energy transfer directions
by creating parallel side paths for shaded modules.
APPENDIX
TABLE II
PARAMETERS
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Majid Tahmasbi-Fard was born in Tabriz, Iran, in
1990. He received the B.Sc. and M.Sc. degrees in
electrical engineering from the University of Tabriz,
Tabriz, Iran, in 2013 and 2015, respectively.
His research interests include power electronics,
power converter systems, renewable energy systems,
predictive control, and LVRT.
 This article has been accepted for inclusion in a future issue of this journal. Content is final as presented, with the exception of pagination.

8 IEEE JOURNAL OF PHOTOVOLTAICS

Mehrdad Tarafdar-Hagh (SM’14) received the Amir-Aslan Haghrah received the B.Sc. and M.Sc.
Ph.D. degree in electrical power engineering from degrees in electrical engineering (communication)
the University of Tabriz, Tabriz, Iran, in 2000. from the University of Tabriz, Tabriz, Iran, in 2013
He is with the Faculty of Electrical and Computer and 2016, respectively.
Engineering, University of Tabriz, Tabriz, Iran, as a His research interests include digital signal pro-
Professor of electrical engineering. His research in- cessing, adaptive systems, wireless sensor networks,
terests include renewable energy, microgrid, power and image processing.
system operation, FACTS, power quality, and power
conversion.

Saman Pourpayam was born in Iran in 1991. He

received the B.Sc. and M.Sc. degrees in electrical
engineering from the University of Tabriz, Tabriz,
Iran, in 2013 and 2015, respectively.
His research interests include power electronics,
solar photovoltaic, and renewable energy.