Q1.

Implement a BCD to Ex-3 code conversion using PROM, PLA and

PAL.
Q2. Realize the expression F = 𝐴𝐵𝐶𝐷 + 𝐴𝐵 𝐶𝐷 + 𝐴𝐵𝐷 + 𝐴𝐵𝐶𝐷 using a 4:1 MUX with gates.
Q4. Realize a XOR gate using 2*1 Multiplexer.

Q5. Implement a 3-bit binary to Gray code conversion using PLA and PAL.
Q6.Implement the following multiple outputs using a Decoder and minimum no. NAND gates. F1 =
∑ m (0, 4-5, 7) F2 = ∑ m (1, 3, 6)
Q7.Draw a FSM and state table for a serial adder. Find the expressions for all the excitations and
design the same circuit.
Q8. Design a Mealy FSM with improved functionality that produces output Z=1 when it detects
overlapping input sequence 0110.
Q9.Design a MEALY and MOORE machine by using D flip flop (with improved functionality) for a
sequence detector that produces an output ‘1’ whenever the overlapping sequence 010 is detected.
Q10. Draw the state diagram and the state table of a 2-input and 2 output synchronous sequential
circuit which examines the input sequence in non-overlapping strings of three inputs each and
produces a 1 output coincident with the last input of the string if and only if the string consists of
either two or three 1s.
Q11. Design a Mealy FSM with improved functionality that produces output Z=1 when it detects
overlapping input sequence 0110, 0100 and 0011.
Q12.Draw a state diagram for Moore FSM which can detect either of the two sequences 01X
(overlapping).