Bahria University, Lahore Campus

Department of Computer Sciences

Lab Journal 10
(Spring 2020)

Course: Digital Logic Design Lab Date:

Course Code: CEL-120 Max Marks: 40
Faculty’s Name: Ms. Munazza Sher Lab Engineer: Mr. Shoaib Khan

Name: _____________________________ Enroll No: _______________________

Objective(s):

 To construct an S-R Latch with basic logic gates.

Lab Tasks:

Task 1: Construct an SR Latch using NAND gates and record its values in the table. Construct
the circuit on breadboard as well.

Task 2: Construct an SR Latch using NOR gates and record its values in the given table.
Construct the circuit on breadboard as well.

Lab Grading Sheet :

Max
Obtained
Task Mark Comments(if any)
Marks
s
1. 10
2. 10
3. 10
4. 10

Total 40 Signature

Note : Attempt all tasks and get them checked by your Lab Instructor
 Lab 10: SR Latch with Basic Logic Gates

Objective(s):

“To construct an S-R Latch with basic logic gates”.

Tool(s) used:

 KL-31001 DLD Trainer

 Module KL-33008

 Connector leads

Overview:

In electronics, a flip-flop or latch is a circuit that has two stable states and can be used to store
state information. One latch or flip-flop can store one bit of information.

Task 01: Time: 30 Minutes

Construct an SR Latch using NAND gates and record its values in the given table. Construct the
circuit on breadboard as well.
 S R Q Q́

0 0 No Change(Memory) No Change

0 1 1 0

1 0 0 1

1 1 Not Allowed Not Allowed

Task 02: Time: 30 Minutes

Construct an SR Latch using NOR gates and record its values in the given table. Construct the
circuit on breadboard as well.

Solution

Truth Table:

S R Q Q́

0 0 No Change(Memory) No Change

0 1 0 1

1 0 1 0

1 1 Not Allowed Not Allowed