Professional Documents
Culture Documents
TDA3683J: 1. General Description
TDA3683J: 1. General Description
1. General description
• The TDA3683J is a multiple output voltage regulator with a power switch and an
ignition buffer. Several protections and diagnostic options are incorporated in this
design.
• The TDA3683J is primarily developed to cover the complete power supply
requirements in car radio applications
• The standby regulators (regulators 1, 2 and 3) are especially designed to supply
digital circuitry that has to be permanently connected e.g. CAN bus, DPS core and the
microcontroller. In combination with the reset delay capacitor (RDC1 or RDC2/3) and
the reset function (RST1 or RST2/3), a proper start-up sequence for a microcontroller
is guaranteed. The storage capacitor (STC) makes the standby regulator outputs
insensitive for short battery drops (e.g. during engine start-up).
• The switched regulators (regulators 4, 5, 6 and 7) are intended to be used as supply
for the tuner, logic, sound processor and CD / tape control
• The power switch (PSW) can be used for switching the electrically powered antenna,
display unit and CD / tape drives
• The ignition buffer (IGN) is intended to produce a clean logic output signal when a
polluted ignition key signal is used as input.
2. Features
■ Three enable pin controlled standby regulators:
◆ REG1: 5 V / 600 mA controlled by the EN1 input
◆ REG2: 3.3 V / 200 mA controlled by the EN2/3 input
◆ REG3: 1.9 V / 150 mA controlled by the EN2/3 input
■ Four mode pin controlled switched regulators:
◆ REG4: 8.5 V / 350 mA
◆ REG5: 5 V / 1.8 A
◆ REG6: 3.3 V / 1.2 A
◆ REG7: 2.4 V to 10 V / 2 A adjustable using external resistor divider
■ One mode pin controlled power switch; 2.2 A continuous and 3 A surge, with delayed
lower current limit so as to be less sensitive to inrush currents
■ One independent ignition buffer (inverted output, open-collector) with good input
protection against high transients
■ A storage capacitor is included to provide back-up supply for the standby regulators in
the event of loss of battery supply
■ A hold output (3-state) which can be used to communicate to a microcontroller in the
event of an internal or external fault condition, such as:
Philips Semiconductors TDA3683J
Multiple voltage regulator with switch and ignition buffer
9397 750 13057 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
4. Ordering information
Table 2: Ordering information
Type Package
number Name Description Version
TDA3683J DBS23P plastic DIL-bent-SIL power package; 23 leads (straight lead length 3.2 mm) SOT411-1
9397 750 13057 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
5. Block diagram
(14 V)
3000 mA surge
2200 mA continuous
(14.4 V) 1 3
VP1 POWER SWITCH PSW
TEMPERATURE
LOAD DUMP
& PROTECTION
TDA3683J
(14 V)
BACKUP SWITCH 14 950 mA
STC
BACKUP CONTROL
(5 V)
19 15 600 mA
EN1 REGULATOR 1 REG1
(3.3 V)
20 13 200 mA
EN2/3 REGULATOR 2 REG2
(1.9 V)
12 150 mA
REGULATOR 3 REG3
+
RESET1
16
RST1
18
RDC1
22
ADJ7
10
RDC2/3 +
RESET2/3
8
RST2/3
&
REGULATOR 7
(2.4 V - 10 V)
21 2000 mA
REG7
17
& REGULATOR 4 REG4
(8.5 V)
350 mA
9
VP2
(5 V)
7 1800 mA
& REGULATOR 5 REG5
(3.3 V)
11 1200 mA
& REGULATOR 6 REG6
6
MODE
3-STATE
5
HOLD
&
THERMAL PREWARN
(> 140 °C)
4
IGNITION IGNOUT
2
IGNIN CLAMP
23
coa007
GND
6. Pinning information
6.1 Pinning
VP1 1
IGNIN 2
PSW 3
IGNOUT 4
HOLD 5
MODE 6
REG5 7
RST2/3 8
VP2 9
RDC2/3 10
REG6 11
REG3 12 TDA3683J
REG2 13
STC 14
REG1 15
RST1 16
REG4 17
RDC1 18
EN1 19
EN2/3 20
REG7 21
ADJ7 22
GND 23
001aaa683
9397 750 13057 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
7. Functional description
The TDA3683J is a multiple output voltage regulator with a power switch and ignition
buffer. The device is primarily intended for use in car radio applications. An overall
functional description of the building blocks is given in the following sections.
9397 750 13057 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
9397 750 13057 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
If the associated standby regulator voltage drops out of its regulated voltage range (drops
below its falling reset threshold level) the reset delay capacitor will be discharged with a
relatively high sink current. The reset output will be activated (output goes LOW) when the
reset delay capacitor crosses the falling threshold level. This feature is included to secure
a smooth start-up of the microcontroller at first connection, without uncontrolled switching
of the relevant standby regulators during a start-up sequence. It should be noted that
RDC1 is also used as a time constant for the delayed current protection of the power
switch.
Standby regulator 1 has an independent reset function (pins RST1 and RDC1). Standby
regulators 2 and 3 have combined circuitry (pins RST2/3 and RDC2/3). The reset trigger
signals from both regulators are connected using an OR function to the reset output buffer
thus ensuring that both regulators can generate a reset when appropriate. The RST1
output is linked to standby regulator 1 (5 V) and, therefore, generates a 5 V HIGH-level
output voltage. The RST2/3 output is linked to regulator 2 (3.3 V) and, therefore,
generates a 3.3 V HIGH-level output voltage.
9397 750 13057 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
• The output voltage of one or more switched regulators is out of regulation (except
REG7), due to overload or supply voltage drops
• The power switch operates in the Foldback mode
• In Standby or On mode the thermal shutdown is activated
• In Standby or On mode the load dump protection is activated
• In Standby mode a low battery voltage occurs (VP1) indicating that it is not possible to
pull REG4 into regulation when switching it on.
It should be noted that there is intentionally no out-of-regulation detection for REG7 since
it can be adjusted to maximum 10 V and would, in that event, activate the HOLD signal
very early.
The HOLD function includes hysteresis in order to avoid oscillations when the hold
threshold level is crossed. A schematic diagram of the HOLD function is illustrated in
Figure 3.
9397 750 13057 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
low battery
VP1 detector
internal
voltage reference 1 TDA3683J
(8.5 V)
internal (350 mA)
output stage
voltage REG4
reference 2
out of
regulation
enable detector
MODE
REGULATOR 4
(5 V)
output stage (1800 mA)
REG5
out of
regulation
detector
REGULATOR 5
AND
(3.3 V)
output stage (1200 mA)
REG6
3-STATE
OR
HOLD
out of
regulation
detector
REGULATOR 6
POWER SWITCH
TEMPERATURE
LOAD DUMP FOLDBACK
PROTECTION (2.4 V − 10 V)
MODE
output stage (2000 mA)
REG7
THERMAL
PREWARN
(> 140 °C)
REGULATOR 7
EN1
OR
EN2/3
coa008
To guarantee a reliable LOW output signal, even in extreme cold weather crank conditions
(the battery voltage may momentarily drop down to 3 V) a low supply latch function is
implemented.
To make the ignition buffer input robust, for possible extreme transients present on the
battery line, an input RC filter is strongly advised. A blocking diode is also recommended
to prevent substrate injection in case of negative voltage spikes at the input.
Power must be applied to pin VP1 to ensure that the circuits are functional, since the band
gaps for the switched and standby regulators are connected to this supply pin.
Rising and falling supply voltage threshold levels determine if the switched regulators and
power switch can be switched on.
The timing diagrams for various regulator functions are illustrated in Figure 4 and
Figure 5.
9397 750 13057 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
load dump
VP1 = VP2
STC 6.5 V
5.4 V
REG1 5V
0V
3.5 V
RDC1 3V
0V
5V
RST1
load dump
VP1 = VP2
6.5 V
STC 3.9 V
2.5 V
REG2 3.3 V
0V
REG3 1.9 V
0V
3.3 V
RDC2/3 2.7 V
0V
3.3 V
RST2/3
load dump
VP1 = VP2 7V
4.5 V
50 V
> 3.25 V
IGNIN
< 1.1 V
−100 V
IGNOUT 5V
0V
Schmitt trigger ignition (start-up) buffer 001aaa685
Fig 4. Timing diagram of the reset outputs for REG1, REG2 and REG3 and ignition Schmitt trigger
9397 750 13057 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
> 22 V
> 1.8 V
EN1 < 1.3 V
> 1.8 V
MODE
< 1.3 V
VO(REGx)
REG4, REG5
or REG6
16 V
PSW
> 2V
HIGH
HOLD MID
LOW
hold output behaviour
load dump
18 V
VP1 = VP2 8.9 V
7.0 V
4.0 V
> 1.8 V
MODE
< 1.3 V
8.5 V
REG4
0V
5.0 V
REG5
0V
< 1.3 V
3.3 V
REG1
0V
VP and enable Schmitt trigger
load dump
16.9 V
VP1 = VP2
7.0 V
4.0 V
> 1.8 V
MODE
< 1.3 V
16 V
PSW
0V
power switch behaviour 001aaa686
Fig 5. Timing diagram of the HOLD output, VP and Schmitt trigger and power switch
9397 750 13057 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
8. Limiting values
Table 5: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VP1 supply voltage 1 operating - 18 V
reverse polarity; non-operating - 18 V
jump start; t ≤ 10 minutes - 30 V
load dump protection; t ≤ 50 ms; tr ≥ 2.5 ms - 50 V
VP2 supply voltage 2 operating - 18 V
reverse polarity; non-operating - 18 V
jump start; t ≤ 10 minutes - 30 V
load dump protection; t ≤ 50 ms; tr ≥ 2.5 ms - 50 V
Tstg storage temperature non-operating −55 +150 °C
Tamb ambient temperature operating −40 +85 °C
Tj junction temperature operating −40 +150 °C
9. Thermal characteristics
Table 6: Thermal characteristics
Symbol Parameter Conditions Typ Unit
Rth(j-c) thermal resistance from junction to case 1 K/W
Rth(j-a) thermal resistance from junction to ambient in free air 40 K/W
10. Characteristics
Table 7: Characteristics
VP1 = VP2 = 14.4 V; Tamb = 25 °C; RL= ∞; measured in test circuits of Figure 8; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Supplies
VP1 supply voltage 1 operating 9 14.4 18 V
regulators 1, 2 and 3 on [1] 4.0 14.4 50 V
jump start; t ≤ 10 minutes - - 30 V
load dump protection; - - 50 V
t ≤ 50 ms; tr ≥ 2.5 ms
VP2 supply voltage 2 operating 6.5 14.4 18 V
regulators 1, 2 and 3 on 0 - 50 V
jump start; t ≤ 10 minutes - - 30 V
load dump protection; - - 50 V
t ≤ 50 ms; tr ≥ 2.5 ms
Vbat(loaddump) battery overvoltage VP1 and/or VP2 18 20 22 V
shutdown
9397 750 13057 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
9397 750 13057 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
9397 750 13057 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
9397 750 13057 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
9397 750 13057 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
9397 750 13057 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
9397 750 13057 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
[1] Minimum operating voltage, only if VP1 has first exceeded 6.5 V.
[2] The voltage of the regulators 1, 2, 3, 4 and 7 drops as a result of decreasing VP1 voltage. The output voltage of regulators 5 and 6 drops
as a result of decreasing VP2 voltage.
C 3
[3] The delay time depends on the value of CRDC1 or CRDC2/3: t d = ------- × V C ( th ) = C × ( 750 × 10 ) [ s ]
I ch
C 3
[4] The delay time depends on the value of CRDC1: t d_high current = ------- × V C ( th ) = C × ( 375 × 10 ) [ s ]
I ch
[5] The drop-out voltage of regulators 1,2,3,4 and 7 is measured between VP1 and REG1, REG2, REG3, REG4 or REG7, the drop-out
voltage of regulators 5 and 6 is measured between VP2 and REG5 or REG6.
[6] The drop-out voltage is measured between pins STC and REG1, REG2 and REG3.
[7] At current limit, Im(REGn) is held constant; see Figure 6.
[8] The foldback current protection limits the dissipated power at short circuit; see Figure 6.
[9] The drop-out voltage of the power switch is measured between pins VP1 and PSW; see Figure 7.
[10] Standby regulators are enabled when the increasing storage capacitor voltage reaches this threshold voltage at first power-up.
9397 750 13057 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
001aaa687
Vo(REGx)
Isc(REGx) Im(REGx)
IREGx
Fig 6. Typical foldback current protection curve for all regulators (except REG3)
001aaa688
VSW
VP − 3.3 V
not
generates delayed delayed
hold
2VBE
9397 750 13057 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
EN1 REG2
19 13
C2b C2a
100 nF 47 µF
EN2/3 20
REG3
12
MODE C3b C3a
6 100 nF 47 µF
R3
IGNIN PSW
2 3
10 kΩ R5
C14 C10b C10a
100
1 nF 100 nF 47 µF
kΩ
TDA3683J
RST1 REG4
16 17
C4b C4a
100 nF 47 µF
RDC1
18
C13 REG5
47 nF 7
C5b C5a
100 nF 47 µF
RST2/3
8
REG6
11
C6b C6a
100 nF 47 µF
RDC2/3
10
C12 REG7
47 nF 21
C7b C7a
R1 100 nF 47 µF
STC ADJ7
14 22
C11
1000 µF R2
23
001aaa689
REG2 output
3.3 V
D1
HOLD output
R3
2 kΩ
T2 R7
10 kΩ
R1 R4
18 kΩ 10 kΩ
temperature diagnostic
prewarn
R6
6.8 kΩ
T1 T3
R2 R5
27 kΩ 330 kΩ
001aaa690
9397 750 13057 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
• The output voltage of regulator 7 can be adjusted between 2.4 V and 10 V using two
external resistors (R1 and R2); see Figure 10. The following equation can be used for
global calculations to determine the output voltage at a given value of R1 and R2;
In the event that no external resistors are used the output voltage will be determined only
by the internal feedback resistors. The output voltage will be as follows: Vo = 10 V (±5 %).
TDA3683J
1.2 V REG7
R1
(1 %)
ADJ7
R2
(1 %)
001aac136
9397 750 13057 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
DBS23P: plastic DIL-bent-SIL power package; 23 leads (straight lead length 3.2 mm) SOT411-1
non-concave
x Dh
Eh
A2
d A5
β A4
B E2
j
E
E1
L2
L1 L3
L Q c v M
1 23
e1 m e2
Z w M
bp
e
0 5 10 mm
scale
4.6 1.15 1.65 0.75 0.55 30.4 28.0 12.2 6 10.15 6.2 1.85 3.6 14 10.7 2.4 2.1 1.43
mm 12 2.54 1.27 5.08 4.3 0.6 0.25 0.03 45°
4.3 0.85 1.35 0.60 0.35 29.9 27.5 11.8 9.85 5.8 1.65 2.8 13 9.9 1.6 1.8 0.78
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
98-02-20
SOT411-1
02-04-24
13. Soldering
Wave soldering is the preferred method for mounting of through-hole mount IC packages
on a printed-circuit board.
The total contact time of successive solder waves must not exceed 5 seconds.
The device may be mounted up to the seating plane, but the temperature of the plastic
body must not exceed the specified maximum storage temperature (Tstg(max)). If the
printed-circuit board has been pre-heated, forced cooling may be necessary immediately
after soldering to keep the temperature within the permissible limit.
[1] For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit
board.
[2] For PMFP packages hot bar soldering or manual soldering is suitable.
9397 750 13057 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
9397 750 13057 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Level Data sheet status [1] Product status [2] [3] Definition
I Objective data Development This data sheet contains data from the objective specification for product development. Philips
Semiconductors reserves the right to change the specification in any manner without notice.
II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
order to improve the design and supply the best possible product.
III Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
changes will be communicated via a Customer Product/Process Change Notification (CPCN).
[1] Please consult the most recently issued data sheet before initiating or completing a design.
[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
URL http://www.semiconductors.philips.com.
[3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
9397 750 13057 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
19. Contents
1 General description . . . . . . . . . . . . . . . . . . . . . . 1
2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
3 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
4 Ordering information . . . . . . . . . . . . . . . . . . . . . 3
5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4
6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 5
6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5
7 Functional description . . . . . . . . . . . . . . . . . . . 6
7.1 Standby regulators . . . . . . . . . . . . . . . . . . . . . . 6
7.2 Switched regulators . . . . . . . . . . . . . . . . . . . . . 6
7.3 Power switch . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
7.4 Enable and mode inputs . . . . . . . . . . . . . . . . . . 7
7.5 Storage capacitor . . . . . . . . . . . . . . . . . . . . . . . 8
7.6 Reset delay capacitors . . . . . . . . . . . . . . . . . . . 8
7.7 Reset outputs . . . . . . . . . . . . . . . . . . . . . . . . . . 8
7.8 Hold output . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
7.9 Ignition buffer . . . . . . . . . . . . . . . . . . . . . . . . . 11
7.10 Supply voltage inputs . . . . . . . . . . . . . . . . . . . 11
8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 14
9 Thermal characteristics. . . . . . . . . . . . . . . . . . 14
10 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 14
11 Application information. . . . . . . . . . . . . . . . . . 23
11.1 Application notes . . . . . . . . . . . . . . . . . . . . . . 24
12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 26
13 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
13.1 Introduction to soldering through-hole
mount packages . . . . . . . . . . . . . . . . . . . . . . . 27
13.2 Soldering by dipping or by solder wave . . . . . 27
13.3 Manual soldering . . . . . . . . . . . . . . . . . . . . . . 27
13.4 Package related soldering information . . . . . . 27
14 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 28
15 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 29
16 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
17 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
18 Contact information . . . . . . . . . . . . . . . . . . . . 29
www.datasheetcatalog.com