Effects and Compensation of Dead-Time and Minimum Pulse-Width
Limitations in Two-Level PWM Voltage Source Inverters
Brian A. Welchko Steven E. Schulz
General Motors Advanced Technology Center
3050 Lomita Blvd.
Torrance, CA 90505 USA
e-mail: bwelchko@ieee.org, steven.schulz@gm.com, silva.hiti@gm.com
Abstract– This paper investigates the effect of (voltage source)
inverter non-linearity’s on the space vector pulse width
modulation (PWM) method and the discontinuous PWM
methods, DPWM0, DPWM1, and DPWM2. The inverter non-
linearity’s of dead-time and minimum pulse-width are
considered. These non-linearity’s impose distortion regions
where their effects cannot be properly compensated. The
distortion regions are identified for the various PWM methods
in space vector diagram format. A method to switch between
DPWM methods to avoid the distortion regions while
minimizing switching losses is proposed for the middle
modulation indexes. At high modulation indexes, a method to
modify the DPWM1 switching function is proposed which
preserves the fundamental component while taking into
consideration the inverter non-linearity’s. The proposed
methods are experimentally verified and shown to reduce the
harmonics in the motor phase currents which would normally
be induced due to the inverter non-linear effects. As a result, the
proposed method allows for smoother torque production.
I. INTRODUCTION
P ULSE WIDTH MODULATION (PWM) control of two-level
voltage-source-inverters (VSI) (see Fig. 1) has a long and
rich history starting with the historic paper [1] on sinusoidal
PWM which introduced the concept of “subharmonic”
control. From this beginning, a great number of designer
PWM algorithms have been introduced which are optimized
for nearly every feature imaginable. For example, PWM
algorithms have been optimized for harmonic minimization,
specific harmonic elimination, switching loss minimization,
and acoustic noise reduction, just to name a few.
Some early PWM research efforts focused on increasing
the available output range [2]. As PWM theory became better
developed, the slow switching properties of thyristors
manifested itself as a limitation on the maximum and
minimum pulse-widths (MPW) that could be achieved with
any given phase leg [3], [4], [5]. The effects of dead-time
were also identified and characterized [6], [7]. The concept of
space vector theory to PWM was introduced in [8]. Space
vector theory proved to be a very powerful tool which
inspired numerous new PWM methods and provided
additional insight on previously proven methods, many of
which are overviewed in [9] and [10]. During this time
period, the advent of fast switching insulated gate bipolar
transistors (IGBT), allowed for very high pulse ratio’s
889
1-4244-0365-0/06/$20.00 (c) 2006 IEEE
Silva Hiti
ac Motor
Vdc/2 ia
a
o b n
c
ib
Vdc/2 ic
Fig. 1. Circuit diagram of a PWM-VSI drive.
(fcarrier/ffundamental > 100), and the impacts of MPW were
largely forgotten. Compensating for the dead-time effects
have also been largely solved [11].
Today, the expanding use of variable speed drives into
increasingly demanding applications, such as the hybrid
vehicle, where both high speed operation and high efficiency
are mandatory, requires optimum PWM methods. As
temperature and frequency limits are pushed further and
further to meet both operating requirements and cost
constraints, the non-linear inverter effects of minimum pulse-
width and dead-time increasingly place limits on the most
desirable modern PWM algorithms. This paper identifies the
effects of inverter non-linearities on modern continuous and
discontinuous PWM (DPWM) methods in the form of
distortion regions. A compensation technique to avoid the
distortion regions or minimize their effects is introduced to
insure voltage output linearity and minimize losses in high
performance applications.
II. REVIEW OF POPULAR PWM METHODS
Popular PWM methods used to control the standard two-
level voltage source inverter (see Fig. 1) can be grouped into
either continuous or discontinuous methods. Continuous
PWM methods cause each switch in a phase leg to turn on
and off once per carrier cycle. Classical space vector PWM
(SVPWM) [2], [8], [16] is the most popular due to its
superior harmonic properties and increased output voltage
linearity range over sinusoidal PWM. DPWM methods cause
one switch in a phase leg to cease switching for a portion of
the fundamental cycle. The three basic DPWM methods will
be referred to as DPWM0 [12], DPWM1 [13] and DPWM2
[14]. DPWM0, DPWM1, and DPWM2 are quite similar in
that they clamp the output of each phase leg to the upper and
lower dc link rails for 60º segments of the fundamental
 0.5 1
SVPWM
Desired Duty Cycle dclipH
0
Actual Duty Cycle
Maximum
Modulator (a)
-0.5 Pulse Width
0 50 100 150 200 250 300 350
0.5
DPWM0
Minimum
Pulse Width
dclipL
Phase a (pu x Vdc)

0 0
(a) (b) (c)
Zero Sequence (b)
-0.5 Fig. 3. Methods of rounding to avoid minimum pulse-widths.
0 50 100 150 200 250 300 350
0.5
DPWM1 complementary manner, maximum achievable pulse duration
is effectively induced. The converse is also true if the upper
0 switch is limited to maximum on-time duration, introducing
Fundamental (c) an effective minimum pulse-width on the lower switch. Such
-0.5
0 50 100 150 200 250 300 350
limitations may have to be enforced to prevent damage to the
0.5
DPWM2
semiconductor switches, as are typically found in very high
power applications. MPW limitations can also result from
0 constraints in the gate driver circuit whose possible causes
(d) include transformer reset times or component tolerance drift.
-0.5 Gate driver limitations are often found in cost sensitive
0 50 100 150 200 250 300 350
Electrical Angle (degrees)
applications operating over a very wide temperature range.
Fig. 2. Modulation waveforms of modern PWM methods (Mi = 0.7). Traditionally, pulses less than a minimum width were
prevented from passing to the gate driver circuit and hence,
output. A key difference is that DPWM1 is switching loss dropped [4]. Dropping pulses results in the rounding of the
optimized for unity power factor loads while DPWM0 is phase duty cycle as shown in Fig. 3a. It is possible to hold
optimized for 30° leading power factor loads and DPWM2 is pulses which are too small to be achievable, to the minimum
optimized for 30° lagging power factor loads [9]. The achievable pulse-width, resulting in duty cycles shown in Fig.
fundamental, zero sequence, and resultant modulation waves 3b. Either dropping pulses or holding them at some minimum
for a carrier based implementation of SVPWM and the three value will result in a discontinuity in the achievable output
DPWM methods are shown in Fig. 2 with the waveforms voltage because the average value of the applied volt-seconds
referenced to the center point of the dc link. over a switching period is not accurately reproduced. It is
The modulation index of the PWM signal relates the also possible to round the pulses with an intermediate method
amplitude of the fundamental component of the output as shown in Fig. 3c. In Fig. 3c, pulses are dropped if they are
voltage referenced to the fundamental output voltage very small, but held to the minimum pulse-width value if
produced in six-step operation. The modulation index is then only slightly smaller. As shown in the figure, the break point
given as in deciding whether to round up or round down the desired
V 1* duty cycle is given by dclipL and dclipH.
Mi = (1)
(2/π)Vdc B. Dead-time effects
Dead-time or inverter lock-out time is necessary to prevent
where V 1* is the commanded amplitude of the fundamental a shoot-through failure by gating on both switches in an
component. Employing (1), SVPWM, DPWM0, DPWM1, inverter phase leg. During the dead-time period, both of the
and DPWM2 can ideally reproduce any fundamental output inverter switches in a phase leg are gated off. As a result, the
up to a modulation index, MLmax = π/(2 3 ) ≈ 0.907 [9]. output voltage of the phase (i.e, point a in Fig. 1) is
determined by the direction of the phase current flowing
III. SOURCES OF INVERTER NON-LINEARITY through the inverter antiparallel diodes. As a result the dead-
time effect can be thought of as a parasitic resistance [15].
The two main sources of inverter non-linearity are MPW An efficient way to compensate for dead-time effects is the
effects and dead-time effects. They are discussed along with pulse based dead-time compensator (PBDTC) method shown
their practical impact on system operation as follows; in Fig. 4 [11]. It should be noted that the PBDTC preserves
A. Minimum pulse-width effects the center based pulses which result in superior high
frequency harmonic performance compared to non-centered
Minimum pulse-width limitations result when small on-
pulses [16]. With reference to Fig. 4, PBDTC works as
time duration of the lower switch in a phase leg cannot be
follows; (a) shows the triangular carrier and modulating
achieved. Since the upper switch in the phase leg is gated in a
function while (b) shows the ideal phase a switching pulse.

890
 +Vdc/2 Maximum achievable pulse width for ia > 0
Triangular Carrier
(a) 1
Phase a modulating actual Sa ouptut
Ts Ts (a) dmax
function switching pulse
-Vdc/2 0
2 2
1 1 Upper switch gate signal
(b) ideal Sa switching pulse (b)
with correction
0 0 TDead
1 1
actual Sa resultant switching Lower switch gate signal
(c) (c) TMPW
error ia > 0 pulse without correction with correction
0 0
1 Minimum achievable pulse width for ia < 0
added actual Sa switching pulse with
(d) ia > 0 1
pulse time correction actual Sa output
0 (d) dmin
1 switching pulse
actual Sa resultant switching 0
(e) ia > 0 1
pulse with correction Upper switch gate
0 (e) TMPW
1 signal with correction
actual Sa resultant switching 0
(f) ia < 0 error 1 TDead
pulse without correction Lower switch gate
0 (f)
1 signal with correction
actual Sa switching pulse with 0
(g) ia < 0 subtracted Ts Ts
pulse time correction
0
2 2
1
actual Sa resultant switching
(h) ia < 0 Fig. 5. Gate signals for maximum and minimum achievable pulse-widths.
pulse with correction
0
phase system. In addition to the achievable duty cycles after
Fig. 4. Pulses for ideal and PBDTC with effects of current direction. compensation given by (2) and (3), the discrete clamped duty
When the current is positive (c) shows that part of the pulse- cycles of d = 0, and d = 1 are also achievable by leaving one
width is lost due to the dead-time effect. Adding pulse-width of the switches in a phase leg always on.
as in (d) will produce the correct, desired pulse (e). When the Dead-time compensation corrects for distortion voltages
current is negative (f), shows that pulse-width is gained due produced by the hardware. Since the dead-time compensation
to the dead-time effect. Subtracting pulse-width as in (g) will occurs after the PWM modulator signal, different limits on
produce the correct, desired pulse (h). duty cycle for the modulator are induced. In effect, this
further shifts the limits in (2) and (3) towards the center, d =
C. Practical limitations 0.5 by one dead-time period. Hence, the practical limits on
The function of any PWM algorithm is to faithfully duty cycle at the output of the PWM modulator are given as
produce the voltage to apply to the load which is requested by
the system controller. As a result, the voltage should be dmax = 1 − (1/Ts)(3Tdead + TMPW) . (4)
distortion free, and independent of the system states (i.e. dmin = (1/Ts)(3Tdead + TMPW) . (5)
current polarity). The system non-linearity’s of MPW and
dead-time compensation limit the achievable pulse-width, or When the limits of (4) – (5) are imposed upon the PWM
duty cycle as seen by the load. modulator, the limits of (2) – (3) will be the resultant limits as
Fig. 5 illustrates the limiting cases for the achievable seen by the load. The discrete clamped duty cycles of d = 1
output duty cycles seen by the load after proper dead-time and d = 0 are also allowable at the modulator limit as they do
compensation is applied. The maximum achievable duty not require any dead-time compensation.
cycle when the load current is positive is given by
IV. EFFECTS OF NON-LINEARITY ON PWM METHODS
dmax_post_dtc = 1 − (1/Ts)(2Tdead + TMPW) . (2)
The inability of the system to produce non-distorted duty
The minimum achievable duty cycle when the phase current cycles which are very small or very large will affect the
is negative is given as PWM modulator. Fig. 6 shows the impact of the duty cycle
limits in space vector diagram format for the four considered
dmin_post_dtc = (1/Ts) (2Tdead + TMPW) . (3) PWM methods. In the figure, the shaded areas indicate where
the duty cycle limits cannot be properly compensated; they
It should be noted that the values given in (2) and (3) are
will be referred to as distortion regions.
the most restrictive cases. For example, if the current is
By considering the distortion regions shown in Fig. 6 for
negative, the achievable dmax_post_dtc is larger than given by
the various PWM methods, several observations can be made.
(2). Likewise, the value of dmin_post_dtc is less than given by All of the PWM methods have distortion at high modulation
(3) if the current is positive. However, the values given by (2) indexes when the commanded voltage vector is in the outer
and (3) are always achievable, and are symmetric about d = portions of the hexagon. In effect, the linear modulation
0.5, which will complement the natural symmetry of a three- range has been reduced. Also, SVPWM has a distortion

891
 q-axis q-axis
V3=010 V2=110 V3=010
V*dq V*dq
V4=011 V1=100 V4=011
θ θ
d-axis
V5=001 V6=101 V5=001
(a) SVPWM (b) DPWM0
q-axis q-axis
V3=010 V2=110 V3=010
V*dq V*dq
V4=011 V1=100 V4=011
θ θ
d-axis
V5=001 V6=101 V5=001
(c) DPWM1 (d) DPWM2
Fig. 6. Distortion regions for various PWM methods.
region at high modulation indexes which is twice as large as
the DPWM methods due to the fact that it has two zero
vectors applied during each PWM cycle compared to one for
the DPWM methods. Both of these observations have been
previously reported [17]. The DPWM methods also distort
the voltages at very low modulation indexes, which will be
referred to as an undermodulation region. In the
undermodulation region, the load phase voltages are
comprised mainly of a zero sequence component and hence
the individual phase legs will be switching with either a very
small or very large duty cycle [17].
The DPWM0 and DPWM2 methods shown in Fig. 6b and
Fig. 6d contain distortion regions at the sector transitions. As
a result, they will introduce a distortion voltage term at the
sixth harmonic under all modulation indexes. Interestingly,
the distortion regions at the sector transitions may not be an
issue for some applications. When the power factor of the
load is less then 3 /2 (angle greater than 30°), the dead-time
compensation adjusts the duty cycle in favor of the limit. For
example consider the DPWM2 method in the region of 100 −
120° as seen in Fig. 2d. This region consists of small duty
cycles, which may be impacted by the limit of (3). However,
for lower power factor loads, the current would be positive in
this region. As a result, the dead-time compensator would
increase the duty cycle. Also, the limit of (3) is reduced for
positive current. Thus, the combined increase in duty cycle
and smaller achievable pulse limit would typically eliminate
the distortion region at the sector transitions in its entirety.
For higher power factor loads, such as a permanent magnet
motor, the distortion region becomes a factor since the
current would be negative. Thus, the dead-time compensator
would decrease the duty cycle and exceed the limit of (3).
The interested reader is referred to [18] and [19] which
have explored similar distortion region issues for three-level
inverters.
0.5
Phase a (pu x Vdc)
V2=110 dmax-0.5
v0 va1+v 0
0
V1=100
d-axis v a1 θ
dmin-0.5
-0.5
200 250 300 350
V6=101 Electrical Angle (degrees)
Fig. 7. Expanded view of DPWM2 modulation waveforms (Mi = 0.7).
V2=110
V. COMPENSATING INVERTER NON-LINEAR EFFECTS
With the identification of the distortion regions, it is
V1=100
possible to develop a compensation method such that the
d-axis regions are avoided, or their impact reduced. Since all of the
DPWM methods suffer from distortion at undermodulation, a
continuous PWM method such as SVPWM must be chosen if
V6=101
the distortion induced in the phase currents with a DPWM
method is unacceptable.
A. Middle modulation regions
In the middle modulation regions, it is simple enough to
avoid any distortion regions when using a DPWM method by
choosing the DPWM1 method. However, the DPWM2
method would produce fewer losses for load power factor
angles between 15° and 30° [9]. As a result, it is
advantageous to use DPWM2 whenever possible and switch
to DPWM1 when the commanded voltage is in the distortion
region of DPWM2. Likewise for leading power factor loads,
DPWM0 will produce fewer losses than DPWM1 so
switching between DPWM0 and DPWM1 is advantageous. It
should be noted that dynamically switching between two
DPWM methods does not change the active voltage vector or
increase the number of switching transitions; it merely selects
a different zero vector (111 or 000).
The distortion region is a function of both the modulation
index and time (electrical angle). Since the pulse-width limits
were symmetric, the angle at which the distortion region
begins needs only be calculated for one sixth of the cycle.
Symmetry can be used to determine the angle in the
remaining sectors. Likewise, symmetry properties apply such
that the distortion region is the same size for both DPWM2
and DPWM0; only the location on the space vector diagram
is changed. With reference to an expanded view of the
modulation waveforms of DPWM2 shown in Fig. 7, the
phase a fundamental, and zero sequence, between 240° and
300° are given as
va1(ωt) = (2/π) Mi cos(ωt) (6)
v0(ωt) = (1/2) − (2/π) Mi cos(ωt + (2π/3)) (7)
The angle, θ, which marks the start of the distortion region,
can be found by solving
dmax − (1/2) = va1(θ) + v0(θ) . (8)
892
 Substituting (6) and (7) into (8) yields, after simplification,

Org. Modulating Sig. (pu x Vdc)

0.5
dclipH - 0.5
dmax = (Mi /π) (3 cos(θ) + 3 sin(θ)) + 1. (9) 0.4 d
max
-0.5
0.3
Equation (9) can be solved numerically to yield the angle
which indicates the start of the distortion region. The actual 0.2 θ1 θ2
span of the distortion region is then given as 0.1 (a) θ3
Distortion region span = 300° − θ (10) 0
-100 -50 0 50 100
which can be used by the controller to switch between either Electrical Angle (degrees)
DPWM2 or DPWM0 and DPWM1. When the distortion

Mod. Modulating Sig. (pu x Vdc)

0.5
angle from (10) is greater than 30°, the commanded voltage
vector would be present in the distortion regions for both 0.4 d -0.5
max
DPWM0 and DPWM2. As a result, the commanded voltage 0.3
vector is in the undermodulation region, consisting of the star
shaped distortion region of DPWM1 as seen in Fig. 6c, which 0.2
θ3
is comprised of the intersection of the DPWM0 and DPWM2 0.1 (b)
distortion regions. θ1 θ2
0
B. High modulation regions -100 -50 0 50 100
Electrical Angle (degrees)
As the modulation index approaches the linearity limit at
Fig. 8. Expanded view of (a) original and (b) modified DPWM1 modulation
MLmax ≈ 0.907, all of the DPWM methods are in a distortion waveforms (Mi = 0.85).
region, and as a result, cannot faithfully reproduce the
Fig. 8a shows the original modulating signal while Fig. 8b
commanded output voltage. At high modulation indexes and
shows the modified modulating signal. The proposed method
in the overmodulation region, the DPWM1 method has been
rounds duty cycles which are too large to be accurately
shown to have excellent performance and superior voltage
reproduced to either the maximum achievable duty cycle,
gain properties compared to other DPWM methods [20]. As a
dmax or the upper rail of d = 1 in such a way that the
result, the effects of inverter non-linearity’s will be
considered only for the DPWM1 method. fundamental component of both the original and modified
From (4), (6), and (7), the maximum undistorted modulating wave are equivalent. The original modulating
modulation index which can be reproduced using the signal is compared to value, dclipH or dclipL, to determine if it
DPWM1 method is given as should be rounded up or rounded down.
With reference to an expanded view of the modulation
dmax waveform shown in Fig. 8, the phase a fundamental, and zero
MUmax = (11)
3 (2/π) sequence, between −90° and −30° are given as

which can be simplified as va1(ωt) = (2/π) Mi cos(ωt) (13)

MUmax = dmax × MLmax . (12) v0(ωt) = − (1/2) − (2/π) Mi cos(ωt − (2π/3)) (14)

It should be noted that the limit given in (12) is also the The DPWM1 adjustment angle, θ1, which marks the start
upper limit on modulation index for which the proposed of the modifications, is given from
method to switch between DPWM methods will be
undistorted. As a result, it represents the transition point dmax − (1/2) = va1(θ1) + v0(θ1) . (15)
between the proposed middle modulation and high Substituting (13) and (14) into (15) yields, after
modulation compensation methods. simplification,
In order to compensate while in the distortion region which
begins at (12), the rounding method shown in Fig. 3c will be
used to preserve the desired fundamental component and
[
dmax = (Mi /π) 3 cos(θ1) − 3 sin(θ1) . ] (16)

maintain the input-output voltage gain of the modulator as in
the linear region. A similar method for various PWM
algorithms operating in the overmodulation region is
discussed in [21]. The proposed compensation for DPWM1
in the high modulation regions is shown in Fig. 8. Only the
positive half cycle of phase a is shown in the figure as the
remaining signals can be found from symmetry.
Equation (16) can be solved numerically to yield the angle
which indicates the start of the modifications. Applying
Fourier analysis techniques to the waveform of Fig. 8b yields
a complicated expression for the fundamental component of
the modified waveform. This is given as

893
 2

Dist. Region Span (degrees)

30
va1_mod = M =
π i
2  π f sw=12kHz
Misin(2θ1) + 3Miθ1 − πsin(θ1)+ Misin2θ1+  20 8kHz
π 
2  3 6kHz
10kHz
1
π [
+ 2 3Miπ − 2π + 3Mi ] 10
4kHz
f sw=2kHz
2 2
+ [2 dmax − 1][sin(θ2) − sin(θ1)] − sin(θ2) (17)
π π 0
0 0.2 0.4 0.6 0.8
Equation (17) can be solved numerically in conjunction with Modulation Index
θ1 from (16) to yield the DPWM1 adjustment angle θ2. Fig. 9. Distortion region span as a function of carrier frequency.
Finally, the value of dclipH can be obtained from

Adjustment Angles (degrees)

-30

[
dclipH = (Mi /π) 3 cos(θ2) − 3 sin(θ2) . ] (18) -40

Since the maximum and minimum pulse-widths are -50

θ2
symmetric about ½, the lower clip duty cycle, dclipL can be
found as -60
θ1
dclipL = 1 − dclipH . (19)
-70
0.7 0.75 0.8 0.85 0.9 0.95
VI. EXPERIMENTAL RESULTS Modulation Index
Fig. 10. DPWM1 adjustment angles for the experimental system.
The proposed methods to switch between DPWM methods
1
in the middle modulation indexes and to preserve the
fundamental component using the modified DPWM1 method
Clip Duty Cycles

at high modulation indexes were experimentally verified. The

experimental test setup employed an interior permanent
magnet (IPM) motor and an insulated gate bipolar (IGBT)
based inverter. The drive employs synchronous frame current
regulation on the d- and q-axis currents, whose references are
derived from a torque command. When operating at 12 kHz,
the inverter was capable of maximum and minimum pulse-
widths at the modulator before dead-time compensation of
dmax = 0.796 and dmin = 0.204 respectively. From (12), the
transition between using the middle modulation technique
and high modulation technique would occur at Mi = 0.722.
Fig. 9 shows how the span of the distortion region
increases with the carrier frequency. This is to be expected as
the dead-time and minimum pulse-widths are fixed values
whose impact increases as the PWM carrier period decreases.
Fig. 10 shows the adjustment angles for the proposed high
modulation DPWM1 method for a 12 kHz switching
frequency while Fig. 11 shows the resultant set points for the
clip duty cycles. Strictly speaking, the curves for the clip duty
cycles in Fig. 11 are not monotonically increasing at the very
end of the linear range (Mi > 0.885). This is because only the
fundamental component of the modulating function was
considered. The data in the figures was calculated off-line,
curve fitted, and used by the system controller as needed.
Fig. 12 shows the measured results from using the baseline
control system without the proposed modified PWM method.
This case employs the pulse rounding method of Fig. 3a, and
a generalized DPWM method such as given in [17]. All of the
dclipH
0.5
dclipL
0
0.7 0.75 0.8 0.85 0.9 0.95
Modulation Index
Fig. 11. DPWM1 clip duty cycles for the experimental system.
cases presented employed identical pulse-width limitations.
Fig. 12 shows the measured synchronous frame currents at
1800 rpm and a modulation index of Mi = 0.45. Also shown
is the commanded phase a duty cycle, or modulating
function, after pulse clipping and dead-time compensation.
The torque ripple shown is the estimated torque ripple
calculated from the measured current and estimated motor
parameters. As a result, it could be considered the torque
ripple which is purely a result of a non-ideal control and
hardware system. For the baseline case, Fig. 12 shows pulse
clipping twice per cycle. On a three-phase basis, this
introduces a sixth-harmonic component in the torque ripple
and a corresponding fifth and seventh harmonic in the
measured phase current spectrum in Fig. 12b. Overall, the
estimated ripple torque is 1.12 Nm rms.
Fig. 13 shows the results of the same operating condition
with the proposed middle modulation compensation method
active. The compensation method eliminates the two pulse
clipping instances from the baseline case. As a result, the
estimated torque ripple has been reduced 35% to 0.73 Nm

894
 i qe , 25 A/div

(a) (b)
i de , 25 A/div da , 0.4/div 5th, 2.34%
7th, 1.78%
~
Te_ripple , 8 Nm/div

1.12 Nm rms

Fig. 12. Baseline case, ωr = 1800 rpm, Mi = 0.45. (a) Motor currents, estimated torque ripple, phase a duty cycle; (b) Phase a current spectrum.

i qe , 25 A/div

(a) (b)
i de , 25 A/div da , 0.4/div
5th, 1.51% 7th, 1.02%
~
Te_ripple , 8 Nm/div

0.73 Nm rms

Fig. 13. Middle mod. comp. method, ωr = 1800 rpm, Mi = 0.45. (a) Motor currents, estimated torque ripple, phase a duty cycle; (b) Phase a current spectrum.

i qe , 75 A/div

5th, 2.88%
(a) (b)
i de , 75 A/div da , 0.4/div 7th, 1.12%

~
Te_ripple , 16 Nm/div

4.58 Nm rms

Fig. 14. Baseline case, ωr = 2500 rpm, Mi = 0.78. (a) Motor currents, estimated torque ripple, phase a duty cycle; (b) Phase a current spectrum.

i qe , 75 A/div

(a) (b) 7th, 1.07%

i de , 75 A/div da , 0.4/div 5 th, 1.17%
~
Te_ripple , 16 Nm/div 2.93 Nm rms

Fig. 15. High mod. comp. method, ωr = 1800 rpm, Mi = 0.89. (a) Motor currents, estimated torque ripple, phase a duty cycle; (b) Phase a current spectrum.

895
rms on a corresponding drop in the fifth and seventh
harmonics decrease in the phase current. For both the
baseline and modified case, higher order harmonics (11th and
13th) are present in the phase current and are a result of motor
winding function, and not a parasitic of the control method.
Fig. 14 shows the baseline control method at a higher
modulation index and increased output power operating
point. The motor speed is 2500 rpm and the modulation index
commanded is Mi = 0.78. Fig. 14a shows two additional wide
areas of pulse clipping compared to operation at lower
modulation index in Fig. 12a. As a result, the estimated
torque ripple is increased to 4.58 Nm rms.
The proposed high modulation method is activated in Fig.
15 for the same speed and torque condition as in Fig. 14. The
proposed compensation method has the effect of smoothing
the d- and q-axis currents. As a result, the sixth harmonic is
reduced and the estimated torque ripple is reduced 36% to
2.93 Nm rms, corresponding to a drop in the fifth harmonic in
the phase current spectrum. It is interesting to note that the
commanded modulation index for this operating point has
increased from Mi = 0.78 to Mi = 0.89 when the proposed
method was activated. This is due to the pulse clipping
employed in the baseline case whose effect increases the volt-
seconds of the modulating function. As a result, the current
regulator compensates by decreasing its voltage command.
While the current regulator compensates for the fundamental
component value well, it does a poor job regulating the
harmonics introduced due to the pulse clipping method.
VII. CONCLUSIONS
This paper has investigated the effects of inverter dead-
time and minimum and maximum pulse-width effects on the
SVPWM, DPWM0, DPWM1, and DPWM2 control methods.
The non-linear effects limit the maximum and minimum
pulse-widths which can be applied at the output of the PWM
modulator and as seen by the load. This paper has shown that
the pulse-width limits create distortion regions on the space
vector diagram for all of the PWM methods considered. In
the distortion regions, the controller is not able to compensate
for the dead-time and minimum pulse-width effects.
This paper has proposed two compensation methods to
eliminate or reduce the effects of the distortion regions. In the
middle modulation ranges, a method to switch between
DPWM methods in order to avoid the distortion regions,
while allowing for the use of the loss optimized DPWM
method for the largest portion of the operating time is
presented. At the higher modulation indexes, a modified
pulse clipping method to preserve the fundamental voltage
component linearity is proposed.
Both proposed modified PWM methods were shown to
reduce the sixth harmonic of the motor phase currents in the
synchronous frame as verified by experimental
implementation. It was also shown through experiments that
the estimated motor torque ripple could be reduced
approximately 35% when using the proposed methods.
896
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