latch also uses the implanted zener diodes to level shift input
and output levels for convenient drive of following stages. In
SESSION XI: A/D AND D/A CONVERSION TECHNIQUES
THAM 11.3: A Precision
Voltage-to-Frequency
Converter
James C. Schmoock
Raytheon Co.
Mountain View, CA
A SECOND-GENERATION monolithic Voltage-to-Frequency
Converter (VFC), which incorporates an ion-implanted zener
reference, a high-speed, stable one-shot multivibrator circuit
design, and a precision voltage-to-current converter and current
switch will be described.
Figure 1 shows the top view and cross-section of the ion-
implanted zener reference. The zener junction is formed by the
emitter N+ diffusion and by a buried P’ layer which is ion-
implanted below the surface of the wafer to avoid surface-induced
long term drift effects. Ion-implantation has been found to of-
fer significant advantages over previously-described diffusion
techniques for producing low-drift buried zener references. Dif-
fused zeners fabricated using base, isolation, or other deep Pf
diffusion require careful control to achieve variations of less than
? 250mV from run-to-run in a wafer fabrication production
line2. The ion-implantation technique results in variations of
less than k lOOmV run-to-run with likewise improvement in the
ability to control and specify temperature coefficient of the
resulting reference voltage.
Figure 2 shows a block diagram of the complete IC chip con-
figured with all the passive components necessary to make a
complete VFC. In operation, a positive voltage applied to the
input results in an input current 11 to the integratorcausing the
output to ramp downward until i t reaches the trigger threshold
voltage. This fires the one-shot, which switches the precision
current source into the integratorsumming node for a fixed
period of time, T. The integrator output ramps upward by an
amount of voltage proportional to the difference between the
input current, 11, and the precision current source output, Io,
thus completing one cycle of operation. In the steady-state
mode, the feedback loop thus formed forces the frequency of
these pulses to be proportional to the input voltage. It will be
noted that the voltage reference output is tied through an exter-
nal connection to the reference voltage input, allowing ratio
metric operation or even better temperature stability through
the use of an external reference. Additionally, the use of positive
and negative supplies allows implementation of the one-shot
with all-NPN current mode logic in critical signal paths.
Figure 3 shows a simplified schematic of the high speed one-
shot. The dotted lines separate the one-shot further into an
R-S latch, ramp generator, and voltage comparator. The R-S
Pinter, P. and Timm, D., “Voltage-to-Frequency Converter
- IC Versions Perform Accurate Data Conversion (andmuch
more) at Low Cost”, E D N , Vol. 2 2 , p. 153-157; Sept.5 , 1 9 7 7 .
’Dobkin,R.,“Monolithic Temperature StabilizedVoltage
Referencewith0.5ppm/OCDrift”. ISSCC DIGEST O F T E C H -
N I C A L P A P E R S , p. 108-109;
Feb., 1 9 7 6 .
3Todd, C. and Stellrecht, H., “A Monolithic Analog Com-
pandor”, ISSCC DIGEST O F T E C H N I C A L P A P E R S , P . 26-27;
Feb., 1 9 7 6 .
this application the control of dc levels provided by the buried
zener diodes offers significant performance advantages over the
reverse biased emitter-base junction. The one-shot operates in
the following sequence. A positive trigger voltage temporarily
applied to the base of Q5 sets the R-S latch to the on-state
causing the base of Q l l t o be pulled low, turning on 412,
which causes a sharp negative-going step at
the base of Q1. This
turns off Q1 and the timing current, IT charges capacitor Co
linearly in the negative direction. When the voltage on capacitor
C o reaches the threshold voltage,comparator
VT, the resets the
latch, completing the one-shot cycle. This all-NPN bipolar
circuit design serves to minimize delays by having a minimum
number of components in the critical signal path. Minimum
delay means minimum drift of resultant VFC scale factor at high
frequency.
The precision voltage-to-current converter and current switch
are shown in Figure 4. The transistors Q21 - Q38 form a differ-
ential input transconductance amplifier, with the output current
being the collector current of Q35 and Q36. The reference
voltage, V R is applied to R60, thus causing a current, IIN in R60.
The feedback loop formedby tying the collector of Q35 through
438 back t o the summing node at the base of Q22 forces an
identical current to flow in the currentswitch, Q7 and Q8, neg-
lecting input bias current in Q22. The purpose of 438 is to
compensate for base current lost in the current switch. The
transconductance amplifier itself uses a complementary para-
phase input composed of 421 - Q26, with a current mirror
formed by 4 2 7 - 430, which converb from differentialto
single-ended output. Level shift diodes Q32 and Q34 and
emitter follower Q31 bootstrap the emittersof mirror devices
4 2 9 and Q30 to increase gain and lower input offsets which
would otherwise be caused by unbalanced collector voltages on
Q23 and 426. Matching emitter currentsin 4 3 5 and 436 are
assured by degeneration resistors R3 and R4, which each drop
4V under standard operating conditions. These and other resis-
tors on the chip, which must be matched are 25p wide or wider,
and are also fabricated with ion implant’.
Table 1 summarizes overall performance, reflecting the im-
proved temperature stability at 1OOkHz operation. Die size of
the monolithic VFC is 90 x 108 mils. Figure 5 is a photomicro
graph of the high-speed one-shot portion of the die.
I
TOP
VIEW
BORON
/ / CATHODE
P *+ I M P L A N T ANODE CONTACT
/ CONTACT I
N+
N-
SI DE
VIEW
FIGURE 1-Ion implanted reference zener.
 FIGURE 2-Precision VFC Mock diagram. FIGURE 3-Simplified high-speed one-shot.

, "r I I,j
"IN

f6' CURRENT
SWITCH

PARAMETER
T= + 25'C.

FULL SCALE FREQ FULLSCALEFREO

1.0 k H z 100 k H z
Vcc =

UN,TS
!1 5 V

Input:
Voltage Range
overrange
0 to
50 %
f IC 0 :o
50 %
.ic -V
Impedance 20k 20 k 0
.o I 5 ,025 -1- F.S.
Non18ncarlty
Scale Factor 25 35 3 om io<
iEM PC0
TEMPCOVREF 20 20 pprnio,
ollset VOI ta ge '.O 1.0 mV
VoS 31811 %Temp 1.0 1.0 JJ V P C
Sertlsng T8me 1000 10
.lOV step

output:
Pulse W8dth
PYISC- POlarlty
500
E: E,G
O.,
5
NEG
0.1
."'
VSAT ~IQI.5m
supply:
Voltage Range :I2 t o ?I8 !12 10 !I0 V
C,,*p.lnt 1% - 7 _CI -7 mA

FIGURE 4-Precision voltage-to-current converter. TABLE 1-VFC typical performance.

VOLTAGE
COMPARATOR

\
FIGURE5-High-speedone-shot
section of monolithic die.

R-S LATCH