Logic Circuits and Switching Theory

Diagnostic Examination

Student Name: Viado, Emmanuel Russell P. Date: 7/3/2020

Section No or Time: E01

Poblem 1 (Include the solution)

Perform the following conversions. Show the details of your solution in the space
below.

a. Decimal 153 to octal is 2318

153 ÷ 8 = 19.125 = 19r1

.125 x 8 = 1
19 ÷ 8 =2.375 = 2r3
.375 x 8 = 3
2 ÷ 8 = 0.375 = 0r2

b. Decimal 0.6875 to binary is 0.10112

0.6875 x 2 = 1.375 = 1
0.375 x 2 = 0.75 = 0
0.75 x 2 = 1.5 = 1
0.5 x 2 = 1

c. Octal 0.513 to Hexadecimal is 0.A5816

0.5138 = 5 - 101
= 1 - 001
= 3 - 011
.1010010112 = 1010 - A (10)
= 0101 - 5
= 1000 - 8

d. Hexadecimal 306.D to binary is 1100000110.11012

306.D
= 3 - 0011
0 - 0000
6 - 0110
.
D - 1101

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Logic Circuits and Switching Theory
Diagnostic Examination

Problem 2
Using NAND gates only, implement the function F = A(CD + B’)

Problem 3
Consider the Boolean function: F = X Y + X' Z
a. Write the truth table for F in the table shown to X Y Z F
the right.
0 0 0 0
0 0 1 1
b. Find the complement of F in simplified POS form.
0 1 0 0
F = (XY + X‘Z)’
F = [(XY) (X’Z)]’ 0 1 1 1
F = [(X + Y) (X’ + Z)]’ 1 0 0 0
F = (X’ + Y’ ) ( X + Z’ )
1 0 1 0
1 1 0 1

1 1 1 0

c. Express F as a sum of minterms.

F = X’Y’Z + X’YZ + XYZ’ + XYZ

F = 001 + 011 + 110 + 111

F= m1 + m3 + m6 + m7
F (X,Y,Z) = Σ (1, 3, 6, 7)

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Diagnostic Examination

d. Implement the Boolean function (F = X Y + X' Z) using basic logic gates.

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Problem 4

a. For the following sum of minterms expression, derive a simplified sum of

products (SOP) expression using a Karnaugh map.
F (A,B,C,D)= ∑m (2,5,7,8,9,10,12,13,14,15)

CD 00 01 11 10

AB
00 0 0 0 1

01 0 1 1 0

11 1 1 1 1

10 1 1 0 1

Problem 5
Design a combinational circuit that outputs 1 if its 4-bit input number is divisible by
(4)10 and outputs 0 otherwise.

Truth Table:
A B C D F

0 0 0 0 1

0 0 0 1 0
0 0 1 0 0
0 0 1 1 0

0 1 0 0 1
0 1 0 1 0

0 1 1 0 0

0 1 1 1 0

1 0 0 0 1

1 0 0 1 0
1 0 1 0 0

1 0 1 1 0

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Logic Circuits and Switching Theory
Diagnostic Examination

1 1 0 0 1

1 1 0 1 0

1 1 1 0 0
1 1 1 1 0

Optimization (K-map):

CD 00 01 11 10

AB
00 1 0 0 0

01 1 0 0 0

11 1 0 0 0

10 1 0 0 0

F = C’D’

Logic Diagram Using NOR Gates Only:

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Logic Circuits and Switching Theory
Diagnostic Examination

Problem 6
Construct a 16x1 multiplexer using two 8x1 and one 2x1 multiplexers. Draw block
diagrams only

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