2016 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT)

Implementation, Comparison and Experimental

Verification of Nearest Vector Control and Nearest
Level Control Techniques for 27-Level Asymmetrical
CHB Multilevel Inverter
ROHITH BALAJI JONNALA NAGA RAJU ELURI SAI BABU CHOPPAVARAPU
Department of Electrical and Electronics Department of Electrical and Electronics Department of Electrical Engineering,
Engineering, Engineering, University College of Engineering
Shri Vishnu Engineering College for Shri Vishnu Engineering College for Kakinada (A),
Women (A), Women (A), Jawaharlal Nehru Technological
Bhimavaram – 534 202, Bhimavaram – 534 202, University Kakinada,
Andhra Pradesh, INDIA. Andhra Pradesh, INDIA. Kakinada-533 003,
rohithbalajijonnala@yahoo.com Andhra Pradesh, INDIA.

Abstract—In this paper, implementation and comparisons of like Diode Clamped Multilevel Inverter having N (maximum
Nearest Vector Control and Nearest Level Control modulation number of levels) - 1 clamped diodes in addition to the circuit
techniques for 27-Level with 3-Cell Asymmetrical Cascaded H- to generate N levels, same as N-1 flying capacitors in Flying
Bridge Multilevel Inverter is presented to analyse the Capacitor Multilevel Inverter [3].
performance and application oriented complexity. Asymmetrical
type of multilevel inverters is familiar in the view of attaining
more number of levels with lesser number of cells. Hybrid
Asymmetrical Multilevel Inverter gives higher levels than other
asymmetrical inverters with no redundant switching states for
the entire operation. Modulation Strategy takes foremost
involvement in the conversion process, but the selection of
strategy is based on the type of application and topology of
inverter. This paper reviews the comparative performance
parameter analysis to choose a suitable modulation technique for
different applications. The adoptive nature of Nearest Vector
Control and Nearest Level Control strategies are analysed
through Simulation and Experimental results.

Keywords—Nearest Vector Control; Nearest Level Control;

Total Harmonic Distortion; Asymmetrical Cascaded H-bridge
Multilevel Inverter.

I. INDRODUCTION
In present industrial market scenario, the influence of
Multilevel Inverters is high. Because the major research work
is going to improve the quality of power from PV array and
utilization of batteries for mobility. To get a high quality ac
supply with required voltage magnitude, frequency and better
THD in output for the most of the applications are fed with
multilevel inverters [1]. The most important feature of the
multilevel inverter is having high power operating capability
with low power rated conventional semiconductors, because
they are operated in cascade [2].
The multilevel inverters are classified into different
categories and they are shown in Figure 1. Among the
classifications, Cascaded H-Bridge (CHB) Multilevel Inverter
(MLI) is the best and commercially accepted one, but the only
drawback is more number of DC sources. In other topologies
FIGURE 1. CLASSIFICATION OF INVERTERS.
In Cascaded H-Bridge Multilevel Inverter DC sources may
be PV array, Fuel cells or Batteries; the main attractive feature
of one of the Cascaded H-Bridge Multilevel Inverters is
provides more number of voltage levels without increasing the
DC sources and power switches i.e., Asymmetrical Cascaded
H-Bridge Multilevel Inverter [4-6]. If the cascaded H-bridge
multilevel inverter is designed with equal dc sources, then it is
called as symmetrical Multilevel Inverter otherwise
Asymmetrical Multilevel Inverter. In this article, the
Asymmetrical CHB MLI is utilized to implement different
Modulation Techniques to generate 27-level output with less
number of cells.

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FIGURE 2. CLASSIFICATION OF MULTILEVEL INVERTER'S MODULATION
STRATEGIES.
The process of sequential switching of semiconductor
devices in a converter from one state to another to get a
required output state with the specified logic is called
Modulation. There are so many modulation techniques are
available used for Multilevel Inverter and they are shown in
Figure 2.
In this article the Asymmetrical CHB Multilevel Inverter
(ASCHBMLI) is operated with the Nearest Vector Control
(NVC) and Nearest Level Control (NLC) techniques for the
performance analysis. This paper is organized as follows, in
section II, the Asymmetrical CHB multilevel inverter is
presented. The basic principles of Nearest Vector Control
(NVC) and Nearest Level Control (NLC) techniques are
addressed in section III. Simulation and Experimental result
analysis is discussed in Section IV and V respectively. Section
VI concludes the overview of analysis about NVC and NLC in
application point of view.
II. ASYMMETRICAL CASCADED H-BRIDGE MULTILEVEL
INVERTER
To increase the number of output levels without increasing
the number of cells(R), asymmetrical nature in DC sources of
CHB Cells shown in Figure 3, are chosen according to a
geometric progression with a factor of 2 or 3. For an R of
cascaded converter cells, one phase can achieve the following
distinct voltage levels:
N= 2 −1
if V , = 2 V = 1,2,3, … R (For Binary)
,
N= 3
if V , = 3 V = 1,2,3, … R (For Tertiary)
,
The maximum output voltage of these R cascaded cell
based multilevel inverter is
V , = V ,
The above equations can be written as follows
V, = (2 − 1)V
if V , = 2 V , = 1,2,3, … R (For Binary)
(3 − 1)
V , = ∗V
2 Culminating features are approximately fundamental switching
if V , = 3 V , = 1,2,3, … R (For Tertiary)
By comparing the above equations, it can be seen that the
Asymmetrical Multilevel Inverter can generate more voltage
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levels and higher output voltage with the same number of
Cells.
FIGURE 3. ASYMMETRICAL CHB MULTILEVEL INVERTER.
TABLE 1. COMPARISON BETWEEN SYMMETRICAL AND ASYMMETRICAL
MULTILEVEL INVERTER.
Symmetrical Asymmetrical Inverter
Description
Inverter Binary Tertiary
No. of Levels 2R+1 2R+1-1 3R
No. of DC Sources R R R
No. of Switches 4R 4R 4R
Vo,Max R 2R-1 (3R-1)/2
Table 1 summarizes the number of levels, switches, DC
sources and maximum available output voltage for classical
cascaded multilevel converters, Asymmetrical multilevel
inverter [7-9] with tertiary sources are considered for 3 cells
gives more number of voltage levels than others i.e., 27 Level.
So this topology is used and preferred for the analysis of
different modulation strategies, among the classified
modulations strategies the basic logical approach of the NVC
and NLC strategies are chosen and the description of these
strategies are concise in next section.
III. NVC & NLC MODULATION STRATEGIES
The operational characteristics of the inverter is depends
upon the implemented modulation [14-17]. In this section,
recently introduced and simplified version based on two
different platforms i.e., vector duration and reference level
oriented modulations are discussed. NVC is an advanced
adaptation of space vector modulation, the logical approach is
same as SVM and the pulses are manipulated only based on the
vector duration. So the NVC has a predefined approach to
generate the pulses for the inverter with the comparision of
available vectors and the reference vector position. The other
type of modulation NLC has an personalized logical approach
to generate the pulses, this strategy is operated with rounded
level based reference. It has a simple logical strategy to
generate the gating pulses and also it is very easy to implement.
The logical approach and methodology of chosen and preferred
NVC and NLC modulations related discussions follows.
A. Nearest Vector Control
NVC is a simplified strategy of Space Vector Modulation.
frequency and low distorted output signals with vector based
approach. The vectors are selected with the Space Vector
Modulation Strategies approach [10, 11], but the approach is
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very much simplified by reducing the computational equations
for the time intervals of vectors. By using the function ceil to
resultant reference signal gives the appropriate voltage vectors
for the operation.
FIGURE 4. NVC STRATEGY.
As shown in Figure 4 the resultant reference signal is
approximated with the horizontal and vertical lines of space
hexagon to find the ranges of vectors. In each instant of time
of present vector the reference signal is approximated with ceil
function and getting the nearest vector with the values by the
simple calculations. These operational issues can be found in
detail in [10]. The selected voltage vector is basically
represents the future voltage vector and this will provides the
future output level generated by the inverter. Based on the level
the control driver circuit is generates the gating pulses and
those pulses will controls the switches to get the required
output level.
B. Nearest Level Control
NLC is a simple level based strategy, and the levels are
selected by the rounded function so it can be called as Rounded
Control method [12, 13]. In NVC also using the same approach
but NLC is a level based approach and NVC is time based. The
pulse generation is different from the NVC modulation,
because NVC is a modulation and a selected vector gives the
commands to all three phases, but in NLC 1200 phase shifted
references are required to generate all the three phase pulses.
The nearest voltage level selection procedure in NLC is based
on the simple expression per phase is: Nearest Voltage Level
(VRN) = VDC*f-round (Vref). The operation of the NLC is
illustrated in Figure 5.
FIGURE 5. NLC STRATEGY.
The computed level from the reference is fixed to generate
the gating pulses and these pulses are transferred to the inverter
for the required output in AC side. Based on the level of the
inverter, the output is approximately appears like reference.
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Operating conditions of NLC gives that it is not a fundamental
modulation strategy, so the elimination of harmonics is not
possible due to there is no procedural tracing of reference
signal. But if the levels of the inverter is high then the
harmonics are naturally eliminated in the AC side. The main
advantages are simplicity on operation and implementation.
Implementation of these two NVC and NLC modulation
techniques are very easy because of low computational
complexity and mostly compatible with any topology based
inverters [13]. In this paper implementation and performance
analysis of NVC and NLC to 3-Cell, 27-Level Asymmetrical
CHB Multilevel Inverter in Simulation and Experimentation
with Low-Power Prototype model are discussed in sections IV
& V. For comparison purpose, simulation is carried out with
Low-Power and Medium-Power models.
IV. SIMULATION RESULTS
Table 2 shows the detailed parameters used to design the
Asymmetrical multilevel inverter with 3-Cell. For
asymmetrical nature of operation in both Low and Medium
Power models are equipped with the 1:3:9 ratios related DC
Sources.
TABLE 2. SIMULATION MODEL PARAMETERS.
DC Voltages 1V : 3V : 9V (3 Cells)
Switches IGBT / D
Load R = 10Ω, L = 25mH
Modulation Strategy NVC & NLC
f0 50Hz
Max. Step Size 1e-6 Sec
Figures 6-9, are simulated results for the single phase Low-
Power model with specified modulation parameters as
mentioned in the previous section of NVC modulation strategy.
The 27-Level Voltage waveform is shown in Figure 6. The
middle portion of the +ve half cycle is constant, because the
output levels are selected based on the vector control strategy.
One of the corner in space hexagon’s vectors are the
responsibility for that increment, constant and decrement
nature of the output. It is based on a logical approach but it has
some mismatches with the reference at the trail and bad edges
of constant portions.
FIGURE 6. OUTPUT VOLTAGE WAVEFORM FOR NVC.
The different voltage rating alignment for the individual
cells in a multilevel inverter is the identical parameter in
Asymmetrical type inverters. All these asymmetrical voltage
rating cells are operated in +ve region, -ve region and zero state
for the desired level in output side. The main advantage of this
asymmetrical type is having low switching frequency for high
voltage rating cell and high switching frequency for low
voltage rating cell. This will provides the lower switching
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losses than conventional inverter; because of this, power
sharing of DC sources and switching frequency of switches are
different from each other of 3 Cells. Figures 7 and 8
respectively shows the Switching Pulses and Power of 3 Cells.
FIGURE 7. GATING PULSES TO ASYMMETRICAL MULTILEVEL INVERTER FOR
NVC.
FIGURE 8. CELL WISE POWER SHARING WAVEFORMS WITH NVC STRATEGY.
The spectral analysis of Nearest Vector Control strategy
based Low and Medium Power models related Line to Line
Voltage wave are shown in Figure 9 sub sequentially. This
harmonic analysis will provides the performance of the
Asymmetrical Cascaded H-Bridge Multilevel Inverter with
Nearest Vector Control modulation strategy.
FIGURE 9. SIMULATED FREQUENCY SPECTRUM OF VOLTAGE SIGNAL FOR NVC
STRATEGY.
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FIGURE 10. OUTPUT VOLTAGE AND CURRENT WAVEFORMS FOR NLC.
Simulated results of Low-Power model for the single phase
with specified parameters as mentioned in the previous section
of NLC modulation strategy are shown in Figures 10-13. The
Voltage and Current waveforms of 27-Level are shown in
Figure 10. The output having the sequential increment and
decrement steps are creating the approximate reference type of
signal with the help of Nearest Level Control with the support
of Asymmetrical Cascaded H-Bridge Multilevel Inverter. The
output voltage performance is much better than the NVC
strategy.
NLC related cell wise Powers sharing of 3 Cells and
Switching Pulses are shown in Figures 11 and 12 respectively.
The gating pulses shown in Figure 11 having the less operating
frequency than the NVC based pulses shown in Figure 7. And
also the power sharing of the NLC based inverter cells are
symmetrically distributed than the NVC modulation strategy.
FIGURE 11. GATING PULSES TO ASYMMETRICAL MULTILEVEL INVERTER FOR
NLC.
FIGURE 12. CELL WISE POWER SHARING WAVEFORMS WITH NLC STRATEGY.
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V. EXPERIMENTAL RESULTS

FIGURE 14. EXPERIMENTAL SETUP OF SINGLE PHASE 3-CELL CHB

MULTILEVEL INVERTER PROTOTYPE.

FIGURE 13. SIMULATED FREQUENCY SPECTRUM OF VOLTAGE SIGNAL FOR

NLC STRATEGY.

The spectral analysis of Nearest Level Control strategy

based Low and Medium Power models related Line to Line
Voltage wave are shown in Figure 13 sub sequentially. This
harmonic analysis will provides the performance of the FIGURE 15. CLOSE VIEW OF DRIVER CIRCUIT AND CHB MULTILEVEL
Asymmetrical Cascaded H-Bridge Multilevel Inverter with INVERTER SETUP.
Nearest Level Control modulation strategy. And the
comparision form the NVC strategy will gives that the NLC To implement, compare and validate the NVC and NLC
having lower harmonic distortions. strategies for 3-Cell Asymmetrical 27-Level Inverter with
Simulation model, an Experimental prototype is implemented.
TABLE 3. COMPARISON OF THD FOR NVC AND NLC STRATEGIES. The single phase hardware design of multilevel inverter 3-Cell
prototype is shown in Figures 14 and Fig. 15 shows the
Modulation Type of
Type Fundamental Value
VTHD (%)
separate view of Inverter and Driver circuit.
of (V)
Strategy Model
Phase R load RL load R RL
Low-Power 1- Ф 40.08 40.08 6.55 6.55
NVC Medium- 1- Ф 236.2 236.2 6.57 6.57
Power 3- Ф 409.1 409.1 5.53 5.53
Low-Power 1- Ф 39.09 39.09 3.02 3.02
NLC Medium- 1- Ф 230.3 230.3 3.04 3.04
Power 3- Ф 398.9 398.9 2.61 2.61

Figures 6-13, visualizes the NVC and NLC modulation

strategies for Low-Power model related simulation results. The
comparison of results for both Low and Medium (1Ф & 3Ф)
Power models is shown in Table 3. The concise information
from the simulation result comparison, NLC with ASCHB MLI
having the better operating conditions with low harmonic
distortions. NVC is also having low THD but approximately
3% higher than the NLC. Changing of the power rating nothing FIGURE 16. VOLTAGE WAVEFORM FOR NVC STRATEGY BASED 27-LEVEL
but the change of operating voltage is give the scope to operate ASYMMETRICAL CHB MULTILEVEL.
this type if modulation and inverters to any extension levels.

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FIGURE 19. SPECTRAL ANALYSIS OF NVC STRATEGY.

27-Level NLC modulation based output Voltage

FIGURE 17. 50HZ CYCLE OF NVC MODULATED VOLTAGE SIGNAL.
waveforms and spectral analysis are shown in Figures 20-23.
The NLC modulation strategy based ASCHB MLI output
voltage waveform is visualized in Figure 20, and those are also
resembles the simulation output pattern. Because of the
rounded reference pattern the output waveforms are looks same
like sinusoidal, and the 50Hz i.e., one cycle of the NLC based
outputs are shown in Figure 21.

FIGURE 18. MAGNIFIED VIEW OF LEVELS (0-13) FOR NVC STRATEGY.

The IC number with FGL40N120ANDC10JJ (1200V, 40A)

single IGBT module with diode connected anti parallel is FIGURE 20. VOLTAGE WAVEFORM FOR NLC STRATEGY BASED 27-LEVEL
selected for the design of the H-Bridge Cells. The hardware ASYMMETRICAL CHB MULTILEVEL.
model is operated and associated with the help of
TMS320F28335 for standalone development platform with
high performance 150MHz Digital Signal Processor (DSP)
from Texas instruments. The operating parameters used in the
simulation are the same for Low-Power experimental model.
The NVC modulation based output voltage wave form is
revealed in Figure 16, and this figure demonstrate the similarity
of NVC simulation output. Figure 17 illustrates the 50Hz
frequency signal i.e., 20msec of interval for the full cycle.
The incremental view of the levels of NVC based inverter
output waveform is shown in Figure 18, and this figure view
that the level 1 magnitude is very low because of voltage drop
across the switch. All 13 level are clearly visualized. Harmonic
analysis with the reference of harmonic order in hardware
results are shown Figure 19, and the total harmonic order is FIGURE 21. 50HZ CYCLE OF NLC MODULATED VOLTAGE SIGNAL.
somewhat higher than that of simulation i.e., approximately 4%
higher.

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The incremental view of the levels of NLC based
inverter output waveform is shown in Figure 22. All 13 level
are clearly visualized. Harmonic analysis with the reference of
harmonic order in hardware results are shown Figure 23, and
the total harmonic order is somewhat higher than that of
simulation i.e., approximately 2% higher.
FIGURE 22. MAGNIFIED VIEW OF LEVELS (0-13) FOR NLC STRATEGY.
FIGURE 23. SPECTRAL ANALYSIS OF NLC STRATEGY.
Table 4 gives the assessment of experimental and simulated
values of NLC and NVC strategies with the load variation R
and RL for Low-Power model. Figure 24 shows a graphical
similarity view of spectral analysis for NLC and NVC
modulations for hardware results.
FIGURE 24. COMPARISON OF SPECTRAL ANALYSIS BETWEEN NVC & NLC
STRATEGIES.
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TABLE 4. COMPARISON BETWEEN EXPERIMENTAL AND SIMULATED VALUES
OF THD FOR NVC AND NLC STRATEGIES.
Simulation Experimental
NVC NLC NVC NLC
(V-THD (%)) (V-THD (%)) (V-THD (%)) (V-THD (%))
R RL R RL R RL R RL
load load load load load load load load
6.55 6.55 3.02 3.02 10.45 10.40 5.26 5.51
In the observation of practical implementation point of
indications, Level based and Vector oriented strategies are
having their individual preference in the dissimilar application
areas. Uncontrolled operation doesn’t having such type of
contest among NLC and NVC modulations, but in controlled
applications, major methodologies are worked on sample based
or vectors for the optimal control. Finally vector oriented
modulation like Nearest Vector Control is having more
desirability in the controlled operations. However Nearest
Vector Control modulated 27-level output voltage wave having
less performance with the indication of THD measured by the
simulation design and experimental model than NLC.
The Prototype results exhibit the compatibility of NLC and
NVC strategies to implement for Asymmetrical 3-Cell
Multilevel Inverter in real time applications. The variations of
performance parameter (THD) values for both NVC and NLC
strategies from simulation to experimentation are deviated
about 3.9% and 2.24% respectively. By the piecewise result
analysis, up to 11th harmonic the disturbances are high in
NVC, after that NLC has more disturbances than NVC. The
NVC modulation technique is based on Space Vector Strategy
with more impact in closed loop and real-time applications but
comparatively slightly more distortions in output side. The
NLC modulation technique is based on Level of Reference
(amplitude); it has very low distortions in output side, but has
need for real-time implementation for the different applications
of closed loop operation. With the reference of IEEE Std
519™-2014, it allowable limit for the VTHD is 8% and these two
modulation strategies are very near to the standards. NVC is
few % of higher value than the standard but the NLC is very
lesser value than the standards.
VI. CONCLUSION
The assessment of the NVC and NLC modulation based
ASCHB MLI with simulation and hardware results and also
discussion from the final results, it is concluded that both NVC
and NLC modulations are good at their own areas of operation.
That concludes NVC has better influence in closed loop
operations of different applications, and NLC has high
performance in all aspects but it will be applicable for open
loop and few areas of closed loop operations. In comparative
analysis it observed that NLC having higher performance than
NVC.
ACKNOWLEDGEMENT
The authors gratefully acknowledge the support
provided by Jawaharlal Nehru Technological University
Kakinada, Andhra Pradesh, TEQIP Centrally Sponsored
Scheme through Ministry (HRD) of Govt. of India and Shri
Vishnu Engineering College for Women, Bhimavaram.
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