BL15721A

Meter-Bus Transceiver
Features

Meter-Bus Transceiver (for Slave) Meets Standard EN-1434-3

Adjustable Constant-Current Sink via Resister

Receiver Logic With Dynamic Level Recognition

Module Supply Voltage Switch

3.3V Constant Voltage Source

Remote Powering

Polarity Independent

Power Fail Function

Up to 9600 Baud in Half Duplex for UART Protocol

Slave Power Support
– Supply From Meter-Bus via Output VDD
– Supply From Meter-Bus via Output VDD or From Backup Battery
– Supply From Battery – Meter-Bus Active for Data Transmission Only

SOP16 package

General Description

BL15721A is a single chip transceiver developed for Meter-Bus standard (EN1434-3)

applications.
The BL15721A interface circuit adjusts the different potentials between a slave system
and the Meter-Bus master. The connection to the bus is polarity independent and supports
full galvanic slave isolation with optocouplers.
The receiver has dynamic level recognition, and the transmitter has a programmable
current sink.
The circuit is supplied by the master via the bus. Therefore, this circuit offers no additional
load for the slave battery.
The BL15721A integrates a power-fail function. And a 3.3V voltage regulator, with power
reserve for a delayed switch off at bus fault, is integrated.

Order Information

Part Number Package Packing

Tape & Reel

BL15721A SOP16
Tube

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Pin Diagram Block Diagram

Pin Description

Pin # Name Description

1 BUSL2 Meter-Bus
2 VB Differential bus voltage after rectifier
3 STC Support capacitor
4 RIDD Current adjustment input
5 RF Power fail output
6 SC Sampling capacitor
7 TXI Data output inverted
8 TX Data output
9 BAT Logic level adjust
10 VS Switch for bus or battery supply output
11 VDD Voltage regulator output
12 RX Data input
13 RXI Data input inverted
14 RIS Adjust input for modulation current
15 GND Ground
16 BUSKL1 Meter-Bus

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，Master to Slave
Data Transmission，
The mark level on the bus lines VBUS = MARK is defined by the difference of BUSL1 and
BUSL2 at the slave. It is dependent on the distance of Master to Slave, which affects the
voltage drop on the wire. To make the receiver independent, a dynamic reference level on
the SC pin is used for the voltage comparator TC3 (see Figure 1).

Figure 1. Data Transmission, Master to Slave

A capacitor CSC at pin SC is charged by a current ISCcharge and is discharged with a current
ISCdischarge where:

There must be sufficient time to recharge the capacitor CSC. The input level detector TC3
detects voltage modulations from the master, and switches the inverted output TXI and
the non-inverted output TX.

Data Transmission, Slave to Master

The device uses current modulation to transmit information from the slave to the master
while the bus voltage remains constant. The current source CS3 modulates the bus
current and the master detects the modulation. The constant current source CS3 is
controlled by the inverted input RXI or the non-inverted input RX. The current source CS3
can be programmed by an external resistor RRIS. The modulation supply current IMS flows
in addition to the current source CS3 during the modulation time.
Because the BL15721A is configured for half-duplex only, the current modulation from RX
or RXI is repeated concurrently as ECHO on the outputs TX and TXI. If the slave, as well
as the master, is trying to send information via the lines, the added signals appear on the
outputs TX and TXI, which indicates the data collision to the slave.
The bus topology requires a constant current consumption by each connected slave.

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 BL15721A

Figure 2. Data Transmission, Slave to Master

To calculate the value of the programming resistor RRIS, use the formula shown in Figure
3.

Figure 3. Calculate Programming Resistor RRIS

Slave Supply, 3.3 V

The BL15721A has an internal 3.3V voltage regulator. The output power of this voltage
regulator is supplied by the storage capacitor CSTC at pin STC. The storage capacitor CSTC
at pin STC is charged with constant current ISTC_use from the current source CS1. The
maximum capacitor voltage is limited to REF1. The charge current ISTC has to be defined
by an external resistor at pin RIDD. The adjustment resistor RRIDD can be calculated using
below Equation.

Where,
ISTC = current from current source CS1
ISTC_use = charge current for support capacitor
ICI = internal current
VRIDD = voltage on pin RIDD
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 BL15721A
RRIDD = value of adjustment resistor
The voltage level of the storage capacitor CSTC is monitored with comparator TC1. Once
the voltage VSTC reaches VVDD_on, the switch SVDD connects the stabilized voltage VVDD to
pin VDD. VDD is turned off if the voltage VSTC drops below the VVDD_off level.
Voltage variations on the capacitor CSTC create bus current changes (see Figure 4).

Figure 4. Single Mode Bus Load

At a bus fault the shut down time of VDD (toff) in which data storage can be performed
depends on the system current IVDD and the value of capacitor CSTC. See Figure 5, which
shows a correlation between the shutdown of the bus voltage VBUS and VDD_off and toff for
dimensioning the capacitor.
The output VS is meant for slave systems that are driven by the bus energy, as well as
from a battery should the bus line voltage fail. The switching of VS is synchronized with
VDD and is controlled by the comparator TC1. An external transistor at the output VS
allows switching from the Meter-Bus remote supply to battery.

Power On/Off

Figure 5. Power On/Off Timing

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 BL15721A
Power Fail Function
Because of the rectifier bridge BR at the input, BUSL1, and BUSL2, the BL15721A is
polarity independent. The pin VB to ground (GND) delivers the bus voltage VVB less the
voltage drop over the rectifier BR. The voltage comparator TC2 monitors the bus voltage.
If the voltage VVB > VSTC + 0.8 V, then the output PF = 1. The output level PF = 0 (power
fail) provides a warning of a critical voltage drop to the microcontroller to save the data
immediately.

Absolute Maximum Ratings

Over operating free-air temperature range(unless otherwise noted)
VMB Voltage, BUSL1 to BUSL2 ±50V
VI Input voltage range RX and RXI –0.3 V to 5.5 V
BAT –0.3 V to 5.5 V
TA Operating free-air temperature range –25°C to 85°C
TSTG Storage temperature range –65°C to 150°C

Recommended Operating Conditions (note1)

Min Max Unit
Receiver 10.8 42
VMB Bus voltage, |BUSL2-BUSL1| V
Transmitter 12 42
VB(receive
9.3
VI Input voltage mode) V
BAT(note2) 2.5 3.8
RRIDD RIDD resistor 13 80 KΩ
RRIS RIS resistor 100 Ω
TA Operating free-air temperature -25 85 ℃
Note1: All voltage values are measured with respect to the GND terminal unless otherwise
noted.
Note2: VBAT(max) ≤ VSTC – 1 V

Electrical Characteristics(note1)
over operating free-air temperature range (unless otherwise noted)
Spec
Symbol Parameter Conditions Unit
Min. Typ. Max.
∆VBR Voltage drop at rectifier BR IBUS = 3 mA 1.03 1.5 V
Voltage drop at current
∆VCS1 RRIDD = 13 kΩ 0.95 1.8 V
source CS1
VSTC=6.5V, RRIDD = 13 kΩ 2.84 3.3
IBUS BUS current mA
IMC=0mA RRIDD = 30 kΩ 1.34 1.8
∆VBUS = 10V, IMC = 0 mA, RRIDD =
∆IBUS BUS current accuracy 2 %
13 kΩ to 30 kΩ
VSTC = 6.5 V, IMC = 0 mA, VBAT =
ICC Supply current 480 650 µA
3.8 V, RRIDD = 13 kΩ(note2)

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 BL15721A
VSTC = 6.5 V, IMC = 0 mA, VBAT =
ICL1 CI1 current 3.8 V, RRIDD = 13 kΩ, VBUS = 6.5 350 µA
V, RX/RXI = off (note2)
IBAT BAT current -0.5 0.5 µA
IBAT + IVDD BAT plus VDD current VBUS = 0 V, VSTC = 0 V -0.5 0.5 µA
VVDD VDD voltage –IVDD = 1 mA, VSTC = 6.5 V 3.1 3.25 3.5 V
RVDD VDD resistance –IVDD = 2 to 8 mA, VSTC = 4.5 V 2 5 Ω
VDD = on, VS = on 5.6 6.16 6.4
VSTC STC voltage VDD = off, VS = off 3.4 4.0 4.3 V
IVDD < ISTC_use 6.5 7.18 7.7
RRIDD=30 kΩ 0.65 1.2
ISTC_use STC current VSTC = 5 V mA
RRIDD=13 kΩ 1.85 2.5
VRIDD RIDD voltage RRIDD = 30 kΩ 1.23 1.33 V
VVS VS voltage VDD = on, IVS = –5 µA VSTC-0.4 VSTC V
RVS VS resistance VDD = off 0.3 1 MΩ
VVB = VSTC +
VBAT-
1.2 V, IPF = VBAT
0.6
–100 µA
VVB = VSTC +
VPF PF voltage VSTC=6.5V 0.5 V, IPF = 1 0 0.6 V
µA
VVB = VSTC +
0.5 V, IPF = 5 0 0.9
µA
Note1: All voltage values are measured with respect to the GND terminal, unless otherwise noted.
Note2: Inputs RX/RXI and outputs TX/TXI are open, ICC = ICI1 + ICI2

Receiver Section Electrical Characteristics(note1)

over operating free-air temperature range (unless otherwise noted)
Symbol Parameter Conditions Min Typ Max Unit

VT MARK- MARK- V
0.82 5.7
VSC SC voltage VVB V
ISCcharge SC charge VSC = 24 V, VVB = 36 -15 -24.7 -40 µA
current V
ISCdischarge SC discharge VSC = VVB = 24 V 0.3 -0.033X µA
current ISCdischarge
VOH High-level ITX/ITXI = –100 µA， VBAT- VBAT V
output voltage 0.6
(TX, TXI)
Low-level ITX/ITXI = 100 µA 0 0.47 0.6
VOL output V
voltage(TX, ITX = 1.1 mA 0 1.0 1.5

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 BL15721A
TXI)
ITX ITXI TX, TXI VTX = 7.5V, VVB = 12 0 0.8 10 µA
current V, VSTC = 6V, VBAT =
3.8 V
Note1: All voltage values are measured with respect to the GND terminal, unless
otherwise noted.

Transmitter Section Electrical Characteristics(note1)

Over operating free-air temperature range(unless otherwise noted)
Symbol Parameter Conditions Min Typ Max Unit

IMC MC voltage RRIS=100Ω 11.5 19.5 mA

VRIS RIS voltage RRIS=100Ω 1.4 1.7 V
RRIS=1000Ω 1.5 1.8
VIH High-level input See Figure 2(note2) VBAT- 5.5 V
voltage(RX,RXI) 0.8
VIL Low-level input See Figure 2 0 0.8 V
voltage(RX,RXI)
IRX RX current VRX = VBAT = 3V, VVB = VSTC -0.5 0.5 µA
= 0V
VRX = 0V, VBAT = 3V, VSTC = -10 -40
6.5 V
IRXI RXI current VRXI = VBAT = 3V, VVB = 10 40 µA
VSTC = 0V
VRXI = VBAT = 3 V, VSTC = 10 40
6.5 V
Note1: All voltage values are measured with respect to the GND terminal, unless
otherwise noted.
Note 2：VIH(max) = 5.5 V is valid only when VSTC > = 6.5 V.

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 BL15721A
Application Information

Figure 6. Basic Application Circuit Using Support Capacitor CSTC > 50 µF

Figure 7. Basic Application Circuit for Supply From Battery

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Figure 8. Basic Applications for Different Supply Modes

Figure 9. Basic Optocoupler Application

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 BL15721A
（SOP-16）
Outline Dimension（ ）

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