Compal La-A061p r1.0 Schematics

A B C D E
1 1
Compal Confidential
2
C560 LA-A061P Schematics Document 2
INTEL Haswell CPU with DDRIII + PCH Lynx-Point

AIO M/B
September 24, 2013

3 3
REV:1.0
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2013/04/01 Deciphered Date 2014/04/01 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ZEA00 LA-A061P M/B
Date: Tuesday, September 24, 2013 Sheet 1 of 59
A B C D E
A B C D E
LVDS Converter Intel CPU Memory BUS(DDRIII) 204pin DDR3/L-SO-DIMM X2

LVDS DP
LVDS Conn. Dual Channel
RTD2136R Haswell
PCI-Expressx8
Desktop 1.5V DDR3 1333/1600 MHz
HDMI LGA1150
1 1
FDI DMI
DIS Only
SATA port 0
3.5" SATA HDD Conn.
DDR3 VRAMx4pcs
1GB/2GB VGA Chip
SATA port 1
N14M-GE2-B-AIO SATA ODD Conn.
GeForce 705M,29x29mm USB 3.0 X2 USB3.0 conn.
USB 2.0 X2
USB Charger_TPS2546
USB3.0 conn.
PCIE or SATA
(By BOM Control)
2
USB2.0 PCIE Mini Card conn. 2
TV Card or m-SATA SSD BCAS Card conn.
Intel PCH PCIE

HDMI OUT conn. USB2.0 PCIe Mini Card conn.
LynxPoint WLAN
LAN_RTL8111G PCIE H81
RJ45 conn. PCIE Card Reader conn.
10/100/1G Card reader IC_RTS5229
(SD/SDHC/SDXC/MMC/MS/MS-Pro) 6 in 1
USB2.0 USB2.0 USB 2.0

conn. conn. Touch conn.
USB 2.0 X 4
USB2.0 USB2.0 USB 2.0

3
conn. conn. Camera+MIC 3
VGA Conn. VGA D-Mic/A-Mic

HD Audio Audio Codec
(Reserve) ALC272-VA4 MIC Jack
HPOUT
LINEOUT
EC LPC BUS
FCBGA-708
ENE KB9012 23mm x 22mm
IR(Reserve) SPK AMP
ALC109
SPI
SPI ROM
4
(8MBx1) 3W SPK *2
4
HP Jack
Conn
Block Diagram
Custom 0.3
ZEA00 LA-A061P M/B
A B C D E
5 4 3 2 1
PU13
+VGA_CORE
ISL62881C +CPU_CORE
+GFX_CORE Intel Sandy Bridge

+CPU_CORE
PU9,10,11,12
+CPU_B+ +1.8VS
Bead +GFX_CORE
NCP5911MNTBG
D
1.5V CPU D
PU4
+VCCSAP +VCCSA +VCCSA
APL5610CI JUMP
PU5 +1.05VS_VCCIOP +1.05VS_VCCIO +1.05VS_VCCIO
JUMP
TPS51212DSCR
JUMP
+1.05VS_VPCH
+5VALWP +5VALW +5VALW Q61 +5VS

JUMP
AP4800BGM
JDCIN1 RT8243_B+ PU2
B+ Beat +3VALWP +3VALW PU3 +1.8VSP
RT8243BZQW JUMP
APL5930KAI
+3VALW JUMP
JUMP
+1.8VS
PU6 +1.5VP +1.5V

JUMP
C RT8207MZQW C
+1.5V
Q60 +12VS
FAN1
+0.75VSP AP4800BGM U69
AO4304L
+3VS
+1.5VS_VGA
PU7
JUMP +1.5V
TPS54331DR
+1.5V DDR3 SODIMM X 2
+0.75VS +0.75VS
+12VSP +3VS
MOS
JUMP
+1.5VS
+1.8VS
Intel Shark bay
+12VS +12VS +1.05VS_VPCH
B+
+3VALW_PCH +3VALW_PCH
LCD
+3VS PCH H81
Converter
+3VS +RTCVCC RTC
Battery
+5VS +5VS
AMP X 2
B B
+1.05VS_VGA
ALC109 +5VALW
VRAM X 8
+3VALW +1.5VS_VGA
MOS
+5VALW MOS
N14M-GE2 Media card
+1.05VS_VGA controller
+USB_VCCA
U46 U33 U34 +VGA_CORE
USB3.0 X 2 U11 VGA RTS5229
Conn APL3510BKI RT9701 +3VS +3VS_VGA
MOS
+3VS
U3 +5VALW
MOS
APL5930KAI
+3VS +3VS
+USB_VCCA
+USB_VCCB
+3VALW
MOS MOS
1.5VS
+5VALW
+3VALW
+5VALW
+3VALW
+3V_LAN
+3VS
+3VS
+3VS
+5VS
+12VS
+3V_SCA +3VALW_MINI 1.5VS +3V +1.05V +3VALW +LCDVDD +12VS +5VS +5VS +5VS +3VS +3VS
Power/B Scaler Mini Card Mini Card

EC Audio codec
A LVDS CONN SATA HDD SATA ODD
CAM A
RTD2136R KB9012 ALC272
Conn WLAN (TV) +Digital Mic

Power Tree
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
0.3
ZEA00 LA-A061P M/B
5 4 3 2 1
A B C D E
SIGNAL *1 *2 USB Port Table BOM Structure Table

STATE SLP_S3# SLP_S4# SLP_S5# +VALW +VS +1.5V +0.75VS +RTCVCC
S0(Full ON) HIGH HIGH HIGH ON ON ON ON ON

USB 2.0 USB 1.1 Port Device BTO Item BOM Structure
ME components CONN@
S1(Power On Suspend) HIGH HIGH HIGH ON ON ON ON ON
0 Co-lay w/USB30 PORT0
UHCI0 UMA Only UMA@
1 Co-lay w/USB30 PORT1(Debug)
S3(Suspend to RAM) LOW HIGH HIGH ON OFF ON OFF ON
DISCRETE Only DIS@
2 Rear IO USB20 Conn
EHCI1 EMI Pop components EMI@
1
S4(Suspend to Disk) LOW LOW HIGH ON OFF OFF OFF ON
3 Rear IO USB20 Conn 1
ESD Pop components ESD@
4 WLAN
S5(Soft OFF) LOW LOW LOW ON OFF OFF OFF ON
RMH1 UHCI2 EMI Unpop components @EMI@
5 Touch
Note:
ESD Unpop components @ESD@
6 Disabled on H81
*1:+VALW power reail include +3VALW,+5VALW,B+,+VSB,+3VALW_PCH
UHCI3 HDMI OUT HDMIO@
7 Disabled on H81
*2:+VS power reail include +3VS,+5VS,+12VS,+1.05VS_VPCH,+1.5VS_VGA,+VGA_CORE,+CPU_CORE 8 TV TV@
Rear IO USB20 Conn
UHCI4 SSD SSD@
9 Rear IO USB20 Conn(Debug)
CRT CRT@(EVTonly)
10 TV
UHCI5 Unpop @
RMH2 11 Camera
VRAM select X76@
12 Disabled on H81
UHCI6 EVT for Reserve EVT@
13 Disabled on H81 components
PCB PCB@
SATA Port Table PCIE Port Table GPIO68_H@
GPIO68_L@
Port Device Port Device
SKU IO Select GPIO69_H@
2 0 HDD 1 LAN GPIO69_L@ 2
6G
1 m-SATA 2 Card Reader GPIO70_H@
2 Disabled on H81 3 WLAN GPIO70_L@
3 Disabled on H81 4 TV Touch TOUCH@
3G
4 ODD 5 NC Non Charger NCHG@
5 NC 6 NC Charger CHG@
7 Disabled on H81
BOARD ID Table 8 Disabled on H81
Board PCB
ID Revision
PCH SM Bus Address EC SM Bus1 Address 0 0.1
3 0.2
4 0.3
Power Device HEX Address Power Device HEX Address
5
ALC106 48H 0100_100xb
+3VS DDR(JDDRL2) 1010 000X b
+3VS DDR(JDDRH1) 1010 010X b SKU ID(Project) Table
3 Project Project Project 3
_ID2 _ID1 _ID0

(GPIO68) (GPIO69) (GPIO70)
SKU
UMA EMI@ ESD@ GPIO68_L@ GPIO69_L@ GPIO70_L@ PCB@
0 0 0 4519QH38L04 TV@ NLDO@ 8111G@ CHG@
UMA_W/HDMI HDMIO@ EMI@ ESD@ GPIO68_L@ GPIO69_L@ GPIO70_H@ PCB@
PCH SML1 Bus Address 0 0 1 4519QH38L05 NLDO@ 8111G@ NCHG@ TOUCH@
DIS-MIC1G DIS@ EMI@ ESD@ GPIO68_L@ GPIO69_H@ GPIO70_L@ PCB@
0 1 0 4519QH38L06 NLDO@ 8111G@ TOUCH@
Power Device HEX Address DIS-SAM1G_W/HDMI DIS@ HDMIO@ EMI@ ESD@ GPIO68_L@ GPIO69_H@ GPIO70_H@ PCB@
0 1 1 4519QH38L07 TV@ NLDO@ 8111G@ NCHG@
VGA Ext. thermal sensor DIS-MIC2G_W/HDMI DIS@ EMI@ ESD@ GPIO68_H@ GPIO69_L@ GPIO70_L@ PCB@
1 0 0 4519QH38L08 NLDO@ 8111G@ NCHG@ TOUCH@
VGA Int. thermal sensor 0x9b
DIS-MIC2G_W/HDMI DIS@ HDMIO@ EMI@ ESD@ GPIO68_H@ GPIO69_L@ GPIO70_L@ PCB@
(default) 1 0 1 4519QH38L09 TV@ NLDO@ 8111G@ NCHG@ TOUCH@
1 1 0
1 1 1
4 4

Notes List
Custom 0.3
ZEA00 LA-A061P M/B
A B C D E
5 4 3 2 1
PU/PD for JTAG signals

1 2 CPU_PLTRST#
@ESD@ C124 0.1U_0402_16V4Z v0.2 update
1 2 XDP_DBRESET#_R Trace width=12mil, spacing 20mil, max L=500mil ESD request Close to JCPU1
@ESD@ C2112 0.1U_0402_16V4Z
1 2 H_PECI XDP_TMS T156 PAD
@ESD@ C2 5P_0402_50V R4 100_0402_1% XDP_TDI T157 PAD
1 2 H_PROCHOT#_R JCPU1B R3 75_0402_1% XDP_PREQ# T158 PAD
@ESD@ C3 0.1U_0402_16V4Z R6 100_0402_1%
1 2 H_PM_SYNC PAD T1 TP_SKTOCC# D38 R1 SM_RCOMP01 2
@ESD@ C4 0.1U_0402_16V4Z SKTOCC# SM_RCOMP0 P1 SM_RCOMP11 2
MISC SM_RCOMP1 +1.05VS_VCCIO
R2 SM_RCOMP21 2
ESD request Close to CPU as possible SM_RCOMP2
R9 DDR3 RP19
51_0402_5% AK22 SM_DRAMRST#_R 1 2 XDP_TDO 1 8
1 2 M36 SM_DRAMRST# SM_DRAMRST# [10,11] 2 7
+1.05VS_VCCIO PAD T2 H_CATERR# XDP_TCK
D CATERR# @ R8 0_0402_5% D
PECI 10mil spacing and H_PECI N37 THERMAL 1 2 XDP_TRST# 3 6
[17,43] H_PECI
1 2 H_PROCHOT#_R K38 PECI v1.0 update 4 5
Max Length < 15" [43] H_PROCHOT# PROCHOT#
1 2 H_THERMTRIP#_R F37 L39 XDP_PRDY# PAD @ C5 0.1U_0402_16V4Z
[17] H_THERMTRIP# THERMTRIP# PRDY# T9
@ R11 0_0402_5% L37 XDP_PREQ# 51_8P4R_5%
@ R12 0_0402_5% PREQ# D39 XDP_TCK
R11 follow CDB R42PR add TCK E39 XDP_TMS
0ohm serial resistor TMS E37 XDP_TRST#
H_PM_SYNC P36 TRST# F38 XDP_TDI
[14] H_PM_SYNC PM_SYNC PWR TDI
R12 follow CDB R34PR add H_PW RGOOD 1 2 H_PW RGOOD_R AB35 F39 XDP_TDO
[17] H_PW RGOOD PWRGOOD TDO
@ R14 0_0402_5% PM_DRAM_PW RGD_R AK21 G40 XDP_DBRESET#_R T159 PAD
0ohm serial resistor CPU_PLTRST# M39 SM_DRAMPWROK
JTAG DBR#
[17] CPU_PLTRST# RESET# G39 XDP_OBS0
BPM#0 T10 PAD
J39 XDP_OBS1
BPM#1 T11 PAD
G38 BPM2# XDP_DBRESET#_R 1 2
BPM#2 T3 PAD
CLK_DPNS_DN W6 CLK H37 BPM3#
[13] CLK_DPNS_DN DPLL_REF_CLKN BPM#3 T4 PAD
CLK_DPNS_DP W5 H38 BPM4# @ESD@ C2142 0.1U_0402_16V4Z
[13] CLK_DPNS_DP DPLL_REF_CLKP BPM#4 T5 PAD
CLK_DP_DN U5 J38 BPM5#
[13] CLK_DP_DN SSC_DPLL_REF_CLKN BPM#5 T6 PAD
CLK_DP_DP U6 K39 BPM6# ESD request Close to JCPU1 G40
[13] CLK_DP_DP SSC_DPLL_REF_CLKP BPM#6 T7 PAD
CLK_CPU_DMI# V4 K37 BPM7#
[13] CLK_CPU_DMI# BCLKN BPM#7 T8 PAD
10K_0402_5% 1 2 R16 H_PW RGOOD 100 MHz CLK_CPU_DMI V5
[13] CLK_CPU_DMI BCLKP
0.1U_0402_16V4Z 1 2 C6
FOX_3H993827-4M41-01H_HASW ELL +VCCIOA
Place C6 close to CPU pin J40 as
JCPU1I R17 DP_RCOMP trace width=20mil
close as possible. No stub 24.9_0402_1%
F17 R4 DP_RCOMP 2 1 spacing 25mil length<200mil
[30] PCH_HDMIOUT_TX2- E17 DDIB_TXBN0 DP_RCOMP
[30] PCH_HDMIOUT_TX2+ G18 DDIB_TXBP0 B14 FDI_CTX_PRX_N0
HDMI OUT [30]
[30]
PCH_HDMIOUT_TX1-
PCH_HDMIOUT_TX1+
F18 DDIB_TXBN1
DDIB_TXBP1
FDI0_TX0N0
FDI0_TX0P0
A14 FDI_CTX_PRX_P0
FDI_CTX_PRX_N0
FDI_CTX_PRX_P0
[14]
[14]
C
+1.05VS_VPCH
1
@ R18
2 H_THERMTRIP#
1K_0402_1% (To Conn.) [30] PCH_HDMIOUT_TX0-
H19
G19 DDIB_TXBN2
eDP FDI0_TX0N1
C13
B13
FDI_CTX_PRX_N1
FDI_CTX_PRX_P1
FDI_CTX_PRX_N1 [14] FDI For VGA C
[30] PCH_HDMIOUT_TX0+ G20 DDIB_TXBP2 FDI0_TX0P1 FDI_CTX_PRX_P1 [14]

For BDW new CPU [30] PCH_HDMIOUT_CLK- F20 DDIB_TXBN3 E16 EDP_DISP_UTIL
1 2 [30] PCH_HDMIOUT_CLK+ DDIB_TXBP3 EDP_DISP_UTIL EDP_DISP_UTIL [29] eDP brightness
@ESD@ C44 0.1U_0402_16V4Z
E19 C15 CPU_EDP_TXN0 C7 1 2 0.1U_0402_16V4Z

T13 PAD DDIC_TXCN0 DDID_TXDN0 CPU_EDP_TXN0_C [29]
D19 B15 CPU_EDP_TXP0 C8 1 2 0.1U_0402_16V4Z
@ESD@ C2143 0.1U_0402_16V4Z
T14
T15
PAD
PAD
D20 DDIC_TXCP0
DDIC_TXCN1
DDID_TXDP0
DDID_TXDN1
B16 CPU_EDP_TXN1 C9 1 2 0.1U_0402_16V4Z
CPU_EDP_TXP0_C
CPU_EDP_TXN1_C
[29]
[29]
eDP
1 2 H_PW RGOOD_R C20 DDI A16 CPU_EDP_TXP1 C10 1 2 0.1U_0402_16V4Z
T16
T17
PAD
PAD
E21 DDIC_TXCP1
DDIC_TXCN2
DDID_TXDP1
DDID_TXDN2
C17 CPU_EDP_TXN2
T18 PAD
CPU_EDP_TXP1_C [29] (To LVDS Converter)
D21 B17 CPU_EDP_TXP2
T19 PAD DDIC_TXCP2 DDID_TXDP2 T20 PAD
v0.2 update D22 B18 CPU_EDP_TXN3
T21 PAD DDIC_TXCN3 DDID_TXDN3 T22 PAD
C22 A18 CPU_EDP_TXP3
T23 PAD DDIC_TXCP3 DDID_TXDP3 T24 PAD
FOX_3H993827-4M41-01H_HASW ELL
B B
+1.5V
1
v0.2 update
R19
1.8K_0402_5%
2
A A
1 2PM_DRAM_PW RGD_R
[14] DRAMPW ROK
@ R20
1
0_0402_5% 1
R21 C11
3.3K_0402_5% 1000P_0402_50V7K
2
@ Security Classification Compal Secret Data Compal Electronics, Inc.
2

PDG P132 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Haswell_JTAG/XDP/DDI
HSW A0+LPT A0 change R21 to 4.7K, R19 to 3.3K AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
ZEA00 LA-A061P M/B 0.3
5 4 3 2 1
5 4 3 2 1
PCIE_GTX_C_CRX_N[0..15]
PCIE_GTX_C_CRX_N[0..15] [21]
PCIE_GTX_C_CRX_P[0..15]
PCIE_GTX_C_CRX_P[0..15] [21]
PCIE_CTX_C_GRX_N[0..15]
PCIE_CTX_C_GRX_N[0..15] [21]
PCIE_CTX_C_GRX_P[0..15]
+VCCIOA PCIE_CTX_C_GRX_P[0..15] [21]
D D
PEG_RCOMP trace width=12mil
1
spacing 15mil length<400mil R22
24.9_0402_1%
JCPU1A
2
DMI_PTX_CRX_N0 T3 P3 PEG_RCOMP
[14] DMI_PTX_CRX_N0 DMI_RXN0 PEG_RCOMP
DMI_PTX_CRX_N1 V1 F15 PCIE_GTX_C_CRX_N15
[14] DMI_PTX_CRX_N1 DMI_RXN1 PEG_RXN0
DMI_PTX_CRX_N2 V2 E14 PCIE_GTX_C_CRX_N14
[14] DMI_PTX_CRX_N2 DMI_RXN2 PEG_RXN1
DMI_PTX_CRX_N3 W3 F13 PCIE_GTX_C_CRX_N13
[14] DMI_PTX_CRX_N3 DMI_RXN3 PEG_RXN2 E12 PCIE_GTX_C_CRX_N12
DMI_PTX_CRX_P0 U3 PEG_RXN3 F11 PCIE_GTX_C_CRX_N11
Reserve for x16 GPU
[14] DMI_PTX_CRX_P0 DMI_RXP0 PEG_RXN4
DMI_PTX_CRX_P1 U1 G10 PCIE_GTX_C_CRX_N10
DMI_PTX_CRX_P2 W2 F9 PCIE_GTX_C_CRX_N9
DMI
PEG
DMI_PTX_CRX_P3 Y3 G8 PCIE_GTX_C_CRX_N8
[14] DMI_PTX_CRX_P3 DMI_RXP3 PEG_RXN7 D4 PCIE_GTX_C_CRX_N7
DMI_CTX_PRX_N0 AA5 PEG_RXN8 E5 PCIE_GTX_C_CRX_N6
[14] DMI_CTX_PRX_N0 DMI_TXN0 PEG_RXN9
DMI_CTX_PRX_N1 AB4 F6 PCIE_GTX_C_CRX_N5
DMI_CTX_PRX_N2 AC4 G5 PCIE_GTX_C_CRX_N4
DMI_CTX_PRX_N3 AC2 H6 PCIE_GTX_C_CRX_N3
[14] DMI_CTX_PRX_N3 DMI_TXN3 PEG_RXN12 J5 PCIE_GTX_C_CRX_N2
DMI_CTX_PRX_P0 AA4 PEG_RXN13 K6 PCIE_GTX_C_CRX_N1
[14] DMI_CTX_PRX_P0 DMI_TXP0 PEG_RXN14
DMI_CTX_PRX_P1 AB3 L5 PCIE_GTX_C_CRX_N0
[14] DMI_CTX_PRX_P1 DMI_TXP1 PEG_RXN15
DMI_CTX_PRX_P2 AC5 E15 PCIE_GTX_C_CRX_P15
[14] DMI_CTX_PRX_P2 DMI_TXP2 PEG_RXP0
DMI_CTX_PRX_P3 AC1 D14 PCIE_GTX_C_CRX_P14
[14] DMI_CTX_PRX_P3 DMI_TXP3 PEG_RXP1 E13 PCIE_GTX_C_CRX_P13
PEG_RXP2 D12 PCIE_GTX_C_CRX_P12
PEG_RXP3 E11 PCIE_GTX_C_CRX_P11
Reserve for x16 GPU
FDI_CSYNC D16 PEG_RXP4 F10 PCIE_GTX_C_CRX_P10
[14] FDI_CSYNC
FDI
C FDI_INT D18 FDI_CSYNC PEG_RXP5 E9 PCIE_GTX_C_CRX_P9 C
[14] FDI_INT DISP_INT PEG_RXP6 F8 PCIE_GTX_C_CRX_P8
PEG_RXP7 D3 PCIE_GTX_C_CRX_P7
PEG_RXP8 E4 PCIE_GTX_C_CRX_P6
PEG_RXP9 F5 PCIE_GTX_C_CRX_P5
PEG_RXP10 G4 PCIE_GTX_C_CRX_P4
PEG_RXP11 H5 PCIE_GTX_C_CRX_P3
PEG_RXP12 J4 PCIE_GTX_C_CRX_P2
PEG_RXP13 K5 PCIE_GTX_C_CRX_P1
PEG_RXP14 L4 PCIE_GTX_C_CRX_P0
PEG_RXP15 B12 PCIE_CTX_GRX_N15 C2080 1 2 @ 0.22U_0402_16V7K PCIE_CTX_C_GRX_N15
PEG_TXN0 C11 PCIE_CTX_GRX_N14 C2081 1 2 @ 0.22U_0402_16V7K PCIE_CTX_C_GRX_N14
PEG_TXN1 D10 PCIE_CTX_GRX_N13 C2082 1 2 @ 0.22U_0402_16V7K PCIE_CTX_C_GRX_N13
PEG_TXN3 D8 PCIE_CTX_GRX_N11 C2084 1 2 @ 0.22U_0402_16V7K PCIE_CTX_C_GRX_N11
Reserve for x16 GPU
PEG_TXN5 B6 PCIE_CTX_GRX_N9 C2086 1 2 @ 0.22U_0402_16V7K PCIE_CTX_C_GRX_N9
PEG_TXN7 E2 PCIE_CTX_GRX_N7 C12 1 2 DIS@ 0.22U_0402_16V7K PCIE_CTX_C_GRX_N7
PEG_TXN8 F3 PCIE_CTX_GRX_N6 C13 1 2 DIS@ 0.22U_0402_16V7K PCIE_CTX_C_GRX_N6
PEG_TXN9 G2 PCIE_CTX_GRX_N5 C14 1 2 DIS@ 0.22U_0402_16V7K PCIE_CTX_C_GRX_N5
PEG_TXN10 H3 PCIE_CTX_GRX_N4 C15 1 2 DIS@ 0.22U_0402_16V7K PCIE_CTX_C_GRX_N4
PEG_TXN11 J2 PCIE_CTX_GRX_N3 C16 1 2 DIS@ 0.22U_0402_16V7K PCIE_CTX_C_GRX_N3
PEG_TXN12 K3 PCIE_CTX_GRX_N2 C17 1 2 DIS@ 0.22U_0402_16V7K PCIE_CTX_C_GRX_N2
PEG_TXN13 M3 PCIE_CTX_GRX_N1 C18 1 2 DIS@ 0.22U_0402_16V7K PCIE_CTX_C_GRX_N1
PEG_TXN14 L2 PCIE_CTX_GRX_N0 C19 1 2 DIS@ 0.22U_0402_16V7K PCIE_CTX_C_GRX_N0
PEG_TXN15 A12 PCIE_CTX_GRX_P15 C2088 1 2 @ 0.22U_0402_16V7K PCIE_CTX_C_GRX_P15
PEG_TXP0 B11 PCIE_CTX_GRX_P14 C2089 1 2 @ 0.22U_0402_16V7K PCIE_CTX_C_GRX_P14
PEG_TXP1 C10 PCIE_CTX_GRX_P13 C2090 1 2 @ 0.22U_0402_16V7K PCIE_CTX_C_GRX_P13
PEG_TXP3 C8 PCIE_CTX_GRX_P11 C2092 1 2 @ 0.22U_0402_16V7K PCIE_CTX_C_GRX_P11
Reserve for x16 GPU
B PEG_TXP4 B7 PCIE_CTX_GRX_P10 C2093 1 2 @ 0.22U_0402_16V7K PCIE_CTX_C_GRX_P10 B
PEG_TXP5 A6 PCIE_CTX_GRX_P9 C2094 1 2 @ 0.22U_0402_16V7K PCIE_CTX_C_GRX_P9
PEG_TXP7 E1 PCIE_CTX_GRX_P7 C20 1 2 DIS@ 0.22U_0402_16V7K PCIE_CTX_C_GRX_P7
PEG_TXP8 F2 PCIE_CTX_GRX_P6 C21 1 2 DIS@ 0.22U_0402_16V7K PCIE_CTX_C_GRX_P6
PEG_TXP9 G1 PCIE_CTX_GRX_P5 C22 1 2 DIS@ 0.22U_0402_16V7K PCIE_CTX_C_GRX_P5
PEG_TXP10 H2 PCIE_CTX_GRX_P4 C23 1 2 DIS@ 0.22U_0402_16V7K PCIE_CTX_C_GRX_P4
PEG_TXP11 J1 PCIE_CTX_GRX_P3 C24 1 2 DIS@ 0.22U_0402_16V7K PCIE_CTX_C_GRX_P3
PEG_TXP12 K2 PCIE_CTX_GRX_P2 C25 1 2 DIS@ 0.22U_0402_16V7K PCIE_CTX_C_GRX_P2
PEG_TXP13 M2 PCIE_CTX_GRX_P1 C26 1 2 DIS@ 0.22U_0402_16V7K PCIE_CTX_C_GRX_P1
PEG_TXP14 L1 PCIE_CTX_GRX_P0 C27 1 2 DIS@ 0.22U_0402_16V7K PCIE_CTX_C_GRX_P0
PEG_TXP15
FOX_3H993827-4M41-01H_HASWELL
Typ- suggest 220nF. The change in AC capacitor

value from 100nF to 220nF is to enable
compatibility with future platforms having PCIE
Gen3 (8GT/s)
A A

Haswell_DMI/PEG/FDI
Custom 0.3
ZEA00 LA-A061P M/B
5 4 3 2 1
5 4 3 2 1
[11] DDR_B_D[0..63]
[10] DDR_A_D[0..63]
JCPU1C JCPU1D
DDR_A_D0 AD38 AY15 DDRA_CLK0 DDR_B_D0 AE34 AM20 DDRB_CLK0

AD39 SA_DQ0 SA_CK0 AY16 DDRA_CLK0 [10] AE35 SB_DQ0 SB_CK0 AM21 DDRB_CLK0 [11]
DDR_A_D1 DDRA_CLK0# DDR_B_D1 DDRB_CLK0#
AF38 SA_DQ1 SA_CKN0 AW15 DDRA_CLK0# [10] AG35 SB_DQ1 SB_CKN0 AP22 DDRB_CLK0# [11]
DDR_A_D2 DDRA_CLK1 DDR_B_D2 DDRB_CLK1
AF39 SA_DQ2 SA_CK1 AV15 DDRA_CLK1 [10] AH35 SB_DQ2 SB_CK1 AP21 DDRB_CLK1 [11]
DDR_A_D3 DDRA_CLK1# DDR_B_D3 DDRB_CLK1#
AD37 SA_DQ3 SA_CKN1 AV14 DDRA_CLK1# [10] AD34 SB_DQ3 SB_CKN1 AN20 DDRB_CLK1# [11]
DDR_A_D4 DDR_B_D4
DDR_A_D5 AD40 SA_DQ4 SA_CK2 AW14 DDR_B_D5 AD35 SB_DQ4 SB_CK2 AN21
DDR_A_D6 AF37 SA_DQ5 SA_CKN2 AW13 DDR_B_D6 AG34 SB_DQ5 SB_CKN2 AP19
DDR_A_D7 AF40 SA_DQ6 SA_CK3 AY13 DDR_B_D7 AH34 SB_DQ6 SB_CK3 AP20
D SA_DQ7 SA_CKN3 SB_DQ7 SB_CKN3 D
DDR_A_D8 AH40 DDR_B_D8 AL34
DDR_A_D9 AH39 SA_DQ8 AV22 DDRA_CKE0 DDR_B_D9 AL35 SB_DQ8 AW29 DDRB_CKE0
AK38 SA_DQ9 SA_CKE0 AT23 DDRA_CKE0 [10] AK31 SB_DQ9 SB_CKE0 AY29 DDRB_CKE0 [11]
DDR_A_D10 DDRA_CKE1 DDR_B_D10 DDRB_CKE1
AK39 SA_DQ10 SA_CKE1 AU22 DDRA_CKE1 [10] AL31 SB_DQ10 SB_CKE1 AU28 DDRB_CKE1 [11]
DDR_A_D11 DDR_B_D11
DDR_A_D12 AH37 SA_DQ11 SA_CKE2 AU23 DDR_B_D12 AK34 SB_DQ11 SB_CKE2 AU29
DDR_A_D13 AH38 SA_DQ12 SA_CKE3 DDR_B_D13 AK35 SB_DQ12 SB_CKE3
DDR_A_D14 AK37 SA_DQ13 AU14 DDRA_SCS0# DDR_B_D14 AK32 SB_DQ13 AP17 DDRB_SCS0#
AK40 SA_DQ14 SA_CS0# AV9 DDRA_SCS0# [10] AL32 SB_DQ14 SB_CS0# AN15 DDRB_SCS0# [11]
DDR_A_D15 DDRA_SCS1# DDR_B_D15 DDRB_SCS1#
AM40 SA_DQ15 SA_CS1# AU10 DDRA_SCS1# [10] AN34 SB_DQ15 SB_CS1# AN17 DDRB_SCS1# [11]
DDR_A_D16 DDR_B_D16
DDR_A_D17 AM39 SA_DQ16 SA_CS2# AW8 DDR_B_D17 AP34 SB_DQ16 SB_CS2# AL15
DDR_A_D18 AP38 SA_DQ17 SA_CS3# AW10 DDRA_ODT0 DDR_B_D18 AN31 SB_DQ17 SB_CS3# AM17 DDRB_ODT0
AP39 SA_DQ18 SA_ODT0 AY8 DDRA_ODT0 [10] AP31 SB_DQ18 SB_ODT0 AL16 DDRB_ODT0 [11]
DDR_A_D19 DDRA_ODT1 DDR_B_D19 DDRB_ODT1
AM37 SA_DQ19 SA_ODT1 AW9 DDRA_ODT1 [10] AN35 SB_DQ19 SB_ODT1 AM16 DDRB_ODT1 [11]
DDR_A_D20 DDR_B_D20
DDR_A_D21 AM38 SA_DQ20 SA_ODT2 AU8 DDR_B_D21 AP35 SB_DQ20 SB_ODT2 AK15
DDR_A_D22 AP37 SA_DQ21 SA_ODT3 AV12 DDR_A_BS0 DDR_B_D22 AN32 SB_DQ21 SB_ODT3 AK17 DDR_B_BS0
SA_DQ22 SA_BS0 DDR_A_BS0 [10] SB_DQ22 SB_BS0 DDR_B_BS0 [11]
DDR_A_D23 AP40 AY11 DDR_A_BS1 DDR_B_D23 AP32 AL18 DDR_B_BS1
DDR_A_D24 AV37 AT21 DDR_A_BS2 DDR_B_D24 AM29 AW28 DDR_B_BS2
DDR_A_D25 AW37 DDR_B_D25 AM28
DDR_A_D26 AU35 SA_DQ25 DDR_B_D26 AR29 SB_DQ25
DDR_A_D27 AV35 SA_DQ26 AU12 DDR_A_RAS# DDR_B_D27 AR28 SB_DQ26
SA_DQ27 SA_RAS# DDR_A_RAS# [10] SB_DQ27
DDR_A_D28 AT37 AU11 DDR_A_W E# DDR_B_D28 AL29 AM18 DDR_B_RAS#
SA_DQ28 SA_WE# DDR_A_W E# [10] SB_DQ28 SB_RAS# DDR_B_RAS# [11]
DDR_A_D29 AU37 AU9 DDR_A_CAS# DDR_B_D29 AL28 AK16 DDR_B_W E#
SA_DQ29 SA_CAS# DDR_A_CAS# [10] SB_DQ29 SB_WE# DDR_B_W E# [11]
DDR_A_D30 AT35 DDR_B_D30 AP29 AP16 DDR_B_CAS#
SA_DQ30 DDR_A_MA[0..15] [10] SB_DQ30 SB_CAS# DDR_B_CAS# [11]
DDR_A_D31 AW35 DDR_B_D31 AP28
DDR_A_D32 AY6 SA_DQ31 AU13 DDR_A_MA0 DDR_B_D32 AR12 SB_DQ31
AU6 SA_DQ32 SA_MA0 AV16 AP12 SB_DQ32 AL19 DDR_B_MA[0..15] [11]
DDR_A_D33 DDR_A_MA1 DDR_B_D33 DDR_B_MA0
DDR_A_D34 AV4 SA_DQ33 SA_MA1 AU16 DDR_A_MA2 DDR_B_D34 AL13 SB_DQ33 SB_MA0 AK23 DDR_B_MA1
DDR_A_D35 AU4 SA_DQ34 SA_MA2 AW17 DDR_A_MA3 DDR_B_D35 AL12 SB_DQ34 SB_MA1 AM22 DDR_B_MA2
DDR_A_D36 AW6 SA_DQ35 SA_MA3 AU17 DDR_A_MA4 DDR_B_D36 AR13 SB_DQ35 SB_MA2 AM23 DDR_B_MA3
DDR_A_D37 AV6 SA_DQ36 SA_MA4 AW18 DDR_A_MA5 DDR_B_D37 AP13 SB_DQ36 SB_MA3 AP23 DDR_B_MA4
DDR_A_D38 AW4 SA_DQ37 SA_MA5 AV17 DDR_A_MA6 DDR_B_D38 AM13 SB_DQ37 SB_MA4 AL23 DDR_B_MA5
C DDR_A_D39 AY4 SA_DQ38 SA_MA6 AT18 DDR_A_MA7 DDR_B_D39 AM12 SB_DQ38 SB_MA5 AY24 DDR_B_MA6 C
DDR_A_D40 AR1 SA_DQ39 SA_MA7 AU18 DDR_A_MA8 DDR_B_D40 AR9 SB_DQ39 SB_MA6 AV25 DDR_B_MA7
DDR_A_D41 AR4 SA_DQ40 SA_MA8 AT19 DDR_A_MA9 DDR_B_D41 AP9 SB_DQ40 SB_MA7 AU26 DDR_B_MA8
DDR_A_D42 AN3 SA_DQ41 SA_MA9 AW11 DDR_A_MA10 DDR_B_D42 AR6 SB_DQ41 SB_MA8 AW25 DDR_B_MA9
DDR_A_D43 AN4 SA_DQ42 SA_MA10 AV19 DDR_A_MA11 DDR_B_D43 AP6 SB_DQ42 SB_MA9 AP18 DDR_B_MA10
DDR_A_D44 AR2 SA_DQ43 SA_MA11 AU19 DDR_A_MA12 DDR_B_D44 AR10 SB_DQ43 SB_MA10 AY25 DDR_B_MA11
DDR_A_D45 AR3 SA_DQ44 SA_MA12 AY10 DDR_A_MA13 DDR_B_D45 AP10 SB_DQ44 SB_MA11 AV26 DDR_B_MA12
DDR_A_D46 AN2 SA_DQ45 SA_MA13 AT20 DDR_A_MA14 DDR_B_D46 AR7 SB_DQ45 SB_MA12 AR15 DDR_B_MA13
DDR_A_D47 AN1 SA_DQ46 SA_MA14 AU21 DDR_A_MA15 DDR_B_D47 AP7 SB_DQ46 SB_MA13 AV27 DDR_B_MA14
DDR_A_D48 AL1 SA_DQ47 SA_MA15 DDR_B_D48 AM9 SB_DQ47 SB_MA14 AY28 DDR_B_MA15
DDR_A_D49 AL4 SA_DQ48 DDR_B_D49 AL9 SB_DQ48 SB_MA15
AJ3 SA_DQ49 AE38 DDR_A_DQS#0 DDR_A_DQS#[0..7] [10] AL6 SB_DQ49
DDR_A_D50 DDR_B_D50
AJ4 SA_DQ50 SA_DQSN0 AJ38 DDR_A_DQS#1 AL7 SB_DQ50 AF34 DDR_B_DQS#0 DDR_B_DQS#[0..7] [11]
DDR_A_D51 DDR_B_D51
DDR_A_D52 AL2 SA_DQ51 SA_DQSN1 AN38 DDR_A_DQS#2 DDR_B_D52 AM10 SB_DQ51 SB_DQSN0 AK33 DDR_B_DQS#1
DDR_A_D53 AL3 SA_DQ52 SA_DQSN2 AU36 DDR_A_DQS#3 DDR_B_D53 AL10 SB_DQ52 SB_DQSN1 AN33 DDR_B_DQS#2
DDR_A_D54 AJ2 SA_DQ53 SA_DQSN3 AW5 DDR_A_DQS#4 DDR_B_D54 AM6 SB_DQ53 SB_DQSN2 AN29 DDR_B_DQS#3
DDR_A_D55 AJ1 SA_DQ54 SA_DQSN4 AP2 DDR_A_DQS#5 DDR_B_D55 AM7 SB_DQ54 SB_DQSN3 AN13 DDR_B_DQS#4
DDR_A_D56 AG1 SA_DQ55 SA_DQSN5 AK2 DDR_A_DQS#6 DDR_B_D56 AH6 SB_DQ55 SB_DQSN4 AR8 DDR_B_DQS#5
DDR_A_D57 AG4 SA_DQ56 SA_DQSN6 AF2 DDR_A_DQS#7 DDR_B_D57 AH7 SB_DQ56 SB_DQSN5 AM8 DDR_B_DQS#6
DDR_A_D58 AE3 SA_DQ57 SA_DQSN7 AU32 DDR_B_D58 AE6 SB_DQ57 SB_DQSN6 AG6 DDR_B_DQS#7
DDR_A_D59 AE4 SA_DQ58 SA_DQSN8 DDR_B_D59 AE7 SB_DQ58 SB_DQSN7 AN26
DDR_A_D60 AG2 SA_DQ59 DDR_B_D60 AJ6 SB_DQ59 SB_DQSN8
AG3 SA_DQ60 AE39 DDR_A_DQS[0..7] [10] AJ7 SB_DQ60
DDR_A_D61 DDR_A_DQS0 DDR_B_D61
AE2 SA_DQ61 SA_DQSP0 AJ39 AF6 SB_DQ61 AF35 DDR_B_DQS[0..7] [11]
DDR_A_D62 DDR_A_DQS1 DDR_B_D62 DDR_B_DQS0
DDR_A_D63 AE1 SA_DQ62 SA_DQSP1 AN39 DDR_A_DQS2 DDR_B_D63 AF7 SB_DQ62 SB_DQS0 AL33 DDR_B_DQS1
SA_DQ63 SA_DQSP2 AV36 DDR_A_DQS3 SB_DQ63 SB_DQS1 AP33 DDR_B_DQS2
SA_DQSP3 AV5 DDR_A_DQS4 SB_DQS2 AN28 DDR_B_DQS3
SA_DQSP4 AP3 DDR_A_DQS5 AM26 SB_DQS3 AN12 DDR_B_DQS4
AW33 SA_DQSP5 AK3 DDR_A_DQS6 AM25 SB_ECC_CB0 SB_DQS4 AP8 DDR_B_DQS5
AV33 SA_ECC_CB0 SA_DQSP6 AF3 DDR_A_DQS7 AP25 SB_ECC_CB1 SB_DQS5 AL8 DDR_B_DQS6
AU31 SA_ECC_CB1 SA_DQSP7 AV32 +VREF_CAA AP26 SB_ECC_CB2 SB_DQS6 AG7 DDR_B_DQS7
B AV31 SA_ECC_CB2 SA_DQSP8 +V_SM_VREF should AL26 SB_ECC_CB3 SB_DQS7 AN25 B
AT33 SA_ECC_CB3 have 20 mil trace width AL25 SB_ECC_CB4 SB_DQS8
AU33 SA_ECC_CB4 AB38 +V_SM_VREF 1 2 AR26 SB_ECC_CB5
AT31 SA_ECC_CB5 SM_VREF AR25 SB_ECC_CB6 AB40 +VREF_DQB_R 1 2
SA_ECC_CB6 SB_ECC_CB7 SB_DIMM_VREFDQ +VREF_DQB
AW31 AB39 +VREF_DQA_R 1 2 1
SA_ECC_CB7 SA_DIMM_VREFDQ +VREF_DQA
1 R23 2_0402_1%
@ C30 +VREF_CAB R25 2_0402_1%
1
0.1U_0402_16V4Z
FOX_3H993827-4M41-01H_HASW ELL 1 R24 2_0402_1% C28 FOX_3H993827-4M41-01H_HASW ELL C32

2
C31
0.022U_0402_25V7K
C33
1 C29 @ 1
2
0.022U_0402_25V7K
1 2
2
0.022U_0402_25V7K
@
1
0.1U_0402_16V4Z
1
2 2
0.1U_0402_16V4Z
R26 2_0402_1%
1
R28
24.9_0402_1%
R29
2
24.9_0402_1%
R27
2
24.9_0402_1%
2
A A

Haswell_DDR3
Custom 0.3
ZEA00 LA-A061P M/B
5 4 3 2 1
5 4 3 2 1
+CPU_CORE
JCPU1E
+1.5V Decoupling:
D27 AJ12
1X 390U , 9X 22U,5*10U
D29 VCC VDDQ AJ13
D31 VCC VDDQ AJ15 +1.5V
D33 VCC VDDQ AJ17
D35 VCC VDDQ AJ20
E24 VCC VDDQ AJ21 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 10U_0603_6.3V6M 10U_0603_6.3V6M
E25 VCC VDDQ AJ24
VCC VDDQ 1
E26 AJ25 1 1 1 1 1 1 1 1 1 1 1 1 1 1
E27 VCC VDDQ AJ28 C34 C35 C36 C37 C38 C39 C40 C41 C42 + C45 C2071 C2072 C2073 C2074 C2075
D VCC VDDQ D
E28 AJ29 390U 2.5V M ESR10
E29 VCC VDDQ AJ9
E30 VCC VDDQ AT17 2 2 2 2 2 2 2 2 2 2 v0.2 update 2 2 2 2 2
E31 VCC VDDQ AT22
E32 VCC VDDQ AU15 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 10U_0603_6.3V6M 10U_0603_6.3V6M 10U_0603_6.3V6M
E33 VCC VDDQ AU20
VCC VDDQ Pull high resistor close to CPU
E34 AU24
E35 VCC VDDQ AV10 SVID signal 50 ohm impedance
VCC VDDQ
F23
VCC VDDQ
AV11 spacing >12mil length 3-6"
F25 AV13
F27 VCC VDDQ AV18 +1.05VS_VCCIO
F29 VCC VDDQ AV23 +VCCIO_OUT +1.05VS_VCCIO +1.05VS_VPCH
F31 VCC VDDQ AV8
F33 VCC VDDQ AW16
F35 VCC VDDQ AY12 1 @ 2 1 2
G22 VCC VDDQ AY14
VCC VDDQ
1
G23 AY9 R32 R33 R30 @ R31
G24 VCC VDDQ 110_0402_5% 75_0402_5% 0_0603_5% 0_0603_5%
G25 VCC +VCCIO_OUT
G26 VCC +VCCIOA
G27 VCC L40 +1.05VS_VCCIOA(PEG,FDI RCOMP pull high PWR)
2
G28 VCC VCCIO_OUT P4
G29 VCC VCOMP_OUT
G30 VCC +1.05VS_VPCH
G31 VCC @ R34 0_0402_5%
G32 VCC C38 VR_SVID_CLK_R 1 2
G33 VCC VIDSCLK C37 1 2 VR_SVID_CLK [50]
VR_SVID_DAT_R
G34 VCC VIDSOUT B37 VR_SVID_DAT [50]
H_CPU_SVIDALRT# 1 2
VCC VIDALERT# VR_SVID_ALRT# [50]
1
G35 @ R35 0_0402_5%
H23 VCC R36 43_0402_1% 2 1
H25 VCC F40 100_0402_1% R37 R38
C H27 VCC VSS_SENSE E40 VSS_SENSE [50] C
150_0402_1%
H29 VCC VCC_SENSE VCC_SENSE [50]
2
H31 VCC
H33 VCC N40 CPU_PW RDB 2 1 CPU_PW RDB
VCC PWR_DEBUG T135 PAD +CPU_CORE
H35 R39
VCC
1
J21 +CPU_CORE 100_0402_1% @
J22 VCC R40
J23 VCC A24
VCC VCC R37,R39 close to CPU 10K_0402_5%
J24 A25
J25 VCC VCC A26
2
J26 VCC VCC A27
J27 VCC VCC A28
J28 VCC VCC A29
J29 VCC VCC A30
J30 VCC VCC B25
J31 VCC VCC B27
J32 VCC VCC B29
J33 VCC VCC B31
J34 VCC VCC B33
J35 VCC VCC B35
K19 VCC VCC C24
K21 VCC VCC C25
K23 VCC VCC C26
K25 VCC VCC C27
K27 VCC VCC C28
K29 VCC VCC C29
K31 VCC VCC C30
K33 VCC VCC C31
K35 VCC VCC C32
L15 VCC VCC C33
L16 VCC VCC C34
B L17 VCC VCC C35 B
L18 VCC VCC D25
L19 VCC VCC P8
L20 VCC VCC M8
L21 VCC VCC M33
L22 VCC VCC M29
L23 VCC VCC M27
L24 VCC VCC M25
L25 VCC VCC M23
L26 VCC VCC M21
L27 VCC VCC M19
L28 VCC VCC M17
L29 VCC VCC M15
L30 VCC VCC M13
L31 VCC VCC L34
L32 VCC VCC L33
VCC VCC
A A

Haswell_POWER
Custom 0.3
ZEA00 LA-A061P M/B
5 4 3 2 1
5 4 3 2 1
JCPU1F JCPU1G JCPU1H CFG Straps for Processor

(CFG[19:0] internal pull high to VCCIO)
AK19 AB37 B28 AR18 N34 A11 JCPU1J
AK24 VSS VSS AB5 B30 VSS VSS AR19 N39 VSS VSS A13
AK25 VSS VSS AB6 B32 VSS VSS AR20 N4 VSS VSS H17 R36 AB33 CFG2 R41 1 2 1K_0402_1%
AK26 VSS VSS AB7 B34 VSS VSS AR21 N6 VSS VSS H18 T25 PAD P37 RSVD_TP RSVD AB36 CFG3 @ R42 1 2 1K_0402_1%
AK27 VSS VSS AC3 B36 VSS VSS AR22 N7 VSS VSS H20 T26 PAD N38 RSVD_TP RSVD Y8 CFG5 R43 1 2 1K_0402_1%
AK28 VSS VSS AC33 B4 VSS VSS AR23 N8 VSS VSS H21 T27 PAD N36 RSVD_TP RSVD W8 CFG6 @ R44 1 2 1K_0402_1%
AK29 VSS VSS AC34 B8 VSS VSS AR24 P2 VSS VSS H22 T28 PAD K8 RSVD_TP RSVD U8
AK30 VSS VSS AC35 C12 VSS VSS AR27 P34 VSS VSS H24 T29 PAD K13 RSVD_TP RSVD T8 CPU_T8
AK36 VSS VSS AC36 C14 VSS VSS AR30 P35 VSS VSS H26 T30 PAD K12 RSVD_TP RSVD T35 PAD T31
AK4 VSS VSS AC37 C16 VSS VSS AR31 P38 VSS VSS H28 T32 PAD K11 RSVD_TP RSVD T34
AK5 VSS VSS AC38 C18 VSS VSS AR32 P39 VSS VSS H30 T33 PAD J8 RSVD_TP RSVD R34 +1.05VS_VPCH
D VSS VSS VSS VSS VSS VSS RSVD_TP RSVD D
AK6 AC39 C19 AR33 P40 H32 T34 PAD J16 R33
AK7 VSS VSS AC40 C21 VSS VSS AR34 P5 VSS VSS H34 T35 PAD J13 RSVD_TP RSVD P33
AK8 VSS VSS AC6 C23 VSS VSS AR35 P7 VSS VSS H36 T36 PAD J12 RSVD_TP RSVD N35 CPU_N35 1 2
AK9 VSS VSS AC7 C3 VSS VSS AR36 R3 VSS VSS H39 T37 PAD J10 RSVD_TP RSVD M38 @
AL11 VSS VSS AD1 C36 VSS VSS AR37 R35 VSS VSS H4 T38 PAD H16 RSVD_TP RSVD M11 R45 0_0603_5%
VSS VSS VSS VSS VSS VSS RSVD_TP RSVD
0.1U_0402_16V4Z
C46
AL14 AD2 C4 AR38 R37 H7 T39 PAD D1 M10 @
AL17 VSS VSS AD3 C6 VSS VSS AR39 R38 VSS VSS H8 T40 PAD C39 RSVD_TP RSVD L12
VSS VSS VSS VSS VSS VSS RSVD_TP RSVD 1
AL21 AD33 D11 AR40 R39 H9 T41 PAD C2 L10
AL22 VSS VSS AD36 D13 VSS VSS AR5 R40 VSS VSS J11 T42 PAD CPU_A4 A4 RSVD_TP RSVD J9
AL24 VSS VSS AD4 D15 VSS VSS AT1 R5 VSS VSS J14 T43 PAD CPU_AV1 AV1 RSVD_TP RSVD J40
AL27 VSS VSS AD5 D17 VSS VSS AT10 R6 VSS VSS J18 T44 PAD CPU_AW 2 AW2 RSVD_TP RSVD J17 2
AL30 VSS VSS AD6 D2 VSS VSS AT11 R7 VSS VSS J19 T45 PAD CPU_B3 B3 RSVD_TP RSVD J15
AL36 VSS VSS AD7 D23 VSS VSS AT12 R8 VSS VSS J20 T46 PAD RSVD_TP RSVD H15
AL37 VSS VSS AD8 D24 VSS VSS AT13 T1 VSS VSS J3 RSVD H14 +VCCST +PCH_VPROC
AL38 VSS VSS AE33 D26 VSS VSS AT14 T2 VSS VSS J36 RSVD H12 @ R46
AL39 VSS VSS AE36 D28 VSS VSS AT15 T33 VSS VSS J37 RSVD AY18 0_0603_5%
AL40 VSS VSS AE37 D30 VSS VSS AT16 T36 VSS VSS J6 RSVD AW27 1 2
AL5 VSS VSS AE40 D32 VSS VSS AT2 T37 VSS VSS J7 CFG0 AA37 RSVD AW24
VSS VSS VSS VSS VSS VSS T136PAD CFG0 RSVD
0.1U_0402_16V4Z
C48
AM1 AE5 D34 AT24 T38 K1 T137PAD CFG1 Y38 AW23
AM11 VSS VSS AE8 D36 VSS VSS AT25 T39 VSS VSS K10 CFG2 AA36 CFG1 RSVD AC8
VSS VSS VSS VSS VSS VSS T138PAD CFG2 RSVD 1 1
AM14 AF1 D37 AT26 T4 K14 T140PAD CFG3 W38 AK20
AM15 VSS VSS AF33 D5 VSS VSS AT27 T5 VSS VSS K15 CFG4 V39 CFG3 RSVD AL20 C47
AM19 AF36 D6 AT28 T6 K16 T141PAD CFG5 U39 AT40 4.7U_0603_10V6K
AM2 VSS VSS AF4 D7 VSS VSS AT29 T7 VSS VSS K17 CFG6 U40 CFG5 RSVD AU1 2 2
AM24 AF5 D9 AT3 U2 K18 T143PAD CFG7 V38 AU27
AM27 VSS VSS AF8 E10 VSS VSS AT30 U33 VSS VSS K20 CFG8 T40 CFG7 RSVD AU39
AM3 AG33 E18 AT32 U34 K22 T145PAD CFG9 Y35 AV2
AM30 VSS VSS AG36 E20 VSS VSS AT34 U35 VSS VSS K24 CFG10 AA34 CFG9 RSVD AV20
AM31 AG37 E22 AT36 U36 K26 CFG11 V37 AV24 +VCCST
AM32 AG38 E23 AT38 U37 K28 T148PAD CFG12 Y34 AV29
AM33 VSS VSS AG39 E3 VSS VSS AT39 U4 VSS VSS K30 CFG13 U38 CFG12 RSVD AW12
C VSS VSS VSS VSS VSS VSS T149PAD CFG13 RSVD C
AM34 AG40 E36 AT4 U7 K32 T150PAD CFG14 W34 @ R47
AM35 VSS VSS AG5 E38 VSS VSS AT5 V3 VSS VSS K34 CFG15 V35 CFG14 AB8 +VCCIO2PCH 1 2 0_0402_5%
VSS VSS VSS VSS VSS VSS T151PAD CFG15 FC_AB8
AM36 AG8 E6 AT6 V33 K36 T152PAD CFG16 Y37 K9 +VCCST
AM4 VSS VSS AH1 E7 VSS VSS AT7 V34 VSS VSS K4 CFG17 Y36 CFG16 FC_K9 Y7 VCCST_PW RGD 1 2
VSS VSS VSS VSS VSS VSS T153PAD CFG17 FC_Y7 PM_PW ROK [14,43]
AM5 AH2 E8 AT8 V40 K40 T154PAD CFG18 W36
VSS VSS VSS VSS VSS VSS CFG18
1
AN10 AH3 F1 AT9 V6 K7 T155PAD CFG19 V36 N5 TESTLO_N5
AN11 VSS VSS AH33 F12 VSS VSS AU2 V7 VSS VSS L11 CFG_RCOMP H40 CFG19 TESTLO_N5 P6 TESTLO_P6 R49 R48 6.04K_0402_1%
AN14 VSS VSS AH36 F14 VSS VSS AU25 V8 VSS VSS L13 CFG_RCOMP TESTLO_P6
VSS VSS VSS VSS VSS VSS 2.67K_0402_1%
AN16 AH4 F16 AU3 W1 L14
AN18 VSS VSS AH5 F19 VSS VSS AU30 W33 VSS VSS L3
2
AN19 VSS VSS AH8 F21 VSS VSS AU34 W35 VSS VSS L35 FOX_3H993827-4M41-01H_HASW ELL
VSS VSS VSS VSS VSS VSS
1
AN22 AJ11 F22 AU38 W37 L36
49.9_0402_1%
49.9_0402_1%
R50
R51
AN23 VSS VSS AJ14 F24 VSS VSS AU5 W4 VSS VSS L38
VSS VSS VSS VSS VSS VSS 0828
1
AN24 AJ16 F26 AU7 W7 L6
49.9_0402_1%
0828
R52
AN27 VSS VSS AJ18 F28 VSS VSS AV21 Y33 VSS VSS L7
2
AN37 VSS VSS AJ23 F34 VSS VSS AV30 Y6 VSS VSS M1
2
AN40 VSS VSS AJ26 F36 VSS VSS AV34 A15 VSS VSS M12
AN7 VSS VSS AJ31 G11 VSS VSS AW26 A5 VSS VSS M18
AN8 VSS VSS AJ32 G12 VSS VSS AW3 A7 VSS VSS M20
AN9 VSS VSS AJ33 G13 VSS VSS AW30 AA3 VSS VSS M22
AP1 VSS VSS AJ34 G14 VSS VSS AW32 AA33 VSS VSS M24
AP24 VSS VSS AJ40 G21 VSS VSS AY17 AA7 VSS VSS M32
AP27 VSS VSS AJ5 G3 VSS VSS AY23 AA8 VSS VSS M34
AP30 VSS VSS AJ8 G36 VSS VSS AY26 AB34 VSS VSS M35
B AP36 VSS VSS AK1 G37 VSS VSS AY27 VSS VSS M37 B
AP4 VSS VSS AK10 G6 VSS VSS AY30 VSS M4
AP5 VSS VSS AK11 G7 VSS VSS AY5 VSS M40
AR11 VSS VSS AK12 G9 VSS VSS AY7 AU40 VSS M5
AR14 VSS VSS AK13 H1 VSS VSS B10 AV39 VSS_NCTF VSS M6
AR16 VSS VSS AK14 H10 VSS VSS B23 AW38 VSS_NCTF VSS M7
AR17 VSS VSS AK18 H11 VSS VSS B24 AY3 VSS_NCTF VSS M9
VSS VSS H13 VSS VSS B26 B38 VSS_NCTF VSS N1
VSS VSS B39 VSS_NCTF VSS N2
C40 VSS_NCTF VSS N3
D40 VSS_NCTF VSS N33
FOX_3H993827-4M41-01H_HASW ELL FOX_3H993827-4M41-01H_HASW ELL VSS_NCTF VSS
A A

Haswell_GND/CFG
Custom 0.3
ZEA00 LA-A061P M/B
5 4 3 2 1
5 4 3 2 1
[7] DDR_A_DQS[0..7]
[7] DDR_A_DQS#[0..7]
[7] DDR_A_D[0..63]
[7] DDR_A_MA[0..15]
CHA SO-DIMM 0(A0)
R626 +VREF_DQA +1.5V +1.5V
1K_0402_1% JDIMM1
+1.5V 1 2 +VREF_DQA 1 2
3 VREF_DQ VSS1 4 DDR_A_D4
VSS2 DQ4
1
DDR_A_D0 5 6 DDR_A_D5
DQ0 DQ5
0.1U_0402_16V4Z
2.2U_0603_6.3V6K
R627 1 1 DDR_A_D1 7 8
DQ1 VSS3
C2030
C2031
1K_0402_1% 9 10 DDR_A_DQS#0
11 VSS4 DQS#0 12 DDR_A_DQS0
D
13 DM0 DQS0 14 D
2
2 2 DDR_A_D2 15 VSS5 VSS6 16 DDR_A_D6

DDR_A_D3 17 DQ2 DQ6 18 DDR_A_D7
19 DQ3 DQ7 20
DDR_A_D8 21 VSS7 VSS8 22 DDR_A_D12
25 DQ9 DQ13 26
Close to JDIMM1 VSS9 VSS10
DDR_A_DQS#1 27 28
DDR_A_DQS1 29 DQS#1 DM1 30 SM_DRAMRST#
DQS1 RESET# SM_DRAMRST# [11,5]
31 32
37 DQ11 DQ15 38
Layout Note:
DDR_A_D17 41 DQ16 DQ20 42 DDR_A_D21 Place near JDIMM1
43 DQ17 DQ21 44
DDR_A_DQS#2 45 VSS15 VSS16 46
DDR_A_DQS2 47 DQS#2 DM2 48 +1.5V
49 DQS2 VSS17 50 DDR_A_D22
DDR_A_D18 51 VSS18 DQ22 52 DDR_A_D23 C2032 1 2 390U 2.5V M ESR10
+
DDR_A_D19 53 DQ18 DQ23 54
55 DQ19 VSS19 56 DDR_A_D28 C2033 1 2 10U_0805_6.3V6M
DDR_A_D24 57 VSS20 DQ28 58 DDR_A_D29
DDR_A_D25 59 DQ24 DQ29 60 C2034 1 2 10U_0805_6.3V6M
61 DQ25 VSS21 62 DDR_A_DQS#3
63 VSS22 DQS#3 64 DDR_A_DQS3 C2035 1 2 10U_0805_6.3V6M
65 DM3 DQS3 66
DDR_A_D26 67 VSS23 VSS24 68 DDR_A_D30 +1.5V
71 DQ27 DQ31 72 C2036 1 2 0.1U_0402_16V4Z
VSS25 VSS26
C2037 1 2 0.1U_0402_16V4Z
DDRA_CKE0 73 74 DDRA_CKE1 C2038 1 2 0.1U_0402_16V4Z

[7] DDRA_CKE0 CKE0 CKE1 DDRA_CKE1 [7]
75 76
77 VDD1 VDD2 78 DDR_A_MA15 C2039 1 2 0.1U_0402_16V4Z
DDR_A_BS2 79 NC1 A15 80 DDR_A_MA14
[7] DDR_A_BS2 BA2 A14
C 81 82 C2040 1 2 0.1U_0402_16V4Z C
DDR_A_MA12 83 VDD3 VDD4 84 DDR_A_MA11
DDR_A_MA9 85 A12/BC# A11 86 DDR_A_MA7 C2041 1 2 0.1U_0402_16V4Z
87 A9 A7 88
DDR_A_MA8 89 VDD5 VDD6 90 DDR_A_MA6 C2042 1 2 0.1U_0402_16V4Z
DDR_A_MA5 91 A8 A6 92 DDR_A_MA4
93 A5 A4 94 C2043 1 2 0.1U_0402_16V4Z
DDR_A_MA3 95 VDD7 VDD8 96 DDR_A_MA2
DDR_A_MA1 97 A3 A2 98 DDR_A_MA0
99 A1 A0 100
DDRA_CLK0 101 VDD9 VDD10 102 DDRA_CLK1
Layout Note: Place these Caps near
[7] DDRA_CLK0 103 CK0 CK1 104 DDRA_CLK1 [7] +1.5V of JDIMM1
DDRA_CLK0# DDRA_CLK1#
[7] DDRA_CLK0# CK0# CK1# DDRA_CLK1# [7]
105 106
DDR_A_MA10 107 VDD11 VDD12 108 DDR_A_BS1 +1.5V
A10/AP BA1 DDR_A_BS1 [7]
DDR_A_BS0 109 110 DDR_A_RAS#
[7] DDR_A_BS0 BA0 RAS# DDR_A_RAS# [7]
111 112
VDD13 VDD14
1
DDR_A_WE# 113 114 DDRA_SCS0#
[7] DDR_A_WE# WE# S0# DDRA_SCS0# [7]
[7] DDR_A_CAS# DDR_A_CAS# 115 116 DDRA_ODT0 R628
CAS# ODT0 DDRA_ODT0 [7]
117 118 1K_0402_1%
DDR_A_MA13 119 VDD15 VDD16 120 DDRA_ODT1
A13 ODT1 DDRA_ODT1 [7] +VREF_CAA
DDRA_SCS1# 121 122
[7] DDRA_SCS1#
2
123 S1# NC2 124
125 VDD17 VDD18 126 +VREF_CAA
127 NCTEST VREF_CA 128
VSS27 VSS28
1
DDR_A_D32 129 130 DDR_A_D36
DDR_A_D33 131 DQ32 DQ36 132 DDR_A_D37 R629
133 DQ33 DQ37 134 1K_0402_1%
VSS29 VSS30
2.2U_0603_6.3V6K
0.1U_0402_16V4Z
DDR_A_DQS#4 135 136

DDR_A_DQS4 137 DQS#4 DM4 138 1 1
2
DQS4 VSS31
C2044
C2045
139 140 DDR_A_D38

DDR_A_D35 143 DQ34 DQ39 144
145 DQ35 VSS33 146 DDR_A_D44 2 2
DDR_A_D41 149 DQ40 DQ45 150
151 DQ41 VSS35 152 DDR_A_DQS#5
153 VSS36 DQS#5 154 DDR_A_DQS5
155 DM5 DQS5 156
B
DDR_A_D42 157 VSS37 VSS38 158 DDR_A_D46 B
DQ42 DQ46 close to JDIMM1.126
DDR_A_D43 159 160 DDR_A_D47
161 DQ43 DQ47 162
DDR_A_D49 165 DQ48 DQ52 166 DDR_A_D53
167 DQ49 DQ53 168
DDR_A_DQS#6 169 VSS41 VSS42 170
DDR_A_DQS6 171 DQS#6 DM6 172
173 DQS6 VSS43 174 DDR_A_D54 +0.75VS Layout Note:
DDR_A_D50 175 VSS44 DQ54 176 DDR_A_D55 Place near JDIMM1 Pin203 and 204
DDR_A_D51 177 DQ50 DQ55 178
179 DQ51 VSS45 180 DDR_A_D60
DDR_A_D57 183 DQ56 DQ61 184
DQ57 VSS47 1 1
185 186 DDR_A_DQS#7
187 VSS48 DQS#7 188 DDR_A_DQS7 C2046 C2047
DM7 DQS7
4.7U_0603_6.3V6K
189 190
0.1U_0402_16V4Z
DDR_A_D58 191 VSS49 VSS50 192 DDR_A_D62 2 2

DDR_A_D59 193 DQ58 DQ62 194 DDR_A_D63
195 DQ59 DQ63 196
197 VSS51 VSS52 198
199 SA0 EVENT# 200 PM_SMBDATA
+3VS VDDSPD SDA PM_SMBDATA [11,13,40,5]
201 202 PM_SMBCLK
SA1 SCL PM_SMBCLK [11,13,40,5]
2.2U_0603_6.3V6K
0.1U_0402_16V4Z
1 1 203 204
+0.75VS VTT1 VTT2 +0.75VS
1
C2048
C2049
R630 205 206

@ G1 G2
SPD setting (SA0, SA1)
@ 2 2 0_0402_5% FOX_AS0A626-U2SN-7F
PU/PD by Channel A/B
CONN@
->Channel A 00
2
->Channel B 01
Standard H:5.2mm
A A

DDRIII-SODIMMA
C 0.3
ZEA00 LA-A061P M/B
5 4 3 2 1
A B C D E
[7] DDR_B_DQS#[0..7]
[7] DDR_B_DQS[0..7]
[7] DDR_B_D[0..63]
[7] DDR_B_MA[0..15]
+1.5V
R631 +VREF_DQB +1.5V
CHB SO-DIMM
1K_0402_1% JDIMM2 +1.5V
1 2 1 2
3 VREF_DQ VSS1 4 DDR_B_D4
VSS2 DQ4
1
DDR_B_D0 5 6 DDR_B_D5
R632 DDR_B_D1 7 DQ0 DQ5 8
1 1K_0402_1% 9 DQ1 VSS3 10 DDR_B_DQS#0 1
VSS4 DQS#0
2.2U_0603_6.3V6K
0.1U_0402_16V4Z
11 12 DDR_B_DQS0
13 DM0 DQS0 14
1 1
2
VSS5 VSS6
C2050
C2051
DDR_B_D2 15 16 DDR_B_D6
DDR_B_D3 17 DQ2 DQ6 18 DDR_B_D7
19 DQ3 DQ7 20
2 2 DDR_B_D8 21 VSS7 VSS8 22 DDR_B_D12
25 DQ9 DQ13 26
DDR_B_DQS#1 27 VSS9 VSS10 28
DDR_B_DQS1 29 DQS#1 DM1 30 SM_DRAMRST#
31 DQS1 RESET# 32 SM_DRAMRST# [10,5]
DDR_B_D10 33 VSS11 VSS12 34 DDR_B_D14
Close to JDIMM2 DQ11 DQ15
37 38
Layout Note:
43 DQ17 DQ21 44 Place near JDIMM2
DDR_B_DQS2 47 DQS#2 DM2 48 +1.5V
49 DQS2 VSS17 50 DDR_B_D22 @
DDR_B_D18 51 VSS18 DQ22 52 DDR_B_D23 C2052 1 2 390U 2.5V M ESR10
+
DDR_B_D19 53 DQ18 DQ23 54
55 DQ19 VSS19 56 DDR_B_D28
DDR_B_D24 57 VSS20 DQ28 58 DDR_B_D29 C2053 1 2 10U_0805_6.3V6M
DDR_B_D25 59 DQ24 DQ29 60
61 DQ25 VSS21 62 DDR_B_DQS#3 C2054 1 2 10U_0805_6.3V6M
63 VSS22 DQS#3 64 DDR_B_DQS3
65 DM3 DQS3 66 C2055 1 2 10U_0805_6.3V6M
71 DQ27 DQ31 72 +1.5V
2 VSS25 VSS26 2
C2056 1 2 0.1U_0402_16V4Z
DDRB_CKE0 73 74 DDRB_CKE1 C2057 1 2 0.1U_0402_16V4Z

[7] DDRB_CKE0 75 CKE0 CKE1 76 DDRB_CKE1 [7]
77 VDD1 VDD2 78 DDR_B_MA15 C2058 1 2 0.1U_0402_16V4Z
DDR_B_BS2 79 NC1 A15 80 DDR_B_MA14
[7] DDR_B_BS2 BA2 A14
81 82 C2059 1 2 0.1U_0402_16V4Z
DDR_B_MA12 83 VDD3 VDD4 84 DDR_B_MA11
DDR_B_MA9 85 A12/BC# A11 86 DDR_B_MA7 C2060 1 2 0.1U_0402_16V4Z
87 A9 A7 88
DDR_B_MA8 89 VDD5 VDD6 90 DDR_B_MA6 C2061 1 2 0.1U_0402_16V4Z
DDR_B_MA5 91 A8 A6 92 DDR_B_MA4
93 A5 A4 94 C2062 1 2 0.1U_0402_16V4Z
DDR_B_MA3 95 VDD7 VDD8 96 DDR_B_MA2
DDR_B_MA1 97 A3 A2 98 DDR_B_MA0 C2063 1 2 0.1U_0402_16V4Z
99 A1 A0 100
DDRB_CLK0 101 VDD9 VDD10 102 DDRB_CLK1
[7] DDRB_CLK0 103 CK0 CK1 104 DDRB_CLK1 [7]
DDRB_CLK0# DDRB_CLK1#
[7] DDRB_CLK0# 105 CK0# CK1# 106 DDRB_CLK1# [7]
DDR_B_MA10 107 VDD11 VDD12 108 DDR_B_BS1
Layout Note: Place these Caps near
A10/AP BA1 DDR_B_BS1 [7]
[7] DDR_B_BS0
DDR_B_BS0 109 110 DDR_B_RAS#
DDR_B_RAS# [7]
+1.5V +1.5V of JDIMM2
111 BA0 RAS# 112
DDR_B_WE# 113 VDD13 VDD14 114 DDRB_SCS0#
[7] DDR_B_WE# WE# S0# DDRB_SCS0# [7]
1
DDR_B_CAS# 115 116 DDRB_ODT0
[7] DDR_B_CAS# CAS# ODT0 DDRB_ODT0 [7] +VREF_CAB
117 118 R633
DDR_B_MA13 119 VDD15 VDD16 120 DDRB_ODT1 1K_0402_1%
121 A13 ODT1 122 DDRB_ODT1 [7]
DDRB_SCS1#
[7] DDRB_SCS1# 123 S1# NC2 124
125 VDD17 VDD18 126 +VREF_CAB 2
127 NCTEST VREF_CA 128
VSS27 VSS28
1
DDR_B_D32 129 130 DDR_B_D36

3 DDR_B_D33 131 DQ32 DQ36 132 DDR_B_D37 R634 3
133 DQ33 DQ37 134 1K_0402_1%
VSS29 VSS30
2.2U_0603_6.3V6K
0.1U_0402_16V4Z
DDR_B_DQS#4 135 136 1 1

DQS#4 DM4
C2064
C2065
DDR_B_DQS4 137 138

2
139 DQS4 VSS31 140 DDR_B_D38

DDR_B_D34 141 VSS32 DQ38 142 DDR_B_D39
DDR_B_D35 143 DQ34 DQ39 144 2 2
145 DQ35 VSS33 146 DDR_B_D44
DDR_B_D41 149 DQ40 DQ45 150
151 DQ41 VSS35 152 DDR_B_DQS#5
153 VSS36 DQS#5 154 DDR_B_DQS5
155 DM5 DQS5 156
DQ42 DQ46 Close to JDIMM2
DDR_B_D43 159 160 DDR_B_D47
161 DQ43 DQ47 162
DDR_B_D49 165 DQ48 DQ52 166 DDR_B_D53
167 DQ49 DQ53 168
DDR_B_DQS6 171 DQS#6 DM6 172
173 DQS6 VSS43 174 DDR_B_D54 +0.75VS
DDR_B_D51 177 DQ50 DQ55 178
179 DQ51 VSS45 180 DDR_B_D60
DDR_B_D57 183 DQ56 DQ61 184
DQ57 VSS47 1 1
SPD setting (SA0, SA1) 185 186 DDR_B_DQS#7
187 VSS48 DQS#7 188 DDR_B_DQS7 C2066 C2067
PU/PD by Channel A/B DM7 DQS7
4.7U_0603_6.3V6K
189 190
0.1U_0402_16V4Z
->Channel A 00 VSS49 VSS50 2 2

DDR_B_D58 191 192 DDR_B_D62
->Channel B 01 DDR_B_D59 193 DQ58 DQ62 194 DDR_B_D63
4 195 DQ59 DQ63 196
Layout Note: 4
197 VSS51 VSS52 198 Place near JDIMM2 Pin203 and 204
199 SA0 EVENT# 200 PM_SMBDATA
+3VS VDDSPD SDA PM_SMBDATA [10,13,40,5]
1 2 201 202 PM_SMBCLK
203 SA1 SCL 204 PM_SMBCLK [10,13,40,5]
R635 +0.75VS +0.75VS
VTT1 VTT2
1 1 10K_0402_5%
@ C2068 C2069 205 206
2.2U_0603_6.3V6K 0.1U_0402_16V4Z G1 G2
SUYIN_600023HB204G208ZL
2 2 CONN@ Issued Date 2013/04/01 Deciphered Date 2014/04/01 Title
DDRIII-SODIMM B
Custom 0.3
Standard H:9.2mm DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
ZEA00 LA-A061P M/B
A B C D E
5 4 3 2 1
U1A LPT_PCH_DT_EDS
CMOS Setting, near DDR Door @ C104

JCOMS1 6P_0402_50V8J B28 SATA_PRX_DTX_N0
SATA_RXN0 SATA_PRX_DTX_N0 [35]
+RTCVCC R71 1 2 PCH_RTCRST# 1 2 1 2 PCH_RTCX1 AN40 A28 SATA_PRX_DTX_P0
RTCX1 SATA_RXP0 SATA_PRX_DTX_P0 [35]
20K_0402_5%
C101 1 2 PCH_RTCX2 AN39 F31 SATA_PTX_DRX_N0 HDD
RTCX2 SATA_TXN0 SATA_PTX_DRX_N0 [35]
1
H31
10M_0402_5%
1U_0402_6.3V6K Y1 SATA_PTX_DRX_P0
RTC
AR39 SATA_TXP0 SATA_PTX_DRX_P0 [35]
RC Delay 18~25mS PCH_SRTCRST#
SRTCRST#
R69
D30 SATA_PRX_DTX_N1
AR41 SATA_RXN1 C30 SATA_PRX_DTX_N1 [40]
iME Setting. C102 SM_INTRUDER# SATA_PRX_DTX_P1
SATA_PRX_DTX_P1 [40]
2
D INTRUDER# SATA_RXP1 D
@ JME1 6P_0402_50V8J
m-SATA
2
R70 1 2PCH_SRTCRST# 1 2 1 2 PCH_INTVRMEN AV36 B34 SATA_PTX_DRX_N1 +3VS
INTVRMEN SATA_TXN1 C34 SATA_PTX_DRX_N1 [40]
20K_0402_5% 32.768KHZ_7PF_Q13FC135000040 SATA_PTX_DRX_P1
SATA_TXP1 SATA_PTX_DRX_P1 [40]
C103 1 2 PCH_RTCRST# AR38
1U_0402_6.3V6K RTCRST# A31 RP1
v0.3 update SATA_RXN2 B31 SATA_LED# 1 8
RC Delay 18~25mS SATA_RXP2
AZ_BITCLK AV23 GPIO21 2 7
HDA_BCLK B35 GPIO19 3 6
Integrated SUS 1.05V VRM Enable AZ_SYNC AV24 SATA_TXN2 D35 4 5
HDA_SYNC SATA_TXP2
High - Enable Internal VRs SATA Port 2~3 Is Disable For H81
PCH_INTVRMEN (must be always pulled high) PCH_SPKR R32 B32 10K_8P4R_5%
[37] PCH_SPKR SPKR SATA_RXN3 C32
+RTCVCC SATA_RXP3
SATA
AZ_RST# AU24
HDA_RST# G33 @
1 2 AT26 SATA_TXN3
AZALIA
R74 PCH_INTVRMEN AZ_SDIN0_HD F33 PCH_GPIO51 R75 1 2 10K_0402_5%
[37] AZ_SDIN0_HD HDA_SDI0 SATA_TXP3 [15] PCH_GPIO51
390K_0402_5%
AV22 BOOT Device
HDA_SDI1 A26 SATA_PRX_DTX_N4
+RTCVCC AT22 SATA_RXN4/PERN1 B26 SATA_PRX_DTX_N4 [35] Strap (SPI)
SATA_PRX_DTX_P4
HDA_SDI2 SATA_RXP4/PERP1 SATA_PRX_DTX_P4 [35]
R77 1 2 SM_INTRUDER# AW23 L28 SATA_PTX_DRX_N4 ODD
HDA_SDI3 SATA_TXN4/PETN1 K28 SATA_PTX_DRX_N4 [35]
1M_0402_5% SATA_PTX_DRX_P4
AU22 SATA_TXP4/PETP1 SATA_PTX_DRX_P4 [35]
AZ_SDOUT
HDA_SDO C27
T131PAD PCH_GPIO33 AV26 SATA_RXN5/PERN2 B27
GPIO33-->GPIO only in DT(GPO) DOCKEN#/GPIO33 SATA_RXP5/PERP2
+3VALW _PCH
SATA_RCOMP 50ohm
GPIO13-->GPIO only in DT PCH_GPIO13 AN22 G28
HDA_DOCK_RST#/GPIO13 SATA_TXN5/PETN2 F28 length<600mil
1 2 PCH_GPIO13 SATA_TXP5/PETP2 R81
R80 10K_0402_5% 7.5K_0402_1%
D33 SATA_RCOMP 1 2
PCH_SPKR Place R81 within 500 mils of

C SATA_RCOMP +1.5VS C
J39 SATA_LED#
High = Enabled (No Reboot) Has weak internal pull-down
SATALED# SATA_LED# [42] the PCH. Avoid routing next to
* +3VS Low = Disabled (Default)
PCH_JTAG_TCK Y40
JTAG_TCK SATA0GP/GPIO21
M37 GPIO21
clock pins.
PCH_JTAG_TMS W40 J40 GPIO19
@ JTAG_TMS SATA1GP/GPIO19
1 2 PCH_SPKR PCH_JTAG_TDI W39 A33 SATA_IREF @ESD@ C2141 0.1U_0402_16V4Z
JTAG
JTAG_TDI SATA_IREF +1.5VS
R82 1K_0402_5% SATA_LED# 1 2
PCH_JTAG_TDO Y38 K34 PCH_TP9 PAD T55
HDA_SYNC T56 PAD PCH_TP25 AM34
JTAG_TDO
TP25
TP9
TP8
K33 PCH_TP8 PAD T57 v0.2 update for ESD
This signal has a weak internal pull down
T58 PAD PCH_TP22 AH24
*H=>On Die PLL is supplied by 1.5V (mobile) TP22
L=>On Die PLL is supplied by 1.8V (DT) T59 PAD PCH_TP20 W37
TP20
Strap: This signal has a weak internal pull-down.
Do not pull high.
DH82LPDS_FCBGA708
AZ_SYNC_R 1 @ 2 AZ_SYNC
R87 0_0402_5%
2 1 R86
B B
1M_0402_5%
HDA_SDO
ME debug mode,
this signal has a weak internal pull down
*Low = Disable (default)
High = Enable (flash descriptor security overide)
PW RME_CTRL# 1 @ 2 AZ_SDOUT
[43] PW RME_CTRL#
R91 0_0402_5%
1 2 Remove R129 @ 5/5 for ME
R92 @ 1K_0402_5% update reserve.
RP20
1 8 AZ_SDOUT
[37] AZ_SDOUT_HD 2 7 AZ_BITCLK
[37] AZ_BITCLK_HD 3 6 AZ_RST#
[37] AZ_RST_HD# 4 5 AZ_SYNC_R
[37] AZ_SYNC_HD
33_8P4R_5%
@
A 1 2 PCH_JTAG_TCK A
R96 51_0402_1%
1 2 AZ_RST#
@ESD@ C2113 0.1U_0402_16V4Z
ESD request Close to PCH Issued Date 2013/04/01 Deciphered Date 2014/04/01 Title
1 2 AZ_RST_HD#
PCH_HDA/JTAG/SATA
@ESD@ C2136 0.1U_0402_16V4Z v0.2 update AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.3
ZEA00 LA-A061P M/B
5 4 3 2 1
5 4 3 2 1
+3VALW _PCH
U1C LPT_PCH_DT_EDS Close PCH
RP3
PCH_GPIO11 1 8
CLK_CR# AE10 AA3 CLK_PCIE_VGA# PCH_GPIO74 2 7
[36] CLK_CR# AE11 CLKOUT_PCIE_N0 CLKOUT_PEG_A# AA2 CLK_PCIE_VGA# [21] 3 6
Card Reader CLK_CR CLK_PCIE_VGA VGA CLK_DOT#
[36] CLK_CR CLKOUT_PCIE_P0 CLKOUT_PEG_A CLK_PCIE_VGA [21] 4 5
CLK_DOT
CLKREQ_CR# W34 AE6
[36] CLKREQ_CR# PCIECLKRQ0#/GPIO73 CLKOUT_PEG_B# AE7 10K_8P4R_5%
CLK_LAN# AC6 CLKOUT_PEG_B RP2
[39] CLK_LAN# AC7 CLKOUT_PCIE_N1 R2 1 8
LAN CLK_LAN CLK_CPU_DMI# PCH_CLK_DMI#
[39] CLK_LAN CLKOUT_PCIE_P1 CLKOUT_DMI# T2 CLK_CPU_DMI# [5] 2 7
CLK_CPU_DMI PCH_CLK_DMI
P39 CLKOUT_DMI CLK_CPU_DMI [5] 3 6
CLKREQ_LAN# CLKIN_GND0#
[39] CLKREQ_LAN# PCIECLKRQ1#/GPIO18 T3 4 5
CLK_DP_DN CLKIN_GND0
AC11 CLKOUT_DP# T5 CLK_DP_DN [5]
CLK_W LAN# CLK_DP_DP
D [40] CLK_W LAN# AC10 CLKOUT_PCIE_N2 CLKOUT_DP CLK_DP_DP [5] D
WLAN CLK_W LAN 10K_8P4R_5%
[40] CLK_W LAN CLKOUT_PCIE_P2
CLOCK SIGNAL
W2 CLK_DPNS_DN
P37 CLKOUT_DPNS# U2 CLK_DPNS_DN [5]
CLKREQ_W LAN# CLK_DPNS_DP
[40] CLKREQ_W LAN# PCIECLKRQ2#/GPIO20/SMI# CLKOUT_DPNS CLK_DPNS_DP [5]
CLK_TV# W11 G22 PCH_CLK_DMI# CLK_SATA# R115 1 2 10K_0402_5%
[40] CLK_TV# W10 CLKOUT_PCIE_N3 CLKIN_DMI# F22
TV Card CLK_TV PCH_CLK_DMI CLK_SATA R117 1 2 10K_0402_5%
[40] CLK_TV CLKOUT_PCIE_P3 CLKIN_DMI
TV_CLKREQ# AA39 G16 CLKIN_GND0# CLK_14M_PCH R119 1 2 10K_0402_5%
[40] TV_CLKREQ# PCIECLKRQ3#/GPIO25 CLKIN_GND# F16 CLKIN_GND0
Y4 CLKIN_GND
Y2 CLKOUT_PCIE_N4 mibile only AP11 CLK_DOT#
+3VS CLKOUT_PCIE_P4 CLKIN_DOT96# AM11 CLK_DOT
CLKREQ4 W35 CLKIN_DOT96
R120 1 2 10K_0402_5% CLKREQ_W LAN# PCIECLKRQ4#/GPIO26 H35 CLK_SATA#
R121 1 2 10K_0402_5% TV_CLKREQ# W7 CLKIN_SATA# H36 CLK_SATA
For EMI
W6 CLKOUT_PCIE_N5 mibile only CLKIN_SATA
+3VALW _PCH CLKOUT_PCIE_P5 @EMI@ @EMI@
CLKREQ5 AA36 AR7 CLK_14M_PCH CLK_PCILOOP 1 2 1 2
R123 1 2 10K_0402_5% CLKREQ_LAN# PCIECLKRQ5#/GPIO44 REFCLK14IN R122 10_0402_5% C105 22P_0402_50V8J
AA7
AA6 CLKOUT_PCIE_N6 AM22 CLK_PCILOOP
+3VS CLKOUT_PCIE_P6 CLKIN_33MHZLOOPBACK
CLKREQ6 W32
@ R659 1 2 10K_0402_5% CLKREQ4 PCIECLKRQ6#/GPIO45 N7 PCH_X1
@ R660 1 2 10K_0402_5% CLKREQ5 R6 XTAL25_IN N6 PCH_X2
@ R661 1 2 10K_0402_5% CLKREQ6 R7 CLKOUT_PCIE_N7 XTAL25_OUT
@ R662 1 2 10K_0402_5% CLKREQ7 CLKOUT_PCIE_P7
CLKREQ7 AA40 AV8
PCIECLKRQ7#/GPIO46 CLKOUTFLEX0/GPIO64 R124 2 1 1M_0402_5%
U6 AT9
U7 CLKOUT_ITPXDP# CLKOUTFLEX1/GPIO65
C CLKOUT_ITPXDP AV9 PCH_X1 PCH_X2 C
v0.2 update CLKOUTFLEX2/GPIO66
AV5
CLKOUT_33MHZ0 AU8
CLKOUTFLEX3/GPIO67 1 1
AV7 C106 C107
CLKOUT_33MHZ1
3
R127 EMI@ 22_0402_5%
CLK_PCILOOP 1 2 CLK_PCILOOP_R AU2 N10 10P_0402_50V8J Y2 10P_0402_50V8J
IN
NC OUT
CLKOUT_33MHZ2 ICLK_IREF +1.5VS 2 2
1 2 CLK_PCI_EC_R AN9
[41,43] CLK_PCI_EC CLKOUT_33MHZ3 U11 PCH_TP19
NC
R128 EMI@ 22_0402_5% T66 PAD
AU5 TP19 U10 PCH_TP18
CLKOUT_33MHZ4 TP18 T68 PAD
25MHZ_10PF_X3G025000DA1H-X
4
R11 XCLK_RBIAS 1 2
DIFFCLK_BIASREF +1.5VS
R129 7.5K_0402_1% RP5
DH82LPDS_FCBGA708 1 8 PCH_SMLDATA1
+3VALW _PCH
2 7 PCH_SMLCLK1
3 6
4 5
LPT_PCH_DT_EDS +3VS
U1D
2.2K_0804_8P4R_5% R130 4.7K_0402_5%
2
+3VS R131 4.7K_0402_5%
1 2 SERIRQ AG31 PCH_GPIO11 PCH_SMBDATA 6 1

AN24 SMBALERT#/GPIO11 PM_SMBDATA [10,11,40,5]
10K_0402_5% R132 LPC_AD0
[41,43] LPC_AD0 LAD0 AG36 PCH_SMBCLK
SMBus SMBCLK Q2A
5
LPC_AD1 AP26
[41,43] LPC_AD1 LAD1 AG32 2N7002KDW H_SOT363-6
PCH_SMBDATA
LPC_AD2 AJ24 SMBDATA PCH_SMBCLK 3 4
LPC
[41,43] LPC_AD2 LAD2 AG35 PM_SMBCLK [10,11,40,5]

PCH_GPIO60
LPC_AD3 AN26 SML0ALERT#/GPIO60 2N7002KDW H_SOT363-6
[41,43] LPC_AD3 LAD3 AE32
B PCH_SMLCLK0 Q2B B
LPC_FRAME# AP24 SML0CLK
[41,43] LPC_FRAME# LFRAME# AE35 PCH_SMLDATA0 +3VS
AK22 SML0DATA
LDRQ0# AJ39 PCH_GPIO74
SML1ALERT#/PCHHOT#/GPIO74
2
AK26
LDRQ1#/GPIO23 AK36 PCH_SMLCLK1
SERIRQ G39 SML1CLK/GPIO58 PCH_SMLDATA1 1 6
[41,43] SERIRQ SERIRQ AK33 EC_SMB_DA2 [21,43,46]
PCH_SMLDATA1
SML1DATA/GPIO75 2N7002KDW H_SOT363-6
5
Q3A
U36 CLINK_CLK
CL_CLK T69 PAD
PCH_SPICLK U39 PCH_SMLCLK1 4 3
[43] PCH_SPICLK SPI_CLK U35 EC_SMB_CK2 [21,43,46]
CLINK_DATA T70 PAD
CL_DATA
[43] PCH_SPICS#
PCH_SPICS# R38
SPI_CS0# C-Link CL_RST#
U34 CLINK_RST# T71 PAD
2N7002KDW H_SOT363-6
Q3B
+3VALW _PCH R35
R133 SPI_CS1#
1K_0402_5% R40 Control Link only for support Intel IAMT.
SPI_CS2#
SPI
1 2 PCH_SPI_IO2 A2 PCH_TP1
TP1 T73 PAD
PCH_SPISI P40
1 2 [43] PCH_SPISI SPI_MOSI A3
PCH_SPI_IO3 PCH_TP2 T74 PAD
TP2 +3VALW _PCH
R134
[43] PCH_SPISO
PCH_SPISO R36
SPI_MISO Thermal TP4
B2 PCH_TP4 T75 PAD
1K_0402_5% PCH_SPI_IO2 U40
SPI_IO2 B1 PCH_TP3 RP6
TP3 T76 PAD
PCH_SPI_IO3 U37 PCH_SMLCLK0 1 8
SPI_IO3 C3 TD_IREF 1 2 PCH_SMLDATA0 2 7
+3VALW _PCH TD_IREF 8.2K_0402_1% PCH_GPIO60 3 6
Reserve R658 for C38 R135 4 5
Please close to PCH
A
SPI ROM (8MByte )_SA000039A30 2.2K_0804_8P4R_5% A
1
1
PCH_SPI_CLK_L DH82LPDS_FCBGA708
@ R658 C108
for EMI
Now is IC Footprint
1
0_0402_5% 0.1U_0402_16V4Z
@ R137 +3VALW _BIOS 2 R139
2
0_0402_5% U2 10_0402_5%
PCH_SPICS# 1 2PCH_SPI_CS#_R 1 8 RP7 @
PCH_SPISO 1 2 PCH_SPI_SO_L 2 CS# VCC 7 PCH_SPI_IO3_R 1 8PCH_SPI_IO3 Security Classification Compal Secret Data Compal Electronics, Inc.
2
R138 PCH_SPI_IO2_R 3 DO(IO1) HOLD#(IO3) 6 PCH_SPI_CLK_L 2 7PCH_SPICLK

WP#(IO2) CLK 1 Issued Date 2013/04/01 Deciphered Date 2014/04/01 Title
15_0402_5% 4 5 PCH_SPI_SI_L 3 6PCH_SPISI C109
EMI@ GND DI(IO0) 4 5PCH_SPI_IO2 10P_0402_50V8J
PCH_CLK\LPC\SPI\SMBUS
W 25Q64FVSSIQ_SO8 @ AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
15_8P4R_5% 2 Custom 0.3
Socket P/N: SP07000H900 EMI@
ZEA00 LA-A061P M/B
5 4 3 2 1
5 4 3 2 1
D D
U1B LPT_PCH_DT_EDS
DMI_CTX_PRX_N0 L24
[6] DMI_CTX_PRX_N0 DMI_RXN0
DMI_CTX_PRX_N1 G24
[6] DMI_CTX_PRX_N1 DMI_RXN1 N1 FDI_CTX_PRX_N0
FDI_RXN0 FDI_CTX_PRX_N0 [5]
DMI_CTX_PRX_N2 F26
[6] DMI_CTX_PRX_N2 DMI_RXN2
DMI_CTX_PRX_N3 K26 P2 FDI_CTX_PRX_N1
+3VALW _PCH [6] DMI_CTX_PRX_N3 DMI_RXN3 FDI_RXN1 FDI_CTX_PRX_N1 [5]
DMI_CTX_PRX_P0 K24 N2 FDI_CTX_PRX_P0
[6] DMI_CTX_PRX_P0 DMI_RXP0 FDI_RXP0 FDI_CTX_PRX_P0 [5]
DMI_CTX_PRX_P1 H24
[6] DMI_CTX_PRX_P1 DMI_RXP1 P3 FDI_CTX_PRX_P1
FDI_RXP1 FDI_CTX_PRX_P1 [5]
RP8 DMI_CTX_PRX_P2 G26
[6] DMI_CTX_PRX_P2 DMI_RXP2
1 8 SUSW ARN#_R DMI_CTX_PRX_P3 L26 R4
[6] DMI_CTX_PRX_P3 DMI_RXP3 TP16
2 7 EC_SW I#_R PCH_DPW ROK 1 @ 2 PCH_RSMRST#
3 6 PCH_GPIO72 DMI_PTX_CRX_N0 C20 K5 R140 0_0402_5%
4 5 [6] DMI_PTX_CRX_N0 D21 DMI_TXN0 TP5
DMI_PTX_CRX_N1
[6] DMI_PTX_CRX_N1 DMI_TXN1 P5
DMI FDI TP15 Stuff R140 if do not support DeepSX state
10K_8P4R_5% DMI_PTX_CRX_N2 B22
[6] DMI_PTX_CRX_N2 A24 DMI_TXN2 L5
DMI_PTX_CRX_N3
[6] DMI_PTX_CRX_N3 DMI_TXN3 TP10
DMI_PTX_CRX_P0 B20 L2
[6] DMI_PTX_CRX_P0 B21 DMI_TXP0 FDI_CSYNC FDI_CSYNC [6]
DMI_PTX_CRX_P1
2 1 [6] DMI_PTX_CRX_P1 DMI_TXP1 L3
PCH_RSMRST#
C22 FDI_INT FDI_INT [6]
R141 10K_0402_5% DMI_PTX_CRX_P2
2 1 [6] DMI_PTX_CRX_P2 B24 DMI_TXP2 N11 +RTCVCC
PM_PW ROK DMI_PTX_CRX_P3 +1.5VS
C [6] DMI_PTX_CRX_P3 DMI_TXP3 FDI_IREF C
R142 10K_0402_5%
A19 R12
+1.5VS DMI_IREF TP17 DSW VREN R143 1 2 390K_0402_5%
+3VS L22 N12
TP12 TP13
K22 K2 FDI_RCOMP 1 2
：
TP7 FDI_RCOMP +1.5VS
2 1 PM_PW ROK DSWVREN - Internal Deep Sleep 1.05V regulator
：
@ R145 10K_0402_5% 2 1 DMI_RCOMP B19 R144 7.5K_0402_1%
+3VS
+1.5VS
R146 7.5K_0402_1% DMI_RCOMP * H Enable
L Disable
U3 SUSACK# AJ37 AM41 DSW VREN
SUSACK# DSWVRMEN
5
MC74VHC1G08DFT2G_SC70-5 R15 10K_0402_5%

1 2 XDP_DBRESET# N36 AV38 PCH_DPW ROK
System Power
VCC
+3VS SYS_RESET# DPWROK

1
[43,5,50] VGATE IN1 4 SYS_PW ROK W31 AK34 PCIE_W AKE#
2 OUT SYS_PWROK WAKE# PCIE_W AKE# [39,40]
Management
GND
[43,9] PM_PW ROK IN2

1
PM_PW ROK 1 2 PW ROK_R AT40

R147 @ R148 0_0402_5% PWROK
10K_0402_5% Platform not supporting Intel ME M3 state AA32 AD37 SUS_STAT# T89 PAD
3
APWROK SUS_STAT#/GPIO61
APWROK can be connected to PWROK. DRAMPW ROK AE38 W36 RTC_CLK T134 PAD
[5] DRAMPW ROK
2
DRAMPWROK SUSCLK/GPIO62 +3VALW _PCH

1 2 PCH_RSMRST#_RAM40 AA35 PM_SLP_S5#
[43] PCH_RSMRST# RSMRST# SLP_S5#/GPIO63 PM_SLP_S5# [43]
@ R149 0_0402_5% PCIE_W AKE# R150 1 2 1K_0402_5%
1 2 SUSW ARN#_R AG41 AT35 PM_SLP_S4# PCH_GPIO29 R152 1 2 10K_0402_5%
[43] SUSW ARN# SUSWARN#/SUSPWRNACK/GPIO30 SLP_S4# PM_SLP_S4# [43]
@ R151 0_0402_5% PCH_GPIO29 default GPI
1 2 PBTN_OUT#_R AK41 AK40 PM_SLP_S3#
[43,5] PBTN_OUT# PWRBTN# SLP_S3# PM_SLP_S3# [43] PU to +3VALW base on module design.
@ R153 0_0402_5%
SUSACK# 2 @ 1 SUSW ARN#_R 2 1 PCH_GPIO31 AM36 AN37 PM_SLP_A# T90 PAD
+3VALW _PCH ACPRESENT/GPIO31 SLP_A#
R154 0_0402_5% R155 10K_0402_5%
B PCH_GPIO72 AJ40 AK38 PM_SLP_SUS# T91 PAD B
GPIO72 SLP_SUS#
Stuff R154 if EC does not want to AE36 F40 H_PM_SYNC
RI# PMSYNCH H_PM_SYNC [5]
1 @ C2158
involve in the handshake mechanism AC35 AU36 0.1U_0402_16V7K
TP21 SLP_LAN#
for the DeepSX state entry and exit C43 PCIE_W AKE# 1 2
PCH_GPIO29 AL39 0.1U_0402_16V4Z
SLP_WLAN#/GPIO29 2
@ESD@
V1.0 update
1 2 XDP_DBRESET# DH82LPDS_FCBGA708
@ESD@ C2114 0.1U_0402_16V4Z Platform not supporting Intel ME M3 state
1 2 SYS_PW ROK
PM_SLP_A# can be left NC
@ESD@ C2115 0.1U_0402_16V4Z
1 2 DRAMPW ROK
@ESD@ C2116 0.1U_0402_16V4Z
1 2 PW ROK_R
@ESD@ C2117 0.1U_0402_16V4Z
1 2 PCH_RSMRST#_R
@ESD@ C2118 0.1U_0402_16V4Z
1 2 PCH_DPW ROK
@ESD@ C2119 0.1U_0402_16V4Z
1 2 PM_PW ROK
@ESD@ C2120 0.1U_0402_16V4Z
ESD request Close to PCH
A A

PCH_DMI/FDI/PM
Custom 0.3
ZEA00 LA-A061P M/B
5 4 3 2 1
5 4 3 2 1
+3VS
PCI PU resistor 2 1 PCH_GPIO53
RP9 @ R157 10K_0402_5%
1 8 PCI_PIRQD# 2 1 PCH_GPIO55
2 7 PCI_PIRQB# @ R158 10K_0402_5%
3 6 PCH_GPIO5
4 5 PCI_PIRQC#
Internal pull high
8.2K_8P4R_5%
R159 1 2 8.2K_0402_5% PCH_GPIO50 Strap defalut high
R160 1 2 8.2K_0402_5% PCH_GPIO52
R161 1 2 8.2K_0402_5% PCH_GPIO54 GPIO53 DMI AC mode if Low
RP10 GPIO55 A16 SWAP OVERRIDE if Low
1 8 PCH_GPIO4
D 2 7 PCI_PIRQA# D
3 6 PCH_GPIO3
4 5 PCH_GPIO2
+3VS +5VS
8.2K_8P4R_5% RP17
1 CRT@ 2 PCH_CRT_CLK NOTE:PCH adds support for panel power sequencing required for PCH_DPD_CLK 1 8 Q57
2
G
R162 2.2K_0402_5% PCH_DPD_DAT 2 7 BSS138LT1G_SOT23-3
1 CRT@ 2 PCH_CRT_DATA
embedded DisplayPort support. L_VDDEN, L_BKLTEN and L_BKLTCTL pins are PCH_HDMIOUT_CLK 3 6
R163 2.2K_0402_5% added on the PCH for panel power sequencing. It is important to note that a 6 PCH_HDMIOUT_DATA 4 5 DDPD_HPD 3 1
PCH_DDPD_HPD [29]
RP11 layer board design may be required to access these pins on the PCH package
1
1 8 PCH_CRT_B in a fully featured platform design. 2.2K_0804_8P4R_5%
2 7 PCH_CRT_G 1 2 R606
3 6 PCH_CRT_R R605 @ 0_0402_5% 100K_0402_5%
4 5
2
150_0804_8P4R_1%
CRT@ Close to PCH <250mils U1E LPT_PCH_DT_EDS Data Need longer than CLK 1 inch
HDMI OUT Seperate U10, U57 location
PCH_CRT_B AC3 AM1 PCH_HDMIOUT_CLK
[41] PCH_CRT_B VGA_BLUE DDPB_CTRLCLK PCH_HDMIOUT_CLK [30] (To Conn.) @ R164
PCH_CRT_G AE2 AJ5 PCH_HDMIOUT_DATA 0_0402_5%
[41] PCH_CRT_G VGA_GREEN DDPB_CTRLDATA PCH_HDMIOUT_DATA [30] 1 2
PCH_CRT_R AC2 AN3 PCH_HDMI_CLK
[41] PCH_CRT_R VGA_RED DDPC_CTRLCLK PAD T92 +3VS
PCH_CRT_CLK AL2 AM2 PCH_HDMI_DATA
[41] PCH_CRT_CLK VGA_DDC_CLK DDPC_CTRLDATA PAD T93
PCH_CRT_DATA AL3 AN4 PCH_DPD_CLK eDP 1
CRT
[41] PCH_CRT_DATA VGA_DDC_DATA DDPD_CTRLCLK C111
[41] PCH_CRT_HSYNC
PCH_CRT_HSYNC AH3
VGA_HSYNC DDPD_CTRLDATA
AN2 PCH_DPD_DAT (LVDS Converter) 0.1U_0402_16V4Z
PCH_CRT_VSYNC AH2 2
[41] PCH_CRT_VSYNC VGA_VSYNC
5
C AK6 DDPB_AUXN U4 C
Disable use 1K on mobile DDPB_AUXN PAD T96
1 2 CRT_IREF AF5 MC74VHC1G08DFT2G_SC70-5
DISPLAY
VCC
DAC_IREF AG7 DDPC_AUXN PCH_PLT_RST# 1
DDPC_AUXN PAD T97 IN1
R165 649_0402_1% AG4 4 PLT_RST#
VGA_IRTN AG11 OUT PLT_RST# [21,41,43]
CRT_IREF Close to PCH <500mils PCH_DDPD_AUXN C112 1 2 0.1U_0402_16V4Z
LVDS Converter 2
GND
DDPD_AUXN PCH_DDPD_AUXN_C [29] IN2
For GPU/TPM/EC
PCH_EDP_PWM AP2 AK8 DDPB_AUXP
To Converter [29] PCH_EDP_PWM EDP_BKLTCTL DDPB_AUXP PAD T98
1
LVDS
3
PCH_EDP_BLEN AT2 AG6 DDPC_AUXP
[29] PCH_EDP_BLEN EDP_BKLTEN DDPC_AUXP PAD T99
R166
v0.2 update PCH_EDP_VDDEN AP1 AG10 PCH_DDPD_AUXP C113 1 2 0.1U_0402_16V4Z 100K_0402_5%
T133 PAD EDP_VDDEN DDPD_AUXP PCH_DDPD_AUXP_C [29] LVDS Converter
2
AJ2 PCH_HDMIOUT_HPD
PCI_PIRQA# AU29 DDPB_HPD PCH_HDMIOUT_HPD [30] HDMI OUT
PIRQA# AH5 DPD_HPD
DDPC_HPD PAD T100
PCI_PIRQB# AU27
PIRQB# AJ4 DDPD_HPD R677 0_0402_5%
PCI_PIRQC# AW28 DDPD_HPD LVDS Converter 1 2
PIRQC# +3VALW_PCH
1 2
+3VS
PCI_PIRQD# AV27 @ R678 0_0402_5%
PIRQD# AR30 PCH_GPIO2
PIRQE#/GPIO2 v0.3 update
1 2 PCH_GPIO50 AH26 1
[21,43] DGPU_HOLD_RST#
@R167
@ R167 0_0402_5% GPIO50 AV29 PCH_GPIO3 @ C2029
for wake from WLAN(BCM43142)
PCH_GPIO52 AJ26 PIRQF#/GPIO3 0.1U_0402_16V4Z
1 2 AW33
GPIO52 PCI PIRQG#/GPIO4
AV28 PCH_GPIO4
2
For Card reader/
PCH_GPIO54
[23,43] DGPU_PWR_EN
@R170
@ R170 0_0402_5% GPIO54 AT27 PCH_GPIO5 LAN/WLAN/TV
PIRQH#/GPIO5
5
PCH_GPIO51 AU31 U5
[12] PCH_GPIO51 GPIO51 AA31 PCI_PME# PAD T101
PADT101 MC74VHC1G08DFT2G_SC70-5
VCC
PCH_GPIO53 AV31 PME# 1
GPIO53 AA37 PCH_PLT_RST# PCH_DDPD_AUXN_C R172 1 @ 2 100K_0402_5% IN1 4
PLTRST# +3VS OUT PLT_A_RST# [36,39,40]
PCH_GPIO55 R30 1 2
GND
B GPIO55 IN2 B
1
C2121 PCH_DDPD_AUXP_C R173 1 @ 2 100K_0402_5% 1
0.1U_0402_16V4Z
3
2 R171 C2135 ESD@
DH82LPDS_FCBGA708 @ESD@ CRB Reserve PU/PL 100K_0402_5% 0.1U_0402_16V4Z
2
2
v0.2 update
A A

PCH_CRT/DDC
Custom 0.3
ZEA00 LA-A061P M/B
5 4 3 2 1
5 4 3 2 1
C117/C118 --> Close to U36

D
C115/C116 --> Close to U25 Close to device side CAM & Touch Can't in same USB2.0 Controller for C38 D
U1I LPT_PCH_DT_EDS
C119/C120 --> Close to JMINI2
PCIE_PRX_CRTX_N1 L14 AV10 USB20_N0
[36] PCIE_PRX_CRTX_N1 K14 PERN1/USB3RN3 USB2N0 AU10 USB20_N0 [33]
PCIE_PRX_CRTX_P1 USB20_P0
[36] PCIE_PRX_CRTX_P1 PERP1/USB3RP3 USB2P0 AV11 USB20_P0 [33]
USB20_DEBN1 USB 3.0 side IO
2 1 0.1U_0402_16V7K B12 USB2N1 AW11 USB20_DEBN1 [33]
Card Reader [36] PCIE_PTX_C_CRRX_N1 C115 PCIE_PTX_CRRX_N1 USB20_DEBP1
2 1 0.1U_0402_16V7K B11 PETN1/USB3TN3 USB2P1 AN14 USB20_DEBP1 [33]
[36] PCIE_PTX_C_CRRX_P1 C116 PCIE_PTX_CRRX_P1 USB20_N2
PETP1/USB3TP3 USB2N2 AP14 USB20_N2 [34]
USB20_P2
F14 USB2P2 AJ16 USB20_P2 [34]
PCIE_PRX_LANTX_N2 USB20_N3 Rear IO USB 2.0 Port 1 & 2
[39] PCIE_PRX_LANTX_N2 G14 PERN2/USB3RN4 USB2N3 AK16 USB20_N3 [34]
PCIE_PRX_LANTX_P2 USB20_P3
[39] PCIE_PRX_LANTX_P2 PERP2/USB3RP4 USB2P3 AU15 USB20_P3 [34]
LAN USB20_N4
2 1 0.1U_0402_16V7K D11 USB2N4 AV15 USB20_N4 [40]
[39] PCIE_PTX_C_LANRX_N2 C117 PCIE_PTX_LANRX_N2 USB20_P4 WLAN
2 1 0.1U_0402_16V7K C11 PETN2/USB3TN4 USB2P4 AU12 USB20_P4 [40]
[39] PCIE_PTX_C_LANRX_P2 C118 PCIE_PTX_LANRX_P2 USB20_N5
PETP2/USB3TP4 USB2N5 AT12 USB20_N5 [41]
USB20_P5 Touch
USB2P5 AV14 USB20_P5 [41]
PCIE_PRX_W LANTX_N3 F11 USB2N6 AW14
[40]
[40]
PCIE_PRX_W LANTX_N3
PCIE_PRX_W LANTX_P3
PCIE_PRX_W LANTX_P3 H11 PERN3
PERP3
USB2P6
USB2N7
AU17 USB2.0 Port 6,7,12,13 Is Disable For H81
WLAN AT17
C119 2 1 0.1U_0402_16V7K PCIE_PTX_W LANRX_N3 B9 USB2P7 AW16 USB20_N8
[40] PCIE_PTX_C_W LANRX_N3 PETN3 USB2N8 USB20_N8 [34]
C120 2 1 0.1U_0402_16V7K PCIE_PTX_W LANRX_P3 A9 AV16 USB20_P8
[40] PCIE_PTX_C_W LANRX_P3 PETP3 USB2P8 USB20_P8 [34]
AN16 USB20_N9 Rear IO USB 2.0 Port 3 & 4
J11 USB2N9 AP16 USB20_DEBN9 [34]
PCIE_PRX_TVTX_N4 USB20_P9
[40] PCIE_PRX_TVTX_N4 L11 PERN4 USB2P9 AJ18 USB20_DEBP9 [34]
PCIE_PRX_TVTX_P4 USB20_N10
[40] PCIE_PRX_TVTX_P4 PERP4 USB2N10 AK18 USB20_N10 [40]
TV Card USB20_P10 TV
B8 USB2P10 AP18 USB20_P10 [40]
[40] PCIE_PTX_TVRX_N4 PCIE_PTX_TVRX_N4 USB20_N11
C8 PETN4 USB2N11 AN18 USB20_N11 [41]
[40] PCIE_PTX_TVRX_P4 PCIE_PTX_TVRX_P4 USB20_P11 Int. Camera
PETP4 USB2P11 AW18 USB20_P11 [41]
USB2N12
PCIe
G9 AV18
T102 PAD
USB2.0 Port 6,7,12,13 Is Disable For H81
USB
F9 PERN5 USB2P12 AP20
0.1U close to JMINI1 T103 PAD PERP5 USB2N13 AN20
C B7 USB2P13 C
T104 PAD PETN5
A7
T105 PAD PETP5 F20 U3RXDN_A
F7 USB3RN1 G20 U3RXDN_A [33]
T106 PAD U3RXDP_A Side IO USB 3.0 Port 2 (Charger)
H7 PERN6 USB3RP1 B18 U3RXDP_A [33]
T107 PAD U3TXDN_A
PERP6 USB3TN1 C18 U3TXDN_A [33]
U3TXDP_A
E1 USB3TP1 G18 U3TXDP_A [33]
T108 PAD U3RXDN_B
D2 PETN6 USB3RN2 H18 U3RXDN_B [33]
T109 PAD U3RXDP_B
PETP6 USB3RP2 B15 U3RXDP_B [33]
U3TXDN_B Side IO USB 3.0 Port 1 (Debug)
K6 USB3TN2 B16 U3TXDN_B [33]
U3TXDP_B
K8 PERN7 USB3TP2 K20 U3TXDP_B [33]
PERP7 USB3RN5 L20
G3 USB3RP5 D15
G5 PETN7 USB3TN5 C15
PETP7 USB3TP5 L18
PCIE Port 7~8 Is Disable For H81 J2 USB3RN6 K18 USB3.0 Port 5~6 Is Disable For H81
J3 PERN8 USB3RP6 B14
PERP8 USB3TN6 A14
H2 USB3TP6
H1 PETN8 AV20 USBBIAS 1 2
PETP8 USBRBIAS# AU20 R174 22.6_0402_1%
USB_BIAS trace <500mils
USBRBIAS
B13 AK14
+1.5VS PCIE_IREF TP24 PAD T110
AJ14
TP23 PAD T111
L16 AE40 USB30_OC#0 Side IO USB 3.0 Port 1 & 2
T112 PAD TP11 OC0#/GPIO59 USB30_OC#0 [33]
AF37 USB_OC#1
OC1#/GPIO40 AD39 USB_OC#2
USB_OC#1 [34] Rear IO USB 2.0 Port 1 & 2
K16 OC2#/GPIO41 AD40 USB_OC#3
T113 PAD TP6 OC3#/GPIO42 AF39 USB_OC#4
OC4#/GPIO43 AC41 USB_OC#5
B 1
R175
2 PCIE_RCOMP C13 OC5#/GPIO9 AF40 USB_OC#6
USB_OC#5 [34] Rear IO USB 2.0 Port 3 & 4 +3VALW _PCH B
+1.5VS PCIE_RCOMP OC6#/GPIO10 AG40 USB_OC#7
7.5K_0402_1% OC7#/GPIO14
RP12
DH82LPDS_FCBGA708 USB_OC#1 1 8
USB_OC#6 2 7
USB_OC#4 3 6
USB_OC#7 4 5
10K_8P4R_5%
RP13
USB_OC#5 1 8
USB_OC#2 2 7
USB_OC#3 3 6
USB30_OC#0 4 5
10K_8P4R_5%
A A

PCH_PCI-E/USB
Custom 0.3
ZEA00 LA-A061P M/B
5 4 3 2 1
5 4 3 2 1
+3VALW _PCH +3VS
2 1 PCH_GPIO15 1 2 PCH_GPIO0 SKU ID GPIO68 GPIO69 GPIO69 SKU ID TABLE

R176 1K_0402_5% R177 10K_0402_5%
RP14
120821 SKU1 0 0 0
1 8 PCH_GPIO1
1 2 PCH_GPIO57 2 7 PCH_GPIO6 SKU2 0 0 1
R179 10K_0402_5% 3 6 EC_SCI#
4 5 PCH_GPIO17 SKU3 0 1 0 +3VS +3VS +3VS +3VS
GPIO8 SKU4 0 1 1
10K_8P4R_5%
1
Integrated Clock Chip Enable (Removed) GPIO68_H@ GPIO69_H@ GPIO70_H@
1 2 PCH_GPIO24 SKU5 1 0 0 R181 R180 R182 R183
H: Disable R663 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
L: Enable 1 2 PCH_GPIO38 SKU6 1 0 1
D
* R184 10K_0402_5%
SKU7 1 1 0
D
2
1 2 PCH_GPIO39 PCH_GPIO68 PCH_GPIO69 PCH_GPIO70 PCH_GPIO71
+3VALW _PCH R185 10K_0402_5%
SKU8 1 1 1
1
1 2 PCH_GPIO48 GPIO68_L@ GPIO69_L@ GPIO70_L@ @
R186 10K_0402_5% R188 R187 R189 R190
1
@ 1 2 PCH_GPIO32 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%

R192 @ R191 10K_0402_5%
10K_0402_5%
2
RP15
1 8
2
EC_SMI# 2 7 PCH_GPIO35
GPIO8 no longer a strap, 3 6 PCH_GPIO22
2
@ 4 5 PCH_GPIO34
R193 GPIO8 is determined /override by soft strap. @ESD@ C2122 0.1U_0402_16V4Z +3VS
1K_0402_5% 10K_8P4R_5% 1 2
U1F LPT_PCH_DT_EDS GATEA20
GATEA20 [43]
1
PCH_GPIO0 G38 N30 @ESD@ C2123 5P_0402_50V GATEA20 1 2

BMBUSY#/GPIO0 TP14 1 2 R194 10K_0402_5%
This signal has a weak internal pull-up but EC_SMI# AC40 G40 PCH_PECI_R 1 2 KB_RST# 1 2
[43] EC_SMI# GPIO8 PECI H_PECI [43,5]
@ R195 0_0402_5% R196 10K_0402_5%
requires an external pull down. GPO AL40 K36 KB_RST#
CPU/Misc
LAN_PHY_PWR_CTRL/GPIO12 RCIN# KB_RST# [43]
The current default is clock enable PCH_GPIO15 AC32 D40 H_PW RGOOD
GPIO15 PROCPWRGD H_PW RGOOD [5]
PCH_GPIO16 M39 C40 H_THERMTRIP#
SATA4GP/GPIO16 THRMTRIP# 1 2 H_THERMTRIP# [5]
+3VALW _PCH L38 F41 DGPU_THERMTRIP# [21]
PCH_GPIO22 @ R197 0_0402_5%
SCLOCK/GPIO22 PLTRST_PROC#
2 1 AE34 V28 CPU_PLTRST# [5]
PCH_GPIO27 T115 PAD PCH_GPIO24 1
R199 10K_0402_5% GPIO24 VSS
C PCH_GPIO27 AU34 C2124 H_PW RGOOD 1 2 C
GPIO27 @ESD@ C2125 0.1U_0402_16V4Z
In Deep Sleep Power Well. Unmuxed. GPIO 2
0.1U_0402_16V4Z
PCH_GPIO28 V41
Defaults to GPI. GPIO28 @ESD@
H_THERMTRIP# 1 2
Not used Weak pull-up 10kΩ to VccDSW3_3 PCH_GPIO32 N32
GPIO32
@EMI@ C125 0.1U_0402_16V4Z
AL31
-->Check list1.5 P402. PCH_GPIO34 N34 PWM0
V0.3 update for sequence EA
PD to GND for Huron River!! GPIO34 AM31
PCH_GPIO35 M40 PWM1
GPIO35/NMI# AP31
PCH_GPIO36 H40 PWM2
GPO SATA2GP/GPIO36
GPIO28 AV30
PCH_GPIO37 N41 PWM3
GPO SATA3GP/GPIO37
On-Die PLL Voltage Regulator AP28 PCH_GPIO17 1 2
TACH0/GPIO17 DGPU_PW ROK [23,52,53]
PCH_GPIO38 H41 @ R200 0_0402_5%
* H: Enable SLOAD/GPIO38
TACH1/GPIO1
AT31 PCH_GPIO1
L: Disable PCH_GPIO39 R31
SDATAOUT0/GPIO39 AM28 PCH_GPIO6
+3VALW _PCH PCH_GPIO48 L40
SDATAOUT1/GPIO48
FAN TACH2/GPIO6
AV34 EC_SCI#
TACH3/GPIO7 EC_SCI# [43]
PCH_GPIO49 N40
SATA5GP/GPIO49
1
AT30 PCH_GPIO68
R201 PCH_GPIO57 AC36 TACH4/GPIO68
GPIO57 AV35 PCH_GPIO69
1K_0402_5% TACH5/GPIO69
AK28 PCH_GPIO70
2
PCH_GPIO28 TACH6/GPIO70
AT1 AT34 PCH_GPIO71
Config PCHSTRAP 4&9
AT41 VSS TACH7/GPIO71
AU1 VSS AJ31 PCH_SST
AV1 VSS SST PADT116
PADT116 Set by GPIO16/49 11
+3VS VSS Server/Workstation only.
B AV2 B
AV40 VSS
AV41 VSS AF3
USB X6,PCIEX8,SATAX4 01
1 2 PCH_GPIO36 AW2 VSS VSS AV21
@ R202 10K_0402_5% AW40 VSS VSS V38
1 2 PCH_GPIO37 B40 VSS VSS V40
USB X4,PCIEX8,SATAX6 00
@ R203 1K_0402_5% B41 VSS
VSS
NCTF VSS
VSS
W12 +3VS
1 2 PCH_GPIO36 C41 W20
@ R204 10K_0402_5% D1 VSS VSS W22 1 2 PCH_GPIO16
1 2 PCH_GPIO37 D41 VSS VSS W28 R205 10K_0402_5%
@ R206 10K_0402_5% AC31 VSS VSS W3 1 2 PCH_GPIO49
VSS VSS R207 10K_0402_5%
Clock validation strap

ICG is EN when LOW DH82LPDS_FCBGA708
*GPIO36 with internal pull-down
TLS
Hi:with confidentiality
Low:with no confidentiality
*GPIO37 with internal pull-down
A A

PCH_CPU/GPIO
Custom 0.3
ZEA00 LA-A061P M/B
5 4 3 2 1
5 4 3 2 1
+PCH_VCCDSW3_3
1 2 +3VALW_PCH
Close to AK20 @ RH1 0_0402_5%
0.1U_0402_16V4Z
+3VALW_PCH U1H LPT_PCH_DT_EDS CH3
+3VALW_PCH 1U_0402_6.3V6K 1
CH4
AH18
AH20 VCCSUS3_3 AK20 1 2
VCCSUS3_3 VCCSUS3_3
0.1U_0402_16V4Z
AH22 P20 Close to AW39

D +1.05VS_VPCH AJ20 VCCSUS3_3 VCCSUS3_3 2 D
1 VCCSUS3_3 AW38 +PCH_VCCDSW3_3
VCCDSW3_3
CH1
U8 AW39
VSS VCCDSW3_3 AV39
2 +3VS AP22 VCCDSW3_3 +3VS
VCCUSBPLL
1U_0402_6.3V6K
USB
AH28 +PCH_VCCSST 1 2
1
AF26
VCC3_3
GPIO/LPCInternal
VRM
DCPSST CH5 0.1U_0402_16V4Z
CH2
AG1 Close to AW21

AF20 VCC3_3 B6
2 VCCIO VCC3_3
1U_0402_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 +1.05VS_VPCH AF22 AW21
VCCIO VCC3_3 +3VALW_PCH
1U_0402_6.3V6K
AF23 1 1 1
VCCIO
CH6
M14
VCCIO
CH7
CH8
CH9
AC12 +1.05VS_VPCH
2 +1.05V_+1.5V_RUN +PCH_USB_DCPSUS2 AJ22 VCCIO
DCPSUS2 +3VALW_PCH 2 2 2
1U_0402_6.3V6K
close to AP22 1
0.1U_0402_16V4Z
A40 Close to B6
VCCVRM
CH10
AW26
Azalia VCCSUSHDA 1
10U_0603_6.3V6M
1 +PCH_VCC +PCH_VCC AB1
2 VCC
CH12
close to AF26 Close to AG1
+RTCVCC
CH11
1U_0402_6.3V6K
AM7 AP35 1
AM9 VCCCLK3_3 VCCSUS3_3 2
2 VCCCLK3_3
CH13
AP33 Close to AW26
AP5 VCCRTC CH14
close to M14 +PCH_VCCCLK3_3 VCCCLK3_3 RTC 2
0.1U_0402_16V4Z
1U_0402_6.3V6K
AP7 Internal DCPRTC AW35 +PCH_DCPRTC 1 2
VCCCLK3_3
VRM 1 1
AR4 0.1U_0402_16V4Z
VCCCLK3_3
CH15
CH16
AT5 Close to AP35
VCCCLK3_3
ICC
+1.05VS_VPCH AG12 C39 +PCH_VPROC +3VALW_PCH 2 2
1 2
AK11 VCCCLK3_3
VCCCLK3_3
CPU V_PROC_IO
+PCH_USB_DCPSUS2
1U_0402_6.3V6K
@ RH3 0_0402_5% AV3 R41 1 @ 2 Close to AP33
VCCCLK3_3 VCCSPI
1U_0402_6.3V6K
1 Integrated VRMs enabled. DCPSUS1, DCPSUS2 and

AV4
VCCCLK3_3 SPI RH10 0_0402_5%
1
@ CH17
AW3
DCPSUS3 can be left floating. VCCCLK3_3
CH18
AW4 W26
VCCCLK3_3 VCCASW +1.05VS_VPCH
AW9
2 VCCCLK3_3 AD25 2
C C
U12 VCCASW
+PCH_VCCCLK VCCCLK
V14 T14
W14 VCCCLK VCCVRM
VCCCLK B4 +PCH_VPROC
AB2 VCCVRM +1.05VS_VPCH
AA16 VCCCLK C1
W16 VCCCLK VCCVRM +PCH_VPROC 1 2
VCCCLK C2 @ R210 0_0805_5%
DH82LPDS_FCBGA708 VCCVRM +1.5VS
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1U_0402_6.3V6K
T16
VCCCLK
0.1U_0402_16V4Z
V16 1 1 1
VCCCLK
1
CH20
CH21
CH22
CH19
2 2 2
2
Close to T14 Close C39
+1.05VS_VPCH +PCH_VCCCLK
1 2
@ R211 0_0805_5%
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
@ CH23
1 1 1 1 1 1
CH24
CH25
CH26
CH27
CH28
2 2 2 2 2 2
AA16, W16 Place near pin U12 Place near pin W14 Place near pin AB2 Place near pin V16
B +3VS B
+PCH_VCCCLK3_3
1 2 R213
@ R212 0_0805_5% 1K_0402_5%
+RTCVCC D1
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
2+RTCBATT_R 1 2
+RTCBATT
1 1 1 1 +RTCVCC 1
CH29
CH30
CH31
CH32
3
+3VSB
1 1
BAV70W_SOT323-3
2 2 2 2 @ C127 C128
0.1U_0402_16V4Z 1U_0402_6.3V6K
2 2
Place near pin AV4 Place near pin AR4 Place near pin AT5 Place near pin AP5
Close to AP33
+1.05VS_VPCH +PCH_VCC
LH1
1 2 +PCH_VCC
10UH_LQM21FN100M70L _20%
10U_0603_6.3V6M
1U_0402_6.3V6K
1 1
CH33
CH34
10uH
2 2
A A
Place near pin AB1

PCH_POWER-1
C 0.3
ZEA00 LA-A061P M/B
5 4 3 2 1
5 4 3 2 1
If CRT disable Pin AF2 & Pin AE1 can connect to GND
1 2
RH11 0_0402_5%
D D
CRT@ LH2 PCH Power Rail Table
+VCCADAC 1 2
+1.5VS
BLM18PG181SN1D_0603
0.01U_0402_16V7K
CRT@ CH35
0.1U_0402_16V4Z
CRT@ CH40
10U_0603_6.3V6M
Voltage Rail Voltage S0 Iccmax Current (A)
1 1 1
@
CH36
VCC 1.05V 1.29 A
2 2 2
U1G LPT_PCH_DT_EDS As Intel recommend to unpop VCCIO 1.05V 3.629 A
+1.05VS_VPCH +1.05V_+1.5V_RUN
AF2
VCCADAC1_5
10U_0603_6.3V6M
VCCADAC1_5 1.5V 0.070 A
10U_0603_6.3V6M
AA19 V26 CRT@ RH4 0_0402_5%

VCC CRT DAC VSS +1.05VS_VPCH
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 1 AA20 1 2 1
VCC +3VS
@CH42
@
AB16 AE1 +3VS_AE1 1 2 VCCADAC3_3 3.3V 0.0133 A
VCC VCCADACBG3_3
CH41
CH37
CH38
CH39
1U_0402_6.3V6K
CH42
AB17
AB19 VCC RH5 0_0402_5%
2 2 2 2 VCC 1 2
AB20 B37 VCCCLK 1.05V 0.306 A
VCC VCCVRM +3VS
CH43
AD16
VCC
V17
V19 VCC
VCC
FDI VCCIO
P14
2
VCCCLK3_3 3.3V 0.055 A
0.1U_0402_16V4Z
V20 P16
V22 VCC VCCIO +3VALW_PCH
VCC 1 Close to P14, P16
V23 U30 VCCVRM 1.5V 0.179 A
VCC VCC3_3
0.1U_0402_16V4Z
CH44
V25
W17 VCC HVCMOS VCC3_3
W30
1
W19 VCC AE30 +PCH_USB_DCPSUS1 2
VCC DCPSUS1 VCC3_3 3.3V 0.133 A
CH45
W23 Close to W30
W25 VCC AM33
VCC VCCSUS3_3
Close to AN33 2
Core
AN33 VCCASW 1.05V 0.67 A

C +1.05VS_VPCH VCCSUS3_3 +1.05V_+1.5V_RUN C
Internal
+PCH_VCCDSW AU41 P19 +PCH_USB_DCPSUS3
AU40 DCPSUSBYPVRM
DCPSUSBYP
USB3 DCPSUS3
VCCIO
P17
+1.05VS_VPCH
VCCSUSHDA 3.3V 0.01 A
AA23 A38
VCCASW VCCVRM +1.05V_+1.5V_RUN
10U_0603_6.3V6M
1U_0402_6.3V6K
10U_0603_6.3V6M
AA25 K1 1
VCCASW VCCVRM
22U_0805_6.3V6M
@ CH48
1 1 1 AA26 A4 VCCSPI 3.3V 0.022 A
AB22 VCCASW VCCVRM
VCCASW
CH46
CH47
C129
AB23 B39
VCCASW VCCVRM +1.05V_+1.5V_RUN 2
10U_0603_6.3V6M
AB25 1 VCCSUS3_3 3.3V 0.261 A
2 2 2 AB26 VCCASW
VCCASW
PCIe/DMI VCCIO
P22
+1.05VS_VPCH
CH49
AD17
VCCASW
10U_0603_6.3V6M
AD19 A39 VCCDSW3_3 3.3V 0.015 A
AD20 VCCASW VCCVRM 2
AD22 VCCASW
VCCASW
SATA VCCIO
P23
1
CH50
AD23 V_PROC_IO 1.05V 0.004 A
AF25 VCCASW P25
Close to PIN AD17,AD19 VCCASW VCCIO 2
P26 +1.05VS_VPCH
VCCIO P28
VCCIO T19
VCCMPHY VCCIO
VCCIO
T20
AF19
VCCIO
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
1 1 1 1 1 1
+1.05VS_VPCH
CH51
CH52
CH53
CH54
CH55
CH56
DH82LPDS_FCBGA708 @
+PCH_USB_DCPSUS1 2 1
2 2 2 2 2 2 0_0402_5% RH6
1U_0402_6.3V6K
1
@ CH57
1 2 +PCH_VCCDSW +1.5VS +1.05V_+1.5V_RUN
RH7 5.11_0402_1%
+PCH_VCCDSW_R
2
Integrated VRMs enabled. DCPSUS1, DCPSUS2 and
2 @ 1 Close to P17,P26,P28,AF19
B RH8 0_0603_5%
DCPSUS3 can be left floating. B
+1.05VS_VPCH
@
1U_0402_6.3V6K
+PCH_USB_DCPSUS3 1 2
RH9 0_0603_5%
10U_0603_6.3V6M
1U_0402_6.3V6K
1
1 1
CH58
@ CH59
@ CH60
2
2 2
A A

PCH_POWER-2
Custom 0.3
ZEA00 LA-A061P M/B
5 4 3 2 1
5 4 3 2 1
U1J LPT_PCH_DT_EDS
A12 G2 U1K LPT_PCH_DT_EDS

A16 VSS VSS H4
A21 VSS VSS H6 U32 AK24
A35 VSS VSS H8 W5 VSS VSS AK37
B3 VSS VSS H9 W8 VSS VSS AL5
B25 VSS VSS H14 Y1 VSS VSS AL11
B30 VSS VSS H16 Y41 VSS VSS AL37
B33 VSS VSS H20 AA5 VSS VSS AM4
B38 VSS VSS H22 AA8 VSS VSS AM6
C6 VSS VSS H26 AA10 VSS VSS AM8
D VSS VSS VSS VSS D
D4 H34 AA14 AM18
D6 VSS VSS H38 AA17 VSS VSS AM20
D7 VSS VSS J5 AA22 VSS VSS AM24
D12 VSS VSS K4 AA34 VSS VSS AM38
D13 VSS VSS K9 AB4 VSS VSS AN28
D14 VSS VSS K31 AB14 VSS VSS AP4
D16 VSS VSS L37 AB28 VSS VSS AP9
D18 VSS VSS L41 AC5 VSS VSS AR11
D19 VSS VSS M16 AC8 VSS VSS AR35
D20 VSS VSS M18 AC30 VSS VSS AR37
D22 VSS VSS M20 AC34 VSS VSS AT7
D24 VSS VSS M22 AC38 VSS VSS AT8
D25 VSS VSS M24 AD14 VSS VSS AT10
D28 VSS VSS N4 AE4 VSS VSS AT15
E3 VSS VSS R1 AF14 VSS VSS AT23
E12 VSS VSS T17 AG2 VSS VSS AT33
E38 VSS VSS T25 AG34 VSS VSS AU3
F18 VSS VSS T26 AG38 VSS VSS AU39
C F24 VSS VSS T28 AH14 VSS VSS AV12 C
F35 VSS VSS U1 AH16 VSS VSS AV17
F37 VSS VSS U4 AJ1 VSS VSS AV33
F38 VSS VSS U31 AJ28 VSS VSS AW7
VSS VSS AK9 VSS VSS AW30
VSS VSS
DH82LPDS_FCBGA708
DH82LPDS_FCBGA708
B B
A A

PCH_GND
Custom 0.3
ZEA00 LA-A061P M/B
5 4 3 2 1
5 4 3 2 1
PCIE_CTX_C_GRX_P[0..15]
[6] PCIE_CTX_C_GRX_P[0..15]
PCIE_CTX_C_GRX_N[0..15] DIS@
[6] PCIE_CTX_C_GRX_N[0..15]
U6A DIS@ +3VS_VGA R214 1 2 10K_0402_5%
DGPU_THERMTRIP# [17]
@
PCIE_GTX_C_CRX_P[0..15] PCIE_CTX_C_GRX_P0 AN12 Part 1 of 7 C130 2 1 0.1U_0402_10V6K
[6] PCIE_GTX_C_CRX_P[0..15]
3
PCIE_CTX_C_GRX_N0 AM12 PEX_RX0 P6 GPU_VID4
PEX_RX0_N GPIO0 T117
PCIE_CTX_C_GRX_P1 AN14 M3 GPU_VID3 0327 Update Q4B
PCIE_GTX_C_CRX_N[0..15] PEX_RX1 GPIO1 T118
[6] PCIE_GTX_C_CRX_N[0..15] PCIE_CTX_C_GRX_N1 AM14 L6 DMN66D0LDW-7 2N_SOT363-6
PCIE_CTX_C_GRX_P2 AP14 PEX_RX1_N GPIO2 P5 VGA_GPIO3 5 DIS@
PEX_RX2 GPIO3 T129
PCIE_CTX_C_GRX_N2 AP15 P7 DIS@
6
PCIE_CTX_C_GRX_P3 AN15 PEX_RX2_N GPIO4 L7 GPU_VID1 Q4A
T119
4
PCIE_CTX_C_GRX_N3 AM15 PEX_RX3 GPIO5 M7 GPU_VID2 0327 Update DMN66D0LDW-7 2N_SOT363-6
PEX_RX3_N GPIO6 T120
PCIE_CTX_C_GRX_P4 AN17 N8
D PCIE_CTX_C_GRX_N4 AM17 PEX_RX4 GPIO7 M1 OVERT# 2 D
PCIE_CTX_C_GRX_P5 AP17 PEX_RX4_N GPIO8 M2 EVENT#_R
PCIE_CTX_C_GRX_N5 AP18 PEX_RX5 GPIO9 L1
1
PCIE_CTX_C_GRX_P6 AN18 PEX_RX5_N GPIO10 M5 GPU_PWM_VID
GPU_PWM_VID [52] 0327 Update
GPIO
PCIE_CTX_C_GRX_N6 AM18 PEX_RX6 GPIO11 N3 VGA_GPIO12
PCIE_CTX_C_GRX_P7 AN20 PEX_RX6_N GPIO12 M4 NVVDD_PSI
PEX_RX7 GPIO13 NVVDD_PSI [52]
PCIE_CTX_C_GRX_N7 AM20 N4
PCIE_CTX_C_GRX_P8 AP20 PEX_RX7_N GPIO14 P2
AP21 PEX_RX8 GPIO15 R8
PCIE_CTX_C_GRX_N8
PEX_RX8_N GPIO16
VGA_GPIO16 0327
T130 Update
PCIE_CTX_C_GRX_P9 AN21 M6
PCIE_CTX_C_GRX_N9 AM21 PEX_RX9 GPIO17 R1
AN23 PEX_RX9_N GPIO18 P3
PCIE_CTX_C_GRX_P10
PEX_RX10 GPIO19
0327 Update
PCIE_CTX_C_GRX_N10 AM23 P4
PCIE_CTX_C_GRX_P11 AP23 PEX_RX10_N GPIO20 P1 +3VS_VGA
PCIE_CTX_C_GRX_N11 AP24 PEX_RX11 GPIO21
Reserve for x16 GPU PCIE_CTX_C_GRX_P12 AN24 PEX_RX11_N DIS@
PCIE_CTX_C_GRX_N12 AM24 PEX_RX12 EVENT#_R 1 2
PCIE_CTX_C_GRX_P13 AN26 PEX_RX12_N R217 DIS@ 10K_0402_5%
PCIE_CTX_C_GRX_N13 AM26 PEX_RX13 VGA_EDID_CLK 1 2
PCIE_CTX_C_GRX_P14 AP26 PEX_RX13_N R218 DIS@ 2.2K_0402_5%
PCIE_CTX_C_GRX_N14 AP27 PEX_RX14 VGA_EDID_DATA 1 2
PCIE_CTX_C_GRX_P15 AN27 PEX_RX14_N AK9 R219 DIS@ 2.2K_0402_5%
PCIE_CTX_C_GRX_N15 AM27 PEX_RX15 DACA_RED AL10 VGA_CRT_DATA 1 2
PEX_RX15_N DACA_GREEN AL9 R220 DIS@ 2.2K_0402_5%
DACA_BLUE VGA_CRT_CLK 1 2
DACs
PCIE_GTX_C_CRX_P0 DIS@ C131 1 2 0.22U_0402_16V7K PCIE_GTX_CRX_P0 AK14 R221 DIS@ 2.2K_0402_5%
PCIE_GTX_C_CRX_N0 DIS@ C132 1 2 0.22U_0402_16V7K PCIE_GTX_CRX_N0 AJ14 PEX_TX0 AM9 I2CB_SCL 1 2
PCIE_GTX_C_CRX_P1 DIS@ C133 1 2 0.22U_0402_16V7K PCIE_GTX_CRX_P1 AH14 PEX_TX0_N DACA_HSYNC AN9 R222 DIS@ 2.2K_0402_5%
PCIE_GTX_C_CRX_N1 DIS@ C134 1 2 0.22U_0402_16V7K PCIE_GTX_CRX_N1 AG14 PEX_TX1 DACA_VSYNC I2CB_SDA 1 2
PCIE_GTX_C_CRX_P2 DIS@ C135 1 2 0.22U_0402_16V7K PCIE_GTX_CRX_P2 AK15 PEX_TX1_N R223 DIS@ 2.2K_0402_5%
PCIE_GTX_C_CRX_N2 DIS@ C136 1 2 0.22U_0402_16V7K PCIE_GTX_CRX_N2 AJ15 PEX_TX2 AG10 +DACA_VDD 2 1 DIS@ OVERT# 1 2
PEX_TX2_N DACA_VDD
PCI EXPRESS
PCIE_GTX_C_CRX_P3 DIS@ C137 1 2 0.22U_0402_16V7K PCIE_GTX_CRX_P3 AL16 AP9 R224 R225 DIS@ 10K_0402_5%
C PCIE_GTX_C_CRX_N3 DIS@ C138 1 2 0.22U_0402_16V7K PCIE_GTX_CRX_N3 AK16 PEX_TX3 DACA_VREF AP8 10K_0402_5% VGA_GPIO12 1 2 C
PCIE_GTX_C_CRX_P4 DIS@ C139 1 2 0.22U_0402_16V7K PCIE_GTX_CRX_P4 AK17 PEX_TX3_N DACA_RSET R226 10K_0402_5%
PCIE_GTX_C_CRX_N4 DIS@ C140 1 2 0.22U_0402_16V7K PCIE_GTX_CRX_N4 AJ17 PEX_TX4
PCIE_GTX_C_CRX_P5 DIS@ C141 1 2 0.22U_0402_16V7K PCIE_GTX_CRX_P5 AH17 PEX_TX4_N
PCIE_GTX_C_CRX_N5 DIS@ C142 1 2 0.22U_0402_16V7K PCIE_GTX_CRX_N5 AG17 PEX_TX5
PCIE_GTX_C_CRX_P6 DIS@ C143 1 2 0.22U_0402_16V7K PCIE_GTX_CRX_P6 AK18 PEX_TX5_N
PCIE_GTX_C_CRX_N6 DIS@ C144 1 2 0.22U_0402_16V7K PCIE_GTX_CRX_N6 AJ18 PEX_TX6
DIS@ C145 1 2 0.22U_0402_16V7K AL19 PEX_TX6_N
PCIE_GTX_C_CRX_P7 PCIE_GTX_CRX_P7
PEX_TX7
0327 Update
PCIE_GTX_C_CRX_N7 DIS@ C146 1 2 0.22U_0402_16V7K PCIE_GTX_CRX_N7 AK19 R4 VGA_CRT_CLK
PCIE_GTX_C_CRX_P8 @ C2096 1 2 0.22U_0402_16V7K PCIE_GTX_CRX_P8 AK20 PEX_TX7_N I2CA_SCL R5 VGA_CRT_DATA
PCIE_GTX_C_CRX_N8 @ C2097 1 2 0.22U_0402_16V7K PCIE_GTX_CRX_N8 AJ20 PEX_TX8 I2CA_SDA
PCIE_GTX_C_CRX_P9 @ C2098 1 2 0.22U_0402_16V7K PCIE_GTX_CRX_P9 AH20 PEX_TX8_N R7 I2CB_SCL
PCIE_GTX_C_CRX_N9 @ C2099 1 2 0.22U_0402_16V7K PCIE_GTX_CRX_N9 AG20 PEX_TX9 I2CB_SCL R6 I2CB_SDA
PCIE_GTX_C_CRX_P10 @ C2100 1 2 0.22U_0402_16V7K PCIE_GTX_CRX_P10 AK21 PEX_TX9_N I2CB_SDA
I2C
PCIE_GTX_C_CRX_N10 @ C2101 1 2 0.22U_0402_16V7K PCIE_GTX_CRX_N10 AJ21 PEX_TX10 R2 VGA_EDID_CLK
PCIE_GTX_C_CRX_P11 @ C2102 1 2 0.22U_0402_16V7K PCIE_GTX_CRX_P11 AL22 PEX_TX10_N I2CC_SCL R3 VGA_EDID_DATA
PCIE_GTX_C_CRX_N11 @ C2103 1 2 0.22U_0402_16V7K PCIE_GTX_CRX_N11 AK22 PEX_TX11 I2CC_SDA
Reserve for x16 GPU PCIE_GTX_C_CRX_P12 @ C2104 1 2 0.22U_0402_16V7K PCIE_GTX_CRX_P12 AK23 PEX_TX11_N T4 VGA_SMB_CK2
PCIE_GTX_C_CRX_N12 @ C2105 1 2 0.22U_0402_16V7K PCIE_GTX_CRX_N12 AJ23 PEX_TX12 I2CS_SCL T3 VGA_SMB_DA2
PCIE_GTX_C_CRX_P13 @ C2106 1 2 0.22U_0402_16V7K PCIE_GTX_CRX_P13 AH23 PEX_TX12_N I2CS_SDA +1.05VS_VGA
PCIE_GTX_C_CRX_N13 @ C2107 1 2 0.22U_0402_16V7K PCIE_GTX_CRX_N13 AG23 PEX_TX13
PCIE_GTX_C_CRX_P14 @ C2108 1 2 0.22U_0402_16V7K PCIE_GTX_CRX_P14 AK24 PEX_TX13_N
PEX_TX14 30 ohms @100MHz (ESR=0.05)
PCIE_GTX_C_CRX_N14 @ C2109 1 2 0.22U_0402_16V7K PCIE_GTX_CRX_N14 AJ24
PCIE_GTX_C_CRX_P15 @ C2110 1 2 0.22U_0402_16V7K PCIE_GTX_CRX_P15 AL25 PEX_TX14_N DIS@ L1
PCIE_GTX_C_CRX_N15 @ C2111 1 2 0.22U_0402_16V7K PCIE_GTX_CRX_N15 AK25 PEX_TX15 60mA +PLLVDD 1 2
PEX_TX15_N SBY100505T-300Y-N_0402
22U_0805_6.3V6M
0.1U_0402_10V6K
C163
@ AD8 R227 1 @ 2 1 1
+3VS_VGA PLLVDD
C164
R228 AJ11 45mA 0_0402_5%
0_0402_5% PEX_WAKE_N AE8
PLT_RST# 1 2 AL13 SP_PLLVDD
[13] CLK_PCIE_VGA 45mA Near GPU
2
@ AK13 PEX_REFCLK AD7 +SP_PLLVDD 2 2

+3VS_VGA [13] CLK_PCIE_VGA# PEX_REFCLK_N VID_PLLVDD
R229 CLK_REQ_GPU# AK12
Differential signal
CLK
B 10K_0402_5% PEX_CLKREQ_N B
1 @ 2 PEX_TSTCLK_OUT AJ26 H3 XTALIN DIS@ DIS@
PEX_TSTCLK_OUT XTAL_IN
5
R230 200_0402_1% PEX_TSTCLK_OUT# AK26 H2 XTAL_OUT

1
2 PEX_TSTCLK_OUT_N XTAL_OUT
Under GPU
P
[15,41,43] PLT_RST# B 4 PLT_RST_VGA# AJ12 J4 XTALOUT

1 Y PEX_TERMP AP29 PEX_RST_N XTAL_OUTBUFF H1 XTALSSIN
[15,43] DGPU_HOLD_RST# A
G
PEX_TERMP XTAL_SSIN
1
1
3
U7 R231 DIS@ R232 R233

2
MC74VHC1G08DFT2G SC70 5P 100K_0402_5% 10K_0402_5% 10K_0402_5%

R234 N14M-GE2-B-AIO-A2 DIS@
2.49K_0402_1%
2
2
v0.2 update DIS@
v0.2 update
1
Under GPU(below 150mils)

Put C169 close to U65.AE8
+3VS_VGA
1 2
150mA +SP_PLLVDD
+3VS_VGA +1.05VS_VGA
DIS@ L2
22U_0805_6.3V6M
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
4.7U_0402_6.3V6M
C165
C166
C167
C168
C169
1 2 BLM18PG330SN1D_0603 1 1 1 1 1
2
DIS@ DIS@ DIS@ R235 10M_0402_5% 180ohms (ESR=0.2) Bead

R236 R237
2.2K_0402_5% 2.2K_0402_5% +3VS_VGA
DIS@ Y3 2 2 2 2 2
5
DIS@ 4 3 XTAL_OUT
1
Q5B NC OSC DIS@ DIS@ DIS@ DIS@ DIS@

2
VGA_SMB_CK2 4 3 @ XTALIN 1 2
EC_SMB_CK2 [13,43,46] OSC NC
R238
A 2N7002DW-T/R7_SOT363-6 10K_0402_5% 27MHZ 10PF +-20PPM X3G027000DA1H A
1 1
DIS@ C170 DIS@ C171
1
CLK_REQ_GPU# 10P_0402_50V8J 10P_0402_50V8J

2 2
v0.3 update
2
DIS@
2
Q5A @
VGA_SMB_DA2 1 6 R239
2N7002DW-T/R7_SOT363-6
EC_SMB_DA2 [13,43,46]
10K_0402_5% Reserve pull-up and down.
Don’t have to install Issued Date 2013/04/01 Deciphered Date 2014/04/01 Title
N14M-GE2-PCIE/DAC/GPIO
1
component for default, NV THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
0.3
reply on 5/4. when system AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
no support CLKREQ
ZEA00 LA-A061P M/B
5 4 3 2 1
5 4 3 2 1
U6D DIS@
Part 4 of 7
AM6
AN6 IFPA_TXC P8
AP3 IFPA_TXC_N NC AC6
AN3 IFPA_TXD0 NC AJ28
AN5 IFPA_TXD0_N NC AJ4
AM5 IFPA_TXD1 NC AJ5
AL6 IFPA_TXD1_N NC AL11
AK6 IFPA_TXD2 NC C15
IFPA_TXD2_N NC
NC
AJ6 D19
AH6 IFPA_TXD3 NC D20
D IFPA_TXD3_N NC D23 D
NC D26
AJ9 NC H31 +VGA_CORE
AH9 IFPB_TXC NC T8
AP6 IFPB_TXC_N NC V32
AP5 IFPB_TXD4 NC
IFPB_TXD4_N
2
AM7
AL7 IFPB_TXD5 R623
AN8 IFPB_TXD5_N 100_0402_1%
AM8 IFPB_TXD6 DIS@
AK8 IFPB_TXD6_N
1
AL8 IFPB_TXD7
IFPB_TXD7_N L4 VGA_VCC_SENSE
VDD_SENSE VGA_VCC_SENSE [52]
trace width: 16mils
AK1
AJ1 IFPC_L0 differential voltage sensing.
IFPC_L0_N
AJ3
IFPC_L1 GND_SENSE
L5 VGA_VSS_SENSE
VGA_VSS_SENSE [52] differential signal routing.
AJ2
AH3 IFPC_L1_N
AH4 IFPC_L2 DIS@
AG5 IFPC_L2_N 2 1
AG4 IFPC_L3 R624
IFPC_L3_N 100_0402_1%
TEST
AM1 AK11 TESTMODE
AM2 IFPD_L0 TESTMODE
AM3 IFPD_L0_N AM10
IFPD_L1 JTAG_TCK T122
1
AM4 AM11
IFPD_L1_N JTAG_TDI T123
AL3 AP12
IFPD_L2 JTAG_TDO T124 10K_0402_5%
C AL4 AP11 C
IFPD_L2_N JTAG_TMS T125
AK4 AN11 1 2 R240
AK5 IFPD_L3 JTAG_TRST_N R241 10K_0402_5% DIS@
2
IFPD_L3_N
LVDS/TMDS
DIS@
AD2
AD3 IFPE_L0
AD1 IFPE_L0_N
AC1 IFPE_L1 SERIAL
AC2 IFPE_L1_N H6 ROM_CS
AC3 IFPE_L2 ROM_CS_N H4 ROM_SCLK
IFPE_L2_N ROM_SCLK ROM_SCLK [28]
AC4 H5 ROM_SI ROM_SI [28]
AC5 IFPE_L3 ROM_SI H7 ROM_SO
IFPE_L3_N ROM_SO ROM_SO [28]
AE3
AE4 IFPF_L0
AF4 IFPF_L0_N
AF5 IFPF_L1
AD4 IFPF_L1_N GENERAL R242 DIS@ 10K_0402_5%
AD5 IFPF_L2 L2 2 1
AG1 IFPF_L2_N BUFRST_N
AF1 IFPF_L3 L3 1 2
IFPF_L3_N CEC +3VS_VGA
R243 DIS@ 10K_0402_5%
J1 1 2 Un-pop R244-0415 Update
MULTI_STRAP_REF0_GND R244 @ 40.2K_0402_1%
AG3
AG2 IFPC_AUX_I2CW _SCL
IFPC_AUX_I2CW _SDA_N J2 STRAP0
STRAP0 STRAP0 [28]
J7 STRAP1 STRAP1 [28]
B
AK3 STRAP1 J6 STRAP2 B
IFPD_AUX_I2CX_SCL STRAP2 STRAP2 [28]
AK2 J5 STRAP3 STRAP3 [28]
IFPD_AUX_I2CX_SDA_N STRAP3 J3 STRAP4
STRAP4 STRAP4 [28]
AB3
AB4 IFPE_AUX_I2CY_SCL
IFPE_AUX_I2CY_SDA_N K3
THERMDP K4
AF3 THERMDN
AF2 IFPF_AUX_I2CZ_SCL
IFPF_AUX_I2CZ_SDA_N
Reserve 1MB SPI ROM FOR VBIOS ROM
EVT@
C172 +3VS_VGA
N14M-GE2-B-AIO-A2 0.1U_0402_16V4Z
2 1 20mils
1
EVT@ EVT@
R245 R246
10K_0402_5% 10K_0402_5%
EVT@
2
R247 33_0402_5% U8 EVT@
ROM_CS 1 2 ROM_CS_R 1 8
ROM_SO 1 2 ROM_SO_R 2 CS# VCC 7 ROM_HOLD#
R248 0_0402_5% 3 DO HOLD# 6
EVT@ 4 W P# CLK 5 EVT@ R249 33_0402_5%
GND DIO ROM_SCLK_R 1 2 ROM_SCLK
A MX25L1005AMC-12G SOP ROM_SI_R 1 2 ROM_SI A
EVT@ R250 33_0402_5%

N14M-GE2-LVDS/HDMI/DP/THM
0.3
ZEA00 LA-A061P M/B
5 4 3 2 1
5 4 3 2 1
+1.5VS_VGA U6E DIS@

Near GPU
Near GPU Part 5 of 7 2000mA +1.05VS_VGA
3.5A
AA27 AG19
FBVDDQ_0 PEX_IOVDD_0
10U_0805_10V6K
10U_0805_10V6K
10U_0805_10V6K
10U_0805_10V6K
22U_0805_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
C173
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
AA30 AG21
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
C174
C175
C176
C177
C178
C179
C180
C181
C182
C183
1 2 2 2 2 AB27 AG22 1 1 1 1 1 1
1
AB33 AG24
C184
C185
C186
C187
AC27 AH21
@ AD27 FBVDDQ_4 PEX_IOVDD_4 AH25
2
2 1 1 1 1 AE27 FBVDDQ_5 PEX_IOVDD_5 2 2 2 2 2 2
D DIS@ DIS@ DIS@ DIS@ AF27 FBVDDQ_6 D
+1.5VS_VGA AG27 FBVDDQ_7 AG13 DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@
B13 FBVDDQ_8 PEX_IOVDDQ_0 AG15
4.7uF X7R 0402 * 2 FBVDDQ_9 PEX_IOVDDQ_1 Under GPU(below 150mils) +1.05VS_VGA
120ohms @100MHz
B16 AG16
FBVDDQ_10 PEX_IOVDDQ_2 (ESR=0.18) +1.05VS_VGA
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
Under GPU(below 150mils) B19 AG18
FBVDDQ_11 PEX_IOVDDQ_3
C188
C189
C190
C191
1uF X7R 0402 * 2 0.1uF X7R 0402 * 8 E13 AG25 1 1 1 1 DIS@
E16 FBVDDQ_12 PEX_IOVDDQ_4 AH15 L3
FBVDDQ_13 PEX_IOVDDQ_5 150mA
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
E19 AH18 +PEX_PLLVDD 2 1
1U_0603_10V6K
1U_0603_10V6K
1U_0603_10V6K
1U_0603_10V6K
4.7U_0805_25V6-K
0.1U_0402_10V6K
C192
C193
C194
C195
C196
C197
C198
C199
C200
C201
C202
C203
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
1 1 1 1 1 1 1 1 1 1 1 1 H10 AH26
FBVDDQ_15 PEX_IOVDDQ_7 2 2 2 2
C204
C205
C206
C207
H11 AH27 1 1 1 BLM18PG121SN1D_0603 1
H12 FBVDDQ_16 PEX_IOVDDQ_8 AJ27
H13 FBVDDQ_17 PEX_IOVDDQ_9 AK27
2 2 2 2 2 2 2 2 2 2 2 2 H14 FBVDDQ_18 PEX_IOVDDQ_10 AL27 DIS@ DIS@ DIS@ DIS@
POWER
H15 AM28 2 2 2 2
DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ H16 FBVDDQ_20 PEX_IOVDDQ_12 AN28
FBVDDQ_21 PEX_IOVDDQ_13 Under GPU(below 150mils)
H18 DIS@ DIS@ DIS@ DIS@
H19 FBVDDQ_22 +3VS_VGA
H20 FBVDDQ_23
FBVDDQ_24 210mA Place near balls Place near to L156
0.1U_0402_10V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
H21 AH12 +PEX_PLLHVDD
FBVDDQ_25 PEX_PLL_HVDD
C208
C209
C210
H22 1 1 1
H23 FBVDDQ_26
H24 FBVDDQ_27
H8 FBVDDQ_28 AG12 +3VS_VGA
H9 FBVDDQ_29 PEX_SVDD_3V3 2 2 2 @ L4
rise 1.5v system source voltage to 1.55-1.57V L27 FBVDDQ_30
FBVDDQ_31
DIS@ DIS@ DIS@
110mA MMZ1608D301BT_0603
M27 +IFPC_PLLVDD 1 2
N27 FBVDDQ_32 AG26 +PEX_PLLVDD
FBVDDQ_33 PEX_PLLVDD
1U_0402_6.3V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
4.7U_0603_6.3V6K
P27
FBVDDQ_34
4.7U_0603_6.3V6K
R27 1 1 1 1 1
T27 FBVDDQ_35
FBVDDQ_36 1
T30 J8 +3VS_VGA C215
T33 FBVDDQ_37 VDD33_0 K8 @ C216
FBVDDQ_38 VDD33_1 Place near balls Place near GPU 2 2 2 2 2 @
V27 L8 R251
W27 FBVDDQ_39 VDD33_2 M8 +VDD33 2 1 2
FBVDDQ_40 VDD33_3
0.1U_0402_10V6K
0.1U_0402_10V6K
4.7U_0603_6.3V6K
W30
C FBVDDQ_41 C
1U_0402_6.3V6K
C218
C217
C219
C220
W33 1 1 1 1 0_0603_5%
Y27 FBVDDQ_42 @ C211 C212 C213 C214
FBVDDQ_43 AH8 +IFPAB_PLLVDD1 @ R252 2 10K_0402_5% @ @ @ @
IFPAB_PLLVDD AJ8 1 @ R253 2 1K_0402_1%
IFPAB_RSET 2 2 2 2
Place near balls
AG8 +IFPAB_IOVDD 1 @ R254 2 10K_0402_5%
IFPA_IOVDD AG9 DIS@ DIS@ DIS@ DIS@ +3VS_VGA
F1 IFPB_IOVDD @ L5
FB_VDDQ_SENSE MMZ1608D301BT_0603
AF7 +IFPC_PLLVDD 1 @ R255 2 10K_0402_5% Reserve for NV DG +IFPEF_PLLVDD 220mA 1 2
Follow PUN-05893 +1.5VS_VGA F2 IFPC_PLLVDD AF8 2 @ R256 1 1K_0402_1%
FB_GND_SENSE IFPC_RSET
1U_0402_6.3V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
4.7U_0603_6.3V6K
+VDD33
0.1U_0402_10V6K
0.1U_0402_10V6K
4.7U_0603_6.3V6K
AF6 +IFPC_IOVDD 1 @ R257 2 10K_0402_5%
CALIBRATION PIN DDR3 IFPC_IOVDD 1 1 1 1 1
C224
C228
1 2 J27 1 1 1
R258 40.2_0402_1% FB_CAL_PD_VDDQ C226
AG7 +IFPD_PLLVDD 1 @ R260 2 10K_0402_5% @ C227
FB_CAL_x_PD_VDDQ 40.2Ohm 1
DIS@
2 H27 IFPD_PLLVDD AN2 1 @ R259 2 1K_0402_1% @ 2 2 2 2 2 @
FB_CAL_PU_GND IFPD_RSET 2 2 2
DIS@
R261 42.2_0402_1%
AG6 +IFPD_IOVDD 1 @ R262 2 10K_0402_5%
FB_CAL_x_PU_GND 42.2Ohm 1
DIS@
2 H25 IFPD_IOVDD
R263 51.1_0402_1% FB_CAL_TERM_GND C225 C221 C222 C223
AB8 +IFPEF_PLLVDD1 @ R264 2 10K_0402_5% R02 @ @ @ @
FB_CAL_xTERM_GND 51.1Ohm DIS@ IFPEF_PLVDD AD6 1 @ R265 2 1K_0402_1%
IFPEF_RSET
Place near balls
Place near balls AC7
+1.5V to +1.5VS_VGA IFPE_IOVDD
IFPF_IOVDD
AC8 +IFPE_IOVDD1 @ R266 2 10K_0402_5%
@ L6
+1.05VS_VGA
@ L7
+1.05VS_VGA
MBK1608221YZF_2P MBK1608221YZF_2P
+IFPE_IOVDD 72mA 1 2 +IFPC_IOVDD 72mA 1 2
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
N14M-GE2-B-AIO-A2 1 1 1 1 1 1 1 1
4/3 Update: 1 1
C234 C239
B Un-stuff R253, R256, R259 and R265. @ C235 @ C240 B
2 2 2 2 @ 2 2 2 2 @
2 2
Supply from Power-0411 update. C231 C232 C233 C236 C237 C238
+5VALW @ @ @ @ @ @
Place under GPU Place under GPU
1
DIS@
R268
100K_0402_5%
Un-pop update-0415
2
@ R272
1
DGPU_PWROK# +3VS to +3VS_VGA
0_0402_5% D DIS@ +3VS +3VS_VGA
J2
1 2 2 Q8 @
[17,52,53] DGPU_PWROK
G 2N7002_SOT23 1 2
1 2
1
S
3
R273 +5VALW JUMP_43X79 DIS@

100K_0402_5% DIS@ Q9 C245
+1.05VS_VPCH +1.05VS_VGA @ AO3413L_SOT23-3 10U_0603_6.3V6M
2
1
J3 @
2 1 DIS@ 3 1 2 1
D
2 1 R274
1
JUMP_43X118 100K_0402_5%
G
DIS@ Q10 DIS@
2
+5VALW 8 1 R276 R275
7 2 DGPU_PWR_EN# 1 2 470_0603_5%
1
6 3 DIS@ DIS@ DIS@
1 2
100K_0402_5%
1
1
D
C249
C246 5 C247 C248 R277 DIS@ R278 DIS@ 1 D
0.1U_0402_10V6K
10U_0805_10V6K DIS@ 22_0603_5% v0.3 update 2 @ 1 2 Q11 v0.3 update R280 DIS@
[15,43] DGPU_PWR_EN
2
2
A A
AO4354_SOIC-8 10U_0805_10V6K 1U_0603_10V6K G 2N7002_SOT23 2 2 1DGPU_PWR_EN#
4
0.1U_0402_10V6K
C250
R279 v0.3 update 0_0402_5% S DIS@ G 1
1
3
20K_0402_1% DIS@ DIS@ Q13 DIS@ 2 DIS@ Q12 S 10K_0402_5%
3
DIS@ R282 2N7002KW_SOT323-3 R281 2N7002_SOT23
1
2K_0402_1% D 100K_0402_5% DIS@

1
1 2 DIS@ 2 DGPU_PWROK# 2 2
1
C251 G
v0.3 update S
3
DIS@ 0.1U_0603_25V7K
2
@ R283 Q14
1
0_0402_5% D 2N7002KW_SOT323-3
DGPU_PWROK# 1 2 2
G
N14M-GE2-POWER
S Size Document Number Rev
3
0.3
ZEA00 LA-A061P M/B
5 4 3 2 1
5 4 3 2 1
U6F
Part 6 of 7
A2 D2
AA17 GND_0 GND_100 D31
AA18 GND_1 GND_101 D33
AA20 GND_2 GND_102 E10 U6G +VGA_CORE
AA22 GND_3 GND_103 E22 +VGA_CORE
AB12 GND_4 GND_104 E25
AB14 GND_5 GND_105 E5 Part 7 of 7 V17
AB16 GND_6 GND_106 E7 AA12 VDD_56 V18
AB19 GND_7 GND_107 F28 AA14 VDD_0 VDD_57 V20
AB2 GND_8 GND_108 F7 AA16 VDD_1 VDD_58 V22
AB21 GND_9 GND_109 G10 AA19 VDD_2 VDD_59 W 12
D
A33 GND_10 GND_110 G13 AA21 VDD_3 VDD_60 W 14 D
AB23 GND_11 GND_111 G16 AA23 VDD_4 VDD_61 W 16
AB28 GND_12 GND_112 G19 AB13 VDD_5 VDD_62 W 19
AB5 GND_15 GND_115 G25 AB18 VDD_8 VDD_65 Y13
AB7 GND_16 GND_116 G28 AB20 VDD_9 VDD_66 Y15
AC13 GND_17 GND_117 G3 AB22 VDD_10 VDD_67 Y17
AC15 GND_18 GND_118 G30 AC12 VDD_11 VDD_68 Y18
AA13 GND_21 GND_121 G5 AC19 VDD_14 VDD_71
AC20 GND_22 GND_122 G7 AC21 VDD_15
AC22 GND_23 GND_123 K2 AC23 VDD_16 U1
AE2 GND_24 GND_124 K28 M12 VDD_17 XVDD_1 U2
GND_26 GND_126 VDD_19 XVDD_3
POWER
AE30 K32 M16 U4
AE7 GND_30 GND_130 M13 N13 VDD_23 XVDD_7 U8
AH10 GND_31 GND_131 M15 N15 VDD_24 XVDD_8
AA15 GND_32 GND_132 M17 N17 VDD_25
AH13 GND_33 GND_133 M18 N18 VDD_26 V1
AH16 GND_34 GND_134 M20 N20 VDD_27 XVDD_9 V2
AH19 GND_35 GND_135 M22 N22 VDD_28 XVDD_10 V3
AH2 GND_36 GND_136 N12 P12 VDD_29 XVDD_11 V4
C C
AH30 GND_41 GND_141 N21 P23 VDD_34 XVDD_16
AH32 GND_42 GND_142 N23 R13 VDD_35
GND
AH33 GND_43 GND_143 N28 R15 VDD_36 W2
AH5 GND_44 GND_144 N30 R17 VDD_37 XVDD_17 W3
AH7 GND_45 GND_145 N32 R18 VDD_38 XVDD_18 W4
AJ7 GND_46 GND_146 N33 R20 VDD_39 XVDD_19 W5
AK10 GND_47 GND_147 N5 R22 VDD_40 XVDD_20 W7
AK7 GND_48 GND_148 N7 T12 VDD_41 XVDD_21 W8
AL12 GND_49 GND_149 P13 T14 VDD_42 XVDD_22
AL14 GND_50 GND_150 P15 T16 VDD_43
AL15 GND_51 GND_151 P17 T19 VDD_44 Y1
AL17 GND_52 GND_152 P18 T21 VDD_45 XVDD_23 Y2
AL18 GND_53 GND_153 P20 T23 VDD_46 XVDD_24 Y3
AL2 GND_54 GND_154 P22 U13 VDD_47 XVDD_25 Y4
AL20 GND_55 GND_155 R12 U15 VDD_48 XVDD_26 Y5
AL26 GND_59 GND_159 R21 U22 VDD_52 XVDD_30
AL28 GND_60 GND_160 R23 V13 VDD_53
AL30 GND_61 GND_161 T13 V15 VDD_54 AA1
AL32 GND_62 GND_162 T15 VDD_55 XVDD_31 AA2
AL33 GND_63 GND_163 T17 XVDD_32 AA3
AL5 GND_64 GND_164 T18 XVDD_33 AA4
AM13 GND_65 GND_165 T2 XVDD_34 AA5
AM22 GND_68 GND_168 AG11 XVDD_37 AA8
B
AM25 GND_69 GND_169 T28 XVDD_38 B
AN1 GND_70 GND_170 T32
AN16 GND_73 GND_173 U12 N14M-GE2-B-AIO-A2
GND_74 GND_174 0403 Update
AN19 U14 DIS@
AN22 GND_75 GND_175 U16
AN25 GND_76 GND_176 U19
AN30 GND_77 GND_177 U21
AN34 GND_78 GND_178 U23
AN4 GND_79 GND_179 V12
AN7 GND_80 GND_180 V14
AP2 GND_81 GND_181 V16
AP33 GND_82 GND_182 V19
B1 GND_83 GND_183 V21
B10 GND_84 GND_184 V23
B22 GND_85 GND_185 W 13
B25 GND_86 GND_186 W 15
B28 GND_87 GND_187 W 17
B31 GND_88 GND_188 W 18
B34 GND_89 GND_189 W 20
B4 GND_90 GND_190 W 22
B7 GND_91 GND_191 W 28
C10 GND_92 GND_192 Y12
C13 GND_93 GND_193 Y14
C19 GND_94 GND_194 Y16
C22 GND_95 GND_195 Y19
C25 GND_96 GND_196 Y21
C28 GND_97 GND_197 Y23
C7 GND_98 GND_198 AH11
A A
GND_99 GND_199 C16
GND_OPT W 32
GND_OPT
N14M-GE2-B-AIO-A2
DIS@
N14M-GE2-VGA CORE, GND
0.3
ZEA00 LA-A061P M/B
5 4 3 2 1
5 4 3 2 1
FBA_D[0..63] FBA_MA[14..0] [26,27]

[26,27] FBA_D[0..63]
FBA_BA[2..0] [26,27]
U6C
U6B
Part 3 of 7
Part 2 of 7 G9 D13
FBA_D0 L28 U30 FBA_CS0#_L E9 FBB_D0 FBB_CMD0 E14
FBA_D0 FBA_CMD0 FBA_CS0#_L [26] FBB_D1 FBB_CMD1
FBA_D1 M29 T31 G8 F14
FBA_D2 L29 FBA_D1 FBA_CMD1 U29 FBA_ODT_L F9 FBB_D2 FBB_CMD2 A12
FBA_D2 FBA_CMD2 FBA_ODT_L [26] FBB_D3 FBB_CMD3
FBA_D3 M28 R34 FBA_CKE_L F11 B12
FBA_D3 FBA_CMD3 FBA_CKE_L [26] FBB_D4 FBB_CMD4
FBA_D4 N31 R33 FBA_MA14 G11 C14
D FBA_D5 P29 FBA_D4 FBA_CMD4 U32 FBA_RST# F12 FBB_D5 FBB_CMD5 B14 D
FBA_D5 FBA_CMD5 FBA_RST# [26,27] FBB_D6 FBB_CMD6
FBA_D6 R29 U33 FBA_MA9 G12 G15
FBA_D7 P28 FBA_D6 FBA_CMD6 U28 FBA_MA7 G6 FBB_D7 FBB_CMD7 F15
FBA_D8 J28 FBA_D7 FBA_CMD7 V28 FBA_MA2 F5 FBB_D8 FBB_CMD8 E15
FBA_D9 H29 FBA_D8 FBA_CMD8 V29 FBA_MA0 E6 FBB_D9 FBB_CMD9 D15
FBA_D10 J29 FBA_D9 FBA_CMD9 V30 FBA_MA4 F6 FBB_D10 FBB_CMD10 A14
FBA_D11 H28 FBA_D10 FBA_CMD10 U34 FBA_MA1 F4 FBB_D11 FBB_CMD11 D14
FBA_D12 G29 FBA_D11 FBA_CMD11 U31 FBA_BA0 G4 FBB_D12 FBB_CMD12 A15
FBA_D13 E31 FBA_D12 FBA_CMD12 V34 FBA_WE# E2 FBB_D13 FBB_CMD13 B15
FBA_D13 FBA_CMD13 FBA_WE# [26,27] FBB_D14 FBB_CMD14
FBA_D14 E32 V33 F3 C17
FBA_D15 F30 FBA_D14 FBA_CMD14 Y32 FBA_CAS#
0403 Update C2 FBB_D15 FBB_CMD15 D18
FBA_D15 FBA_CMD15 FBA_CAS# [26,27] FBB_D16 FBB_CMD16
FBA_D16 C34 AA31 FBA_CS0#_H D4 E18
FBA_D16 FBA_CMD16 FBA_CS0#_H [27] FBB_D17 FBB_CMD17
FBA_D17 D32 AA29 D3 F18
FBA_D18 B33 FBA_D17 FBA_CMD17 AA28 FBA_ODT_H C1 FBB_D18 FBB_CMD18 A20
FBA_D18 FBA_CMD18 FBA_ODT_H [27] FBB_D19 FBB_CMD19
FBA_D19 C33 AC34 FBA_CKE_H B3 B20
FBA_D19 FBA_CMD19 FBA_CKE_H [27] FBB_D20 FBB_CMD20
FBA_D20 F33 AC33 FBA_MA13 C4 C18
FBA_D21 F32 FBA_D20 FBA_CMD20 AA32 FBA_MA8 B5 FBB_D21 FBB_CMD21 B18
FBA_D22 H33 FBA_D21 FBA_CMD21 AA33 FBA_MA6 C5 FBB_D22 FBB_CMD22 G18
FBA_D23 H32 FBA_D22 FBA_CMD22 Y28 FBA_MA11 A11 FBB_D23 FBB_CMD23 G17
FBA_D23 FBA_CMD23 FBB_D24 FBB_CMD24
MEMORY INTERFACE
FBA_D24 P34 Y29 FBA_MA5 C11 F17

Mode D - Mirror Mode Mapping
MEMORY INTERFACE B
FBA_D25 P32 FBA_D24 FBA_CMD24 W31 FBA_MA3 D11 FBB_D25 FBB_CMD25 D16
FBA_D26 P31 FBA_D25 FBA_CMD25 Y30 FBA_BA2 B11 FBB_D26 FBB_CMD26 A18
FBA_D27 P33 FBA_D26 FBA_CMD26 AA34 FBA_BA1 D8 FBB_D27 FBB_CMD27 D17
FBA_D27 FBA_CMD27 FBB_D28 FBB_CMD28 DATA Bus
FBA_D28 L31 Y31 FBA_MA12 A8 A17
L34 FBA_D28 FBA_CMD28 Y34 C8 FBB_D29 FBB_CMD29 B17 Address
FBA_D29
FBA_D29 FBA_CMD29
FBA_MA10
FBB_D30 FBB_CMD30 0..31 32..63
FBA_D30 L32 Y33 FBA_RAS# B8 E17
FBA_D30 FBA_CMD30 FBA_RAS# [26,27] FBB_D31 FBB_CMD31
FBA_D31 L33 V31 F24 FBx_CMD0 CS0#_L
FBA_D32 AG28 FBA_D31 FBA_CMD31 G23 FBB_D32
AF29 FBA_D32 E24 FBB_D33
FBA_D33
FBA_D33 FBB_D34 FBx_CMD1
FBA_D34 AG29 G24 C12
FBA_D35 AF28 FBA_D34 R32 D21 FBB_D35 FBB_CMD_RFU0 C20
FBA_D35 FBA_CMD_RFU0 FBB_D36 FBB_CMD_RFU1 FBx_CMD2 ODT_L
FBA_D36 AD30 AC32 E21
C FBA_D37 AD29 FBA_D36 FBA_CMD_RFU1 +1.5VS_VGA G21 FBB_D37 +1.5VS_VGA C
FBA_D37 FBB_D38 FBx_CMD3 CKE_L
FBA_D38 AC29 F21
AD28 FBA_D38 G27 FBB_D39 G14 R284 1 @ 2 60.4_0402_1%
FBA_D39
FBA_D39 FBB_D40 FBB_DEBUG0 FBx_CMD4 A14 A14
A
FBA_D40 AJ29 R28 R285 1 @ 2 60.4_0402_1% D27 G20 R286 1 @ 2 60.4_0402_1%

AK29 FBA_D40 FBA_DEBUG0 AC28 R287 1 @ 2 60.4_0402_1% G26 FBB_D41 FBB_DEBUG1
FBA_D41
FBA_D41 FBA_DEBUG1 FBB_D42 can be unstuff by default FBx_CMD5 RST RST
FBA_D42 AJ30 can be unstuff by default E27
AK28 FBA_D42 E29 FBB_D43
FBA_D43
FBA_D43 FBB_D44 FBx_CMD6 A9 A9
FBA_D44 AM29 F29 D12
FBA_D45 AM31 FBA_D44 R30 FBA_CLK0 E30 FBB_D45 FBB_CLK0 E12
FBA_D45 FBA_CLK0 FBA_CLK0 [26] FBB_D46 FBB_CLK0_N FBx_CMD7 A7 A7
FBA_D46 AN29 R31 FBA_CLK0# D30 E20
FBA_D46 FBA_CLK0_N FBA_CLK0# [26] FBB_D47 FBB_CLK1
FBA_D47 AM30 AB31 FBA_CLK1 A32 F20 FBx_CMD8 A2 A2
FBA_D47 FBA_CLK1 FBA_CLK1 [27] FBB_D48 FBB_CLK1_N
FBA_D48 AN31 AC31 FBA_CLK1# C31
FBA_D48 FBA_CLK1_N FBA_CLK1# [27] FBB_D49
FBA_D49 AN32 C32 FBx_CMD9 A0 A0
FBA_D50 AP30 FBA_D49 B32 FBB_D50
AP32 FBA_D50 D29 FBB_D51 F8
FBA_D51
FBA_D51 FBB_D52 FBB_WCK01 FBx_CMD10 A4 A4
FBA_D52 AM33 K31 A29 E8
AL31 FBA_D52 FBA_WCK01 L30 C29 FBB_D53 FBB_WCK01_N A5
FBA_D53
FBA_D53 FBA_WCK01_N FBB_D54 FBB_WCK23 FBx_CMD11 A1 A1
FBA_D54 AK33 H34 B29 A6
FBA_D55 AK32 FBA_D54 FBA_WCK23 J34 B21 FBB_D55 FBB_WCK23_N D24
FBA_D55 FBA_WCK23_N FBB_D56 FBB_WCK45 FBx_CMD12 BA0 BA0
FBA_D56 AD34 AG30 C23 D25
FBA_D57 AD32 FBA_D56 FBA_WCK45 AG31 A21 FBB_D57 FBB_WCK45_N B27
FBA_D57 FBA_WCK45_N FBB_D58 FBB_WCK67 FBx_CMD13 WE# WE#
FBA_D58 AC30 AJ34 C21 C27
AD33 FBA_D58 FBA_WCK67 AK34 B24 FBB_D59 FBB_WCK67_N
FBA_D59
FBA_D59 FBA_WCK67_N FBB_D60 FBx_CMD14 A15 A15
FBA_D60 AF31 C24
AG34 FBA_D60 +1.05VS_VGA +FB_PLLAVDD B26 FBB_D61
FBA_D61
FBA_D61 FBB_D62 FBx_CMD15 CAS# CAS#
FBA_D62 AG32 Place close to BGA C26 D6
AG33 FBA_D62 J30 FBB_D63 FBB_WCKB01 D7
FBA_D63
FBA_D63 FBA_WCKB01 200mA FBB_WCKB01_N FBx_CMD16 CS0#_H
J31 E11 C6
FBA_DQM0 P30 FBA_WCKB01_N J32 1 2 +FB_PLLAVDD E3 FBB_DQM0 FBB_WCKB23 B6
FBA_DQM0 FBA_WCKB23 FBB_DQM1 FBB_WCKB23_N FBx_CMD17
FBA_DQM1 F31 J33 DIS@ L8 A3 F26
FBA_DQM2 F34 FBA_DQM1 FBA_WCKB23_N AH31 BLM18PG330SN1D_0603 C9 FBB_DQM2 FBB_WCKB45 E26
FBA_DQM2 FBA_WCKB45 FBB_DQM3 FBB_WCKB45_N FBx_CMD18 ODT_H
FBA_DQM3 M32 AJ31 v0.3 update F23 A26
B AD31 FBA_DQM3 FBA_WCKB45_N AJ32 F27 FBB_DQM4 FBB_WCKB67 A27 B
FBA_DQM4
FBA_DQM4 FBA_WCKB67 FBB_DQM5 FBB_WCKB67_N FBx_CMD19 CKE_H
FBA_DQM5 AL29 AJ33 C30
AM32 FBA_DQM5 FBA_WCKB67_N A24 FBB_DQM6
FBA_DQM6
FBA_DQM6 FBB_DQM7 FBx_CMD20 A13 A13
FBA_DQM7 AF34 R02
FBA_DQM7 R288 DIS@ 10K_0402_5% D10
FBB_DQS_WP0 FBx_CMD21 A8 A8
FBA_DQS0 M31 E1 FB_CLAMP 2 1 D5
FBA_DQS1 G31 FBA_DQS_WP0 FB_CLAMP C3 FBB_DQS_WP1
FBA_DQS_WP1 +FB_PLLAVDD FBB_DQS_WP2 FBx_CMD22 A6 A6
FBA_DQS2 E33 B9
FBA_DQS3 M33 FBA_DQS_WP2 C252 0.1U_0402_10V6K E23 FBB_DQS_WP3 H17
FBA_DQS_WP3 FBB_DQS_WP4 FBB_PLL_AVDD +FB_PLLAVDD FBx_CMD23 A11 A11
FBA_DQS4 AE31 K27 1 2 E28
0.1U_0402_10V6K
FBA_DQS_WP4 FB_DLL_AVDD FBB_DQS_WP5
C253
FBA_DQS5 AK30 B30 1 FBx_CMD24 A5 A5
FBA_DQS6 AN33 FBA_DQS_WP5 A23 FBB_DQS_WP6
FBA_DQS_WP6
Place close to ball FBB_DQS_WP7
FBA_DQS7 AF33 DIS@ FBx_CMD25 A3 A3
FBA_DQS_WP7 U27 D9
FBA_PLL_AVDD +FB_PLLAVDD FBB_DQS_RN0 2
FBA_DQS#0 M30 E4 FBx_CMD26 BA2 BA2
22U_0805_6.3V6M
0.1U_0402_10V6K
FBA_DQS_RN0 FBB_DQS_RN1
C254
C255
FBA_DQS#1 H30 B2 DIS@

1U_0402_6.3V6K
FBA_DQS_RN1 1 1 1 FBB_DQS_RN2
C256
FBA_DQS#2 E34 A9 FBx_CMD27 BA1 BA1

FBA_DQS#3 M34 FBA_DQS_RN2 H26 D22 FBB_DQS_RN3
FBA_DQS#4 AF30 FBA_DQS_RN3 FB_VREF D28 FBB_DQS_RN4
FBA_DQS_RN4 2 2 2 FBB_DQS_RN5
Place close to ball FBx_CMD28 A12 A12
FBA_DQS#5 AK31 A30
FBA_DQS#6 AM34 FBA_DQS_RN5 B23 FBB_DQS_RN6
FBA_DQS_RN6 FBB_DQS_RN7 FBx_CMD29 A10 A10
FBA_DQS#7 AF32
FBA_DQS_RN7 DIS@ DIS@ DIS@ FBx_CMD30 RAS# RAS#
Place close to ball Place close to BGA
N14M-GE2-B-AIO-A2
N14M-GE2-B-AIO-A2 DIS@
Must connect to power when partition B unused!
DIS@
[26,27] FBA_DQM[7..0]
A [26,27] FBA_DQS[7..0] A
[26,27] FBA_DQS#[7..0] 30ohms (ESR=0.01) Bead
P/N;SM010007W00

N14M-GE2-MEM Interface
0.3
ZEA00 LA-A061P M/B
5 4 3 2 1
5 4 3 2 1
Memory Partition A - Lower 32 bits FBA_D[0..63] [25,27]

+1.5VS_VGA
FBA_MA[14..0] [25,27]
FBA_BA[2..0] [25,27]
1
DIS@ R289 U70 U71
FBA_DQM[7..0] [25,27]
1.1K_0402_1% +FBA_VREF_CA0 M8 E3 FBA_D4 +FBA_VREF_CA0 M8 E3 FBA_D19
VREFCA DQL0 VREFCA DQL0 FBA_DQS[7..0] [25,27]
D +FBA_VREF_DQ0 H1 F7 FBA_D1 +FBA_VREF_DQ0 H1 F7 FBA_D20 D
2
+FBA_VREF_CA0 VREFDQ DQL1 F2 FBA_D6 VREFDQ DQL1 F2 FBA_D17

+FBA_VREF_CA0 DQL2 DQL2 FBA_DQS#[7..0] [25,27]
FBA_MA0 N3 F8 FBA_D2 FBA_MA0 N3 F8 FBA_D22 Group2 (IN1)
A0 DQL3 A0 DQL3
1
C257
FBA_MA1 P7 H3 FBA_D7 Group0 (IN3) FBA_MA1 P7 H3 FBA_D16
0.01U_0402_25V7K
1 A1 DQL4 A1 DQL4
DIS@ R290 FBA_MA2 P3 H8 FBA_D0 FBA_MA2 P3 H8 FBA_D23
FBA_MA3 N2 A2
A3
DQL5
DQL6
G2 FBA_D5 FBA_MA3 N2 A2
A3
DQL5
DQL6
G2 FBA_D18 CMD mapping mod Mode D
1.1K_0402_1% FBA_MA4 P8 H7 FBA_D3 FBA_MA4 P8 H7 FBA_D21
2 FBA_MA5 P2 A4 DQL7 FBA_MA5 P2 A4 DQL7
2
FBA_MA6 R8 A5 FBA_MA6 R8 A5
A6 A6 DATA Bus
DIS@ FBA_MA7 R2 D7 FBA_D31 FBA_MA7 R2 D7 FBA_D10
FBA_MA8 T8 A7 DQU0 C3 FBA_D25 FBA_MA8 T8 A7 DQU0 C3 FBA_D15 Address
A8 DQU1 A8 DQU1 0..31 32..63
FBA_MA9 R3 C8 FBA_D28 FBA_MA9 R3 C8 FBA_D8
FBA_MA10 L7 A9 DQU2 C2 FBA_D24 FBA_MA10 L7 A9 DQU2 C2 FBA_D13
+1.5VS_VGA A10/AP DQU3 A10/AP DQU3 Group1 (TOP) FBx_CMD0 CS0#_L
FBA_MA11 R7 A7 FBA_D29 Group3 (BOT) FBA_MA11 R7 A7 FBA_D9
FBA_MA12 N7 A11 DQU4 A2 FBA_D26 FBA_MA12 N7 A11 DQU4 A2 FBA_D12
A12 DQU5 A12 DQU5 FBx_CMD1
FBA_MA13 T3 B8 FBA_D30 FBA_MA13 T3 B8 FBA_D11
A13 DQU6 A13 DQU6
1
FBA_MA14 T7 A3 FBA_D27 FBA_MA14 T7 A3 FBA_D14 FBx_CMD2 ODT_L

DIS@ R640 M7 A14 DQU7 M7 A14 DQU7
0403 Update A15/BA3 +1.5VS_VGA
0403 Update A15/BA3 +1.5VS_VGA FBx_CMD3 CKE_L
1.1K_0402_1%
FBA_BA0 M2 B2 FBA_BA0 M2 B2 FBx_CMD4 A14 A14
2
+FBA_VREF_DQ0 FBA_BA1 N8 BA0 VDD D9 FBA_BA1 N8 BA0 VDD D9

+FBA_VREF_DQ0 BA1 VDD BA1 VDD
FBA_BA2 M3 G7 FBA_BA2 M3 G7 FBx_CMD5 RST RST
BA2 VDD BA2 VDD
1
K2 K2
C2076
0.01U_0402_25V7K
1 VDD VDD
DIS@ R641 K8 K8 FBx_CMD6 A9 A9
VDD N1 VDD N1
1.1K_0402_1% FBA_CLK0 J7 VDD N9 FBA_CLK0 J7 VDD N9
2 [25] FBA_CLK0 CK VDD CK VDD FBx_CMD7 A7 A7
C FBA_CLK0# K7 R1 FBA_CLK0# K7 R1 C
[25] FBA_CLK0#
2
FBA_CKE_L K9 CK VDD R9 FBA_CKE_L K9 CK VDD R9

[25] FBA_CKE_L CKE/CKE0 VDD CKE/CKE0 VDD FBx_CMD8 A2 A2
DIS@
FBx_CMD9 A0 A0
FBA_ODT_L K1 A1 FBA_ODT_L K1 A1
[25] FBA_ODT_L ODT/ODT0 VDDQ ODT/ODT0 VDDQ
0403 Update FBA_CS0#_L L2 A8 FBA_CS0#_L L2 A8 FBx_CMD10 A4 A4
[25] FBA_CS0#_L CS/CS0 VDDQ CS/CS0 VDDQ
FBA_RAS# J3 C1 FBA_RAS# J3 C1
[25,27] FBA_RAS# RAS VDDQ RAS VDDQ
FBA_CLK0 FBA_CAS# K3 C9 FBA_CAS# K3 C9 FBA_ODT_L FBx_CMD11 A1 A1
[25,27] FBA_CAS# CAS VDDQ CAS VDDQ
FBA_WE# L3 D2 FBA_WE# L3 D2
[25,27] FBA_WE# WE VDDQ WE VDDQ
E9 E9 FBx_CMD12 BA0 BA0
VDDQ VDDQ
2
DIS@ F1 F1 FBA_CKE_L
R291 FBA_DQS0 F3 VDDQ H2 FBA_DQS2 F3 VDDQ H2
DQSL VDDQ DQSL VDDQ FBx_CMD13 WE# WE#
160_0402_1% FBA_DQS3 C7 H9 FBA_DQS1 C7 H9
DQSU VDDQ DQSU VDDQ
2
DIS@ FBx_CMD14 A15 A15
DIS@ R292 R293
1
FBA_DQM0 E7 A9 FBA_DQM2 E7 A9 10K_0402_5% 10K_0402_5% FBx_CMD15 CAS# CAS#

FBA_CLK0# FBA_DQM3 D3 DML VSS B3 FBA_DQM1 D3 DML VSS B3
DMU VSS E1 DMU VSS E1 FBx_CMD16 CS0#_H
1
VSS G8 VSS G8
FBA_DQS#0 G3 VSS J2 FBA_DQS#2 G3 VSS J2
DQSL VSS DQSL VSS FBx_CMD17
FBA_DQS#3 B7 J8 FBA_DQS#1 B7 J8
DQSU VSS M1 DQSU VSS M1
VSS VSS FBx_CMD18 ODT_H
M9 M9
VSS P1 VSS P1
VSS VSS FBx_CMD19 CKE_H
FBA_RST# T2 P9 FBA_RST# T2 P9
[25,27] FBA_RST# RESET VSS RESET VSS
T1 T1 FBx_CMD20 A13 A13
L8 VSS T9 L8 VSS T9
ZQ/ZQ0 VSS ZQ/ZQ0 VSS
B FBx_CMD21 A8 A8 B
1
1
DIS@ DIS@ J1 B1 DIS@ J1 B1 FBx_CMD22 A6 A6
NC/ODT1 VSSQ NC/ODT1 VSSQ
1
R294 R295 L1 B9 R296 L1 B9

10K_0402_5% J9 NC/CS1 VSSQ D1 J9 NC/CS1 VSSQ D1
243_0402_1% NC/CE1 VSSQ 243_0402_1% NC/CE1 VSSQ FBx_CMD23 A11 A11
L9 D8 L9 D8
NCZQ1 VSSQ E2 NCZQ1 VSSQ E2 FBx_CMD24 A5 A5
2
2
VSSQ E8 VSSQ E8
2
VSSQ F9 VSSQ F9
VSSQ VSSQ FBx_CMD25 A3 A3
G1 G1
VSSQ G9 VSSQ G9
VSSQ VSSQ FBx_CMD26 BA2 BA2
96-BALL 96-BALL FBx_CMD27 BA1 BA1
SDRAM DDR3 SDRAM DDR3
K4W2G1646E-BC1A _FBGA96 K4W2G1646E-BC1A _FBGA96 FBx_CMD28 A12 A12
X76@ X76@
FBx_CMD29 A10 A10
+1.5VS_VGA U70 SIDE +1.5VS_VGA U71 SIDE FBx_CMD30 RAS# RAS#
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
C258
C259
C260
C261
C262
C263
C264
C265
C266
C267
C268
C269
C270
C271
C272
C273
C274
C275
C276
C277
C278
C279
C280
C281
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
@ @ @ @ @ @ @
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
A DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ A

N14M-GE2-VRAM A Lower
0.3
ZEA00 LA-A061P M/B
5 4 3 2 1
5 4 3 2 1
Memory Partition A - Upper 32 bits FBA_D[0..63] [25,26]

+1.5VS_VGA
FBA_MA[14..0] [25,26]
1
U72 U73
DIS@ R297
FBA_BA[2..0] [25,26]
+FBA_VREF_CA1 M8 E3 FBA_D36 +FBA_VREF_CA1 M8 E3 FBA_D63
1.1K_0402_1% +FBA_VREF_DQ1 H1 VREFCA DQL0 F7 FBA_D33 +FBA_VREF_DQ1 H1 VREFCA DQL0 F7 FBA_D59
VREFDQ DQL1 VREFDQ DQL1 FBA_DQM[7..0] [25,26]
F2 FBA_D38 F2 FBA_D61
2
+FBA_VREF_CA1 FBA_MA0 N3 DQL2 F8 FBA_D34 FBA_MA0 N3 DQL2 F8 FBA_D56

+FBA_VREF_CA1 A0 DQL3 A0 DQL3 FBA_DQS[7..0] [25,26]
D FBA_MA1 P7 H3 FBA_D37 Group4 (IN1) FBA_MA1 P7 H3 FBA_D60 Group7 (IN3) D
A1 DQL4 A1 DQL4
1
C282 FBA_MA2 P3 H8 FBA_D32 FBA_MA2 P3 H8 FBA_D58

0.01U_0402_25V7K
1 A2 DQL5 A2 DQL5 FBA_DQS#[7..0] [25,26]

DIS@ R298 FBA_MA3 N2 G2 FBA_D39 FBA_MA3 N2 G2 FBA_D62
FBA_MA4 P8 A3 DQL6 H7 FBA_D35 FBA_MA4 P8 A3 DQL6 H7 FBA_D57
1.1K_0402_1% FBA_MA5 P2 A4 DQL7 FBA_MA5 P2 A4 DQL7
2 FBA_MA6 R8 A5 FBA_MA6 R8 A5
CMD mapping mod Mode D
2
FBA_MA7 R2 A6 D7 FBA_D45 FBA_MA7 R2 A6 D7 FBA_D52

DIS@ FBA_MA8 T8 A7 DQU0 C3 FBA_D42 FBA_MA8 T8 A7 DQU0 C3 FBA_D51
FBA_MA9 R3 A8 DQU1 C8 FBA_D46 FBA_MA9 R3 A8 DQU1 C8 FBA_D54
A9 DQU2 A9 DQU2 DATA Bus
FBA_MA10 L7 C2 FBA_D41 Group5 (TOP) FBA_MA10 L7 C2 FBA_D50
FBA_MA11 R7 A10/AP DQU3 A7 FBA_D47 FBA_MA11 R7 A10/AP DQU3 A7 FBA_D53 Address
+1.5VS_VGA A11 DQU4 A11 DQU4 Group6 (BOT) 0..31 32..63
FBA_MA12 N7 A2 FBA_D43 FBA_MA12 N7 A2 FBA_D48
FBA_MA13 T3 A12 DQU5 B8 FBA_D44 FBA_MA13 T3 A12 DQU5 B8 FBA_D55
A13 DQU6 A13 DQU6 FBx_CMD0 CS0#_L
FBA_MA14 T7 A3 FBA_D40 FBA_MA14 T7 A3 FBA_D49
A14 DQU7 A14 DQU7
1
0403 Update M7 0403 Update M7 FBx_CMD1

DIS@ R642 A15/BA3 +1.5VS_VGA A15/BA3 +1.5VS_VGA
FBx_CMD2 ODT_L
1.1K_0402_1% FBA_BA0 M2 B2 FBA_BA0 M2 B2
FBA_BA1 N8 BA0 VDD D9 FBA_BA1 N8 BA0 VDD D9 FBx_CMD3 CKE_L
2
+FBA_VREF_DQ1 FBA_BA2 M3 BA1 VDD G7 FBA_BA2 M3 BA1 VDD G7

+FBA_VREF_DQ1 BA2 VDD BA2 VDD
K2 K2 FBx_CMD4 A14 A14
VDD VDD
1
K8 K8
C2077
0.01U_0402_25V7K
1 VDD VDD
DIS@ R643 N1 N1 FBx_CMD5 RST RST
FBA_CLK1 J7 VDD N9 FBA_CLK1 J7 VDD N9
[25] FBA_CLK1 CK VDD CK VDD
1.1K_0402_1% FBA_CLK1# K7 R1 FBA_CLK1# K7 R1 FBx_CMD6 A9 A9
2 [25] FBA_CLK1# CK VDD CK VDD
FBA_CKE_H K9 R9 FBA_CKE_H K9 R9
[25] FBA_CKE_H
2
CKE/CKE0 VDD CKE/CKE0 VDD

FBx_CMD7 A7 A7
C DIS@ C
FBA_ODT_H K1 A1 FBA_ODT_H K1 A1 FBx_CMD8 A2 A2
[25] FBA_ODT_H ODT/ODT0 VDDQ ODT/ODT0 VDDQ
FBA_CS0#_H L2 A8 FBA_CS0#_H L2 A8
[25] FBA_CS0#_H CS/CS0 VDDQ CS/CS0 VDDQ
0403 Update FBA_RAS# J3 C1 FBA_RAS# J3 C1 FBx_CMD9 A0 A0
[25,26] FBA_RAS# RAS VDDQ RAS VDDQ
FBA_CAS# K3 C9 FBA_CAS# K3 C9
[25,26] FBA_CAS# CAS VDDQ CAS VDDQ
FBA_WE# L3 D2 FBA_WE# L3 D2 FBx_CMD10 A4 A4
[25,26] FBA_WE# WE VDDQ WE VDDQ
FBA_CLK1 E9 E9
VDDQ F1 VDDQ F1
VDDQ VDDQ FBx_CMD11 A1 A1
FBA_DQS4 F3 H2 FBA_DQS7 F3 H2
DQSL VDDQ DQSL VDDQ
2
DIS@ FBA_DQS5 C7 H9 FBA_DQS6 C7 H9 FBx_CMD12 BA0 BA0

R299 DQSU VDDQ DQSU VDDQ
160_0402_1% FBx_CMD13 WE# WE#
FBA_DQM4 E7 A9 FBA_DQM7 E7 A9
FBA_DQM5 D3 DML VSS B3 FBA_DQM6 D3 DML VSS B3 FBx_CMD14 A15 A15
1
DMU VSS E1 DMU VSS E1

FBA_CLK1# VSS G8 VSS G8
VSS VSS FBx_CMD15 CAS# CAS#
FBA_DQS#4 G3 J2 FBA_DQS#7 G3 J2
FBA_DQS#5 B7 DQSL VSS J8 FBA_DQS#6 B7 DQSL VSS J8
DQSU VSS DQSU VSS FBx_CMD16 CS0#_H
M1 M1
FBA_CKE_H VSS M9 VSS M9
VSS VSS FBx_CMD17
P1 P1
FBA_RST# T2 VSS P9 FBA_RST# T2 VSS P9
[25,26] FBA_RST# RESET VSS RESET VSS FBx_CMD18 ODT_H
FBA_ODT_H T1 T1
L8 VSS T9 L8 VSS T9
ZQ/ZQ0 VSS ZQ/ZQ0 VSS FBx_CMD19 CKE_H
DIS@ DIS@ FBx_CMD20 A13 A13
1
1
R300 R301 J1 B1 J1 B1
10K_0402_5% 10K_0402_5% DIS@ R302 L1 NC/ODT1 VSSQ B9 DIS@ R303 L1 NC/ODT1 VSSQ B9
B NC/CS1 VSSQ NC/CS1 VSSQ FBx_CMD21 A8 A8 B
243_0402_1% J9 D1 243_0402_1% J9 D1
L9 NC/CE1 VSSQ D8 L9 NC/CE1 VSSQ D8
NCZQ1 VSSQ NCZQ1 VSSQ FBx_CMD22 A6 A6
E2 E2
2
2
VSSQ E8 VSSQ E8
F9 F9
VSSQ G1 VSSQ G1
G9 G9
VSSQ VSSQ
FBx_CMD25 A3 A3
96-BALL 96-BALL
SDRAM DDR3 SDRAM DDR3 FBx_CMD26 BA2 BA2
K4W2G1646E-BC1A _FBGA96 K4W2G1646E-BC1A _FBGA96
X76@ X76@ FBx_CMD27 BA1 BA1
FBx_CMD28 A12 A12
+1.5VS_VGA U72 SIDE +1.5VS_VGA U73 SIDE
FBx_CMD29 A10 A10
FBx_CMD30 RAS# RAS#
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
C283
C284
C285
C286
C287
C288
C289
C290
C291
C292
C293
C294
C295
C296
C297
C298
C299
C300
C301
C302
C303
C304
C305
C306
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
@ @ @ @ @ @ @
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@
A A

N14M-GE2-VRAM A Upper
0.3
ZEA00 LA-A061P M/B
5 4 3 2 1
5 4 3 2 1
+3VS_VGA
[PUN-06026-001]
2
R319 R320 R321 R322 R323 @
10K_0402_1% 10K_0402_1% 10K_0402_1% 10K_0402_1% 10K_0402_1%
X76@ X76@ X76@ X76@
1
[22] STRAP0 STRAP0
[22] STRAP1 STRAP1
D D
[22] STRAP2 STRAP2
[22] STRAP3 STRAP3
[22] STRAP4 STRAP4
2
R324 R325 R326 R327 R328 DIS@
10K_0402_1% 10K_0402_1% 10K_0402_1% 10K_0402_1% 10K_0402_1%
X76@ X76@ X76@ X76@
X76 for VRAM Config 1
1
[VRAM Config-RVL-06366-001]
GPU Frenq. Memory Size Memory Config strap3 strap2 strap1 strap0
0 1 1 0
+3VS_VGA Hynix (0x6)
H5TQ2G63BFR-11C R327 R321 R320 R324
SA00003YO10 PD 10K PU 10K PU 10K PD 10K
0 1 0 1
N14M-GE2 900 MHz 128M* 16* 4 Samsung (0x5)
K4W2G1646E-BC11 R327 R321 R325 R319
C 1GB PD 10K PU 10K PD 10K PU 10K C
SA00005SH00
2
R329 @ R330 @ R331 @ 0 0 0 1

10K_0402_1% 10K_0402_1% 4.99K_0402_1% Micron (0x1)
R327 R326 R325 R319
MT41J128M16JT-107G:K
PD 10K PD 10K PD 10K PU 10K
SA00005SM30
1
[22] ROM_SI ROM_SI

[22] ROM_SO ROM_SO 1 1 0 1
[22] ROM_SCLK ROM_SCLK Micron (0xD) R322 R321 R325 R319
MT41K256M16HA-107G:E PU 10K PU 10K PD 10K PU 10K
SA000065D20
2
1 0 1 1
R332 DIS@ R333 DIS@ R334 DIS@ N14M-GE2 900 MHz 256M* 16* 4 Samsung (0xB)
R322 R326 R320 R319
10K_0402_1% 10K_0402_1% 10K_0402_1% 2GB K4W4G1646B-HC11
PU 10K PD 10K PU 10K PU 10K
SA000068R10
1
0 1 0 0
Hynix (0x4)
R327 R321 R325 R324
H5TC4G63AFR-11C
PD 10K PU 10K PD 10K PD 10K
SA00006E800
B B
A A

N14M-GE2_MISC
Custom 0.3
ZEA00 LA-A061P M/B
5 4 3 2 1
5 4 3 2 1
Power Consumption:
+3VS +3VS_RTD Pin 22 (PVCC) < 50 mA

Pin 18 (SWR_VDD) < 200mA (layout trace > 40 mil)
1 2
Pin5 (DPV33) < 20mA
@ R337
D
0_0805_5% 1 D
C358 Pin 17 (SWR_LX) < 600mA (layout trace > 60 mil)
1U_0402_6.3V6K
2
Pin 15 (SWR_VCCK) < 100mA (layout trace > 60 mil)

Pin 43 (VCCK) < 50mA v0.2 update
Pin 11 (DPV12) < 100mA SE070104Z80
S CER CAP .1U 16V Z Y5V 0402
S CER CAP .1U 16V Z Y5V 0402
Vendor suggest to reserve for FW/EDID debug
+3VS_DVCCTL
+3VS_DVCCTL
@ C363 v0.2 update
EVT@
1 C361 1 C362 1 1 C364 1 U19
C365 +3VS_AVCCTL 8 1
VCC A0
10U_0603_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
7 2
WP A1
22U_0805_6.3V6M
EESCL 6 3
2 2 2 2 2 EESDA 5 SCL A2 4
SDA GND
+3VS_DVCCTL CAT24C02W I-GT3_SO8
C U20 C
Addr:A8 (1010 100x)

+3VS_RTD
TAI_HCB2012KF-221T30
RTD2136R
L9 35 TXOC+
1 2 22 TXOC+ 36 TXOC-
TXOC+ [32] EVT Debug Only, un-pop for DVT
PVCC TXOC- TXOC- [32]
TAI_HCB2012KF-221T30 18 41 TXO0+ +3VS_DVCCTL +3VS_DVCCTL
+1.2VS_SW R SWR_VDD TXO0+ TXO0+ [32]
L10 42 TXO0-
TXO0- TXO0- [32]
PWR
1 2 5
DP_V33
1
+3VS_AVCCTL 39 TXO1+
TXO1+ TXO1+ [32]
@ R340 1 2 0_0603_5% +SW _LX 17 40 TXO1-
SWR_LX TXO1- TXO1- [32] @ R341
R343
15 37 TXO2+ 4.7K_0402_5% 4.7K_0402_5%
SWR_VCCK TXO2+ TXO2+ [32]
38 TXO2-
TXO2- [32]
2
43 TXO2- MODE_CFG0 MODE_CFG1
1 C366 1 C367 1 C368 VCCK 33 TXO3+
TXO3+ TXO3+ [32]
1
10U_0603_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
11 34 TXO3-
DP_V12 TXO3- TXO3- [32]
2 2 2 LVDS @ R346 R342
25 TXEC+ 4.7K_0402_5% 4.7K_0402_5%
LVDS
7 TXEC+ 26 TXEC+ [32]
CPU_EDP_TXP0_C TXEC- TXEC- [32]
[5] CPU_EDP_TXP0_C
2
CPU_EDP_TXN0_C 8 LANE0P TXEC-
[5] CPU_EDP_TXN0_C LANE0N 31 TXE0+
eDP portD CPU_EDP_TXP1_C 9 TXE0+ 32 TXE0-
TXE0+ [32]
[5] CPU_EDP_TXP1_C LANE1P TXE0- TXE0- [32] +3VS_DVCCTL +3VS_DVCCTL
CPU_EDP_TXN1_C 10
[5] CPU_EDP_TXN1_C LANE1N
DP
29 TXE1+
TXE1+ TXE1+ [32]
PCH_DDPD_AUXP_C 4 30 TXE1-
[15] PCH_DDPD_AUXP_C AUX-CH_P TXE1- TXE1- [32]
1
PCH_DDPD_AUXN_C 3
[15] PCH_DDPD_AUXN_C AUX-CH_N 27 TXE2+ TXE2+ [32]
1 2 1 TXE2+ 28 R636 R637
PCH_DDPD_HPD LVDS_HPD_R TXE2-
[15] PCH_DDPD_HPD DP_HPD TXE2- TXE2- [32] 4.7K_0402_5% 4.7K_0402_5%
B R344 1K_0402_5% B
+1.2VS_SW R 23 TXE3+ TXE3+ [32]
2
@ R345 1 2 0_0402_5% TXE3+ 24 TXE3- EESCL EESDA
CPU [5] EDP_DISP_UTIL TXE3- TXE3- [32]
1
C369 C370 PCH @ R347 1 2 0_0402_5% 21
[15] PCH_EDP_PW M PWMIN
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 1 1 1 C372 2 46 EESCL
C371 R349 1 2 12 TESTMODE MIICSCL1 45 EESDA @ R638 @ R639
DP_REXT MIICSDA1
0.1U_0402_16V4Z
OTHERS
12K_0402_1% 4.7K_0402_5% 4.7K_0402_5%

20 S_ENVDD
10U_0603_6.3V6M
S_ENVDD [32,43]
2
2 2 2 2 PANEL_VCC 19
48 PWMOUT 44 S_INVT_PW M [32]
MODE_CFG1 S_BKOFF#
47 MODE_CFG1 BL_EN S_BKOFF# [32,43]
MODE_CFG0
MODE_CFG0
@ R351 0_0402_5%
EC_SMB_CK1 1 2 EC_SMB_CK1_R 13 6 Pin 47
[32,43] EC_SMB_CK1 1 2 14 CIICSCL1 DP_GND
EC_SMB_DA1 EC_SMB_DA1_R
[32,43] EC_SMB_DA1 CIICSDA1
GND
16
@ R352 0_0402_5% GND
To EC 49 0 1
PAD
RTD2136R-CG_QFN48_6x6 0 X EP Mode
Pin 48
+3VS_RTD 1 ROM EEPROM
1
A @ R353 A
1K_0402_5%
2
PreMP
PCH_DDPD_HPD
LVDS Converter RTD2136S
0.3
ZEA00 LA-A061P M/B
5 4 3 2 1
A B C D E F G H
1 1
HDMIOUT_TX2+_C [31]
HDMIOUT_TX2-_C [31]
HDMIOUT_TX1+_C [31]
HDMIOUT_TX1-_C [31]
HDMIOUT_CLK+_C [31]
HDMIOUT_CLK-_C [31]
HDMIOUT_TX0+_C [31]
HDMIOUT_TX0-_C [31]
UMA & DIS for Optimus
PCH_HDMIOUT_TX2+ HDMIO@ C373 1 2 0.1U_0402_10V6K HDMIOUT_TX2+_C R607 1 HDMIO@2 470_0402_5%
[5] PCH_HDMIOUT_TX2+ 1 2 0.1U_0402_10V6K HDMIOUT_TX2-_C
PCH_HDMIOUT_TX2- HDMIO@ C374 R608 1 HDMIO@2 470_0402_5%
HDMI_Term_CON
[5] PCH_HDMIOUT_TX2-
PCH_HDMIOUT_CLK+ HDMIO@ C377 1 2 0.1U_0402_10V6K HDMIOUT_CLK+_C R611 1 HDMIO@2 470_0402_5%
[5] PCH_HDMIOUT_CLK+ 1 2 0.1U_0402_10V6K HDMIOUT_CLK-_C
PCH_HDMIOUT_CLK- HDMIO@ C378 R612 1 HDMIO@2 470_0402_5%
[5] PCH_HDMIOUT_CLK-
1
2 D HDMIO@ 2
Close to HDMI Connector
2 Q58
+3VS
G 2N7002K_SOT23-3
S
3
Close to HDMI Connector,<1000mils Length
+3VS
2.2k 3VS Pull-High on PCH side 2.2k 5V Pull-High on Connector side

3 3
Q56A
2
DMN66D0LDW -7_SOT363-6
HDMIO@
PCH_HDMIOUT_DATA 1 6 HDMIOUT_SDATA
[15] PCH_HDMIOUT_DATA HDMIOUT_SDATA [31]
Q56B
5
HDMIO@
PCH_HDMIOUT_CLK 4 3 HDMIOUT_SCLK
[15] PCH_HDMIOUT_CLK HDMIOUT_SCLK [31]
Close to connector
+3VS
Q59 R615
1
MMBT3904_NL_SOT23-3 C 10K_0402_5%
HDMIO@ 2 1 2
B HDMIOUT_HPD [31]
HDMIO@
E
3
[15] PCH_HDMIOUT_HPD
R616
1
200K_0402_5%
4 R168 HDMIO@ 4
2
20K_0402_5%
INTEL HDMI HPD PD 20K

2

HDMI-OUT Level Shift
Custom 0.3
ZEA00 LA-A061P M/B
A B C D E F G H
5 4 3 2 1
HDMI-OUT Connector
4 L38 HDMIO@ 3 HDMIOUT_R_CK+
[30] HDMIOUT_CLK+_C 4 3
1 2 HDMIOUT_R_CK-
[30] HDMIOUT_CLK-_C 1 2 +HDMI_EDID_5V JHDMI1
MURATA DLW 21SN900HQ2L 1
HDMIOUT_R_D2+
2 D2+
EMI Reauest D2_shield
HDMIOUT_R_D2- 3
D D2- D
HDMIOUT_R_D1+ 4
5 D1+
HDMIOUT_R_D1- 6 D1_shield
HDMIOUT_R_D0+ 7 D1-
D0+
1
8
R531 R532 HDMIOUT_R_D0- 9 D0_shield 23
L39 HDMIO@ 2.2K_0402_1% 2.2K_0402_1% HDMIOUT_R_CK+ 10 D0- GND4 22
1 2 HDMIOUT_R_D0+ HDMIO@ HDMIO@ 11 CK+ GND3 21
[30] HDMIOUT_TX0+_C 1 2 12 CK_shield GND2 20
HDMIOUT_R_CK-
2
13 CK- GND1
4 3 HDMIOUT_R_D0- 14 CEC
[30] HDMIOUT_TX0-_C 4 3 15 Reserved
[30] HDMIOUT_SCLK HDMIOUT_SCLK
MURATA DLW 21SN900HQ2L HDMIOUT_SDATA 16 SCL
[30] HDMIOUT_SDATA SDA
EMI Reauest 17
18 DDC/CEC_GND
+HDMI_EDID_5V +5V
HDMIOUT_HPD 19
[30] HDMIOUT_HPD HP_DET
SUYIN_100042GR019M12RZR
CONN@
L40 HDMIO@
1 2 HDMIOUT_R_D1+
[30] HDMIOUT_TX1+_C 1 2
4 3 HDMIOUT_R_D1-
[30] HDMIOUT_TX1-_C 4 3
MURATA DLW 21SN900HQ2L
EMI Reauest
C D20 HDMIO@ C
HDMIOUT_R_D1+ 1 1 10 9 HDMIOUT_R_D1+
HDMIOUT_R_D1- 2 2 9 8 HDMIOUT_R_D1-
L41 HDMIO@ HDMIOUT_R_CK- 4 4 7 7 HDMIOUT_R_CK-

4 3 HDMIOUT_R_D2+
[30] HDMIOUT_TX2+_C 4 3 HDMIOUT_R_CK+ 5 5 6 6 HDMIOUT_R_CK+
1 2 HDMIOUT_R_D2- 3 3
[30] HDMIOUT_TX2-_C 1 2
MURATA DLW 21SN900HQ2L 8
EMI Reauest
IP4292CZ10-TBR XSON10
ESD Reauest
D21 HDMIO@
3 3
+HDMI_EDID_5V 8
U34 HDMIO@
B B
+5VS IP4292CZ10-TBR XSON10
3 ESD Reauest
OUT
1
1
IN C534
1
2 0.1U_0402_16V7K
C532 GND 2 HDMIO@
0.1U_0402_16V7K
HDMIO@ 2
AP2330W -7_SC59-3
200mA HDMIOUT_SCLK
HDMIOUT_SDATA
HDMIOUT_HPD
2
HDMIO@ HDMIO@
D22 D23
PESD5V0U2BT_SOT23-3 PESD5V0U2BT_SOT23-3
(Cj=3.5pF) (Cj=3.5pF)
ESD Reauest ESD Reauest
1
A A

HDMI-OUT
Custom 0.3
ZEA00 LA-A061P M/B
5 4 3 2 1
5 4 3 2 1
TXEC+
[29] TXEC+
TXEC-
[29]
[29]
TXEC-
TXE0+
TXE0+
LVDS Conn. Converter
TXE0-
[29] TXE0-
TXE1+ JLVDS1
[29] TXE1+
TXE1- 31 32 INVPWR_B+:
[29] TXE1- 29 G31 G32 30 TXO0-
D TXE2+ TXOC- 27 29 30 28 TXO0+ Current Rating: Max=375mA D
[29] TXE2+ 25 27 28 26
TXE2- TXOC+ TXO2-
[29] TXE2- 23 25 26 24 B+ INVPWR_B+
TXO2+ EMI@
TXE3+ TXO1- 21 23 24 22 L11
[29] TXE3+ 21 22 100mil 100mil
TXE3- TXO1+ 19 20 TXEC- 1 2
[29] TXE3- 19 20
TXO3- 17 18 TXEC+ TAI_HCB2012KF-221T30_0805 1
17 18
1
TXO3+ 15 16 @EMI@ v0.3 update
TXE0- 13 15 16 14 TXE1- C384 @EMI@ JCON1
TXOC+ TXE0+ 11 13 14 12 TXE1+ 680P_0402_50V7K C385 1
[29] TXOC+
2
TXOC- TXE2- 9 11 12 10 TXE3- 680P_0402_50V7K 2 2 1
[29] TXOC- 9 10 2
TXE2+ 7 8 TXE3+ 3
TXO0+ 5 7 8 6 4 3
[29] TXO0+ 5 6 4
TXO0- @ R361 1 2 0_0402_5% 3 4 5
[29] TXO0- 3 4 5
+LCDVDD 1 2 +LCDVDD 6
TXO1+ 1 2 LCD_PWM 7 6
[29] TXO1+ 100mil 100mil 7
TXO1- 1 ACES_87216-3016 LCD_BKOFF# 8
[29] TXO1- 9 8
CONN@
[29,43] EC_SMB_CK1 10 9
TXO2+ @ C386
[29] TXO2+ [29,43] EC_SMB_DA1 10
TXO2- 680P_0402_50V7K 11 13
[29] TXO2- 2 12 11 GND 14
1 12 GND
TXO3+
[29] TXO3+
TXO3- @C387
@ C387 ACES_50228-0127N-001
[29] TXO3-
680P_0402_50V7K CONN@
2
C C
+5VALW
+LCDVDD Rising Time: 300us~10ms
Active High Current Rating: Max=1500mA
U21 100mil
100mil 1 +LCDVDD
5 VOUT
VIN
2 1 1
1 2 4 GND
@R362
@ R362 SS C388 @ C389
@C389
0_0402_5% 1 3 4.7U_0603_10V6K 0.1U_0402_16V4Z
EN
1
2 2
B B
C390 APL3512ABI-TRG_SOT23-5
1U_0603_10V6K @ C391 1 2
Converter [29,43] S_BKOFF#
2
2 0.01U_0402_16V7K @R363
@ R363 0_0402_5%
1 2 LCD_BKOFF#
EC [43] BKOFF#
R364 0_0402_5%
1
R365 0_0402_5%
1 2 LCDVDD_EN v0.3 update R366
Converter [29,43] S_ENVDD
100K_0402_5%
1
1 2
EC [43] EC_ENVDD
2
R368
@R367
@ R367 0_0402_5% 100K_0402_5%
2
v0.3 update
1 2 LCD_PWM
Converter [29] S_INVT_PWM
@ R369 0_0402_5%
1 2
EC [43] INVT_PWM
@ R370 0_0402_5%
A A

LVDS
B 0.3
ZEA00 LA-A061P M/B
5 4 3 2 1
5 4 3 2 1
+USB3_VCCA
W=80mils W=80mils
@ R371 0_0402_5%
+5VSB +USB3_VCCA 1 2
2.5A
1
L12 EMI@
@ C393 U22 USB20_DEBN1 1 2 USB20_DEBN1_L @ R376
[16] USB20_DEBN1 1 2
0.1U_0402_16V7K 1 8 470_0603_5%
2 1 2 GND OUT 7
2
3 IN OUT 6 USB20_DEBP1 4 3 USB20_DEBP1_L
IN OUT [16] USB20_DEBP1 4 3
SYSON# 4 5
[34,43,44] SYSON# EN# OC# USB30_OC#0 [16]
1
MURATA DLW 21HN900SQ2L D @
APL3510BXI-TRG MSOP8 @ R373 0_0402_5% SYSON# 2 Q15
1 2 G
D D
v0.3 update S 2N7002K_SOT23-3
3
+USB3_VCCA
L13 EMI@ JUSB2

U3RXDN_A 4 3 U3RXDN_A_L 5
[16] U3RXDN_A 4 3 SSRX-
U3RXDP_A_L 6 1
7 SSRX+ VBUS 2 USB20_DEBN1_L +USB3_VCCA
U3RXDP_A 1 2 8 GND1 D- 3 USB20_DEBP1_L
[16] U3RXDP_A 1 2 SSTX- D+
9 4
W CM2012F2S-900T04_0805 SSTX+ GND
12 10 1
GND4 GND2
C394
C2070
C397
13 11 1
GND5 GND3
1
+
For EMI request
100U_6.3V_M
LOTES_ABA-USB-124-P01 v0.3 update
2
2 2
47U_0805_6.3V6M
0.1U_0402_16V7K
C2015 0.1U_0402_16V7K L14 EMI@ CONN@
1 2 U3TXDN_A_C 4 3 U3TXDN_A_L
[16] U3TXDN_A 4 3
C2016 0.1U_0402_16V7K ESD@
1 2 U3TXDP_A_C 1 2 U3TXDP_A_L D3
[16] U3TXDP_A 1 2 USB20_DEBP1_L 2
W CM2012F2S-900T04_0805 1
USB20_DEBN1_L 3
PESD5V0U2BT_SOT23-3
Non Changer
C C
W=80mils W=80mils
+5VALW +USB3_VCCB
2.5A
@ C401 U24 NCHG@
0.1U_0402_16V7K 1 8
2 1 2 GND OUT 7
3 IN OUT 6
SYSON# 4 IN OUT 5 USB30_OC#0
EN# OC#
APL3510BXI-TRG MSOP8
v0.3 update @ R618 0_0402_5%
1 2
USB20_N0 1 2 USB20_N0_CHR L15 EMI@ +USB3_VCCB

NCHG@ R675 0_0402_5% USB20_N0_CHR 1 2 USB20_N0_CHR_L
USB20_P0 1 2 USB20_P0_CHR 1 2
NCHG@ R676 0_0402_5%
1
USB20_P0_CHR 4 3 USB20_P0_CHR_L
4 3 @ R389
MURATA DLW 21HN900SQ2L 470_0603_5%
@ R619 0_0402_5%
1 2
Charger +5VSB Charge USB Port
2
CHG@
1
+USB3_VCCB D
C395 0.1U_0402_16V4Z
+USB3_VCCB
For EMI request @ Q16
1 2 SYSON# 2
L16 EMI@ JUSB1 G 2N7002K_SOT23-3
W=80mils U23 CHG@ v0.3 update [16] U3RXDN_B U3RXDN_B 1 2 U3RXDN_B_L 5 S
W=80mils
3
B 1 12 1 2 U3RXDP_B_L 6 SSRX- 1 B
IN OUT 7 SSRX+ VBUS 2 USB20_N0_CHR_L
USB30_OC#0 13 9 U3RXDP_B 4 3 8 GND1 D- 3 USB20_P0_CHR_L
FAULT# STATUS# [16] U3RXDP_B 4 3 SSTX- D+
9 4
USB20_N0 2 11 USB20_N0_CHR W CM2012F2S-900T04_0805 SSTX+ GND
[16] USB20_N0 3 DM_OUT DM_IN 10 12 10
USB20_P0 USB20_P0_CHR
[16] USB20_P0 DP_OUT DP_IN 13 GND4 GND2 11
@ R379 1 2 0_0402_5% 4 15 1 2 GND5 GND3 +USB3_VCCB
[43] USB_ILIM_SEL 5 ILIM_SEL ILIM_LO 16 1 2 C2017 0.1U_0402_16V7K L17 EMI@
[43] USB_CHR_EN EN ILIM_HI R380 80.6K_0402_1% 1 2 U3TXDN_B_C 1 2 U3TXDN_B_L LOTES_ABA-USB-124-P01
CHG@ [16] U3TXDN_B 1 2
@ R382 1 2 0_0402_5% 6 R381 CHG@ 30K_0402_1% CONN@
[43] USB_CHRMODE1 CTL1
@ R383 1 2 0_0402_5% 7 14 C2018 0.1U_0402_16V7K
[43] USB_CHRMODE2 CTL2 GND
@ R384 1 2 0_0402_5% 8 17
[16] U3TXDP_B
1 2 U3TXDP_B_C 4 3 U3TXDP_B_L 1
[43] USB_CHRMODE3 CTL3 GPAD 4 3
C398
C399
C400
1
1
TPS2546RTER_QFN16_3X3 W CM2012F2S-900T04_0805 +
v0.3 update
100U_6.3V_M
2
2 2
47U_0805_6.3V6M
0.1U_0402_16V7K
Charger CT CTL1 CTL2 CTL3 ILIM_SEL
EC GPIO GPXIOA07(pin104) GPIO22(pin41) GPXIOA11(pin108) GPIO21(pin40) For ESD request
S0(CDP) 1 1 1 1 D5 D6
S3(SDP) 1 1 1 0 U3RXDN_A_L 1 10 U3RXDN_A_L U3RXDN_B_L 1 10 U3RXDN_B_L
S4/S5(DCP) 0 0 1 1
U3RXDP_A_L 2 9 U3RXDP_A_L U3RXDP_B_L 2 9 U3RXDP_B_L
U3TXDN_A_L 4 7 U3TXDN_A_L U3TXDN_B_L 4 7 U3TXDN_B_L

ESD@
U3TXDP_A_L 5 6 U3TXDP_A_L U3TXDP_B_L 5 6 U3TXDP_B_L D4
USB20_P0_CHR_L 2
3 3 1
A USB20_N0_CHR_L 3 A
8 8
PESD5V0U2BT_SOT23-3
IP4292CZ10-TBR IP4292CZ10-TBR
Part Number = SC300002F00 Part Number = SC300002F00
ESD@ ESD@

Issued Date Title
Deciphered Date
USB 3.0 CONN
Custom 0.3
ZEA00 LA-A061P M/B
Date: Sheet 33 of 59
5 4 3 2 1
5 4 3 2 1
USB20
+USB_VCCA
JUSB5
1
L37 EMI@ VCC
USB20_N2 3 4 USB20_N2_R 2
[16] USB20_N2 3 4 D-
USB20_P2_R 3 5 +USB_VCCA
USB20_P2 2 1 D+ GND1
[16] USB20_P2 2 1 4 6
MURATA DLW 21HN900SQ2L GND GND2
D
TYCO_2041230-1 1 D
CONN@ 1 1
+USB_VCCA +
JUSB6 C520 C521 C522
1 220U_6.3V_M 0.1U_0402_16V7K
L36 EMI@ VCC 2 2 2
USB20_N3 3 4 USB20_N3_R 2
[16] USB20_N3 3 4 D-
USB20_P3_R 3 5 0.1U_0402_16V7K
[16] USB20_P3 2 1
v1.0 update
4 6
TYCO_2041230-1
CONN@
+USB_VCCB
JUSB4
1
L35 EMI@ VCC
USB20_N8 3 4 USB20_N8_R 2
[16] USB20_N8 3 4 D-
USB20_P8_R 3 5 +USB_VCCB
[16] USB20_P8 2 1 4 6
TYCO_2041230-1 1
CONN@ 1 1
+USB_VCCB +
C JUSB3 C514 C515 C516 C
1 220U_6.3V_M 0.1U_0402_16V7K
L34 EMI@ VCC 2 2 2
USB20_DEBN9 3 4 USB20_DEBN9_R 2
[16] USB20_DEBN9 3 4 D-
USB20_DEBP9_R 3 5 0.1U_0402_16V7K
USB20_DEBP9 2 1 D+ GND1
[16] USB20_DEBP9 2 1
v1.0 update
4 6
TYCO_2041230-1
CONN@
For USB2.0 ESD diode

ESD@ ESD@
D16 D18
W=100mils W=100mils USB20_N2_R 2 USB20_N8_R 2
1 1
+5VALW 2.5A +USB_VCCA USB20_P2_R 3 USB20_P8_R 3
U31
1 8 PESD5V0U2BT_SOT23-3 PESD5V0U2BT_SOT23-3
2 GND OUT 7 ESD@ ESD@
3 IN OUT 6 D17 D19
SYSON# 4 IN OUT 5 USB_OC#1 USB20_N3_R 2 USB20_DEBN9_R 2
[33,43,44] SYSON# EN# OC# USB_OC#1 [16]
1 1 1
B
1 APL3510BXI-TRG MSOP8 C518 USB20_P3_R 3 USB20_DEBP9_R 3 B
4.7U_0603_10V6K
C519 PESD5V0U2BT_SOT23-3 PESD5V0U2BT_SOT23-3
2
0.1U_0402_16V7K
2 Near Connector JUSB1 Near Connector JUSB
W=100mils W=100mils
+5VALW 2.5A +USB_VCCB
U32
1 8 +USB_VCCA +USB_VCCB
2 GND OUT 7
3 IN OUT 6
SYSON# 4 IN OUT 5 USB_OC#5
EN# OC# USB_OC#5 [16]
1
1
1 APL3510BXI-TRG MSOP8 C524 @ R508 @ R509
4.7U_0603_10V6K 470_0603_5% 470_0603_5%
C525
2
0.1U_0402_16V7K
2
2
1
D D
SYSON# 2 @ Q22 SYSON# 2 @ Q23
G 2N7002K_SOT23-3 G 2N7002K_SOT23-3
S S
3
A A

USB20
Custom 0.3
ZEA00 LA-A061P M/B
5 4 3 2 1
5 4 3 2 1
D29 ESD@
SATA_PTX_C_DRX_P0 1 1 10 9 SATA_PTX_C_DRX_P0
SATA ODD Conn SATA HDD Conn. 2 2
SATA_PTX_C_DRX_N0 9 8 SATA_PTX_C_DRX_N0
SATA_PRX_C_DTX_N0 4 4 7 7 SATA_PRX_C_DTX_N0
+12VS +5VS
SATA_PRX_C_DTX_P0 5 5 6 6 SATA_PRX_C_DTX_P0
100mil
JODP1 3 3
1 1
1 +5VS +5VS C404
1 2 +12VS C403 0.1U_0402_25V6 8
2 100mil v0.3 update
3 100mil 10U_0603_6.3V6M
3 4 2 2 IP4292CZ10-TBR XSON10
4 1 1 JHDP1
5 ESD Reauest
D GND 6 C405 C406 1 +5VS Place close to JHDP1 D
GND 10U_0603_6.3V6M 0.1U_0402_25V6 1 2
ACES_88290-044G 2 2 2 3 +12VS
CONN@ 3 4
Place close to JODP1. 4 5 100mil
GND 6
GND 1 1
1
C407 C408
ACES_88290-044G 10U_0805_25V6K 0.1U_0402_25V6 @ C409
CONN@ 1U_0603_25V6K
2
2 2
Place close to JHDP1

JODD1
1
1 2 SATA_PTX_C_DRX_P4 2 GND
[12] SATA_PTX_DRX_P4 A+
C410 1 2 0.01U_0402_25V7K SATA_PTX_C_DRX_N4 3
[12] SATA_PTX_DRX_N4 4 A-
C411 0.01U_0402_25V7K
C413 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_N4 5 GND JHDD1
[12] SATA_PRX_DTX_N4 B-
C415 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_P4 6 1
[12] SATA_PRX_DTX_P4 7 B+ 1 2 2 GND
SATA_PTX_C_DRX_P0
8 GND [12] SATA_PTX_DRX_P0 A+
C412 1 2 0.01U_0402_25V7K SATA_PTX_C_DRX_N0 3
Place CAP close to JODD <100mil 9 G1 [12] SATA_PTX_DRX_N0
C414 0.01U_0402_25V7K 4 A-
G2 C416 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_N0 5 GND
[12] SATA_PRX_DTX_N0 B-
TYCO_4-1775058-5 C417 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_P0 6
[12] SATA_PRX_DTX_P0 7 B+
CONN@
8 GND
Place CAP close to JHDD <100mil 9 G1
G2
TYCO_4-1775058-7
CONN@
C C
FAN Control Circuit
+3VS +12VS
v0.3 update
60mil EMI@ C418 470P_0805_100V v1.0 update
1 2
1
C419 1000P_0402_50V7K
1
1 2
D7
R395 BAV70W _SOT323-3
10K_0402_5%
R396 1K_0402_5% JFAN1
2
1
1 2 FAN_CPU_SPEED_R 2 1
[43] FAN_SPEED 2
[43] FAN_PW M 1 2 FAN_CPU_PW M_R 3 5
4 3 5 6
R397 100_0402_5% 4 6
1 ACES_85205-0400N
CONN@
C420
1000P_0402_50V7K
2
B B
A A

SATA-HDD/ODD/USB
0.3
ZEA00 LA-A061P M/B
5 4 3 2 1
5 4 3 2 1
+1.2VS_CR_DV +1.2VS_CR_AV +3VS
20mil 20mil 40mil
1 1 1 1 1 1
C421 C423 C425
C422 C424 C426
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 2 2 2 2
D 4.7U_0603_6.3V6K 4.7U_0603_6.3V6K 10U_0603_6.3V6M D
Place close to Pin9
+3VS
C427 20mil 40mil U25

1U_0402_6.3V6K 9 Length of per trace 2inch no more 2 via
2 1 +DV33_18 15 3V3_IN
7 SP3 mismatch trace length <100mil
+1.2VS_CR_AV AV12
11
+1.2VS_CR_DV DV12_S 50ohm +-15% impedance.
40mil 10
+3VS_CR Card_3V3 25 SD_D1 1 2 SD_D1_R
1 2 RREF 8 GND @ R399 0_0402_5% EMI@
R400 6.2K_0402_1% RREF SD_D0_MS_D1 1 2 SD_D0_MS_D1_R C428
W=12mil, L<200mil @ R401 0_0402_5% 5P_0402_50V
PCIE_PTX_C_CRRX_P1 1 12 SD_D1 SD_CLK_MS_D0 1 2 SD_CLK_MS_D0_R 1 2
[16] PCIE_PTX_C_CRRX_P1 HSIP SP1
PCIE_PTX_C_CRRX_N1 2 13 SD_D0_MS_D1 @ R402 0_0402_5%
[16] PCIE_PTX_C_CRRX_N1 HSIN SP2
[16] PCIE_PRX_CRTX_P1 C429 1 2 0.1U_0402_16V7K PCIE_PRX_C_CRTX_P1 5 14 SD_CLK_MS_D0 SD_CMD_MS_D2 1 2 SD_CMD_MS_D2_R
C430 1 2 0.1U_0402_16V7K PCIE_PRX_C_CRTX_N1 6 HSOP SP3 16 SD_CMD_MS_D2 @ R403 0_0402_5% EMI@
[16] PCIE_PRX_CRTX_N1 HSON SP4 17 SD_D3_MS_D3 SD_D3_MS_D3 1 2 SD_D3_MS_D3_R C431
SP5 18 SD_D2_MS_CLK @ R404 0_0402_5% 5P_0402_50V
3 SP6 SD_D2_MS_CLK 1 2 SD_D2_MS_CLK_R 1 2
[13] CLK_CR REFCLKP
C 4 EMI@ R405 33_0402_5% C
[13] CLK_CR# REFCLKN
v0.3 update
[15,39,40] PLT_A_RST# 1 2 PLT_RST#_CR 23 20 SD_WP_MS_BS
PERST# SD_W P
@ R406 1 [13] CLKREQ_CR# CLKREQ_CR# 24 21 SD_CD#
0_0402_5% @EMI@ CLK_REQ# SD_CD#
C432 +3VS
1 2 +3VS
1 2 GPIO_CR 19 22 MS_CD#
0.1U_0402_16V4Z @ R408 R409 10K_0402_5% GPIO MS_INS#
2 10K_0402_5% RTS5229-GR_QFN24_4X4
Place close to JCR1 pin 12,21

+3VS_CR
40mil
1 1
C433 C434
10U_0603_6.3V6M 0.1U_0402_16V4Z
+3VS_CR 2 2
40mil
B JCR1 B
SD_D2_MS_CLK_R 1
2 SD-DAT2
SD_D3_MS_D3_R 3 MS-VSS
4 SD-DAT3/MMC-RSV
SD_D2_MS_CLK_R 5 MS-VCC
+3VS_CR SD_CMD_MS_D2_R 6 MS-SCLK
SD_D3_MS_D3_R 7 SD-CMD/MMC-CMD
MS_CD# 8 MS-DAT3
MS-INS
2
9
@ R412 SD_CMD_MS_D2_R 10 SD-VSS/MMC-VSSI
47_0603_5% 11 MS-DAT2
SD_CLK_MS_D0_R 12 SD-VDD/MMC-VDD
SD_D0_MS_D1_R 13 MS-DAT0
1
SD_CLK_MS_D0_R 14 MS-DAT1
@ Q17 SD_WP_MS_BS 15 SD-CLK/MMC-CLK
16 MS-BS
MS-VSS
1
2N7002K_SOT23-3 D 17
SD_CD# 2 SD_D0_MS_D1_R 18 SD-VSS/MMC-VSS2
G SD_D1_R 19 SD-DAT0/MMC-DAT
SD_CD# 20 SD-DAT1
S
3
21 SD-CD 23
SD_WP_MS_BS 22 SD-GND GND1 24
SD-W P GND2
T-SOL_143-2300302603
Reserve card power discharge circuit CONN@
A A

RTS5229 Media Card Controller
Custom 0.3
ZEA00 LA-A061P M/B
5 4 3 2 1
5 4 3 2 1
Beep sound
+5V_VDDA_HD
Output:4.75v +3VS EC Beep
+5VS Codec Regulator +3VS [43] EC_BEEP#
1 R413 2
Max I:350mA 47K_0402_5%
1
@ R416 0_0603_5% v1.0 update
1 2
1
@ R417
1
+5V_VDDA_HD @ R418 10K_0402_5% PCI Beep C436
C437 C438 U26 LDO@ 1 0_0603_5% 1 R419 2 MONO_IN_1 1 2 MONO_IN
2
4.7U_0603_10V6K 0.1U_0402_16V4Z 1 @ R420 [12] PCH_SPKR
2 IN 47K_0402_5%
5 C439 +3VS_VDD 0_0402_5% 0.1U_0402_16V4Z
OUT
2
2 4.7U_0603_10V6K HP_DET# 1 2 HP_DET#_CODEC
GND 2 [37,43] HP_DET#
3 4 LDO_BP 1 2
D [43] CODEC_PW REN SHDN BP D
1 1
1 LDO@ 2 APL5320-475BI-TRG_SOT23-5 LDO@ C440
+5VS
1
R421 10K_0402_5% 0.22U_0402_6.3V6K C441 C442 1
0.1U_0402_16V4Z 10U_0603_6.3V6M Close to Pin1 R422
2 2 C443
4.7K_0402_5%
0.1U_0402_16V4Z
+5V_VDDA_HD +HD_AVDD 2
Change to AGND for
2
L18 0.1U_0402_16V4Z
1 2 high frequency noise issue
FCM1608KF-800T07_0603 1 1 1 1
1
1 1
C2019 C444 C445 C446 C449
47U_0805_6.3V6M @EMI@ C447 C448 Close to Pin9
2
2 2 2 2 0.1U_0402_16V4Z 10U_0603_6.3V6M
25
38
9
10U_0805_10V6K 100P_0402_50V8J U27 2 2
0.1U_0402_16V4Z
AVDD1
AVDD2
DVDD
DVDD_IO
14 35
LINE2_L LOUT1_L AMP_FRONT_LEFT [38]
15 36
Internal Speaker
LINE2_R LOUT_R AMP_FRONT_RIGHT [38]
16 39
MIC2_L LOUT2_L
17 41
MIC2_R LOUT2_R +MIC1_VREFO
23 45 EMI@ L45
LINE1_L SPDIFO2 MURATA_BLM15BB221SN1D_0402 D8
24 46 INT_DMIC_CLK_R 2 1
LINE1_R DMIC_CLK1/2 INT_DMIC_CLK [41]
1
C
For ESD and EMI 18 43 @EMI@ @EMI@ @EMI@ C
LINE1_VREFO NC R424 C451 C450 D9
20
LINE2_VREFO DMIC_CLK3/4
44 10_0402_5% 10P_0402_50V8J 27P_0402_50V8J 2 1 Need EXT MIC IN
+3VS C452 4.7U_0603_10V6K 1 2 1 2 2
600 Ohm
1
C453 4.7U_0603_10V6K 19
MIC2_VREFO
BITCLK
6
AZ_BITCLK_HD [12]
R425 R426 500 mA JMIC1 CONN@
MIC1_L 1 2MIC1_L_C 21 4.7K_0402_5% 4.7K_0402_5% 5
MIC1_L
1
@EMI@ EMI@
R427 MIC1_R 1 2MIC1_R_C 22 8 HDA_SDIN0_AUDIO 1 2 R429 MIC_DET# 4
AZ_SDIN0_HD [12]
2
4.7K_0402_5% MIC1_R SDATA_IN 33_0402_5% 1K_0402_5% L19 EMI@
R431 @EMI@ MONO_IN 12 37 R428 MIC1_R 1 2 MIC1_R_R1 1 2 MIC1_R_R 3
100K_0402_5% PCBEEP_IN MONO_OUT FBM-11-160808-601-T_0603 6
2
Close to U7 29 CBP MIC1_L 1 2 MIC1_L_R1 1 2 MIC1_L_R 2

11 CBP L20 EMI@ 1
[12] AZ_RST_HD# RESET# 10 mil
31 1 2 R430 FBM-11-160808-601-T_0603 1 1
10 CPVEE C454 2.2U_0603_10V6K 1K_0402_5% 7
[12] AZ_SYNC_HD SYNC 28
MIC1_VREFO +MIC1_VREFO
C455 5 EMI@ EMI@ 8
[12] AZ_SDOUT_HD SDATA_OUT 32 2 2 C457
@EMI@ 0.01U_0402_25V7K HP_RIGHT C456
@ R432 0_0402_5% 2 HPOUT_R 330P_0402_50V7K 330P_0402_50V7K SINGATRON 2SJ-B351-S39
[41] INT_DMIC_DATA 1 2 CODEC_MUTE_R 3 GPIO0/DMIC_DATA1/2 30 1 2
CBN
[43] CODEC_MUTE#2 1 13 GPIO1/DMIC_DATA3/4 CBN
MIC_DET# SENSE_A 10 mil C458 2.2U_0603_10V6K
HP_DET#_CODEC R433 1 2 20K_0402_1% SENSE_B 34 SENSE A 27 +VREF
SENSE B VREF 1
R434 5.1K_0402_1% ESD@
47 40 272JDREF C459
[43] EAPD_CODEC EAPD JDREF
1 1 0.1U_0402_16V7K
1
48 33 HP_LEFT C460 C461 2
SPDIFO1 HPOUT_L
10U_0603_6.3V6M
0.1U_0402_16V4Z
4 26 R435 Close to Pin27
7 DVSS1 AVSS1 42 20K_0402_1% 2 2
DVSS2 AVSS2
2
B ALC272-VA4-CG_LQFP48_7X7 B
DGND To AGND Bypass

1 2
@ R436 0_0603_5%
1 2
@ R437 0_0603_5%
1 2
@ R438 0_0603_5% HP OUT
1 2 v0.3 update Need
@ R439 0_0603_5% JHP1 CONN@
600 Ohm 5
500 mA
DGND AGND HP_DET# 4
[37,43] HP_DET#
EMI@
HP_DET# PR MIC1_R_R HP_RIGHT 1 2 HP_RIGHT_R 1 2 PR 3
R440 75_0603_1% L21 EMI@ FBM-11-160808-601-T_0603 6
MIC_DET# PL MIC1_L_R HP_LEFT 1 2 HP_LEFT_R 1 2 PL 2
Sense Pin Impedance Codec Signals R441 75_0603_1% L22 FBM-11-160808-601-T_0603 1
39.2K LOUT2 (PIN 39, 41) 7

3
1 1
EMI@ EMI@ 8
20K MIC1 (PIN 21, 22) C462 C463
SENSE A 330P_0402_50V7K 330P_0402_50V7K SINGATRON 2SJ-B351-S39
2 2
1
10K LINE1 (PIN 23, 24) ESD@
C464
2 0.1U_0402_16V7K
A 5.1K LOUT1 (PIN 35,36) A
1
ESD@ D10 ESD@ D11 ESD@ D12

39.2K LINE2 (PIN 14, 15) PESD5V0U2BT_SOT23-3 PESD5V0U2BT_SOT23-3 PESD5V0U2BT_SOT23-3
20K MIC2 (PIN 16, 17)

SENSE B Security Classification Compal Secret Data
10K Issued Date 2013/04/01 Deciphered Date 2014/04/01 Title
HDA-ALC272/HP/MIC
5.1K HP-OUT (PIN 32,33) AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
0.3
ZEA00 LA-A061P M/B
5 4 3 2 1
A B C D E
@ESD@ C2154 1 2 0.1U_0402_16V4Z

Vo=0.8(1+R606/R607)
+5VS
@ESD@ C2155 1 2 0.1U_0402_16V4Z
Output:4.8V
v0.3 update Max I:7.5A
4.7U_0805_25V6K
C465
1 2 R444
U28 10K_0402_5%
+12VS 6 1 1 2 +5VS
VCC EN
1
5 2
FDS8884_SO8
4.7U_0805_10V6K
4.7U_0805_10V6K
DRVGND
8
7
6
5
1 Q18 R445 C466 1
10K_0402_5% 4 3 1U_0402_6.3V6K
1 2 POK FB 2
1
APL5610CI-TRG_SOT23-6
C467 C468
4 +3VS R448
12K_0402_1%
2
1 @ R447 2
1
1 2
C469 R449
0_0402_5% 1 2 2.4K_0402_1%
+5VS +PVDD
1
2
3
C470 22U_0805_6.3V6M 47P_0402_50V8J
2
1 2
@
120 mil L23 1 2 120 mil 10U_0805_10V6K 0.1U_0402_16V4Z
HCB2012KF-221T30_2P 1 1 1 1
L24 1 @ 2 C471 C472 C473 C474
HCB2012KF-221T30_2P
10U_0805_10V6K
2 2 2 2
0.1U_0402_16V4Z U29
Close to Pin12
4
5 PVDDL
Close to Pin4,5 PVDDR
OUT-RN
7 OUTNR Mode selet: Fix Gain
1 @ 2 12
R451 R617 AVDD 6 OUTPR
OUT-RP +PVDD
5.6K_0402_1% 0_0402_5% Mode1 Mode2 Option Pin15 Pin16
@ R452 R453 1 2
0_0402_5% 1.1K_0402_1% 2 OUTNL
1 2 1 2 1 2 AMP_R_C 14 OUT-LN
[37] AMP_FRONT_LEFT INPUT-L 0 0 Fixed Gain G1 G2
1
C475 1U_0402_6.3V6K 3 OUTPL
OUT-LP
2 AMP_PD# 9 @ R454 @ R455 0 1 I2C SCL SDA 2
[43] AMP_PD# SDb
@ R456 R457 0_0402_5% 0_0402_5%
0_0402_5% 1.1K_0402_1% 16 AMP_G2
2
HOLD/SDA/G2
1
1 2 1 2 1 2 AMP_L_C 13 MODE1 MODE2 1 0 PWM PWM Hold

[37] AMP_FRONT_RIGHT INPUT-R 15
R458 C476 1U_0402_6.3V6K AMP_G1
1
VOL/SCL/G1
1
1
10K_0402_5%
R459
@ R460 @ R461
1 1 DC DC Hold
5.6K_0402_1% MODE1 1
2
MODE1 0_0402_5% 0_0402_5%

MODE2 8 11
2
2
MODE2 AGND
2
@ R463
v0.2 update R462 0_0402_5%
1 2 10 17 1 2
+PVDD BYPASS EPAD
1
20K_0402_5% 1
ALC109-CGT_EPAD-SOP16
R464 C477
20K_0402_5% 2 2 2.2U_0805_25V6K Gain Select
+PVDD
AMP_G1 AMP_G2 Gain
1
0 0 11dB (Default)
@ R667 @ R668
0_0402_5% 0_0402_5%
0 1 14dB
2
AMP_G1 AMP_G2
3 3
1
ACES_87212-04G0 1 0 19dB
L25 EMI@ L26 EMI@ JSPK1
MURATA BLM18PG121SN1D 0603 MURATA BLM18PG121SN1D 0603 SPKL+ 1 @ R669 @ R670
OUTNR 1 2 SPKR- OUTPL 1 2 SPKL+ SPKL- 2 1 0_0402_5% 0_0402_5% 1 1 25dB
3A/120ohm/100MHz 1 3A/120ohm/100MHz 1 SPKR+ 3 2
4 3
1
2
SPKR-
C478 C479 C480 C481 5 4
470P_0603_50V8J 1000P_0603_50V7K 470P_0603_50V8J 1000P_0603_50V7K 6 GND v1.0 update
1 2
1 2
EMI@ 2 EMI@ EMI@ 2 EMI@ GND

CONN@
R465 R466
22_1206_5% 22_1206_5%
EMI@ EMI@
2
L27 EMI@ L28 EMI@

MURATA BLM18PG121SN1D 0603 MURATA BLM18PG121SN1D 0603
OUTPR 1 2 SPKR+ OUTNL 1 2 SPKL- D13 D14
3A/120ohm/100MHz 1 3A/120ohm/100MHz 1 PESD5V0U2BT_SOT23-3 PESD5V0U2BT_SOT23-3
1
ESD@ ESD@
C482 C483 C484 C485
470P_0603_50V8J 1000P_0603_50V7K 470P_0603_50V8J 1000P_0603_50V7K
1 2
1 2
EMI@ 2 EMI@ EMI@ 2 EMI@

1
R467 R468
22_1206_5% 22_1206_5%
EMI@ EMI@
2
4 4

AMP
Custom 0.3
ZEA00 LA-A061P M/B
A B C D E
5 4 3 2 1
WOL circuit Power ( Decoupling Cap. )

Short J5 for WOL support (Enable/Disable by BIOS setup) 60 mils
40 mils +LAN_VDD10 40 mils
v0.2 update @ J5 JUMP_43X79 +3V_LAN +3V_LAN +LAN_VDDREG
1 2
1 2 C553 1 2 0.1U_0402_16V4Z 1 2
+3VALW _PCH +3V_LAN C552 1 2 0.1U_0402_16V4Z @ R572 0_0603_5%
60mil 60mil C557 1 2 0.1U_0402_16V4Z 1 1
3
D
1 C556 1 2 0.1U_0402_16V4Z
C558 1 2 0.1U_0402_16V4Z C554 C555
@ Q26 0.1U_0402_16V4Z 4.7U_0603_10V6K
AO3413_SOT23-3 @ C559 1 2 10U_0805_10V6K C560 1 2 0.1U_0402_16V4Z 2 2
G
2
D D
+5VALW
@ C2128 1 2 10U_0805_10V6K <Note>
C561 1 2 1U_0402_6.3V6K
1
v1.0 update C555 is X5R
@ R573
C554, C555 close to U26
100K_0402_5%
C552, C556, C559, C2128 close to Pin 11,32 C553, C557, C558, C560, close to Pin 3,8,22,30 Pin22
@ R574 C561(1uF) close to Pin22
2
200K_0402_5%
1 2
1
D
1
2 @ Q27 @ C562
[43] W OL_EN#
G SSM3K7002FU_SC70-3 0.1U_0402_16V4Z
S
3
+LAN_VDD10 +3V_LAN +LAN_VDD10

+3V_LAN rising time (10%~90%) need > 0.5ms and <100ms.
30
11
32
22
U36 JRJ1
3
8
Close to Pin 17,18 R575 20mils
249_0402_1%
AVDD10
AVDD10
AVDD10
AVDD33
AVDD33
DVDD10
LAN_LED_GRN# 1 2 LAN_LED_GRN#_R 13
C C563 2 1 .1U_0402_16V7K PCIE_PRX_C_LANTX_P2 17 1 LAN_MIDI0+ L3 C
[16] PCIE_PRX_LANTX_P2 HSOP MDIP0
[16] PCIE_PRX_LANTX_N2 C564 2 1 .1U_0402_16V7K PCIE_PRX_C_LANTX_N2 18 2 LAN_MIDI0- Green / Orage +
HSON MDIN0 4 LAN_MIDI1+ R576
PCIE_PTX_C_LANRX_P2 13 MDIP1 5 LAN_MIDI1- 249_0402_1%
20mils +
[16] PCIE_PTX_C_LANRX_P2 14 HSIP MDIN1 6 1 2 14
PCIE_PTX_C_LANRX_N2 LAN_MIDI2+ LAN_LED_ORG# LAN_LED_ORG#_R
[16] PCIE_PTX_C_LANRX_N2 HSIN MDIP2 7 L4
LAN_MIDI2-
CLK_LAN 15 MDIN2 9 LAN_MIDI3+
[13] CLK_LAN 16 REFCLK_P MDIP3 10
CLK_LAN# LAN_MIDI3-
[13] CLK_LAN# REFCLK_N MDIN3 1
LAN_MIDI0+
CLKREQ_LAN# 12 TD1+ R1
+3VS [13] CLKREQ_LAN# CLKREQB 2
LAN_MIDI0-
1 @ 2 LAN_W AKE#_R 21 25 LAN_LED_ORG# TD1- R2
+3VS LANWAKEB LED2
R577 10K_0402_5% 26 LAN_LED_YEL# LAN_MIDI1+ 3
1 2 ISOLATE# 20 LED1/GPIO 27 LAN_LED_GRN# TD2+ R3
R578 1K_0402_5% ISOLATEB LED0 LAN_MIDI1- 4
PLT_A_RST# 19 8111G@
vendor recommend TD2- R4
[15,36,40] PLT_A_RST# PERSTB +LAN_REGOUT +LAN_VDD10 5
40 mils R581
CT R5
1
+LAN_VDDREG 23 60 mils 0_0603_5% 60 mils

+LAN_VDDREG VDDREG
1
R579 ESD@ C2134 1 2 31 24 1 2 1 6
15K_0402_5% 0.1U_0402_16V4Z R580 2.49K_0402_1% RSET REGOUT EMI@ CT R6
2
L44 8111GS@ @ R582 C565 LAN_MIDI2+ 7

TD3+ R7
v0.2 update 2.2UH +-5% NLC252018T-2R2J-N 0_0402_5%
2
0.01U_0402_16V7K
LAN_X2 29 1 2 LAN_MIDI2- 8
2
LAN_X1 28 CKXTAL2 33 TD3- R8
CKXTAL1 GND 1 1
1
8111G@ LAN_MIDI3+ 9
8111GS@ C567 C568 8111GS@ TD4+ R9
C566
0.1U_0402_16V4Z 4.7U_0603_10V6K 0.1U_0402_16V4Z LAN_MIDI3- 10
2
2 2 TD4- R10
RTL8111G-CG_QFN32_4X4 <Note>
+3V_LAN
C567 is X5R
8111G 8111GS R583 20mils
B 510_0402_5% B
(LDO Mode) (SWR Mode) Yellow LAN_LED_YEL# 1 2 LAN_LED_YEL#_R 11
L1
1
@ R584 +3V_LAN
@ Q28 10K_0402_5% + 15
GND
2
ESD@ D24 12 16
G
2N7002K_SOT23-3
2
Part Number = SC300001J00 L2 GND

1 3 LAN_W AKE#_R LAN_MIDI1- 1 10
[14,40] PCIE_W AKE# 2 1 10 9 LAN_MIDI0+
D
UDE_RV1-26295NU1
LAN_MIDI1+ 3 2 9 8
1 2 4 3 8 7 LAN_MIDI0- CONN@ LAN_GND
GND
5 4 7 6 DC234008N10
@ R585 0_0402_5% 5 6
11
LAN_LED_YEL#
TCLAMP3304N.TCT_SLP2626P10-10
LAN_LED_ORG# R586 0_0805_5%
2 @ 1
ESD@ D25
Part Number = SC300001J00
2
LAN_MIDI3- 1 10
2 1 10 9 LAN_MIDI2+
LAN_MIDI3+ 3 2 9 8 @ESD@ D26
4 3 8 7 LAN_MIDI2- PESD5V0U2BT_SOT23-3
Crystal
GND
5 4 7 6 LAN_GND
5 6
1
LAN_X1
11
A A
Y4
1 2 TCLAMP3304N.TCT_SLP2626P10-10
OSC NC
4 3 LAN_X2
NC OSC
1 25MHZ_10PF_X3G025000DA1H-X 1
C569 C570
10P_0402_50V8J
2 2
10P_0402_50V8J
LAN RTL8111G
Custom 0.3
ZEA00 LA-A061P M/B
5 4 3 2 1
5 4 3 2 1
MINI(TV)/m-SATA SSD
Mini Card Slot 1---TV tuner Current: +3VS : 2750mA, 1.5V: 500mA +3VS +1.5VS
120mil 40mil
v1.0 update 1 1 1
H=4mm TV@ TV@ TV@ TV@ TV@
@ R470 C488 C489 C490 C491 C492
0_0402_5% JMINI1 0.1U_0402_16V4Z
1 2 PCIE_W AKE#_R 1 2 2 2 2 0.1U_0402_16V4Z
[14,39] PCIE_W AKE# 1 2 +3VS
3 4 4.7U_0805_10V4Z 0.1U_0402_16V4Z 4.7U_0805_10V4Z
+3VS 5 3 4 6
5 6 +1.5VS
TV_CLKREQ# 7 8 +VCC_SIM
[13] TV_CLKREQ# 7 8 +VCC_SIM
9 10 B_DAT
D 9 10 D
11 12 B_CLK
[13] CLK_TV# 13 11 12 14 B_RST
[13] CLK_TV 15 13 14 16 +5VS +VCC_SIM
@ R471 1 2 0_0402_5%
+3VS
B_DETECT_R 17 15 16 18 TV@ F1
[12] SATA_PRX_DTX_P1
SSD@ C2020 1 2 0.01U_0402_25V7K 19 17
19
18
20
20 1 2 +VCC_SIM Smart Card Conn.(B-CAS)
SSD@ C2021 1 2 0.01U_0402_25V7K 21 22 PLT_A_RST# 1
[12] SATA_PRX_DTX_N1 21 22 PLT_A_RST# [15,36,39]
TV@ R620 1 2 0_0402_5% PCIE_PRX_R_TVTX_N4 23 24 2A_63V_0437002.W R_1206
[16] PCIE_PRX_TVTX_N4 23 24
TV@ R621 1 2 0_0402_5% PCIE_PRX_R_TVTX_P4 25 26 @ R474 0_0402_5% v0.3 update C493
[16] PCIE_PRX_TVTX_P4 25 26
SSD@ C2023 1 2 0.01U_0402_25V7K 27 28 @ R476 0_0402_5% 330P_0402_50V7K
[12] SATA_PTX_DRX_N1 27 28 2 TV@
SSD@ C2022 1 2 0.01U_0402_25V7K 29 30 PM_SMBCLK_TV 1 2
[12] SATA_PTX_DRX_P1 29 30 PM_SMBCLK [10,11,13,5]
TV@ C121 1 2 0.1U_0402_16V7K PCIE_PTX_C_TVRX_N4 31 32 PM_SMBDATA_TV 1 2
[16] PCIE_PTX_TVRX_N4 31 32 PM_SMBDATA [10,11,13,5]
TV@ C122 1 2 0.1U_0402_16V7K PCIE_PTX_C_TVRX_P4 33 34
[16] PCIE_PTX_TVRX_P4 35 33 34 36
37 35 36 38 USB20_N10 [16]
+3VS 39 37 38 40 USB20_P10 [16]
JBCAS1
@ R478 0_0402_5% 41 39 40 42 1 DET1
@ R477 0_0402_5% 43 41 42 44 1 2 B_DETECT_R
@ R479 0_0402_5% 45 43 44 46 2 3
1 2 +3VS_TV_R 47 45 46 48 3 4
+3VS 1 2 49 47 48 50 4 5
+12VS_TV1 B_DAT
+12VS 1 2 51 49 50 52 5 6
+12VS_TV2 B_CLK
51 52 6 7
53 54 7 8 B_RST
GND1 GND2 8 9
1 1 9
LOTES_AAA-PCI-049-P06-A 10 +VCC_SIM
10 +VCC_SIM
@ R665 0_0402_5% @ C494 CONN@ 11 1
E51_TXD 1 2 +12VS_TV1 0.1U_0402_16V4Z GND 12 TV@
E51_RXD 1 2 +12VS_TV2 2 2 @ C495 GND C496
0.1U_0402_16V4Z ACES_85201-1005N 0.1U_0402_16V4Z
@ R666 0_0402_5% CONN@ 2
C C
+3VALW _MINI +1.5VS
WLAN & Bluetooth Combo Card 40mil

R480
@ 0_0603_5%
1 2
20mil
+1.5VS_MINI
Mini Card Slot 2--- WLAN Current: 3.3 : 750mA, C497

1 1
C498
1
C499 +
@ C502 @ C500
1
0.1U_0402_16V7K
0.1U_0402_16V4Z
v1.0 update 4.7U_0603_6.3V6K 68U_B2_6.3VM_R70M 0.1U_0402_16V4Z
2 2 2 2 2
Short J4 C2157
@ J4 JUMP_43X79 0.1U_0402_16V7K
1 2 1 2
1 2
H=4mm
@ Q20 @ R481
0_0402_5% JMINI2
80mil 3
80mil
S
1 PCIE_W AKE# 1 2 1 2
+3VALW _PCH +3VALW _MINI 1 2 +3VALW _MINI
3 4
AO3413_SOT23-3 BT_ON R482 1 @ 2 0_0402_5% 5 3 4 6
+5VALW 5 6 +1.5VS_MINI
7 8
G
[13] CLKREQ_W LAN#

2
9 7 8 10
11 9 10 12 @ R622 10K_0402_5%
[13] CLK_W LAN# 11 12
2
13 14 1 2
[13] CLK_W LAN 13 14 +3VALW _MINI
@ R483 15 16
100K_0402_5% 17 15 16 18 @ R510 0_0402_5%
R484 @ 19 17 18 20 1 2
21 19 20 22 W L_OFF#_EC [43]
B 200K_0402_5% PLT_A_RST# B
1
1 2 23 21 22 24
[16] PCIE_PRX_W LANTX_N3 25 23 24 26
1 @ R485 0_0402_5%
[16] PCIE_PRX_W LANTX_P3 27 25 26 28 @ R486 0_0402_5%
C503 @ 29 27 28 30 PM_SMBCLK_W L 1 2 PM_SMBCLK
0.1U_0402_16V4Z 31 29 30 32 PM_SMBDATA_W L 1 2 PM_SMBDATA
[16] PCIE_PTX_C_W LANRX_N3 31 32
1
D 2 33 34
2 [16] PCIE_PTX_C_W LANRX_P3 35 33 34 36
[43] W L_PW RON Q21 @
37 35 36 38 USB20_N4 [16]
G
39 37 38 40 USB20_P4 [16]
S 2N7002K_SOT23-3
3
41 39 40 42
+3VALW _MINI 41 42
43 44 W LAN_LED#
45 43 44 46 W LAN_LED# [42]
BT_LED#
47 45 46 48 BT_LED# [42]
E51TXD_P80DATA 49 47 48 50
[43] E51_TXD 1 2 51 49 50 52
E51RXD_P80CLK
Add power on/off for support [43] E51_RXD 51 52
wake on WLAN in S3 & S4 & S5 @ R507 0_0402_5% 53
GND1 GND2
54
W LAN_LED#
R487
1
10K_0402_5%
2
Debug card using +3VALW _MINI
LOTES_AAA-PCI-049-P06-A
1 2 CONN@ BT_LED# 1 2
[43] BT_ON
R488 10K_0402_5%
R489
1K_0402_5%
@ESD@
PLT_A_RST# C2153 1 2 0.1U_0402_16V4Z
A v0.3 update A
Security Classification Compal Secret Data

PCIe-WLAN/TV_B-CAS
0.3
ZEA00 LA-A061P M/B
5 4 3 2 1
5 4 3 2 1
TPM(Reserve) Screw Hole PCH heat

H1 H2 H4 H5 H6 H7 H26
H_4P6X4P2
@
H_4P2
@
H_4P2
@
H_4P2
@
H_4P2
@
H_4P2
@
H_4P2
@
sink
1
+3VS
JP1
1
20 mils H15 H16 H17 H18 H11 H12 H23 H14 2 1
1 1
Co-lay Nuvton_NPCT421LA0WX H_2P9 H_2P9 H_2P9 H_2P9 H_6P4 H_6P4 H_6P4 H_6P4 2
TPM@ TPM@ @ @ @ @ @ @ @ @
C2129 C2130 HOMET_PH02Z22BJZ202
1
D 0.1U_0402_16V4Z 10U_0603_6.3V6M U75 TPM@ CONN@ D
2 2 24 1
10 VPS NC 2
VPS NC 3 H24 H19 H25 JP2
28 NC 7 H8 H9 H10 H_12P0 H_12P0 H_3P5 1
SERIRQ 27 LPCPD# PP H_4P4 H_4P4 H_4P4 @ @ @ 2 1
[13,43] SERIRQ 26 SERIRQ 6 2
[13,43] LPC_AD0 LPC_AD0 @ @ @
1
LPC_AD1 23 LAD0 NC 9
[13,43] LPC_AD1
1
LPC_FRAME# 22 LAD1 VNC HOMET_PH02Z22BJZ202
[13,43] LPC_FRAME# LFRAME#
[13,43] LPC_AD2 LPC_AD2 20 4 CONN@
LPC_AD3 17 LAD2 GND 11
[13,43] LPC_AD3 LAD3 GND 18
25 GND H13 H20 ZZZ1 PCB@ ZZZ2 DAZ@
1 2 21 NC 5 H_3P3 H_3P3 FD1 FD2 FD3 FD4 H27 H28 H21 H22
[13,43] CLK_PCI_EC LCLK NC +3VSB
TPM@ R673 33_0402_5% 19 8 1 1 @ @ H_1P5N H_1P5N H_7P0N H_7P0N
+3VS NC VNC
15 12 @ @ @ @ @ @ @ @
1
NC NC 13
1
1 2 16 NC 14 TPM@ TPM@
[15,21,43] PLT_RST# LRESET# NC C2131 2 2 C2132 PCB LA-A061P PCB LA-A061P
@ R674 0_0402_5%
1 ST33ZP24AR28PVSP_TSSOP28 0.1U_0402_16V4Z 10U_0603_6.3V6M
@ C2133
0.1U_0402_16V4Z
2
CRT Conn(Reserve 15pin)
CRT@
L29 1 2 NBQ100505T-800Y_0402 CRT_R_L
[15] PCH_CRT_R CRT@
L30 1 2 NBQ100505T-800Y_0402 CRT_G_L
[15] PCH_CRT_G CRT@
C L31 1 2 NBQ100505T-800Y_0402 CRT_B_L C
[15] PCH_CRT_B
WebCam+Digital Mic 500mA
1
2
3
4
CRT@ 1 1 1 1 1 1
+3VS +CAM_PWR RP16 CRT@ CRT@ CRT@ CRT@ CRT@ CRT@
150_0804_8P4R_1% C505 C506 C507 C508 C509 C510
F2 2.2P_0402_50V8C 2.2P_0402_50V8C 2.2P_0402_50V8C 2.2P_0402_50V8C
30 mils 1 2 30 mils 2 2 2 2 2 2
8
7
6
5
2.2P_0402_50V8C 2.2P_0402_50V8C
2A_63V_0437002.W R_1206 1
C504
v0.3 update
10U_0603_6.3V6M
2
Need PU/PL on PCH/FCH side
(2.2K*2pcs for DDC & 150_8P4R*1pcs for RGB) JCRT1
CRT_R_L 1
CRT_G_L 2 1
CRT_B_L 3 2
L32 EMI@ JCAM1 HSYNC 4 3
4 3 USB20_P11_R 1 9 VSYNC 5 4
[16] USB20_P11 4 3 2 1 GND 6 5
USB20_N11_R CRT_DDC_CLK
+CAM_PW R 3 2 CRT_DDC_DAT 7 6 16
1 2
30 mils +CAM_PWR
4 3 8 7 G2 15
[16] USB20_N11 1 2 5 4 9 8 G1
MURAT_DLW 21SN900HQ2L_0805 6 5 10 9
7 6 11 10
[37] INT_DMIC_DATA 8 7 10 12 11
[37] INT_DMIC_CLK 8 GND 13 12
+HDMI_EDID_5V 13
ACES_87213-0800G 14
14
2
B CONN@ B
ACES_87212-14G0
CONN@
D15
PESD5V0U2BT_SOT23-3
ESD@ @ C511
0.1U_0402_16V4Z
1 2
1
U30 CRT@ CRT@ +HDMI_EDID_5V

1 8 1 2
+HDMI_EDID_5V VCC_SYNC BYP C512 0.22U_0402_16V7K
2 3 CRT_R_L
Touch +5VS VCC_VIDEO VIDEO1
2
7 4 CRT_G_L R493 R494
+3VS VCC_DDC VIDEO2 4.7K_0402_5% 4.7K_0402_5%
CRT@ CRT@
500mA [15] PCH_CRT_DATA 10 5 CRT_B_L
1
+5VS_TOUCH +5VS DDC_IN1 VIDEO3
TOUCH@ [15] PCH_CRT_CLK 11 9 CRT_DDC_DAT

1 2 DDC_IN2 DDC_OUT1
30 mils
F3 2A_63V_0437002.W R_1206 v0.3 update

13 12 CRT_DDC_CLK
C513 0.1U_0402_16V4Z [15] PCH_CRT_VSYNC SYNC_IN1 DDC_OUT2
1 2 R496 CRT@
15 14 VSYNC_R 1 2 22_0402_5% VSYNC
JTCH1 TOUCH@ L33 TOUCH@ [15] PCH_CRT_HSYNC SYNC_IN2 SYNC_OUT1
1 4 3 R497
A
1 2 USB20_N5_R 4 3 6 16 HSYNC_R 1 CRT@ 2 22_0402_5% HSYNC A
2 3 USB20_N5 [16] GND SYNC_OUT2
USB20_P5_R
3 4 1 2 USB20_P5 [16]
TPD7S019-15DBQR_SSOP16
4 5 1 2
5 6 MURAT_DLW 21SN900HQ2L_0805
GND 7
GND
EMI Reauest
ACES_87212-05G0
CONN@ @EMI@ Security Classification Compal Secret Data
D28 2013/04/01 2014/04/01 Title
USB20_N5_R 2
Issued Date Deciphered Date
1
PWR/Cap./TP/LED/LP/LS/Screw
USB20_P5_R 3 Size Document Number Rev
0.3
PESD5VOU2BT_SOT23-3
ZEA00 LA-A061P M/B
5 4 3 2 1
A B C D E
Power/B & SW/B Connector 8Pin sub-board Conncetor

JPW R1
Pin1~7:
CIR_IN 1
[43] CIR_IN
BT_LED# 2 1 LED Board
[40] BT_LED# 3 2
SATA_LED#
[12] SATA_LED# 4 3
W LAN_LED#
[40] W LAN_LED# 1 2 +5VS_SB 5 4
+5VS F4 2A_63V_0437002.W R_1206 6 5
v0.3 update 1 2 7 6
+3VSB_SB
PW R_ON_LED# +3VSB F5 2A_63V_0437002.W R_1206 8 7 Pin6~10:
ON/OFFBTN# 9 8 11 Switch Board&
9 G11
1
D EC_SW _AD1 10 12
2 [43] EC_SW _AD1 10 G12 Power Button Board
1 [43] PW R_ON_LED 1
G Q66 ACES_87212-10G0
1
S SSM3K7002FU_SC70-3 CONN@
3
@ R567
8.2K_0402_5%
2
v1.0 update
D2
@ SW 1 2 ON/OFF_R# 1 2
1 3 1 ON/OFF# [43]
ON/OFFBTN#
3 @ R360 1
2 4 0_0402_5%
BAV70W _SOT323-3 C382
SMT1-05-A_4P 100P_0402_50V8J
6
5
C38 common SPEC request

TOP side For debug
(Unpop after MP)
PS_ON# [46]
1
D
EC_ON 2 PSU@
2 [43] EC_ON G Q64 2
1
S SSM3K7002FU_SC70-3
3
PSU@
R657
10K_0402_5%
2
+5VS_SB EMI@ C2144 1 2 0.1U_0402_16V4Z
+3VSB_SB EMI@ C2145 1 2 470P_0402_50V7K
CIR_IN EMI@ C2146 1 2 330P_0402_50V7K

BT_LED# EMI@ C2147 1 2 330P_0402_50V7K
SATA_LED# EMI@ C2148 1 2 330P_0402_50V7K
W LAN_LED# EMI@ C2149 1 2 470P_0402_50V7K

PW R_ON_LED# EMI@ C2150 1 2 470P_0402_50V7K
ON/OFFBTN# EMI@ C2151 1 2 470P_0402_50V7K
EC_SW _AD1 EMI@ C2152 1 2 470P_0402_50V7K
v1.0 update
3 3
4 4

Sub-board Connector
Custom 0.3
ZEA00 LA-A061P M/B
A B C D E
A B C D E
L42
+3VALW _EC @R538
@R538 +3VALW _EC FCM1608KF-800T07_0603 +EC_AVCC +3VALW _EC
Place closely pin 12 1 2 1 2 +EC_AVCC
+3VSB
1 1 1 1 1 1 1
1
4.7K_0402_5% 1 2 R539 KSI7 0_0603_5%
1000P_0402_50V7K
1000P_0402_50V7K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C537
C538
C540
C541
C542
C543
CLK_PCI_EC C536
10U_0603_6.3V6M
C539 R540
Ra
1
2 2 2 2 2 2 2 100K_0402_5%
0.1U_0402_16V4Z
2
2
R541 1 2 GATEA20
10_0402_5% C544 0.1U_0402_16V4Z AD_BID
EMI@ EMI@ ECAGND
2
111
125
ESD request close to KB9012 pin1
22
33
96
67
U35
1
1
C545 R542
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD0
EC_VDD/VCC
EC_VDD/AVCC
6.8P_0402_50V8C 56K_0402_5%
1
EMI@
Rb 1
2
EME(Internal PU) to aviod test mode
2
GATEA20 1 21
+3VALW _EC [17] GATEA20 2 GATEA20/GPIO00 GPIO0F 23
KB_RST# EC_BEEP#
[17] KB_RST# 3 KBRST#/GPIO01 BEEP#/GPIO10 26 EC_BEEP# [37]
SERIRQ FAN_PW M
1 2 [13,41] SERIRQ 4 SERIRQ GPIO12 27 FAN_PW M [35]
KSO1 [13,41] LPC_FRAME# LPC_FRAME#
PLT_RST# R543 47K_0402_5% LPC_AD3 5 LPC_FRAME# ACOFF/GPIO13
[13,41] LPC_AD3 LPC_AD3
1 2 KSO2 [13,41] LPC_AD2 LPC_AD2 7 PWM Output
R545 47K_0402_5% LPC_AD1 8 LPC_AD2 63 PSU_DET_AD
1 [13,41] LPC_AD1 LPC_AD1 BATT_TEMP/GPIO38 PSU_DET_AD [46]
[13,41] LPC_AD0 LPC_AD0 10 LPC & MISC 64 EC_SW _AD1
LPC_AD0 GPIO39 65 EC_SW _AD1 [42]
C546
0.1U_0402_16V4Z @ESD@ C2137 0.1U_0402_16V4Z CLK_PCI_EC 12 ADP_I/GPIO3A 66 AD_BID
2 [13,41] CLK_PCI_EC CLK_PCI_EC AD Input GPIO3B
EMI@ 1 2 CIR_IN PLT_RST# 13 75
+3VALW _EC
For EMC @ESD@ C2138 0.1U_0402_16V4Z 1 2 [15,21,41] PLT_RST# ECRST# 37 PCIRST#/GPIO05 GPIO42 76
1 2 PW R_ON_LED R544 EC_SCI# 20 EC_RST# IMON/GPIO43
[17] EC_SCI# 38 EC_SCII#/GPIO0E
Place closely pin 13 @ESD@ C2139 0.1U_0402_16V4Z 47K_0402_5% SYSON R546 1 2 4.7K_0402_5%
1 2 EC_SW _AD1 1 2 T128PAD @ GPIO1D 68
@ESD@ C2140 0.1U_0402_16V4Z C547 DAC_BRIG/GPIO3C 70 SUSP# R547 1 2 10K_0402_5%
1 2 ON/OFF# 0.1U_0402_16V4Z EN_DFAN1/GPIO3D 71
DA Output IREF/GPIO3E
55 72 VR_ON R548 1 2 10K_0402_5%
56 KSI0/GPIO30 CHGVADJ/GPIO3F
v0.2 update for ESD KSI1/GPIO31
[38] AMP_PD# AMP_PD# 57
EC_CRISIS 58 KSI2/GPIO32 83 HP_DET#
KSI4 59 KSI3/GPIO33 EC_MUTE#/GPIO4A 84 HP_DET# [37]
+3VS KSI5 60 KSI4/GPIO34 USB_EN#/GPIO4B 85
KSI6 61 KSI5/GPIO35 CAP_INT#/GPIO4C 86 EAPD_CODEC VR_ON 1 2
KSI6/GPIO36 PS2 Interface EAPD/GPIO4D EAPD_CODEC [37]
R549 1 2 2.2K_0402_5% EC_SMB_CK1 KSI7 62 87 EC_3V5V_EN
1 2 2.2K_0402_5% 39 KSI7/GPIO37 TP_CLK/GPIO4E 88 EC_3V5V_EN [47]
R550 EC_SMB_DA1 EC_CRISIS_KSO0 @EMI@ C548 0.1U_0402_16V4Z
KSO1 40 KSO0/GPIO20 TP_DATA/GPIO4F
KSO2 41 KSO1/GPIO21 @ R552 0_0402_5%
KSO2/GPIO22
ESD request Close to EC
+3VALW _EC v0.2 update KSO3 42 97 VGATE_R 1 2 VGATE
2 43 KSO3/GPIO23 CPU1.5V_S3_GATE/GPXIOA00 98 VGATE [14,5,50] 2
W L_PW RON V0.3 update for sequence EA
1 2 2.2K_0402_5% 44 KSO4/GPIO24 WOL_EN/GPXIOA01 99 W L_PW RON [40]
R551 EC_SMB_CK2 PW RME_CTRL#
1 2 2.2K_0402_5% EC_SMB_DA2 45 KSO5/GPIO25 Int. K/B ME_EN/GPXIOA02 109 PW RME_CTRL# [12]
R553 v0.2 update KSO6/GPIO26 Matrix VCIN0_PH/GPXIOD00
46 SPI Device Interface
PCH_EDP_BLEN 47 KSO7/GPIO27
[44,47] PCH_EDP_BLEN 48 KSO8/GPIO28 119 1 2
[32] EC_ENVDD EC_ENVDD PCH_SPISO_EC @ R644 0_0402_5%
+3VALW _EC 35V_PG 49 KSO9/GPIO29 SPIDI/GPIO5B 120 PCH_SPISI_EC @ R645 1 2 0_0402_5% PCH_SPISO [13]
1 2 4.7K_0402_5% [44,47] 35V_PG 50 KSO10/GPIO2A SPIDO/GPIO5C 126 1 2 PCH_SPISI [13]
R554 EC_CRISIS CODEC_PW REN SPI Flash ROM PCH_SPICLK_EC @ R646 0_0402_5%
1 2 4.7K_0402_5% [37] CODEC_PW REN 51 KSO11/GPIO2B SPICLK/GPIO58 128 1 2 PCH_SPICLK [13]
R664 PIDRST PCH_SPICS#_EC @ R647 0_0402_5%
52 KSO12/GPIO2C SPICS#/GPIO5A PCH_SPICS# [13]
53 KSO13/GPIO2D v0.2 update
54 KSO14/GPIO2E 73 CIR_IN
H_PROCHOT#_EC 81 KSO15/GPIO2F ENBKL/GPIO40 74 USB_ILIM_SEL CIR_IN [42]
EC DEBUG port PIDRST 82 KSO16/GPIO48 PECI_KB930/GPIO41 89 W OL_EN#
USB_ILIM_SEL [33]
KSO17/GPIO49 FSTCHG/GPIO50 90 W OL_EN# [39] 1 2
S_BKOFF#_R
Reserve R2009 for EC debug. BATT_CHG_LED#/GPIO52 91 BT_ON
S_BKOFF# [29,32]
77 CAPS_LED#/GPIO53 92 BT_ON [40]
R556 EC_SMB_CK1 GPIO PW R_ON_LED @ R555 0_0402_5%
1 2 [29,32] EC_SMB_CK1 78 EC_SMB_CK1/GPIO44 PWR_LED#/GPIO54 93 PW R_ON_LED [42]
E51_TXD [29,32] EC_SMB_DA1 EC_SMB_DA1 SYSON# SYSON# [33,34,44]
EC_SMB_CK2 79 EC_SMB_DA1/GPIO45 BATT_LOW_LED#/GPIO55 95 SYSON
[13,21,46] EC_SMB_CK2 SM
EC_SMB_CK2/GPIO46 Bus SYSON/GPIO56 SYSON [48] v0.2 update
100K_0603_5% EC_SMB_DA2 80 121 VR_ON
[13,21,46] EC_SMB_DA2 EC_SMB_DA2/GPIO47 VR_ON/GPIO57 VR_ON [50]
127 PM_SLP_S4#
PM_SLP_S4#/GPIO59 PM_SLP_S4# [14]
PM_SLP_S3# 6 100 PCH_RSMRST#

[14] PM_SLP_S3# 14 PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 101 PCH_RSMRST# [14]
PM_SLP_S5# USB_CHRMODE2
[14] PM_SLP_S5# 15 PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXIOA04 102 USB_CHRMODE2 [33]
EC_SMI# VCIN1_PH
[17] 1 EC_SMI# 2 16 EC_SMI#/GPIO08 PROCHOT_IN/GPXIOA05 103
@ R557 0_0402_5% DGPU_HOLD_EC# USB_CHR_EN NOTE:
[15,21] DGPU_HOLD_RST# 17 GPIO0A H_PROCHOT#_EC/GPXIOA06 104 USB_CHR_EN [33]
USB_CHRMODE1 Strap Pin-->Pull high
18 GPIO0B VCOUT0_PH/GPXIOA07 105 USB_CHRMODE1 [33]
PSU_PG# GPO BKOFF#/GPXIOA08 BKOFF# P109=VCIN0_PH
PSU_PG# 19 GPIO0C 106 BKOFF# [32]
SUSW ARN# GPIO PBTN_OUT# P102=VCIN1_PH
[14] SUSW ARN# 25 GPIO0D PBTN_OUT#/GPXIOA09 107 PBTN_OUT# [14,5]
INVT_PW M PCH_PW R_EN P103=VCOUT1
[32] INVT_PW M 28 EC_INVT_PWM/GPIO11 PCH_APWROK/GPXIOA10 108 PCH_PW R_EN [44]
3 FAN_SPEED USB_CHRMODE3 P104=VCOUT0_PH 3
[35]
1 FAN_SPEED
2 29 FAN_SPEED1/GPIO14 SA_PGOOD/GPXIOA11 USB_CHRMODE3 [33]
@ R559 0_0402_5% S_ENVDD_R
[29,32] S_ENVDD 30 EC_PME#/GPIO15
E51_TXD
[40] E51_TXD 31 EC_TX/GPIO16 110
E51_RXD
[40] E51_RXD 32 EC_RX/GPIO17 AC_IN/GPXIOD01 112
PM_PW ROK EC_ON
[14,9] PM_PW ROK 34 PCH_PWROK/GPIO18 EC_ON/GPXIOD02 114 EC_ON [42]
MUTE_CODEC ON/OFF#
[37] CODEC_MUTE#
1 2 36 SUSP_LED#/GPIO19 ON/OFF/GPXIOD03 115 ON/OFF# [42]
DGPU_PW R_EC GPI
[15,23] DGPU_PW R_EN NUM_LED#/GPIO1A LID_SW#/GPXIOD04 116
@ R560 0_0402_5% SUSP#
SUSP#/GPXIOD05 117 SUSP# [44,45,48,49]
W L_OFF#_EC
GPXIOD06 118 W L_OFF#_EC [40]
EC_PECI_9012
PECI_KB9012/GPXIOD07 H_PECI [17,5]
EC DEBUG CONNECTOR
AGND/AGND
122
123 XCLKI/GPIO5D 124 1 2
GND/GND
GND/GND
GND/GND
GND/GND
CRY1 +EC_V18R
R561 100K_0402_5% XCLKO/GPIO5E V18R C549
GND0
JECDB1 1 2 4.7U_0603_6.3V6K H_PECI 1 2
KSO3 1 @ESD@ C2126 5P_0402_50V
KSI6 2 1 1 2 PCH_RSMRST# 1 2
KSI7 3 2 C550 KB9012QF-A4_LQFP128_14X14 @ESD@ C2127 5P_0402_50V
11
24
35
94
113
69
KSI4 4 3 20P_0402_50V8
KSI5 5 4 L43
6 5 FCM1608KF-800T07_0603 ESD request Close to EC
6 7 ECAGND 1 2
GND
GND
8 Modify from VBA00
E-T_6905-E06N-00R ECAGND +3VALW _EC
CONN@
Pitch 1.0mm Hight 1.9mm
1 R563 2
[50] VR_HOT# H_PROCHOT# [5]
0_0402_5% VCIN1_PH 4.7K_0402_5% 1 2 R564
From power CPU_CORE @
Reset converter 1
1
D W OL_EN# 100K_0402_5% 1 2 R565

H_PROCHOT#_EC 2
4
board panel ID JPIDRST
1 2 PIDRST G
Q25 C551
47P_0402_50V8J ON/OFF# 4.7K_0402_5% 1 2 R566 4
S 2N7002K_SOT23-3 2
3
@ CIR_IN 10K_0402_5% 1 2 R671
AC in-->One touch -->Power button--> Clear CMOS

Always short-->AC in-->Power button--> Crisis Security Classification Compal Secret Data Compal Electronics, Inc.
JCOMS2
EC KB930/KB conn
EC_CRISIS 1 2 EC_CRISIS_KSO0 Size Document Number Rev
Custom 0.3
@
ZEA00 LA-A061P M/B
A B C D E
A B C D E
+3VALW TO +3VS Vgs=10V,Id=9A,Rds=18.5mohm

+3VALW TO +3VALW_PCH
+5VALW TO +5VS +3VS_LS +3VS
+3VALW J6 @
1 2 +3VSB +3VALW _PCH
Q65
@ C571 1 1
1U_0603_10V6K U38 JUMP_43X118 @ C580 AO3415L_SOT23-3
1 14 C574 @ C572
1 2 2 VIN1 VOUT1 13 1 2
W=160mils 3
W=160mils
S
R587 0.1U_0402_16V7K 4.7U_0603_10V6K 1
D
0_0402_5% @ C573 VIN1 VOUT1 C575 1000P_0402_50V7K 2 2
1 @ 2 0.01U_0402_25V7K 3VS_ON 3 12 1 2 1U_0603_10V6K
1 2 ON1 CT1
G
1 1
2
1 1
R589 4 11
0_0402_5% VBIAS GND +5VS_LS VL @ C576 @ C577
SUSP# 1 @ 2 5VS_ON 5 10 1 2 +5VS 4.7U_0603_10V6K 0.1U_0402_16V4Z
1 2 ON2 CT2 C578 1000P_0402_50V7K J7 @ 2 2
1
@ C579 6 9 1 2 v0.3 update
+5VALW VIN2 VOUT2
0.022U_0402_25V7K 7 8 1 1
VIN2 VOUT2 JUMP_43X118 R591
1
15 C582 @ C583 100K_0402_5%
GPAD R672
@ C584 0.1U_0402_16V7K 4.7U_0603_10V6K
2
TPS22966DPUR_SON14_2X3 2 2 1 2
1U_0603_10V6K
2
1
D 100K_0402_5% 1
2 Q63
[43] PCH_PW R_EN
G C589
S SSM3K7002FU_SC70-3 0.1U_0402_16V4Z
3
2
+1.5V to +1.5VS
+1.5V Q29 +1.5VS @ESD@
8
AO4354_SO8
1
9.6A +3VALW _PCH C2156 1 2 0.1U_0402_16V4Z
7 2
6 3 1 v0.3 update
1
5 C585
1 1 1U_0402_6.3V6K
R592
4
C586 C587 2 470_0805_5%

4.7U_0603_10V6K 4.7U_0603_10V6K
2
2 2 2 2
6
+12VS
Q30A +5VALW
2N7002KDW H_SOT363-6 2 SUSP
1
2
R595
1
1K_0402_5% R596
100K_0402_5%
2
1
1.5VS_GATE SUSP
3
1
1
3
C588
R597 0.022U_0402_25V7K
330K_0402_5%
SUSP 5 Q31B
2 SUSP# 5
[43,45,48,49] SUSP#
Q30B
4
4
Discharge circuit
3 +1.05VS_VPCH +0.75VS +1.05VS_VCCIO +1.5V 3
+12V1 TO +12VS (Reserve for PSU)
1
+12VS_PSU +12VS
R599 R600 R601 R602
470_0805_5% 22_0805_5% 470_0805_5% 470_0805_5% U74 PSU@
1 8
2
2 S D 7
S D 6
2
3 1
Q32 Q33 Q34 Q35 4 S D 5
G D
1
D SSM3K7002BF 1N SC59-3 D SSM3K7002BF 1N SC59-3 D SSM3K7002BF 1N SC59-3 D SSM3K7002BF 1N SC59-3 C2078 R650
2 SUSP 2 SUSP 2 SUSP 2 SYSON# AO4435_SO8 1U_0603_25V6 470_0603_5%
SYSON# [33,34,43] 2
G G G G PSU@ PSU@
1
S S S S
3
3
R651 R652
2 1 2 1
+12VS_PSU
5 SUSP
+12VS 20K_0402_5% 20K_0402_5% 1
6
PSU@ PSU@ Q60B
4
C2079 DMN66D0LDW -7_SOT363-6
1
0.1U_0603_25V7K PSU@
B+ R603 SUSP# 2 2 PSU@
100_0805_5%
Q60A
1
1
2
R604 PSU@
330K_0402_5%
4 4
Q36
2
D SSM3K7002BF 1N SC59-3
2
G
Q37 S
3
1
SSM3K7002BF 1N SC59-3 D
2
[43,47] 35V_PG
G
S Issued Date 2013/04/01 Deciphered Date 2014/04/01 Title
3
DC-DC INTERFACE
Add +12VALW discharge circuit for
ZEA00 LA-A061P M/B 0.3
prevent DC plug in leakage 5/5. MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A B C D E
5 4 3 2 1
D D
ADA@
ADA@ ADA@ ADA@
PC1 PR1 PU1 PC2
0.1U_0603_25V7K 0_0603_5% RT8298A_SO8 1U_0603_25V6K
ADA@ 2 1 BOOT_12V_11 2 2
BOOT VCC
3 12V_VCC 1 2
@ PJ1 ADA@ ADA@ ADA@
2 1 +12V_B+ 8 5
B+ 2 1 VIN GND PR2 0_0402_5%
JUMP_43X118 12V_LX 1 7 EN_12V 1 2
SW EN SUSP# [43,44,48,49]
470P_0402_50V7K
GND
10U_0805_25V6K
10U_0805_25V6K
0.1U_0603_25V7K 4 6 12V_FB
BG FB
PC6
1
1
PC3
PC4
PC5
ADA@
2
2
2
PR3
60.4K_0402_1%
ADA@
2
ADA@
1 2
1
PR4
14K_0402_1%
12V_LG PR5
1K_0402_1%
ADA@
Power dissapation: 0.577W
2
C ADA@ C
PL1
4.7UH_FDSD0630-H-4R7M-P3_5.5A_20% ADA@ ADA@
1 2
+12VSP
330P_0402_50V7K
22U_1206_16V6-M
22U_1206_16V6-M
22U_1206_16V6-M
EMI@ PR102
4.7_1206_5%
5
6
7
8
1
PQ1
1
PC7
PC8
PC9
PC10
FDS6690AS_NL_SO8
ADA@ ADA@
2
2
2
@
4
680P_0603_50V7K
EMI@ PC155
Vo=0.8(1+Rt/Rb)=12V 1
3
2
1
VFB=0.8V
@ PJ2
2 1
+12VSP 2 1 +12VS
JUMP_43X118
Power dissapation: 0.06W @
PJ12 PSU@
2 1
ATX12V1_1 2 1 +12VS_PSU
JUMP_43X118
B B
A A

PWR- 12VSP
Custom 0.1
VBA11 LA-A111 M/B
5 4 3 2 1
A B C D
PJ3
2 1 JBATT1
2 1
ATX12V1_1 @ JUMP_43X118
B+
ADA@
EMI@ PL2 AO4407AL_SO8 PR6 @
HCB2012KF-121T50_0805 PQ2 1 2
ATX12V1 1 2 1 8 1 4
EMI reserve +RTCBATT + -
2 7
PJP101 EMI@ PL3 3 6 VIN+ 2 3 VIN-
200K_0402_1%
.1U_0603_25V7K
1
7 HCB2012KF-121T50_0805 5 1 @EMI@
.1U_0603_25V7K
0.1U_0603_25V7K
GND 6
1
1 2
PR7
EMI@ EMI@ EMI@ @EMI@ @EMI@ @EMI@ @EMI@ EMI@ EMI@ @EMI@
ADA@ PC13
ADA@
220U_25V_M
1000P_0402_50V7K
GND 5
1
0.01_2512_1% + CCM_060003HA002G202ZL
PC11
EMI@ PC12
ADA@ PC14
PC15
ADA@
PC156
PC157
PC158
PC164
PC165
PC159
PC160
PC161
PC162
PC163
22U_0805_25V6M
22U_0805_25V6M
22U_0805_25V6M
22U_0805_25V6M
22U_1206_25VA
22U_1206_25VA
22U_1206_25VA
22U_1206_25VA
10U_0805_25V6K
1000P_0402_50V7K
4
GROUND 4
CONN@
2
POWER 3 EMI@
2
DETECT 2 2
PC17
100P_0402_50V8J
POWER 1
1
1 1
EMI@
GROUND PC16
LOTES_AJAK0031-P002A 100P_0402_50V8J
2
+3VSB
P2-1 @
ATX12V1_1 PJ10 PSU@ B+
.1U_0402_16V7K 750_0402_1%
2 1
2 1
1
ADA@
ADA@
PR118
150K_0402_1%
PR8
JUMP_43X118
2
PSU_DET_AD [43]
2
1
ADA@
PC153
@
+12V2 PJ11 ADA@ B+
2 1
@
PJ104 ADA@ 2 1
2 1 +5VALW PSU@ JUMP_43X118
2 1
JUMP_43X79 RT8061AZQW_WDFN10_3X3
@ PU102
PJ101 PSU@ 11 PSU@
+5VSB 2 1 10 TP 1 PL103
22U_0805_6.3VAM
2 1 PVIN NC 1UH_FDSD0630-H-1R0M-P3_11A_20%
68P_0402_50V8J
0.1U_0402_25V6K
2200P_0402_50V7K
1
JUMP_43X79 9 2 LX_3VSB 1 2
PC147
PVIN LX +3VSBP
@EMI@ PC149
@EMI@ PC145
PC151
8 3
68P_0402_50V8J
2
SVIN LX
1
PSU@
4.7_0603_5%
1
7 4 PSU@
@RF@
PC146
NC PGOOD PR106 PSU@ PSU@
@EMI@
PR105
2 2
PSU@ 6 5 60.4K_0402_1%
2
1 2 FB EN PSU@
22U_0805_6.3VAM
22U_0805_6.3VAM
2
1
2
PR107 FB_3VSB
PC144
PC152
PR119 10K_0402_1%
2
1K_0402_1% PU101 PSU@
1
1
@EMI@
PSU@
680P_0603_50V7K
1
1 3 EN_3VSB PR108
PC150
VDD RESET# 13.3K_0402_1%
2
1
PSU@
GND
PJP102
2
1
PR109
20K_0402_1% PC148 4 3
PSU@ PSU@ 1U_0402_6.3V6K 4 3
0.1U_0402_25V6K
2
1
S IC RT9818A-44GU3 PSU@ 2 1
ATX12V1 +5VSB
2
2 1
PC154
@
PJ102
2
LOTES_APOW0009-P001C
+3VSBP
1
1 2
2 +3VSB
JUMP_43X79
@
PJ103 ADA@
+3VSB
1
1 2
2 +3VALW
JUMP_43X79
PSU@
PR9 @ PR101
0_0402_5% PL4 0_0402_5%
VIN+ 2 1 1 2
0.1U_0402_16V7K
0.1U_0402_16V7K
BLM15BD121SN1D_2P PS_ON#_1 1 2
PS_ON# [43]
3 3
1 1
2
@
PC18 PC19 @ @ PR104

@ 10K_0402_1%
@ PU2
2 PL5 2 1 8 VIN_A1
VIN- 1 2 2 VIN+ A1 7 VIN_A0
1
BLM15BD121SN1D_2P 3 VIN- A0 6 EC_SMB_DA2
GND SDA EC_SMB_DA1 [13,21,43]
+3VS 4 5 EC_SMB_CK2
VS SCL EC_SMB_CK1 [13,21,43]
HPA00900AIDCNR_SOT23-8
+3VS
2
PR10 PR11
0_0402_5% 0_0402_5%
@
1
VIN_A0
VIN_A1
2
PR12 PR13
0_0402_5% 0_0402_5%
4 4
@
1
1
Current sense solution 2

Ventura for CPU side
slave address : 1000001
please placemnet near R-sense
PSU IN
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.1
A B C D
A B C D E
0.1U_0402_25V6K
2
PC20
PR14
+5VALWP 0_0402_5%
1
1 2
VL
2
PC21
4.7U_0603_6.3V6K
VL
1
VL
10K_0402_1%
10K_0402_1%
0_0402_5%
1
10K_0402_1%
0_0402_5%
PR15
PR17
PR18
PR19
1 1
PR16
LDOBYP_35V
RT8127_12V
@ RT8127_12V
2
2
EMI@ PL6 12VLDOEN_35V
B+ HCB1608KF-121T30_0603 LDOEN_35V
2 1 Power dissapation: 0.2553W
SKIP_35V
PC25
+3VLP
2200P_0402_50V7K
68P_0402_50V8J
68P_0402_50V8J
SIS412DN-T1-GE3_POWERPAK8-5
EMI@ PL7 4.7U_0603_6.3V6K
1
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
26.1K_0402_1%
0.1U_0402_25V6K
0.1U_0402_25V6K
HCB1608KF-121T30_0603 2 1
1
1
@RF@ PC22
PC26
PC27
PR20
PC28
PC29
@EMI@ PC30
@EMI@ PC31
PC32
2 1
29
28
27
26
25
24
23
RT8127_12V
5
@EMI@ PC23
@EMI@ PC24
PU3
PQ3 PQ4
12VLDO
LDOBYP
SKIP
GND
VCC
LDOEN
12VLDOEN
2
2
5
@RF@
@
2
@ SIS412DN-T1-GE3_POWERPAK8-5 PC33
PR100 1U_0603_25V6K
4 UG_5V_11 2 UG_5V 1 22 2 1
0_0805_5% PC34 PR21 UGATE2 VIN
Rds(ON) :Max=16.5m-ohm 1 2 BST_5V_1
1 2 BST_5V 2 21 UG_3V PR22 PC35 1 PR112 2 UG_3V_1
4
BOOT2 UGATE1
Min=13.5m-ohm 0.1U_0603_50V7K
2.2_0603_1%
LX_5V 3 20
2.2_0603_1%
1
BST_3V
0.1U_0603_50V7K 0_0805_5%
2 BST_3V_1
1 2 DCR=40m Ohm PL9
ESR=17m Ohm
DCR=17m Ohm +3VALWP
1
2
3
PHASE2 BOOT1 4.7UH_FDSD0630-H-4R7M-P3_5.5A_20%
PL8 LG_5V 4 19 LX_3V 1 2
+5VALWP ESR=17m Ohm VF=0.8V
3
2
1
2.2UH_FDSD0630-H-2R2M-P3_8.3A_20% LGATE2 PHASE1
Power dissapation:1.0542W
4.7_1206_5%
@EMI@ PR26
1 2 5 18 LG_3V
PGND2 LGATE1/RT
2
PR23
1
1
PC40 @EMI@ PR25
4.7_1206_5%
CSP_5V 6 17 PQ5 16K_0402_1%
CSP2 PGND1
2
330U_6.3V_M
SI7716ADN-T1-GE3_POWERPAK8-5
PR24 PQ6 1
330U_6.3V_M
1 16K_0402_1% CSN_5V 7 16 CSP_3V PR28

CSN2 CSP1
PC37
2.61K_0402_1% +
1
EN2/SS2
EN1/SS1
PC36
+ 1 2
PGOOD
PR27
COMP2
COMP1
2
2
2 2
CSN1
4.53K_0402_1% 4
1
FB2
FB1
2
680P_0603_50V7K
@EMI@ PC42
0.1U_0402_25V6K
1 2 4 PC38
1
2
680P_0603_50V7K
1.8K_0402_1%
1 2
1
PR29
PC39 RT8127GQW_WQFN28_4X4
10
11
12
13
14
15
1
2
PC41
1 2 CSN_3V 0.047U_0402_25V7K
3
2
1
35V_PG [43,44]
1
2
3
2
@EMI@
0.047U_0402_25V7K
OCP Seting : 6.15A
2
2
0.1U_0402_25V6K
30K_0402_1%
1
Cap. ESR=17m OCP Seting : 7.9A
2
PR30
PC43
1
2
FB_5V
+3VALWP
PC44 PR31 FB_3V
2200P_0402_50V7K 200_0402_1% PC47 PR32 PC46
1 2 2 1 1 2 COMP_5V PC45 200_0402_1% 2200P_0402_50V7K
1 2 2 1 1 2
220P_0402_50V7K
PR36 PR35 220P_0402_50V7K
2
6.04K_0402_1% PC48 27K_0402_1% PR34 PR33
2 1 1 2 2 1 27K_0402_1% PC49 6.2K_0402_1%
COMP_3V 2 1 1 2 2 1
1000P_0402_50V7K
PR103 1000P_0402_50V7K
Cap. ESR=17m
1
2
0_0402_5%
PR38 PSU@
Rds(ON) :Max=16.5m-ohm
2
1.15K_0402_1%
3
PR39
0_0402_5%
PR37 Min=13.5m-ohm 3
1.96K_0402_1%
1
[43] EC_3V5V_EN 1 2 3V5V_EN
1
0.1U_0402_25V6K
1
PC50
EC pin must set to Open Drain

2
(EC GPIO spec is 5V/4mA) @

Initial EC pin: Low
3V/5V on : EC pin Open PJ4
3V/5V off : EC pin Low +3VALWP
2
2 1
1 +3VALW
@ JUMP_43X118
+V_5VP PJ5
2 1
+5VALWP 2 1 +5VALW
Ipeak=7A ; 1.2Ipeak=8.4A; Imax=4.9A @ JUMP_43X118
Fsw=300K,
Iocp>=8.66A
Rds H/S --> typ:24 mohm ; max: 30 mohm TON (1)SMPS1=300KHZ (+5VALWP)
(2)SMPS2=300KHZ (+3VALWP)
L/S --> typ: 13.5 mohm ; max: 16.5 mohm
4 4
+V_3.3VP
Ipeak=4.437A ; 1.2Ipeak=5.325A; Imax=3.106A
Fsw=300K
Iocp>=5.33A
Rds H/S --> typ:24 mohm ; max: 30 mohm
L/S --> typ: 13.5 mohm ; max: 16.5 mohm PWR- 3VALWP/5VALWP
Custom VCA00 LA-9792P M/B 0.1
A B C D E
5 4 3 2 1
0.75Volt +/- 5%
TDC 0.525A
Power dissapation: 0.1096W Peak Current 0.75A
+1.5VIN EMI@ PL10 OCP Current 0.9A
1 2 1.5V_B+ PR40
0_0603_5%
Pin 19 is LDOVIN
HCB1608KF-121T30_0603 BST_1.5V-1 1 2 BST_1.5V +1.5VP
2200P_0402_50V7K
68P_0402_50V8J
10U_0805_25V6K
10U_0805_25V6K
D D
0.1U_0603_25V7K
+0.75VSP
@RF@ PC51
0.1U_0402_25V6K
UG_1.5V
2
PC56
@EMI@ PC52
@EMI@ PC53
@ PC54
PC55
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
SW_1.5V @
1
PC57
PC58
PC59
5
LG_1.5V
16
17
18
19
20
PQ7 PU4
2
BOOT
VTT
PHASE
UGATE
VLDOIN
21
PR113 PAD
4 UG_1.5V_1
1 2
OCP SET: 7.1A 15 1
0_0805_5% LGATE VTTGND
Power dissapation: 1.372W PR41 14 2

PL11 SIS412DN-T1-GE3_POWERPAK8-5 10.2K_0402_1% PGND VTTSNS
1
2
3
2.2UH_FDSD0630-H-2R2M-P3_8.3A_20% 1 2 CS_1.5V
2 1 13 3
+1.5VP PC60 CS RT8207MZQW_WQFN20_3X3 GND
1U_0603_10V6K
5
1 2 12 4 VTTREF_1.5V
PQ8 PR43 VDDP VTTREF
1
1 5.1_0603_5%
+1.5VP
330U_6.3V_M
1 2 VDD_1.5V 11 5
VDD VDDQ
PC61
PGOOD
PR42 @EMI@
1
4.7_1206_5% 4
TON
+5VSB Pin 5 is FB PC62
FB
S5
S3
SNUB_+1.5VP 2
1
2 0.033U_0402_16V7K
2
PC63
10
6
SI7716ADN-T1-GE3_POWERPAK8-5 1U_0603_10V6K
+5VSB
1
2
3
2
C C
DCR=17m Power dissapation: 0.2484W
TON_1.5V
1
PC64 @EMI@
Cap. ESR=17m 680P_0603_50V7K
2
Min=13.5m-ohm PR44
887K_0402_1% PJ6
PR45 1.5V_B+ 1 2 2 1
0_0402_5% +1.5VP 2 1 +1.5V
1 2 EN_1.5V @ JUMP_43X118
[43] SYSON
PJ7
1 2
+0.75VSP +0.75VS
EN_0.75VSP
1 2
Fsw=285K @
JUMP_43X79
1
Ipeak=11A, Imax=7.7A, Iocp=1.2*Ipeak=13.2A @ PC65
0.1U_0402_10V6K
PR46
0_0402_5%
Fsw= 285K Hz 2 1
2
[43,44,45,49] SUSP#
Iocp(set) =13.44A~20.49A
Rds H/S --> typ:24 mohm ; max: 30 mohm
1
L/S --> typ: 13.5 mohm ; max: 16.5 mohm @PC66
@ PC66
0.1U_0402_10V6K
2
B B
Mode Level +0.75VSP VTTREF_1.5V

S5 L off off
B+ S3 L off on
+5VSB S0 H on on
Note: S3 - sleep ; S5 - power off

2
PR308
100K_0402_1%
5
6
7
8
PSU@
1
AO4407AL_SO8 @
PQ303
PSU@ PJ13 ADA@
3
2
1
2 1
B+ 2 1 +1.5VIN
JUMP_43X118
+1.5VIN
1
PD301 PSU@
SX34_SMA2
A A
2
+5VSB

1.5VP
0.1
5 4 3 2 1
5 4 3 2 1
EMI@ PL12
Power dissapation: 0.1053W +1.05V_12V 1 2
B+
HCB1608KF-121T30_0603
2200P_0402_50V7K
68P_0402_50V8J
0.1U_0402_25V6K
10U_0805_25V6K
1
1
@RF@ PC68
@EMI@ PC69
D D
PC67
@EMI@ PC70
SIS412DN-T1-GE3_POWERPAK8-5
2
5
PQ9
4
FB=0.7v
OCP SET: 7.2A PR47 PC71
PU5 2.2_0603_5% 0.22U_0603_25V7K
1 10 BST_1.05V 1 2 BST_1.05V-1 1 2
3
2
1
PGOOD VBST PR114
PR48
PR49 1 2 TRIP_1.05V 2 9 DH_1.05V 1 2 DH_1.05V_1 PL13
[43,44,45,48] SUSP# TRIP DRVH
0_0402_5% 82.5K_0402_1% 0_0805_5% 2.2UH_FDSD0630-H-2R2M-P3_8.3A_20%
1 2 EN_1.05V 3 8 LX_1.05V 1 2
EN SW 0_0402_5% +1.05V
4 7 1 PR50 2
VFB V5IN +5VALW
1
1
5
@ PC73 TST_1.05V 5 6 DL_1.05V @EMI@ 1
TST DRVL
330U_6.3V_M
.1U_0402_16V7K PC72 PQ10 PR51
2
1
11 1U_0402_6.3V6K 4.7_1206_5% +
2
TP
PC74
2
PR52 TPS51212DSCR_SON10_3X3
470K_0402_5% 4 2
1
@EMI@
2
PC75
2
C 1000P_0603_50V7K C
3
2
1
FB_1.05V

PR53
5.1K_0402_1%
2 1
2
PR54 Vtrip range ==> 0.2V ~ 3V

10.2K_0402_1%
<Vo=1.05V> VFB=0.7V @ PJ8
2 1
V=0.7*(1+5.1K/10.1958K)=1.05V +1.05V +1.05VS_VPCH
1
2 1
Fsw=290KHz JUMP_43X118
Typ=13.5m-ohm
B B
Ipeak=6.526A, Imax=4.568A, 1.2*Ipeak=7.831A
Iocp(set)=7.851A~11.555A
A A

+1.05VSP
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
5 4 3 2 1
1 2 3 4 5
Place close to
phase 1 inductir
A +CPU_Vin A
PC76 PC77
470P_0402_50V8J 10P_0402_50V8J 220K_0402_5%_ERTJ0EV224J
1
PR55 2 1
1 2 2 1 2 1 PR56 PH1
1K_0402_1%
49.9_0402_1%
PR58 PR59 75K_0402_1%
2
2 1 1 2 2 1
DIFFOUT
COMP
PR57 1K_0402_1%
FB
4.99k_0402_1%
+CPU_Vin1 1 2
PC78 0.01U_0402_50V7K
PR60
0_0402_5% PR61 1.74K_0402_1% PR62
1 2 2 1 VSS_SENSE_1 1 2 PR65
[8] VSS_SENSE
1 2 26.7K_0402_1%
+1.05VS_VCCIO
1
PC81 65W@
PC80
PR64 1000P_0402_50V8J 4700P_0402_25V7K Iout_A 1 2
2
0_0402_5% PC79 14.7K_0402_1%
2
1 2 VCC_SENSE_1 390P_0402_50V7K
[8] VCC_SENSE
PR65
PR63
75_0402_1%
ILIM 1 2 CSCOMP
165K_0402_1%
1
PR66
0_0402_5% 9.31K_0402_1%
PR67
390P_0402_50V7K
1200P_0402_50V7K
1
2
1 2 35W@ PR99 169K_0603_1%
PC83
[43] VR_ON
2 1
PC82
CSP3 [50,51]
33
32
31
30
29
28
27
26
25
2
VR_HOT# 65W@
[43] VR_HOT#
PR68 169K_0603_1%
EPAD
VSN
DIFFOUT
IOUT
VSP
FB
COMP
VRMP
ILIM
2 1
CSP2 [50,51]
B B
PR69 1 24 PR70 169K_0603_1%

+1.05VS_VCCIO 1 2 2 ENABLE CSCOMP 23 CSSUM 2 1
+5VS VR_HOT# 3 VCC CSSUM 22 CSREF
CSP1 [50,51]
2_0402_1% VR_SVID_DAT 4 VR_HOT CSREF 21 CSN4A
VR_SVID_ALRT# 5 SDIO CSN4 20
ALERT CSP4
1
1
VR_SVID_CLK 6 19 CSN2A 2 PR73 1
75_0402_1%
130_0402_1%
0.1U_0402_25V6K
SCLK CSN2 CSN1 [50,51]

1
1
PR74 PC86 VGATE 7 18 CSP2A 10_0402_1%
PR71
PR72
PC84
VR_RDY CSP2
PWM2 / VBOOT
54.9_0402_1% TSENSE 8 17 PC85
PWM4 / ROSC
PWM1 / ADDR
2
TSENSE CSN3
PWM3 / IMAX
2.2U_0603_6.3V6K 1000P_0402_50V8J
2
2
@ 65W@
0.1U_0402_25V6K
2
1
2 PR75 1
PC87
CSN2 [50,51]
DRON
CSN1
CSP1
CSP3
VR_SVID_DAT CSN3 10_0402_1%
[8] VR_SVID_DAT
VR_SVID_ALRT# CSP3A
[8] VR_SVID_ALRT#
2
VR_SVID_CLK PU6
[8] VR_SVID_CLK
NCP81102MNTXG_QFN32_4x4
9
10
11
12
13
14
15
16
2 PR98 1
CSN3 [50,51]
10_0402_1%
PR110
+3VS Switching Frequency 1 2
CSN1
TSENSE PR110 @ 24.9K=320KHZ 24.9K_0402_1% CSP1A
[51] PWM2 DRVON [51]

2
PR76
[51] PWM3
10K_0402_1%
100K_0402_1%_NCP15WF104F03RC
[51] PWM1
1
CSN1
66.5K_0402_1%
CSN1 [50,51]
1
1
PR77
PH2
69.8k_0402_1% 1
2
VGATE 65W@
[14,43,5] VGATE
1
PR79 PR80 PR81 0.047U_0402_16V7K
2
59K_0402_1% 68K_0402_1% PC89

2
2
2
1
C C
CSP1A 1 2
CSP1 [50,51]
PR80 PR84
6.98K_0402_1%
PUT COLSE TO
35W@
VCORE HOT SPOT 65W@
PR66 @ 66.5K=108C CSN2A 1 2
CSN2 [50,51]
37.4K_0402_1%
PR78
65W@ 0_0402_5%
1
0.047U_0402_16V7K
PC88
2
65W@
CSP2A 1 2
CSP2 [50,51]
PR83
6.98K_0402_1%
ASM for 3Phase opration ASM for 2Phase opration

+5VS +5VS
CSN3
CSN3 [50,51]
2
2
PR82 PR111
1
2K_0402_1% 2K_0402_1% 0.047U_0402_16V7K
35W@ PC137
1
2
CSN4A CSN2A CSP3A 1 2
CSP3 [50,51]
PR93
6.98K_0402_1%
D D
Title
NCP81102
VCA00 LA-9792P M/B 0.1

1 2 3 4 5
B
A
D
C
[50,51]
[50,51]
[50,51]
[50]
[50]
[50]
DRVON
DRVON
PWM3
PWM2
+5VS
+5VS
DRVON
NCP5911@ 4K
PWM1
+5VS
EN resistor:
NCP81151@ 0 R
2
2
1
1
2 1 2 1
2
2 1
PR94
PR91
0_0402_5%
0_0402_5%
1
1
PR87
0_0402_5%
PC143
PC111
65W@
PC94
1
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
BST3
BST2
2.2U_0603_6.3V6K
4
3
2
1
4
3
2
1
4
3
2
1
1
1
BST1 1
PU9
PU8
PU7
EN
EN
EN
BST
BST
BST
VCC
VCC
VCC
65W@
PWM
PWM
PWM
PR97
PR89
PR85
65W@
2.2_0603_1%
2.2_0603_1%
2.2_0603_1%
2
2
2
SW
SW
SW
FLAG
FLAG
FLAG
GND
DRVH
GND
DRVH
GND
DRVH
DRVL
DRVL
DRVL
5
6
7
8
9
5
6
7
8
9
5
6
7
8
9
BST3_1
BST2_1
BST1_1
NCP81151MNTBG_DFN8_2X2
PC93
0.22U_0603_25V7K
0.22U_0603_25V7K
0.22U_0603_25V7K
PC138
PC102
1 2 1 2 1 2
LG3
LG2
LG1
SW3
SW2
SW1
65W@
HG3 1
HG2 1
HG1 1
PR95
PR90
PR86
65W@
PQ17
PQ15
PQ12
65W@
2
2
2
4
4
4
0_0805_5%
0_0805_5%
0_0805_5%
1 5 1 5 1 5
2 HG3_1 2 HG2_1 2 HG1_1
PQ18
PQ14
PQ11
2
2
65W@
3 3 3
4
4
4
SIRA06DP-T1-GE_POWERPAKSO-8-5 SIRA06DP-T1-GE_POWERPAKSO-8-5 SIRA06DP-T1-GE_POWERPAKSO-8-5

3 5 3 5 3 5
2 2 2
1 1 1
PQ19
PQ16
PQ13
65W@
SIR472DP-T1-GE3_POWERPAK8-5 SIR472DP-T1-GE3_POWERPAK8-5 SIR472DP-T1-GE3_POWERPAK8-5
4
4
4
1 5 1 5 1 5
2 2 2
3 3 3
SIRA06DP-T1-GE_POWERPAKSO-8-5 SIRA06DP-T1-GE_POWERPAKSO-8-5 SIRA06DP-T1-GE_POWERPAKSO-8-5
PC90
2 1 1 2 PC142 2 1 1 2 PC103 2 1 1 2 2 1
@EMI@ PR96 2 1 @EMI@ PR92 2 1 @EMI@ PR88
65W@
@EMI@ PC141 4.7_1206_5% @EMI@ PC112 4.7_1206_5% @EMI@ PC95 4.7_1206_5% 10U_0805_25V6K
1000P_0603_50V7K 10U_0805_25V6K 1000P_0603_50V7K 10U_0805_25V6K 1000P_0603_50V7K PC91
PC139 PC104 2 1
2 1 2 1
10U_0805_25V6K
65W@
10U_0805_25V6K 10U_0805_25V6K
PC92
PC140 PC105 2 1
2
1
2
1
2
1
2 1 2 1
65W@
10U_0805_25V6K
10U_0805_25V6K 10U_0805_25V6K
65W@
PL18
PL17
PL15
3
3
3
4
3
4
3
4
0.36UH_FDU1040J-H-R36M=P3_33A_20%
0.36UH_FDU1040J-H-R36M=P3_33A_20%
0.36UH_FDU1040J-H-R36M=P3_33A_20%
CSP3
CSP2
CSP1
CSN3
CSN2
CSN1
+CPU_CORE
+CPU_CORE
+CPU_CORE
[50]
[50]
[50]
[50]
[50]
[50]
+CPU_Vin
+CPU_Vin
+CPU_Vin
+CPU_CORE
+CPU_CORE
4
2 1 2 1 2 1 2 1
2
1
+
PJP103
3 4
2 3
1 2
1
PC131 PC125 PC119 PC113

22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M
PC106
4
4
2 1 2 1 2 1 2 1
560U_2.5V_M
+12V2
LOTES_APOW0008-P001C
PC132 PC126 PC120 PC114

2
1
+
22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M

PC107
2 1
2 1 2 1 2 1 2 1 EMI@ PC96
560U_2.5V_M
1000P_0402_50V7K
PC133 PC127 PC121 PC115
2
1
+
22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 2 1
EMI@ PC97
100P_0402_50V8J
1
1
PC108
2 1 2 1 2 1 2 1
EMI@ PL16
EMI@ PL14
560U_2.5V_M
PC134 PC128 PC122 PC116

22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M
HCB2012KF-121T50_0805
HCB2012KF-121T50_0805
2
1
+
2
2
PC109
Title
Size
Date:
2 1 2 1 2 1 2 1
2 1
560U_2.5V_M
PC135 PC129 PC123 PC117

22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M EMI@ PC98
2
1
+
100P_0402_50V8J
2 1
PC110
2 1 2 1 2 1 2 1 EMI@ PC99
Document Number
Power Stage
1000P_0402_50V7K
VCA00 LA-9792P M/B
@
PC136 PC130 PC124 PC118

560U_2.5V_M
22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M

2
1
+
PC100
5
5
Tuesday, September 24, 2013
100U_25V_M
2
+
1@
PC101
100U_25V_M
Sheet
51
of
+CPU_Vin
56
Rev
0.1
B
A
D
C
5 4 3 2 1
EMI@DIS@
PL403
HCB1608KF-121T30_0603
2 1
EMI@DIS@
+GPU_CORE_VIN PL401
+3VS HCB1608KF-121T30_0603 Design for
PSI pull up on HW site +GPU_CORE_VIN 2 1
+12V2 N14M-GE2
1
DIS@
SIR472DP-T1-GE3_POWERPAK8-5
PR402
2200P_0402_50V7K
68P_0402_50V8J
10U_0805_25V6K
10U_0805_25V6K
DIS@
0.1U_0402_25V6K
10K_0402_1%
1
@RF@ PC402
DIS@ PC405
PQ401
@EMI@ PC403
@EMI@ PC404
0_0402_5% 0_0402_5% DIS@
PC406
[21] GPU_PWM_VID 1 PR403 2 1 PR404 2 NVVDD_PSI [21]
2
PR115
1
DIS@ GPU_UGATE1 1 2 GPU_UGATE1_1 4
PR427 0_0805_5% @
10K_0402_1%
D D
3
2
1
DIS@ DIS@
PR405 PC407
2.2_0603_5% 0.22U_0603_25V7K DIS@
1 2 GPU_BOOT1_1 2 1 PL402
0.36UH_FDU1040J-H-R36M=P3_33A_20% +VGA_CORE
GPU_LX1 1 4
DIS@ PR406
4.7K_0402_1% 2 3
SIRA06DP-T1-GE_POWERPAKSO-8-5
1
1 2 DIS@ DIS@ @EMI@
+3VS_VGA
5
PQ402 PQ403 PR407
GPU_LGATE1 4.7_1206_5%
0.1U_0402_25V6K
@ PC408
1 1 1
2
1
DIS@ DIS@ DIS@
DIS@ DIS@ 4 4 + PC409 + PC410 + PC417
SNUB_GPU1
PR408 PR409 560U_2.5V_M 560U_2.5V_M 560U_2.5V_M
2
30K_0402_1% 39K_0402_1%
GPU_VREF 1 2 1 2 2 2 2
1
2
3
1
2
3
2
DIS@
PR410 @EMI@
OCP setting in 47A
1
DIS@ DIS@ 3K_0402_1% PC411
PR411 PR412 680P_0603_50V7K
3K_0402_1% 24K_0402_1%
2
1 2 2 1 GPU_BOOT1 DIS@
PR413
DIS@ PC412 10K_0402_1%
GPU_REFADJ
1800P_0402_50V7K 1 2
1 2
GPU_VID
GPU_PSI
DIS@ PC413
GPU_EN
0.01U_0402_50V7K
1 2
[22] VGA_VSS_SENSE
@ PR414
57.6K_0402_1%
1
2 1 PU401
REFADJ
VID
PSI
EN
UGATE1
BOOT1
C C
For RT8813
1
GPU_REFIN 7 24
0_0402_5% +GPU_CORE_VIN REFIN PHASE1 DIS@
1
PR401 DIS@ PR422 GPU_VREF 8 23 PC414
499K_0402_1% VREF LGATE1 4.7U_0603_10V6K +5VALW
2
2 1 GPU_TON 9 22
2
TON GND/PWM3 0_0402_5%
1000P_0402_50V7K
GPU_FBRTN 10 21 GPU_PVCC 2 PR415 1

RGND PVCC
11 20 +GPU_CORE_VIN
PC401
@ PC415 @ PR416 GPU_FB
TALERT/ISEN2
2 VSNS LAGTE2
47P_0402_50V8J 51_0402_1% @ PC416 10P_0402_50V8J
@PC416
TSNS/ISEN3
VCC/ISNE1
1 2 GPU_FB1 1 2 1 2 GPU_COMP12 19
SS PHASE2
UGATE2
PGOOD
BOOT2
1 PR417 @ PC419 @ PR418
GND
@
0_0402_5% 100P_0402_50V8J 82K_0402_1%
1 2 1 2 GPU_FB2 1 2
10U_0805_25V6K
10U_0805_25V6K
DIS@ RT8813AGQW_WQFN24_4X4
25
13
14
15
16
17
18
1
@ PC422
2
PC421
PR419
GPU_TSNS/ISEN3
SIR472DP-T1-GE3_POWERPAK8-5
GPU_TALERT/ISEN2
2
GPU_DSBL/ISEN1
0_0402_5%
5
GPU_VREF
GPU_PGOOD
@
PQ404 @
1
DIS@ @
3.92K_0402_1%
1 PR117
PR420
GPU_UGATE2 1 2 GPU_UGATE2_1 4
[22] VGA_VCC_SENSE
DIS@
0_0805_5%
+3VS
100K_0402_1%_NCP15WF104F03RC
3
2
1
1
2
+VGA_CORE
0.1U_0402_25V6K
PR421
1
DIS@ PH401
DIS@ PC420
4.7K_0402_1%
@
PH701 close to MOSFET DIS@
PL404
2
2
Trigger point 110 degree 0.36UH_FDU1040J-H-R36M=P3_33A_20%
1
GPU_LX2 1 4
DGPU_PWROK [17,23]
2 3
1
B @ @ @ @ @EMI@ B
5
DIS@ PR424 PR426 PC423 PQ405 PQ406 PR423
2.2_0402_1% 2.2_0603_5% 0.22U_0603_25V7K 4.7_1206_5%
2 1 GPU_BOOT2 1 2 GPU_BOOT2_1 2 1
+5VALW
DIS@
2
PR425
1U_0402_16V6K
10K_0402_1% GPU_LGATE2 4 4
1
1 2
DIS@ PC425
+3VS
2
1
2
3
1
2
3
@EMI@
1
PC418
680P_0603_50V7K
N14P-GE2
2
Ipeak=
Imax=
Iocp=
Follow GB4-128 demand

+VGA_CORE
+VGA_CORE Place Under GPU PlaceNear GPU
PC429
PC430
PC431
PC432
PC433
PC434
PC435
PC436
PC437
PC438
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
1
47U_0805_6.3V6M
22U_0805_6.3V6M
1
1
PC440
PC441
2
2
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
A A
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
1
1
PC443
PC444
PC445
PC446
PC447
PC448
PC449
PC450
PC451
1
1
2
2
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@

PWR_VGA_CORE/VGA_PCIE
0.1
Tripoli
5 4 3 2 1
A B C D
EMI@DIS@
PL20
Power dissapation: 0.0978W HCB1608KF-121T30_0603
+VRAM_12V 1 2
+12V2
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6K
@EMI@ PC202
2200P_0402_50V7K
68P_0402_50V8J
1 1
DIS@ PC199
@RF@ PC201
1
1
@ PC200
@EMI@ PC203
5
DIS@
2
PQ21
DIS@
DIS@ 4
PC204
1 PR137 2 1 2
BST_V1.5V
OCP SET:6.3A
2.2_0603_5%
DIS@ PU10 DIS@ 0.22U_0603_25V7K SIS412DN-T1-GE3_POW ERPAK8-5
3
2
1
1 10
PR138
PGOOD VBST DIS@
PR139 1 2 TRIP_V1.5V 2 9 UG_V1.5V 1 PR116 2 UG_V1.5V_1 DIS@ PL21
0_0402_5% TRIP DRVH 0_0805_5% 4.7UH_FDSD0630-H-4R7M-P3_5.5A_20%
78.7K_0402_1%
1 2 EN_V1.5V 3 8 SW _V1.5V 1 2
[15,23,43] DGPU_PW ROK EN SW +VRAM_1.5VSP
0_0402_5%
1
FB_V1.5V 4 7 1 PR140 2
VFB V5IN +5VALW
1
1
@ @ DIS@
4.7_1206_5%
PR141 PC205 5 6 LG_V1.5V PQ22
.1U_0402_16V7K RF DRVL
@EMI@
PR142
10K_0402_1% 1
2
1
11 PC206
330U_2.5V_M
2
TP +
DIS@ PC207
1U_0402_6.3V6K
2
TPS51212DSCR_SON10_3X3 DIS@ 4
2
1
1
2
1000P_0603_50V7K
@EMI@
PC208
PR143 SI7716ADN-T1-GE3_POW ERPAK8-5
470K_0402_1%
3
2
1
2
DIS@
2 2
2
PR144
PR145
10K_0402_1%
1 2 1 2
DIS@
11.5K_0402_1% Power dissapation: 0.1985W
DIS@
@ PJ9
2 1
+VRAM_1.5VSP 2 1 +1.5VS_VGA
Cap. ESR=17m JUMP_43X118
Rds(ON) :Max=15m-ohm
Typ=12m-ohm
Vtrip range ==> 0.2V ~ 3V
<Vo=1.5V> VFB=0.7V
V=0.7*(1+11.5K/10K)=1.505V
Fsw=290KHz
3 3
Ipeak=4.7A, Imax=3.29A, Iocp=1.2*Ipeak=5.64A
Iocp(set)=5.718A~8.304A
4 4

PWR-VRAM_1.5VSP
Custom 0.1
VCA00 LA-9792P M/B
A B C D
5 4 3 2 1
PCH, GPU, Codec, Card reader,

3.3V
RT8127 +V_3.3VP LAN, WLAN, LVDS, TV Tuner, WebCam
5.13A
Codec, Toch Screen, Panel,

5V HDD, ODD, USB Port, stereo
+V_5VP
D 6.55A D
1.05V
TPS51212 +1.05V PCH, GPU
6A
1.5V
RT8207M +1.5VP CPU, PCH, DDR, TV Tuner
5.9A
0.75V
+0.75VSP DDR
0.75A
Adaptor(19V)
120W/90W
C C
12V
RT8298 +12V HDD, Fan
2.58A
1.8V
+CPU_CORE
NCP81102 75A peak for 65W CPU, 48A peak for 35W CPU
1.5V
TPS51212 +VRAM_1.5VSP
5.23A
B B
1.0V
RT8813 +VGA_CORE
38.69A
A A

Power Rail
Custom 0.4
QLA13/15 LA-8501P M/B
5 4 3 2 1
5 4 3 2 1
Clock and Reset Diagram

Channel A
DDR3-SO-DIMM
D
Channel B D
DDR3-SO-DIMM
Intel CPU
DDRA_CLK[0..1]
Haswell SM_DRAMRST#
LGA1150
37.5mm x 37.5mm DDRB_CLK[0..1]
SM_DRAMRST#
CLK_DP_DP
CLK_CPU_DMI
CPU_PLTRST#
H_PWRGOOD
100MHz
100MHz
C C
CLK_PCIE_VGA CLK_PCIE_LAN LAN

27MHz Nvidia 25MHz
RESET#
PWRGOOD
100MHz 100MHz
PLT_A_RST# Realtek
N14M-GE2 PLT_A_RST# 8111G
A
CLK_CR Card Reader
eDP to LVDS 100MHz
PLT_A_RST#
Realtek
RT5229
RTD2136R
PCH
CLK_WLAN
Audio Codec AZ_BITCLK_HD LynxPoint 100MHz
WLAN/BT
24MHz PLT_A_RST# On Mini Card
ALC-272-VA4
AZ_RST_HD#
H81
B
CLK_PCI_EC
FCBGA-708 CLK_TV B
100MHz TV Tuner
KBC 33.3MHz
PLT_RST#
23mm x 22mm PLT_A_RST#
On Mini Card
PCI_RST# A_RST#
GATEA20
G20IN
PLT_RST# A
KB_RST#
KBRST#
ENE KB9012-A3 PCH_RSMRST# 25MHz
RSMRST#
PM_PWROK
VGATE PWR_GOOD
RTC 32.768KHz
A A

Clock/Reset Diagram
Custom VIA15 LA-A071P M/B 0.3
5 4 3 2 1
5 4 3 2 1
PLT_RST#
PWR BTN
NVIDIA
PLT_RST#
ON/OFF
Power Button VRAM MXM PLT_RST#
PLT_RST_VGA#
D PEX_RST_N D
FBA_RST# DGPU_HOLD_RST#
VGA_PWROK (PCH GPIO50)
G
PIN 13
PIN 114
(PCH GPIO17)
VR_ON PIN121
+CPU_CORE NCP6131S52MNR2G VGATE
PIN 97
PWM
SSM3K7002FU Intel
DDR3 SO-DIMM
+3.3V_LAN AQ3413 WOL_EN
PIN 89
MOS Haswell
(desktop)
UNCOREPWRGOOD
SM_DRAMPWROK
CPU_PLTRST#
SM_DRAMRST#
RESET# CACTUS-RIDGE
Thunder bolt
EC
PM_SYNC
C PLT_RST# C
+12VSP RT8299 SCALER_ON KB9012QF-A3
LDO
H_PM_SYNC
PM_DRAM_PWRGD_R
+1.05VCCIOP TPS51212DSCR
PWM SM_DRAMRST#
delay
delay
RTS5229 Card reader
RC
RC
PCH_RTCRST#
PCH_SRTCRST#
ECRST# RTL8111F-CGT
PIN 37 RC
H_PWRGOOD
delay PCIE Gold Finger
Slot 2 Mini Card

H WLAN
DRAMPWROK
DRAMPWROK PLT_A_RST#
1.5VS AP4800 VGATE
PMSYNC
RTCRST#
SRTCRST#
PROCPWRGD
SYS_PWROK
MOS PM_PWROK PROCPWRGD
B PIN 107 B
PWROK
APWROK
PBTN_OUT# PLTRST_PROC#
PIN 106 PWRBTN#
E PCH_RSMRST# PCH_PLT_RST#
PIN 100 RSMRST# PLTRST#
+0.75VSP(+0.75VS) SUSP#
PIN 116
RT8207MZQW KB_RST#
PIN 2 RCIN#
EC_SCI#
+1.5VP(+1.5V) PWM D SYSON PIN 20 GPIO7
PIN 95 EC_SMI#
PIN 15 GPIO8
GATEA20
PIN 1 A20GATE PCH
+3V_SCA_R AP2301 SCALER_ON
PIN 109
MOS H87
B
C
PM_SLP_S5#
(desktop) GPIO52
B+
PIN 14 SLP_S5#
PM_SLP_S4#
A PIN 110 SLP_S4# F
PM_SLP_S3# GPIO54 DGPU_PWR_EN MXM
A DC-IN PIN 6 SLP_S3# A
+3VALW AZ_RST_HD#
RT8243BZQW HDA_SDO DGPU_HOLD_RST#
+5VALW ALC892 Codec GPIO50
PWM Security Classification Compal Secret Data Compal Electronics, Inc.

Reset Diagram
Custom 0.3
VCA00 LA-9791P M/B
5 4 3 2 1
5 4 3 2 1
NO DATE PAGE MODIFICATION LIST PURPOSE

------------------------------------------------------------------------------------------------------------------------------------------
1. 20130604 P47
Add PC154 and Change the pu101 to SA00005A600 For Pericom issue
2. 20130729 P45
Add PR105 ,PC155 Snaber For EMI Request
3. 20130729 P45 Add PR1
For EMI Request
3. 20130729 P45 Add PR39
For S5 power loss issue
D D
C C
B B
A A

PWR_PIR
Custom 0.5
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B555 VAA15 LA-A072P MB
5 4 3 2 1
5 4 3 2 1
COMPAL CONFIDENTIAL
MODEL NAME: ZEA00 Power Sequence Block Diagram (Discrete)
PCB NAME: LA-A061P
D REVISION: 0.1 D
Adaptor
DATE: 2013/04/01
Reserve For PSU +3VSB
11PM_PWROK
12
+5VSB PU102
18 SYS_PWROK
+5VSB PS_ON# 4 PCH_RSMRST#
B B EC_ON#
PS_ON# 5
PSU Conn
PJP101
PBTN_OUT#
E
PSU_PG PSU_PG B+ PM_SLP_S3#
PCH 13 DRAMPWROK
7
PSU PSU_PG# 2 F
U1
14 H_PWRGOOD
ATX12V1_1 PU3
35V_PG
EC PM_SLP_S5# 6 CPU
19 CPU_PLTRST# JCPU1
ATX12V1_1 +5VALWP U35
+12V2 +3VALWP
C PJ10 16 +CPU_CORE
+5VALW
C
B+ C
PJ11 D +3VALW
PJP901 PU7 PU8 PU9
+12V2 15
VR_SVID_DAT
+3VSB VR_SVID_ALRT#
PU6 VR_SVID_CLK
1 A 10 +CPU_CORE VGATE 17
ON/OFFBTN# ON/OFF# VR_ON
+5VSB/B+ PU4 8
SYSON
+1.5VP(+1.5V)/
+0.75VP(+0.75VS) SUSP# 9 +1.5V Q29
For DDR DGPU_PWROK 20 +1.5VS
B PCH_PWR_EN 3 B
+3VALW U38
+5VS
+12V2 PU10 +3VSB U37
+VRAM_1.5VSP +3VALW_PCH +5VALW U38
(+1.5VS_VGA) +3VS
+12V2 PU401
21 GPU_PWM_VID
+VGA_CORE
ATX12V1_1 U74
(+12VS_PSU)
+12VS
A A
Reserve For PSU

Power Sequence Diagram
Custom 0.3
ZEA00 LA-A061P M/B
5 4 3 2 1
5 4 3 2 1
HW PIR (Product Improve Record)

ZEA00 LA-A061P SCHEMATIC CHANGE LIST
REVISION CHANGE: 0.1 --> 0.2
GERBER-OUT DATE: 2013/06/20
NO DATE PAGE MODIFICATION LIST PURPOSE
----------------------------------------------------------------------------------------------------------------------------------------
1. Change C45 from SF000002V00 to SF000003X00
2. Change +LCDVDD enable control from EC to LVDS convertor,un-pop R367 and R365 change short pad.
3. Change LCD_BKOFF# control from EC to LVDS convertor,un-pop R364 and R363 change 0 ohm.
4. Remove un-used components(U18,R335,R336,C357,C359,C360,R338,R339) for eDP to LVDS convertor.
D
5. Pop R428 for AZ_SDIN0_HD. D
6. U2 footprint change from socket to IC.

7. Add RH11
8. Change Y2 from SJ10000CU00 to SJ10000DE00,change C106 & C107 from 27pF to 4.7pF
替替替
9. Change R423 location to L45
10. Change D7 from SC2N202U010 to SC600000B00 for
11. Change Q29 from SB548000210 to SB00000ZN00.
12. Change D8&D9 from SCS00002G00 to SCS00000Z00
13. X1 code change:1.Change Q2,Q3,Q4,Q5,Q30,Q31 from SB01000JE00 to SB00000EO00. 2.Change Q9 from SB934130020 to SB934130000.
3.Change Q10 from SB00000FC00 to SB00000F400. 4.Change L1 from SM01000JE00 to SB01000JN00.
14. Change R551 & R553 pull-high from +3VS to +3VALW_PCH for leakage.
替替替
15. Add R677 & R678 & R679 for PTC request, Change R473,R490,R679,R677,R678 from 0ohm to PTC(SP040005X00).
16. Change Q10 from SB00000FC00 to SB00000L800 for
17. Remove R469 0ohm for TV.
18. Add C2134 ,C2135,C2136,C2137,C2138,C2139,C2140,C2141,C2143 for ESD.
19. Remove JXDP1,OC1,OC2,RC3,RC4,R125,R126.
20. Pop U7&R231, un-pop R228 for PLT_RST_VGA#.
21. Swap SATA_PRX_DTX_N1 & SATA_PRX_DTX_P1 for m-SATA pin define.
22. Un-pop LAN power components Q26,Q27,R573,R574,C562.
23.0 ohm change to short pad: R347,R585,R507,R674,R644,R645,R646,R647
24.Change R453&R457 from 0ohm to 1.1K, R451&R459 from 300ohm to 5.6Kohm.
25.Pop R438,R439 for ESD request.
C C
PVT change list:

同
1. Change Q10 from SB00000FC00(EOL soon) to SB00000ZN00( Q29),SB00000FC00 as 2nd source.Schematic, 需需需
2. Change U23 pin12_+USB3_VCCA to +USB3_VCCB, pop U22, un-pop U24 for USB charger
3. R365 change from short pad to 0ohm.
4. U5 pin5 change from +3VSto +3VALW_PCH for BCM43142 wake from WLAN issue.
5. Change R473,R490,R677,R678,R679 from SP040005X00_0603 size to F1,F2,F4,F5,F3 SP040003S00_1206 size.
6. Change L11 from SM010014520 to SM01000EJ00 for ACL request
7. Change L8 from SM010007W00 to SM010019400 for ACL request
8. Change D7 from SC2N202U010 to SC600000B00(same as D1/D2), SC2N202U010 as 2nd source..
9. Change RP19 from SD309510A80(T88 P/N) to SD309510A10.
11. Change R276 from 10k to 100k for +3VS_VGA rise time.
12. Change R672 from 10k to 100k for +3VALW_PCH rise time.
14. Change R438 & R439 from 0_0603 to short pad.
15. Un-pop C125 & C548 for sequence EA.
16. Change C394, C398,C520 & C514 from 220uF(LELON_SF000001F00) to 100uF (Panasonic_SF000005100) to meet Inrush EA & ACL request.
17. Change C170 & C171 from 12pF to 10pF for EA.
20. Change C106 & C107 from 4.7pF to 10pF for 25MHz crystal.
21. Add R677 & reserve R678 on U5 AND gate for PLT_A_RST#
13. Change JUSB1 & JUSB2 from DC23300AE00 to DC233008R00(VBA11)
24. Change R591 pull-high from +5VSB to VL for power S5 Erp request.
B
22. Change D20 & D21 from SC300001Y00 to SC300002F00 for ESD request B
23. Change D22 & D23 from SCA00001100 to SCA00000T00 for ESD ACL request
10. Add C2144~C2152 for EMI request.
18. Change R402 from short pad to 22ohm for EMI, R399,R401,R403 & R404 change from short pad to 0 ohm for EMI request.
19. Reserve C2153,C2154,C2155,C2156, add D29 for ESD.
20. Change R282 from 100k to 2k, R277 from 470 to 22 ohm for GPU power sequence.
21. Change Y1 from SJ100001K00 to SJ10000FA00 ,C102 & C107 to 6pF.
pre-MP change list:

1. Change R399,R401,R402,R403,R404 from 0ohm to short pad.
2. Add C2157 and reserve C2158.
3. Change R8,R470,R669,R670,R416 from 0ohm to short pad.
4. Un-pop JECDB1 & SW1.
5. For R3 P/N, change PCH P/N from SA00006RF00 to SA00006RF20, PCB P/N from DA60011S000 to DA60011S010 and GPU P/N from SA00006ZF00 to SA00006ZF10.
6. Change C520 & C514 from 100uF to 220uF.
7. Pop C2149~C2152 for ESD request.
8. Change C559 & C2128 from 0603 to 0805.
9. Change C2145 from 0.1uF to 470pF, change C2149~C2152 from 330pF to 470pF for EMI.
10. Add C418 for EMI.
A A

HW-PIR
0.3
VCA00 LA-9791P M/B
5 4 3 2 1
www.s-manuals.com

Compal La-A061p r1.0 Schematics

Uploaded by

Copyright:

Available Formats

You might also like

Compal La-A061p r1.0 Schematics

Uploaded by

Document Information

Original Description:

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

Compal La-A061p r1.0 Schematics

Uploaded by

Copyright:

Available Formats

A B C D E

INTEL Haswell CPU with DDRIII + PCH Lynx-Point

September 24, 2013

Security Classification Compal Secret Data Compal Electronics, Inc.

LVDS Converter Intel CPU Memory BUS(DDRIII) 204pin DDR3/L-SO-DIMM X2

TV Card or m-SATA SSD BCAS Card conn.

Intel PCH PCIE

USB2.0 USB2.0 USB 2.0

USB2.0 USB2.0 USB 2.0

VGA Conn. VGA D-Mic/A-Mic

+GFX_CORE Intel Sandy Bridge

+5VALWP +5VALW +5VALW Q61 +5VS

PU6 +1.5VP +1.5V

Power/B Scaler Mini Card Mini Card

Security Classification Compal Secret Data Compal Electronics, Inc.

SIGNAL *1 *2 USB Port Table BOM Structure Table

S0(Full ON) HIGH HIGH HIGH ON ON ON ON ON

_ID2 _ID1 _ID0

Security Classification Compal Secret Data Compal Electronics, Inc.

PU/PD for JTAG signals

[30] PCH_HDMIOUT_TX0+ G20 DDIB_TXBP2 FDI0_TX0P1 FDI_CTX_PRX_P1 [14]

E19 C15 CPU_EDP_TXN0 C7 1 2 0.1U_0402_16V4Z

Issued Date 2013/04/01 Deciphered Date 2014/04/01 Title

PEG_RCOMP trace width=12mil

Typ- suggest 220nF. The change in AC capacitor

Security Classification Compal Secret Data Compal Electronics, Inc.

DDR_A_D0 AD38 AY15 DDRA_CLK0 DDR_B_D0 AE34 AM20 DDRB_CLK0

FOX_3H993827-4M41-01H_HASW ELL 1 R24 2_0402_1% C28 FOX_3H993827-4M41-01H_HASW ELL C32

Security Classification Compal Secret Data Compal Electronics, Inc.

Security Classification Compal Secret Data Compal Electronics, Inc.

JCPU1F JCPU1G JCPU1H CFG Straps for Processor

Security Classification Compal Secret Data Compal Electronics, Inc.

2 2 DDR_A_D2 15 VSS5 VSS6 16 DDR_A_D6

DDRA_CKE0 73 74 DDRA_CKE1 C2038 1 2 0.1U_0402_16V4Z

DDR_A_DQS#4 135 136

139 140 DDR_A_D38

DDR_A_D58 191 VSS49 VSS50 192 DDR_A_D62 2 2

R630 205 206

Security Classification Compal Secret Data Compal Electronics, Inc.

DDRB_CKE0 73 74 DDRB_CKE1 C2057 1 2 0.1U_0402_16V4Z

DDR_B_D32 129 130 DDR_B_D36

DDR_B_DQS#4 135 136 1 1

DDR_B_DQS4 137 138

139 DQS4 VSS31 140 DDR_B_D38

->Channel A 00 VSS49 VSS50 2 2

CMOS Setting, near DDR Door @ C104

PCH_SPKR Place R81 within 500 mils of

1 2 SERIRQ AG31 PCH_GPIO11 PCH_SMBDATA 6 1

[41,43] LPC_AD2 LAD2 AG35 PM_SMBCLK [10,11,40,5]

R138 PCH_SPI_IO2_R 3 DO(IO1) HOLD#(IO3) 6 PCH_SPI_CLK_L 2 7PCH_SPICLK

MC74VHC1G08DFT2G_SC70-5 R15 10K_0402_5%

+3VS SYS_RESET# DPWROK

[43,9] PM_PW ROK IN2

PM_PW ROK 1 2 PW ROK_R AT40

DRAMPWROK SUSCLK/GPIO62 +3VALW _PCH

ESD request Close to PCH

Security Classification Compal Secret Data Compal Electronics, Inc.

SIGNAL 1 2 USB Port Table BOM Structure Table