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Lab 1
Lab 1
02-131192-042
LAB 1
1. How these gates behave when inputs are unconnected (low or high)? Briefly explain
why?
ANS: In general these components work as long as all inputs are either ‘0’ or ‘1’. If an input
is neither ‘0’ nor ‘1’, then component is treated as both ‘0’ and ‘1’. But if output changes
depending on whether it is ‘0’ or ‘1’, the output is error value. TTL integrated circuits
assume unconnected inputs to be at logic ‘1’.
pg. 1
FIZZAH MUKHTAR
02-131192-042
1 0 0 1 0 1 1 0 1
1 0 1 0 1 0 1 0 0
CIRCUIT DIAGRAM
pg. 2
FIZZAH MUKHTAR
02-131192-042
A۰´B ´
A+B A●B A+B A ⊕B ´
A ⊕B
Input: A Input: B 7400 7402 7408 7432 7486 74266
NAND NOR AND OR XOR XNOR
0 0 1 1 0 0 0 1
0 1 1 0 0 1 1 0
1 0 1 0 0 1 1 0
1 1 0 0 1 1 0 1
Not
0 1 1 0 1 1 1
Connected
Not
1 0 0 1 1 0 1
Connected
Not
0 1 1 0 1 1 1
Connected
Not
1 0 0 1 1 0 1
Connected
Not Not
0 1 1 1 0 1
Connected Connected
pg. 3