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Compal La-9912p r1.0 Schematics PDF
Compal La-9912p r1.0 Schematics PDF
1 1
Compal Confidential
VAWGA/B Schematics Document
2 2
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
COVER PAGE
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
VAWGA/GB
Date: Monday, April 01, 2013 Sheet 1 of 37
A B C D E
A B C D E
Compal Confidential
Model Name : VAWGA/B
1 1
HDMI Conn. P10 DP1 Camera BT Combo Reader Screen 2.0 Conn.
AMD FT3 APU Port 3 Port 5 Port 4 Port 1 Port 0
CRT Conn. P12 DAC
2
GPP Jaguar Core USB USB2.0 2
Port 8 Port 9
GPP2 GPP1
Integrated Yangtze FCH
LAN MB P.17 MB P.17
MINI Card
Atheros BGA 769-balls 3.0 Conn. LP1 3.0 Conn. LP2
(WLAN/BT)
P16 AR8162/8172
P14 Port 0 Port 1
USB
Transformer USB3.0
RJ45 HDA HD Audio
P15
BIOS (4M) SPI
P.5 SATA
Sub-borad
15"
14"
IO/B ODD/B
LS9633P LS9634P
page 20 page 13
4 Power/B LED/B 4
LS9631P LS9635P
page 20 page 20
+VGA_CORE 0.95-1.2V switched power rail ON OFF OFF 5 S4 (Suspend to Disk) LOW HIGH ON OFF OFF OFF
+VDDCI 0.95-1.2V switched power rail ON OFF OFF 6
+3VALW 3.3V always on power rail ON ON OFF 7 S5 (Soft OFF) LOW LOW ON OFF OFF OFF
+3VS 3.3V switched power rail ON OFF OFF
+1.8VALW 1.8V always on power rail ON ON ON* Board ID / SKU ID Table for AD channel USB OC MAPPING
+1.8VS 1.8V switched power rail ON OFF OFF Vcc 3.3V +/- 5%
OC# USB Port
+0.95VALW 0.95V always on power rail ON OFF OFF R1562 100K +/- 5%
+0.95VS 0.95V switched power rail ON OFF OFF Board ID R1564 V AD_BID min V AD_BID typ V AD_BID max 0 USB20 port0
+1.5V 1.5V power rail for APU and DDR ON ON OFF 0 0 0 V 0 V 0 V 1 USB20 port1,2,8,9 USB30 port0,1
+1.5VS 1.5V switched power rail ON OFF OFF 1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V 2
+3VGS 3.3V switched power rail for VGA ON OFF OFF 2 18K +/- 5% 0.436 V 0.503 V 0.538 V 3
+1.8VGS 1.8V switched power rail for VGA ON OFF OFF 3 33K +/- 5% 0.712 V 0.819 V 0.875 V
+1.5VGS 1.5V switched power rail for VGA ON OFF OFF 4 56K +/- 5% 1.036 V 1.185 V 1.264 V BOM Structure Table
+0.95VGS 0.95V switched power rail for VGA ON OFF OFF 5 100K +/- 5% 1.453 V 1.650 V 1.759 V
BOM Structure BTO Item
+5VALW 5V always on power rail ON ON ON 6 200K +/- 5% 1.935 V 2.200 V 2.341 V
2
+5VS 5V switched power rail ON OFF OFF 7 NC 2.500 V 3.300 V 3.300 V A6 R3 BGA APU 2
A6@
+VSB VSB always on power rail ON ON ON
A4@ A4 R3 BGA APU
+RTC_APU RTC power ON ON ON
E2@ E2 R3 BGA APU
+0.75VS 0.75V switched power rail for DDR terminator ON OFF OFF
E1@ E1 R3 BGA APU
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
NOTES LIST
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
VAWGA/GB
Date: Monday, April 01, 2013 Sheet 3 of 37
A B C D E
A B C D E
2
AL38 M1_CS_L0 M_CHECK2 AB40 APU_RST# 1 2
<9> DDRB_SCS0# AN35 M1_CS_L1 M_CHECK3 AC40 C1273 100P_0402_50V8J R114 R113 1K_0804_8P4R_5%
<9> DDRB_SCS1#
M_CHECK4 U41 1K_0402_5% 1K_0402_5%
3 AJ37 M_RAS_L M_CHECK5 V40 E1 PR KABINI EM2100ICJ23HM 1G BGA769P APU 3
<8,9> DDRAB_SRAS# AL34 AA41
<8,9> DDRAB_SCAS# M_CAS_L M_CHECK6
PU +1.8VS
1
AL35 M_WE_L M_CHECK7 AB41 E2 PR KABINI EM3000IBJ23HM 1.65G BGA 769P APU
<8,9> DDRAB_SWE# +1.8VS
DP_STEREOSYNC RP5 @
AD40 M_VREF UAPU X2@ UAPU E1PC@ CRT_HSYNC
+MEM_VREF 1 2 AC38 AD41 M_ZVDDIO 1 2 APU_SVT 1 8
M_VREFDQ M_ZVDDIO_MEM_S
+VREF_DQ +1.5V 2 7
R576 @ 0_0402_5% R74 For HDMI Need APU_SVC
FT3 REV 0.51
39.2_0402_1% APU_SVD 3 6
X4@ FT3_BGA769 4 5
ZZZ ZZZ UAPU X5@ X2 ES2 KABINI ZMA5B078J2360 1.65G BGA CPU E1 PC 2M101082J2361 1G BGA 769P 1K_0804_8P4R_5%
APU_RST# R80 1 2 300_0402_5%
HDT+ PU +1.8VS + PD
APU_PWRGD
APU_BPCLK_L
R82
R18
1
1
2 300_0402_5%
2 511_0402_1%
+1.8VS
JHDT2 +1.8VS
LA9912P 14@ LA9912P 15@ X5 ES2 ZM201079J4460 2G BGA 769P 1 2 APU_TCK RP6 RP3 @ +1.8VS
DAZ0Y600201 DAZ0Y700201
2
3
1 2
4 APU_TMS APU_TDI 1 8 APU_SCLK 1 8
PD RP7 @
ESDP@ C195 3 4 APU_TMS 2 7 APU_CLKINT 2 7
+VREF_DQ 0.1U_0402_16V7K 5 6 APU_TDI APU_TCK 3 6 APU_SCLK 3 6 APU_BP2 1 8
1 5 6 APU_DBREQ# 4 5 APU_CLKINT 4 5 APU_BP3 2 7
7 8 APU_TDO APU_BP0 3 6
7 8 1K_0804_8P4R_5% 1K_0804_8P4R_5% APU_BP1 4 5
MEMORY VREF 1
@
2
@ @ RP11
APU_TRST# 9
9 10
10 APU_PWRGD
1K_0804_8P4R_5%
C342 C164 11 12 APU_RST# RP8
1U_0402_6.3V6K 1 8 11 12 +1.8VS
0.1U_0402_16V7K
2 1 2 7 13 14 APU_DBRDY 1 8
3 6 13 14 APU_TRST# 2 7
4 5 15 16 APU_DBREQ# APU_PLLTEST0 3 6
15 16 APU_PLLTEST1 4 5
4 +1.5V RP2 10K_0804_8P4R_5% 17 18 APU_PLLTEST0 4
17 18 1K_0804_8P4R_5%
1 8 +MEM_VREF 19 20 APU_PLLTEST1
RP11, RP6 will @ when MP
2 7 19 20 APU_BPCLK_H R19 1 2 511_0402_1%
3 6 MEM_MAB_EVENT#
4 5 1 2
@ SAMTE_ASP-136446-07-B
1K_0804_8P4R_1% C337 C163
1U_0402_6.3V6K 0.1U_0402_16V7K
Security Classification Compal Secret Data Compal Electronics, Inc.
2 1
Issued Date 2012/04/22 Deciphered Date 2015/04/22 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FT3 DDR3/DISP/MISC//HDT+
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom VAWGA/GB 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, April 01, 2013 Sheet 4 of 37
A B C D E
A B C D E
UAPUB
PCIE APU POWER SEQUENCE
R10 P_GPP_RXP0 P_GPP_TXP0 L2
R8 P_GPP_RXN0 P_GPP_TXN0 L1 G-A +RTC
R5 P_GPP_RXP1 P_GPP_TXP1 K2 PCIE_ATX_DRX_P1 C19 1 2 0.1U_0402_16V7K EC_ON
<14> PCIE_DTX_C_ARX_P1 PCIE_ATX_C_DRX_P1 <14>
LAN R4 P_GPP_RXN1 P_GPP_TXN1 K1 PCIE_ATX_DRX_N1 C20 1 2 0.1U_0402_16V7K LAN
<14> PCIE_DTX_C_ARX_N1 PCIE_ATX_C_DRX_N1 <14>
G-B +3VALW/+5VALW
N5 P_GPP_RXP2 P_GPP_TXP2 J2 PCIE_ATX_DRX_P2 C17 1 2 0.1U_0402_16V7K
<16> PCIE_DTX_C_ARX_P2 PCIE_ATX_C_DRX_P2 <16>
WLAN N4 P_GPP_RXN2 P_GPP_TXN2 J1 PCIE_ATX_DRX_N2 C18 1 2 0.1U_0402_16V7K WLAN
<16> PCIE_DTX_C_ARX_N2 PCIE_ATX_C_DRX_N2 <16>
N10 P_GPP_RXP3 P_GPP_TXP3 H2 +1.8VALW
N8 P_GPP_RXN3 P_GPP_TXN3 H1
1 +0.95VALW 1
1 2 P_TX_ZVDD_095 W8 P_TX_ZVDD_095 P_RX_ZVDD_095 W7 P_RX_ZVDD_095 2 1
+0.95VS_APU_GFX +0.95VS_APU_GFX
R404 R73 SYSON
1.69K_0402_1% 1K_0402_1%
G-C +1.5V
L5 P_GFX_RXP0 P_GFX_TXP0 G2
L4 P_GFX_RXN0 P_GFX_TXN0 G1 SUSP#
J5 P_GFX_RXP1 P_GFX_TXP1 F2 G-D +3VS
J4 P_GFX_RXN1 P_GFX_TXN1 F1
+1.8VS
G5 P_GFX_RXP2 P_GFX_TXP2 E2
G4 P_GFX_RXN2 P_GFX_TXN2 E1 +1.5VS
D7 P_GFX_RXP3 P_GFX_TXP3 D2 +0.95VS
E7 P_GFX_RXN3 P_GFX_TXN3 D1
VR_ON
G-E +APU_CORE
FT3 REV 0.51
UAPUE
2 2
CLK/SATA/USB/SPI/LPC
BA14 SATA_TX0P W4
USBCLK/14M_25M_48M_OSC
<13> SATA_ATX_DRX_P0
AY14 SATA_TX0N
<13> SATA_ATX_DRX_N0
USB_ZVSS AG4 USB_ZVSS R641 1 2 11.8K_0402_1%
HDD BA16 SATA_RX0N
<13> SATA_DTX_C_ARX_N0
AY16 SATA_RX0P USB_HSD0P AL4
<13> SATA_DTX_C_ARX_P0 USB20_P0 <17>
AL5
USB_HSD0N
USB20_N0 <17>Right USB port
AY19 SATA_TX1P
<13> SATA_ATX_DRX_P1
BA19 SATA_TX1N USB_HSD1P AJ4
<13> SATA_ATX_DRX_N1 USB20_P1 <16>
ODD AJ5
USB_HSD1N
USB20_N1 <16>Touch Screen
AY17 SATA_RX1N
<13> SATA_DTX_C_ARX_N1
BA17 SATA_RX1P USB_HSD2P AG7
<13> SATA_DTX_C_ARX_P1
USB_HSD2N AG8
R90 2 1 1K_0402_1% SATA_ZVSS AR19 SATA_ZVSS
R96 2 1 1K_0402_1% SATA_ZVDD AP19 SATA_ZVDD_095 USB_HSD3P AG1
+0.95VS USB20_P3 <11>
AG2
USB_HSD3N
USB20_N3 <11>CAMERA
BA30 SATA_ACT_L/GPIO67 USB_HSD4P AF1
T48 USB20_P4 <20>
AF2
USB_HSD4N
USB20_N4 <20>CardReader
AY12 SATA_X1
AE1
USB_HSD5P
USB_HSD5N AE2 USB20_P5
USB20_N5
<16>
<16>WLAN/BT combo 48MHz CRYSTAL
BA12 SATA_X2 USB_HSD6P AD1 48M_X2
USB20_P6 <17>
AD2
USB_HSD6N
USB20_N6 <17>USB2.0 LP1
R938
U4 GFX_CLKP USB_HSD7P AC1 1M_0402_5% 48M_X1
USB20_P7 <17>
U5 AC2
GFX_CLKN USB_HSD7N
USB20_N7 <17>USB2.0 LP2
AC8 GPP_CLK0P USB_HSD8P AB1
USB30_P8 <17>
AC10 AB2 2 1
GPP_CLK0N USB_HSD8N
USB30_N8 <17>MB USB3.0 port0 2 1
LAN 0_0402_5%
3 R116 1 @ 2 GPP_CLK1P AE4 GPP_CLK1P USB_HSD9P AA1 3
<14> CLK_PCIE_LAN USB30_P9 <17>
<14> R119 1 @ 2 GPP_CLK1N AE5 GPP_CLK1N USB_HSD9N AA2
<17>MB USB3.0 port1
CLK_PCIE_LAN# USB30_N9 3 4
0_0402_5%
R125 1 @ 2 GPP_CLK2P AC4 AE10 USBSS_ZVSS R644 1 2 1K_0402_1% 3 4
GPP_CLK2P USB_SS_ZVSS
<16> CLK_PCIE_WLAN
<16> R126 1 @ 2 GPP_CLK2NAC5 GPP_CLK2N AE8
USB_SS_ZVDD_095_USB3_DUAL USBSS_ZVDD R645 1 2 1K_0402_1%
+0.95VALW
CLK_PCIE_WLAN#
0_0402_5% Y20
WLAN AA5 GPP_CLK3P USB_SS_0TXP T2 48MHZ_8PF_X3S048000D81H-W
<17>
USB30_MTX_C_DRX_P0
AA4 GPP_CLK3N USB_SS_0TXN T1
<17>
USB30_MTX_C_DRX_N0 RP12
1
AP13 X14M_25M_48M_OSC USB_SS_0RXP V2 APU_SPI_AISO 1 8 EC_SPI_AISO C794 C795
USB30_MRX_DTX_P0<17> EC_SPI_AISO <18>
USB_SS_0RXN V1 APU_SPI_AOSI_U 2 7 EC_SPI_AOSI 6P_0402_50V8 6P_0402_50V8
USB30_MRX_DTX_N0<17> EC_SPI_AOSI <18>
2
48M_X1 N2 X48M_X1 APU_SPI_CLK_U 3 6 EC_SPI_CLK
EC_SPI_CLK <18>
USB_SS_1TXP R1 APU_SPI_CS1#_U 4 5 EC_SPI_CS1#
<17>
USB30_MTX_C_DRX_P1 EC_SPI_CS1# <18>
USB_SS_1TXN R2
<17>
USB30_MTX_C_DRX_N1
0_0804_8P4R_5%
48M_X2 N1 X48M_X2 USB_SS_1RXP W1
W2 USB30_MRX_DTX_P1<17>
R103 R104 for EMI USB_SS_1RXN
USB30_MRX_DTX_N1<17>
AT2
LPCCLK1
LAD0
SPI_CLK/GPIO162 AU7
SPI_CS1_L/GPIO165 AW9
SPI_CS2_L/GPIO166 AR4
APU_SPI_CLK
APU_SPI_CS1#
R110 1
R111 1
2 33_0402_5%
2 33_0402_5%
APU_SPI_CLK_U
APU_SPI_CS1#_U (Current Share mode) @
+3VALW
<18> LPC_AD0 T51 +3VALW
AT1 LAD1 SPI_DO/GPIO163 AR11 APU_SPI_AOSI R109 1 2 33_0402_5% APU_SPI_AOSI_U 2 1
<18> LPC_AD1 AR2 LAD2 SPI_DI/GPIO164 AR7 APU_SPI_AISO R614
<18> LPC_AD2 AR1 LAD3 SPI_HOLD_L/GEVENT9_LAU11 APU_SPI_HOLD# 10K_0402_5% U56 C635
<18> LPC_AD3 AP2 LFRAME_L SPI_WP_L/GPIO161 AU9 APU_SPI_WP# 1 2APU_SPI_CS1#_U 1 8 0.1U_0402_16V4Z
<18,6> LPC_FRAME# CS# VCC
AP1 LDRQ0_L APU_SPI_AISO R108 1 2 33_0402_5% APU_SPI_AISO_U 2 7 APU_SPI_HOLD# 1 2
AV29 1 2APU_SPI_WP# 3 SO/SIO1 HOLD# 6 APU_SPI_CLK_U
<18> SERIRQ SERIRQ/GPIO48 R108 close to ROM WP# SCLK
R615
AP25 LPC_CLKRUN_L R616 4 5 APU_SPI_AOSI_U 10K_0402_5%
T50 AV2 10K_0402_5% GND SI/SIO0
LPC_PD_L/GEVENT5_L/SPI_TPM_CS_L
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FT3 PCIE/SATA/CLK/USB/SPI
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom VAWGA/GB 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, March 28, 2013 Sheet 5 of 37
A B C D E
A B C D E
1 2
C615 UAPUD
150P_0402_50V8J ACPI/SD/AZ/GPIO/RTC/MISC
1 2 LPC_RST_A# AY4 LPC_RST_L SD_PWR_CTRL BA23
<18> LPC_RST#
R602 APU_PCIE_RST#_BUF AY9 PCIE_RST_L SD_CLK/GPIO73 AY22
33_0402_5%
EC_RSMRST#_R AY5 RSMRST_L SD_CMD/GPIO74 AY23
SD_CD/GPIO75 AY20
BA8 PWR_BTN_L SD_WP/GPIO76 BA20
<18> PBTN_OUT# PWR_GOOD_APU AM19 PWR_GOOD
T36 AY7 SYS_RESET_L/GEVENT19_L SD_DATA0/GPIO77 BA22 APU_PCIE_RST#_BUF 1 2
APU_PCIE_RST# <14,16>
APU_PCIE_WAKE# AW11 WAKE_L/GEVENT8_L SD_DATA1/GPIO78 AY21 R907
<16> APU_PCIE_WAKE#
SD_DATA2/GPIO79 AY24 33_0402_5% 1
AY3 SLP_S3_L SD_DATA3/GPIO80 BA24
1 <18> SLP_S3# 1
BA5 SLP_S5_L C912
<18> SLP_S5#
SD_LED/GPIO45 AY25 150P_0402_50V8J
TEST0 AU13 TEST0
2
CS_JTAG_TMS_TEST1 AY10 TEST1/TMS SCL0/GPIO43 AU25 APU_SCLK0
APU_SCLK0 <16,8,9>
TEST2 AY6 TEST2 SDA0/GPIO47 AV25 APU_SDATA0
APU_SDATA0 <16,8,9>
AR23 KBRST_L SCL1/GPIO227 AY11 APU_SCLK1 If use as SMBUS :
<18> KBRST# +3VS
AR31 GA20IN/GEVENT0_L SDA1/GPIO228 BA11 APU_SDATA1 Pulled-up to VDD_33(port0) , VDD_33_ALW(port1) with a resistor of:
<18> GATEA20 AN5 LPC_PME_L/GEVENT3_L Qty: 1; Value: 2.2 KΩ; Tol: 5%
<18> EC_SCI# AL7 LPC_SMI_L/GEVENT23_L GPIO49 AP27 If no use :
<18> EC_SMI# Pulled-up to VDD_33(port0) , VDD_33_ALW(port1) with a resistor of:
GPIO50 AY28
BT_OFF# <16>
1
GPIO51 BA28 Qty: 1; Value: 10 KΩ; Tol: 5%
AP15 AC_PRES/IR_RX0/GEVENT16_L GPIO55 AV23
WL_OFF# <16>
AV13 IR_TX0/GEVENT21_L GPIO57 AP21 UMA@ R911
ODD_EN <13>
BA9 IR_TX1/GEVENT6_L GPIO58 BA26 10K_0402_5%
BA10 IR_RX1/GEVENT20_L GPIO59 AV19 Board_ID1
2
AV15 IR_LED_L/LLB_L/GPIO184 GPIO64 AY27
SPKR/GPIO66 BA27 Board_ID1
APU_SPKR <21>
AU29 CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/GPIO60 GPIO68 AU21
LAN_CLKREQ# AW29 CLK_REQ1_L/GPIO61 GPIO69 AY26 Board_ID1 Function
<14> LAN_CLKREQ#
1
WLAN_CLKREQ# AR27 CLK_REQ2_L/GPIO62 GPIO70 AV21
<16> WLAN_CLKREQ#
T53 AV27 CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/GPIO63 GPIO71 AM21 R661 1 @ 2 0_0402_5%
H_PROCHOT# <18,24,29,4>
AY29 CLK_REQG_L/GPIO65/OSCIN GPIO174 BA3 APU_GPIO174 PX@ R912
10K_0402_5%
<17> USB_OC0#
AY8 USB_OC0_L/SPI_TPM_CS_L/TRST_L/GEVENT12_L GEVENT2_L AV17 GEVENT2# 0 PX5.5
2
AW1 USB_OC1_L/TDI/GEVENT13_L GEVENT4_L BA4
<17> USB_OC1#
T52 AV1 GEVENT7_L AR15
T54 AY1
USB_OC2_L/TCK/GEVENT14_L
USB_OC3_L/TDO/GEVENT15_L GEVENT10_L AP17
1 UMA
GEVENT11_L AP11
HDA_BITCLK AN2 GEVENT17_L AN8
HDA_SDOUT
HDA_SDIN0
AN1
AK2
AZ_BITCLK
AZ_SDOUT
AZ_SDIN0/GPIO167
BLINK/GEVENT18_L AU17
GEVENT22_L BA6 EC_LID_OUT#
32.768KMHz CRYSTAL
2 <21> HDA_SDIN0 EC_LID_OUT# <18> 2
T55 HDA_SDIN1 AK1 AZ_SDIN1/GPIO168
T56 HDA_SDIN2 AM1 AZ_SDIN2/GPIO169 GENINT1_L/GPIO32 BA29 32K_X1
T57 HDA_SDIN3 AL2 AZ_SDIN3/GPIO170 GENINT2_L/GPIO33 AP23
HDA_SYNC AM2 AZ_SYNC 1 2 32K_X2
HDA_RST# AL1 AZ_RST_L FANOUT0/GPIO52 AV31
FANIN0/GPIO56 AU31 R914
BT_DISABLE# <16>
20M_0402_5%
32K_X1 AJ2 X32K_X1
Y3
32.768KHZ_12.5P_1TJF125DP1A000D
RTCCLK AV11
RTC_CLK <18>
32K_X2 AJ1 X32K_X2 1 2
FT3 REV 0.51
X4@ FT3_BGA769 1 1
C682 C686
PU +3VALW + PD 2
22P_0402_50V8J
2
18P_0402_50V8J
+3VALW
RP13
R691 1 @ 2 10K_0402_5%
1 8 HDA_RST#
<21>
<21>
HDA_RST#_AUDIO
HDA_SYNC_AUDIO
2
3
7
6
HDA_SYNC STRAPS OF APU
HDA_BITCLK
<21> HDA_BITCLK_AUDIO 4 5 HDA_SDOUT
<21> HDA_SDOUT_AUDIO
33_0804_8P4R_5% LPC_FRAME# LPC_CLK0_EC LPC_CLK1 GEVENT2_L RTC_CLK
R686 1 2 10K_0402_5% APU_GPIO174
SPI ROM BOOT FAIL TIMER CLKGEN 1.8V SPI ROM NORMAL POWR
3
PU +3VALW
H (DEFAULT) ENABLED ENABLE
(DEFAULT)
UP/RESET TIMING
(DEFAULT)
3
+3VALW EC_RSMRST# , POWER_GOOD +1.8VALW BOOT FAIL TIMER CLKGEN 3.3V SPI ROM FAST POWER
1
2
RP14
8
7
APU_SCLK1
APU_SDATA1 follow CRB Must connected to 10 ms RC delay
circuit on +1.8-V S5 power rail.
L LPC ROM DISABLED
(DEFAULT)
DISABLED (DEFAULT) UP/RESET TIMING
FOR SIMULATION
2
3 6 APU_PCIE_WAKE#
4 5
(APU side 1.8V power rail) R345
47K_0402_5%
R685
10K_0402_5% +3VALW
10K_0804_8P4R_5%
D3
1
1
R650 1 2 100K_0402_5% USB_OC0#
R651 1 2 100K_0402_5% USB_OC1# RB751V-40TE17_SOD323-2 @ @
R902 R904 R925 R928 R949
D5
10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
1 2 PWR_GOOD_APU
PU +3VS <18> SYS_PWRGD_EC
2
<18,5> LPC_FRAME#
RB751V-40TE17_SOD323-2 <18,5> LPC_CLK0_EC
1 1 <5> LPC_CLK1
+3VS 1U_0402_6.3V6K 1U_0402_6.3V6K
C209 C212 GEVENT2#
R622 1 @ 2 8.2K_0402_5% WLAN_CLKREQ#
2 2 RTC_CLK
R621 1 @ 2 8.2K_0402_5% LAN_CLKREQ#
R673 1 2 2.2K_0402_5% APU_SCLK0
PU +3VALW + PD
1
R674 1 2 2.2K_0402_5% APU_SDATA0 RP9 @ +3VALW @
@ @ R929 R950
4 1 8 R903 R926 R927 4
2.2K_0402_5% 2.2K_0402_5%
2 7 2K_0402_5% 2K_0402_5% 2K_0402_5%
3 6
2
4 5
PD R684 1 @ 2 10K_0402_5% HDA_BITCLK 1K_0804_8P4R_5%
RP10 @
R688 1 @ 2 10K_0402_5% HDA_SDIN0 Security Classification Compal Secret Data Compal Electronics, Inc.
TEST0 1 8 2012/04/22 2015/04/22 Title
CS_JTAG_TMS_TEST1 2 7 Issued Date Deciphered Date
TEST2 3 6
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FT3 GPIO/AZ/MISC
4 5 Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom VAWGA/GB 1.0
15K_0804_8P4R_5% MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, March 28, 2013 Sheet 6 of 37
A B C D E
A B C D E
C179
C180
C181
C182
C183
C184
C186
C187
C188
C189
C190
1 1 1 1 1 1 1 1 1 1 1 1
1
C166 CLRP1 J@ Need OPEN
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
180P_0402_50V8J
0.22U_0402_10V6K SHORT PADS
2
2 2 2 2 2 2 2 2 2 2 2 2
1 1
C201
C202
C192
C191
C193
C194
C197
C249
C257
C252
C253
1 1 1 1 1 1 1 1 1 1 1 1
UAPUH
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
180P_0402_50V8J
1U_0402_6.3V6K
180P_0402_50V8J
1U_0402_6.3V6K
1U_0402_6.3V6K
2 2 2 2 2 2 2 2 2 2 2 2
UAPUF UAPUG
POWER GND GND
J35 VDDIO_MEM_S_1 VDDCR_CPU_1 L21 A8 VSS_1 VSS_63 J3 W29 VSS_125 VSS_187 AL39
+1.5V +APU_CORE
L32 VDDIO_MEM_S_2 VDDCR_CPU_2 L23 A13 VSS_2 VSS_64 J7 W39 VSS_126 VSS_188 AL41
L37 VDDIO_MEM_S_3 VDDCR_CPU_3 L25 A23 VSS_3 VSS_65 J8 W41 VSS_127 VSS_189 AM11
N35 VDDIO_MEM_S_4 VDDCR_CPU_4 L27 A31 VSS_4 VSS_66 J39 Y1 VSS_128 VSS_190 AM27
R31 VDDIO_MEM_S_5 VDDCR_CPU_5 L29 A35 VSS_5 VSS_67 K11 Y2 VSS_129 VSS_191 AM31
2 R37 2
VDDCR_CPU_6 N21 A39 K13 AA3 AN3
VDD_33 VDD_33_ALW U32
VDDIO_MEM_S_6
VDDIO_MEM_S_7 VDDCR_CPU_7 N23 B8
VSS_6
VSS_7
VSS_68
VSS_69 K17 AA7
VSS_130
VSS_131
VSS_192
VSS_193 AN7
U35 VDDIO_MEM_S_8 VDDCR_CPU_8 N27 B13 VSS_8 VSS_70 K19 AA8 VSS_132 VSS_194 AN39
W31 VDDIO_MEM_S_9 VDDCR_CPU_9 R21 B23 VSS_9 VSS_71 K21 AA11 VSS_133 VSS_195 AP31
VDDIO_AZ_ALW W32 VDDCR_CPU_10 R23 B31 K23 AA15 AR3
+1.5V/+1.5VS OF APU (Could be S0 or S5 power rail) W37
AA31
VDDIO_MEM_S_10
VDDIO_MEM_S_11 VDDCR_CPU_11 R27 B39
VSS_10
VSS_11
VSS_72
VSS_73 K25 AA19
VSS_134
VSS_135
VSS_196
VSS_197 AR13
VDDIO_MEM_S_12 VDDCR_CPU_12 U21 C1 VSS_12 VSS_74 K27 AA25 VSS_136 VSS_198 AR17
PLANE SPLIT AA35 VDDIO_MEM_S_13 VDDCR_CPU_13 U23 C2 VSS_13 VSS_75 K29 AA29 VSS_137 VSS_199 AR21
+1.5V +1.5VS AC32 VDDCR_CPU_14 U27 C5 K31 AA39 AR25
VDDIO_MEM_S AC37
VDDIO_MEM_S_14
VDDIO_MEM_S_15 VDDCR_CPU_15 W21 C7
VSS_14
VSS_15
VSS_76
VSS_77 L3 AC3
VSS_138
VSS_139
VSS_200
VSS_201 AR29
AE31 VDDIO_MEM_S_16 VDDCR_CPU_16 W23 C9 VSS_16 VSS_78 L7 AC7 VSS_140 VSS_202 AR39
AE35 VDDIO_MEM_S_17 VDDCR_CPU_17 W27 C11 VSS_17 VSS_79 L8 AC11 VSS_141 VSS_203 AR41
C924
C925
C949
C923
C926
C927
C928
C929
C931
C930
C932
C211
C210
C208
C207
C230
C231
C258
C259
C161
C256
C254
C255
C232
AG32 VDDIO_MEM_S_18 VDDCR_CPU_18 AA21 C13 VSS_18 VSS_80 L10 AC15 VSS_142 VSS_204 AU1
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 AG37 VDDIO_MEM_S_19 VDDCR_CPU_19 AA23 C15 VSS_19 VSS_81 L11 AC19 VSS_143 VSS_205 AU2
AJ35 VDDIO_MEM_S_20 VDDCR_CPU_20 AA27 C17 VSS_20 VSS_82 L15 AC25 VSS_144 VSS_206 AU3
AL32 VDDIO_MEM_S_21 VDDCR_CPU_21 AC21 C19 VSS_21 VSS_83 L19 AC29 VSS_145 VSS_207 AU15
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
180P_0402_50V8J
180P_0402_50V8J
180P_0402_50V8J
180P_0402_50V8J
180P_0402_50V8J
180P_0402_50V8J
180P_0402_50V8J
180P_0402_50V8J
4.7U_0603_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
180P_0402_50V8J
AL37 VDDIO_MEM_S_22 VDDCR_CPU_22 AC23 C21 VSS_22 VSS_84 L31 AC31 VSS_146 VSS_208 AU19
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 AR35 VDDIO_MEM_S_23 VDDCR_CPU_23 AC27 C23 VSS_23 VSS_85 L39 AC39 VSS_147 VSS_209 AU23
VDDCR_CPU_24 AE21 C25 VSS_24 VSS_86 L41 AC41 VSS_148 VSS_210 AU27
VDDCR_CPU_25 AE23 C27 VSS_25 VSS_87 M1 AE3 VSS_149 VSS_211 AU39
VDDCR_CPU_26 AE27 C29 VSS_26 VSS_88 M2 AE7 VSS_150 VSS_212 AV9
C31 VSS_27 VSS_89 N3 AE25 VSS_151 VSS_213 AW3
VDDCR_NB_1 L13 C33 VSS_28 VSS_90 N7 AE29 VSS_152 VSS_214 AW7
+APU_CORE_NB
VDDCR_NB_2 L17 C35 VSS_29 VSS_91 N15 AE32 VSS_153 VSS_215 AW13
VDDCR_NB_3 N11 C37 VSS_30 VSS_92 N19 AE39 VSS_154 VSS_216 AW15
@ @ @ @ @ VDDCR_NB_4 N13 C39 VSS_31 VSS_93 N25 AG3 VSS_155 VSS_217 AW17
VDDCR_NB_5 N17 C41 VSS_32 VSS_94 N29 AG5 VSS_156 VSS_218 AW19
VDDCR_NB_6 R11 D9 VSS_33 VSS_95 N31 AG10 VSS_157 VSS_219 AW21
VDDCR_NB_7 R13 D11 VSS_34 VSS_96 N39 AG11 VSS_158 VSS_220 AW23
VDDCR_NB_8 R17 D13 VSS_35 VSS_97 P1 AG13 VSS_159 VSS_221 AW25
VDDCR_NB_9 U13 E3 P2 AG15 AW27
3
+0.95VALW/+0.95VS OF APU VDD_095_GFX +1.8VALW/+1.8VS OF APU VDDCR_NB_10 U17 E4
VSS_36
VSS_37
VSS_98
VSS_99 R3 AG19
VSS_160
VSS_161
VSS_222
VSS_223 AW31
3
VDDCR_NB_11 W13 E9 VSS_38 VSS_100 R7 AG25 VSS_162 VSS_224 AW33
VDDCR_NB_12 W17 E11 R15 AG29 AW35
+0.95VS +0.95VS_APU_GFX +1.8VS VDD_18 VDDCR_NB_13 AA13 E13
VSS_39 VSS_101
R19 AG31
VSS_163 VSS_225
AW37
VDD_095 L22 VDDCR_NB_14 AA17 E27
VSS_40
VSS_41
VSS_102
VSS_103 R25 AG39
VSS_164
VSS_165
VSS_226
VSS_227 AW39
2 1 VDDCR_NB_15 AC13 E31 VSS_42 VSS_104 R29 AG41 VSS_166 VSS_228 AW41
FBMA-L11-201209-121LMA50T_0805 VDDCR_NB_16 AC17 E35 VSS_43 VSS_105 R39 AH1 VSS_167 VSS_229 AY13
C935
C934
C198
C199
C205
C204
C206
C260
C213
C936
C203
C933
C236
C237
C238
C239
C240
C233
VDDCR_NB_17 AE15 E38 VSS_44 VSS_106 R41 AH2 VSS_168 VSS_230 AY15
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 VDDCR_NB_18 AE17 E39 VSS_45 VSS_107 U1 AJ3 VSS_169 VSS_231 AY18
VDDCR_NB_19 AE19 G3 VSS_46 VSS_108 U2 AJ7 VSS_170 VSS_232 AY30
VDDCR_NB_20 AG17 G7 VSS_47 VSS_109 U3 AJ15 VSS_171 VSS_233 BA2
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
180P_0402_50V8J
10U_0603_6.3V6M
1U_0402_6.3V6K
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
180P_0402_50V8J
AL10 VDDIO_AZ_ALW_1 VDDCR_NB_21 AG21 G11 VSS_48 VSS_110 U7 AJ17 VSS_172 VSS_234 BA7
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 +1.5VS
AL11 VDDIO_AZ_ALW_2 G13 VSS_49 VSS_111 U8 AJ19 VSS_173 VSS_235 BA13
G15 VSS_50 VSS_112 U11 AJ23 VSS_174 VSS_236 BA15
B1 VDD_18_ALW_1 VDD_18_1 A2 G17 VSS_51 VSS_113 U15 AJ25 VSS_175 VSS_237 BA18
+1.8VALW +1.8VS
B2 VDD_18_ALW_2 VDD_18_2 A3 G21 VSS_52 VSS_114 U19 AJ29 VSS_176 VSS_238 BA21
VDD_18_3 B3 G25 VSS_53 VSS_115 U25 AJ31 VSS_177 VSS_239 BA25
VDD_18_4 C3 G29 VSS_54 VSS_116 U29 AJ32 VSS_178 VSS_240 BA31
G35 VSS_55 VSS_117 U31 AJ39 VSS_179 VSS_241 BA35
@ @ AL13 VDD_33_ALW_1 VDD_33_1 AM15 G37 VSS_56 VSS_118 U39 AL3 VSS_180 VSS_242 BA39
+3VALW_APU +3VS
AM13 VDD_33_ALW_2 VDD_33_2 AM17 G39 VSS_57 VSS_119 W3 AL8 VSS_181 VSSBG_DAC A15
+0.95VALW +0.95VALW +1.8VALW G41 VSS_58 VSS_120 W5 AL15 VSS_182 VBURN AL31
AR5 VDD_095_USB3_DUAL_1 VDD_095_1 AG23 H11 VSS_59 VSS_121 W11 AL17 VSS_183 PSEN AM29
+0.95VALW +0.95VS
AU4 VDD_095_USB3_DUAL_2 VDD_095_2 AG27 H13 VSS_60 VSS_122 W15 AL19 VSS_184
AV7 VDD_095_USB3_DUAL_3 VDD_095_3 AJ21 H23 VSS_61 VSS_123 W19 AL25 VSS_185
C937
C938
C216
C214
C221
C218
C220
C217
C219
C222
C160
C244
C250
C246
C248
C245
AW5 VDD_095_USB3_DUAL_4 VDD_095_4 AJ27 H31 VSS_62 VSS_124 W25 AL29 VSS_186
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
180P_0402_50V8J
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
4.7U_0603_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
180P_0402_50V8J
VDD_095_GFX_1 U10
4 +0.95VS_APU_GFX 4
VDD_095_GFX_2 W10
+RTCBATT_R AN4 VDDBT_RTC_G VDD_095_GFX_3 AA10
@ @ X4@ FT3_BGA769
VDD_095_USB3_DUAL
VDD_095_ALW VDD_18_ALW Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2012/04/22 Deciphered Date 2015/04/22 Title
FT3 PWR/GND
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom VAWGA/GB 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, March 28, 2013 Sheet 7 of 37
A B C D E
A B C D E
15mil JDIMM1
1 2
VREF_DQ VSS1
1000P_0402_50V7K
3 4 DDRAB_SDQ4 DDRAB_SDQ[0..63]
0.1U_0402_16V4Z
VSS2 DQ4 DDRAB_SDQ[0..63] <4,9>
2 1 DDRAB_SDQ0 5 6 DDRAB_SDQ5
DQ0 DQ5
C176
C142
DDRAB_SDQ1 7 8 DDRAB_SDM[0..7]
DQ1 VSS3 DDRAB_SDM[0..7] <4,9>
9 10 DDRAB_SDQS0#
VSS4 DQS#0 DDRAB_SDQS0# <4,9>
DDRAB_SDM0 11 12 DDRAB_SDQS0 DDRAB_SMA[0..15]
1 2 DM0 DQS0 DDRAB_SDQS0 <4,9> DDRAB_SMA[0..15] <4,9>
13 14
DDRAB_SDQ2 15 VSS5 VSS6 16 DDRAB_SDQ6
DDRAB_SDQ3 17 DQ2 DQ6 18 DDRAB_SDQ7
19 DQ3 DQ7 20
1 DDRAB_SDQ8 21 VSS7 VSS8 22 DDRAB_SDQ12 1
DDRAB_SDQ9 23 DQ8 DQ12 24 DDRAB_SDQ13
25 DQ9 DQ13 26
DDRAB_SDQS1# 27 VSS9 VSS10 28 DDRAB_SDM1
<4,9> DDRAB_SDQS1# DQS#1 DM1
DDRAB_SDQS1 29 30 MEM_MAB_RST#
<4,9> DDRAB_SDQS1 DQS1 RESET# MEM_MAB_RST# <4,9>
31 32
DDRAB_SDQ10 33
35
VSS11
DQ10
VSS12
DQ14
34
36
DDRAB_SDQ14 +1.5V/+0.75VS OF DIMM1
DDRAB_SDQ11 DDRAB_SDQ15
37 DQ11 DQ15 38
DDRAB_SDQ16 39 VSS13 VSS14 40 DDRAB_SDQ20 +1.5V +0.75VS
DDRAB_SDQ17 41 DQ16 DQ20 42 DDRAB_SDQ21
43 DQ17 DQ21 44
DDRAB_SDQS2# 45 VSS15 VSS16 46 DDRAB_SDM2
<4,9> DDRAB_SDQS2# DQS#2 DM2
C114
C115
C116
C117
C118
C119
C120
C121
C122
C123
C126
C127
DDRAB_SDQS2 47 48
<4,9> DDRAB_SDQS2 DQS2 VSS17
49 50 DDRAB_SDQ22 1 1 1 1 1 1 1 1 1 1 1 1
DDRAB_SDQ18 51 VSS18 DQ22 52 DDRAB_SDQ23
DDRAB_SDQ19 53 DQ18 DQ23 54
DQ19 VSS19
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
55 56 DDRAB_SDQ28
DDRAB_SDQ24 57 VSS20 DQ28 58 DDRAB_SDQ29 2 2 2 2 2 2 2 2 2 2 2 2
DDRAB_SDQ25 59 DQ24 DQ29 60
61 DQ25 VSS21 62 DDRAB_SDQS3#
VSS22 DQS#3 DDRAB_SDQS3# <4,9>
DDRAB_SDM3 63 64 DDRAB_SDQS3
DM3 DQS3 DDRAB_SDQS3 <4,9>
65 66
DDRAB_SDQ26 67 VSS23 VSS24 68 DDRAB_SDQ30
DDRAB_SDQ27 69 DQ26 DQ30 70 DDRAB_SDQ31
71 DQ27 DQ31 72 @ @ @ @ @ @
VSS25 VSS26
DDRA_CKE0 73 74 DDRA_CKE1
<4> DDRA_CKE0 CKE0 CKE1 DDRA_CKE1 <4>
75 76
77 VDD1 VDD2 78 DDRAB_SMA15
2
<4,9> DDRAB_SBS2#
DDRAB_SBS2# 79
81
NC1
BA2
A15
A14
80
82
DDRAB_SMA14 VREF for DIMM1,2 2
2
DDRAB_SMA5 91 92 DDRAB_SMA4
93 A5 A4 94 R65 R66
DDRAB_SMA3 95 VDD7 VDD8 96 DDRAB_SMA2 1K_0402_1%
A3 A2 20K_0402_1%
DDRAB_SMA1 97 98 DDRAB_SMA0
99 A1 A0 100
1
DDRA_CLK0 101 VDD9 VDD10 102 DDRA_CLK1 +VREF_DQ +VREF_CA
<4> DDRA_CLK0 CK0 CK1 DDRA_CLK1 <4>
DDRA_CLK0# 103 104 DDRA_CLK1#
<4> DDRA_CLK0# CK0# CK1# DDRA_CLK1# <4>
105 106
DDRAB_SMA10 107 VDD11 VDD12 108 DDRAB_SBS1#
A10/AP BA1 DDRAB_SBS1# <4,9>
2
DDRAB_SBS0# 109 110 DDRAB_SRAS#
<4,9> DDRAB_SBS0# BA0 RAS# DDRAB_SRAS# <4,9>
111 112 R67 R68
DDRAB_SWE# 113 VDD13 VDD14 114 DDRA_SCS0# 1K_0402_1%
<4,9> DDRAB_SWE# WE# S0# DDRA_SCS0# <4> 20K_0402_1%
DDRAB_SCAS# 115 116 DDRA_ODT0
<4,9> DDRAB_SCAS# CAS# ODT0 DDRA_ODT0 <4>
117 118
1
DDRAB_SMA13 119 VDD15 VDD16 120 DDRA_ODT1
A13 ODT1 DDRA_ODT1 <4>
DDRA_SCS1# 121 122
<4> DDRA_SCS1# S1# NC2
123 124 15mil
125 VDD17 VDD18 126
NCTEST VREF_CA +VREF_CA
127 128
VSS27 VSS28
1000P_0402_50V7K
129 130
0.1U_0402_16V4Z
DDRAB_SDQ32 DDRAB_SDQ36
DDRAB_SDQ33 131 DQ32 DQ36 132 DDRAB_SDQ37
DQ33 DQ37 1 2
C134
C167
133 134
DDRAB_SDQS4# 135 VSS29 VSS30 136 DDRAB_SDM4
<4,9> DDRAB_SDQS4# DQS#4 DM4
DDRAB_SDQS4 137 138
<4,9> DDRAB_SDQS4 DQS4 VSS31 2 1
139 140 DDRAB_SDQ38
DDRAB_SDQ34 141 VSS32 DQ38 142 DDRAB_SDQ39
3 DDRAB_SDQ35 143 DQ34 DQ39 144 3
145 DQ35 VSS33 146 DDRAB_SDQ44
DDRAB_SDQ40 147 VSS34 DQ44 148 DDRAB_SDQ45
DDRAB_SDQ41 149 DQ40 DQ45 150
151 DQ41 VSS35 152 DDRAB_SDQS5#
VSS36 DQS#5 DDRAB_SDQS5# <4,9>
DDRAB_SDM5 153 154 DDRAB_SDQS5
DM5 DQS5 DDRAB_SDQS5 <4,9>
155 156
DDRAB_SDQ42 157 VSS37 VSS38 158 DDRAB_SDQ46
DDRAB_SDQ43 159 DQ42 DQ46 160 DDRAB_SDQ47
161 DQ43 DQ47 162
DDRAB_SDQ48 163 VSS39 VSS40 164 DDRAB_SDQ52
DDRAB_SDQ49 165 DQ48 DQ52 166 DDRAB_SDQ53
167 DQ49 DQ53 168
DDRAB_SDQS6# 169 VSS41 VSS42 170 DDRAB_SDM6
<4,9> DDRAB_SDQS6# DQS#6 DM6
DDRAB_SDQS6 171 172
<4,9> DDRAB_SDQS6 DQS6 VSS43
173 174 DDRAB_SDQ54
DDRAB_SDQ50 175 VSS44 DQ54 176 DDRAB_SDQ55
DDRAB_SDQ51 177 DQ50 DQ55 178
179 DQ51 VSS45 180 DDRAB_SDQ60
DDRAB_SDQ56 181 VSS46 DQ60 182 DDRAB_SDQ61
DDRAB_SDQ57 183 DQ56 DQ61 184
185 DQ57 VSS47 186 DDRAB_SDQS7#
VSS48 DQS#7 DDRAB_SDQS7# <4,9>
DDRAB_SDM7 187 188 DDRAB_SDQS7
DM7 DQS7 DDRAB_SDQS7 <4,9>
189 190
DDRAB_SDQ58 191 VSS49 VSS50 192 DDRAB_SDQ62
DDRAB_SDQ59 193 DQ58 DQ62 194 DDRAB_SDQ63
R69 10K_0402_5% 195 DQ59 DQ63 196
1 2 197 VSS51 VSS52 198 MEM_MAB_EVENT#
SA0 EVENT# MEM_MAB_EVENT# <4,9>
199 200
+3VS VDDSPD SDA APU_SDATA0 <16,6,9>
201 202
SA1 SCL APU_SCLK0 <16,6,9>
203 204
VTT1 VTT2 +0.75VS
1
1 1
C135 C136 Security Classification Compal Secret Data Compal Electronics, Inc.
2.2U_0603_6.3V6K 0.1U_0402_16V4Z 2012/04/22 2015/04/22 Title
2 2
DIMM_A H:8mm Issued Date Deciphered Date
DDR3 SODIMM-I Socket
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
<Address: 00> AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
VAWGA/GB
Date: Thursday, March 28, 2013 Sheet 8 of 37
A B C D E
A B C D E
15mil JDIMM2
1 2
3 VREF_DQ VSS1 4 DDRAB_SDQ4 DDRAB_SDQ[0..63]
VSS2 DQ4 DDRAB_SDQ[0..63] <4,8>
1000P_0402_50V7K
5 6
0.1U_0402_16V4Z
DDRAB_SDQ0 DDRAB_SDQ5
DDRAB_SDQ1 7 DQ0 DQ5 8 DDRAB_SDM[0..7]
2 1 DQ1 VSS3 DDRAB_SDM[0..7] <4,8>
C177
C143
9 10 DDRAB_SDQS0#
VSS4 DQS#0 DDRAB_SDQS0# <4,8>
DDRAB_SDM0 11 12 DDRAB_SDQS0 DDRAB_SMA[0..15]
DM0 DQS0 DDRAB_SDQS0 <4,8> DDRAB_SMA[0..15] <4,8>
13 14
1 2 DDRAB_SDQ2 15 VSS5 VSS6 16 DDRAB_SDQ6
DDRAB_SDQ3 17 DQ2 DQ6 18 DDRAB_SDQ7
19 DQ3 DQ7 20
1 DDRAB_SDQ8 21 VSS7 VSS8 22 DDRAB_SDQ12 1
DDRAB_SDQ9 23 DQ8 DQ12 24 DDRAB_SDQ13
25 DQ9 DQ13 26
DDRAB_SDQS1# 27 VSS9 VSS10 28 DDRAB_SDM1
<4,8> DDRAB_SDQS1# DQS#1 DM1
DDRAB_SDQS1 29 30 MEM_MAB_RST#
<4,8> DDRAB_SDQS1 DQS1 RESET# MEM_MAB_RST# <4,8>
31 32
DDRAB_SDQ10 33
35
VSS11
DQ10
VSS12
DQ14
34
36
DDRAB_SDQ14 +1.5V/+0.75VS OF DIMM2
DDRAB_SDQ11 DDRAB_SDQ15
37 DQ11 DQ15 38
DDRAB_SDQ16 39 VSS13 VSS14 40 DDRAB_SDQ20 +1.5V +0.75VS +1.5V
DDRAB_SDQ17 41 DQ16 DQ20 42 DDRAB_SDQ21
43 DQ17 DQ21 44
VSS15 VSS16
220U_6.3V_M
DDRAB_SDQS2# 45 46 DDRAB_SDM2 1
<4,8> DDRAB_SDQS2# DQS#2 DM2
C133
C155
C132
C162
C165
C168
C169
C170
C171
C172
C175
C158
DDRAB_SDQS2 47 48
<4,8> DDRAB_SDQS2 DQS2 VSS17
C644
49 50 DDRAB_SDQ22 +
VSS18 DQ22 1 1 1 1 1 1 1 1 1 1 1 1
DDRAB_SDQ18 51 52 DDRAB_SDQ23
DDRAB_SDQ19 53 DQ18 DQ23 54
DQ19 VSS19 2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
55 56 DDRAB_SDQ28
DDRAB_SDQ24 57 VSS20 DQ28 58 DDRAB_SDQ29 2 2 2 2 2 2 2 2 2 2 2 2
DDRAB_SDQ25 59 DQ24 DQ29 60
61 DQ25 VSS21 62 DDRAB_SDQS3#
VSS22 DQS#3 DDRAB_SDQS3# <4,8>
DDRAB_SDM3 63 64 DDRAB_SDQS3
DM3 DQS3 DDRAB_SDQS3 <4,8>
65 66
DDRAB_SDQ26 67 VSS23 VSS24 68 DDRAB_SDQ30
DDRAB_SDQ27 69 DQ26 DQ30 70 DDRAB_SDQ31
71 DQ27 DQ31 72 @ @ @ @
VSS25 VSS26
DDRB_CKE0 73 74 DDRB_CKE1
<4> DDRB_CKE0 CKE0 CKE1 DDRB_CKE1 <4>
75 76
77 VDD1 VDD2 78 DDRAB_SMA15
2 DDRAB_SBS2# 79 NC1 A15 80 DDRAB_SMA14 2
<4,8> DDRAB_SBS2# BA2 A14
81 82
DDRAB_SMA12 83 VDD3 VDD4 84 DDRAB_SMA11
DDRAB_SMA9 85 A12/BC# A11 86 DDRAB_SMA7
87 A9 A7 88
DDRAB_SMA8 89 VDD5 VDD6 90 DDRAB_SMA6
DDRAB_SMA5 91 A8 A6 92 DDRAB_SMA4
93 A5 A4 94
DDRAB_SMA3 95 VDD7 VDD8 96 DDRAB_SMA2
DDRAB_SMA1 97 A3 A2 98 DDRAB_SMA0
99 A1 A0 100
DDRB_CLK0 101 VDD9 VDD10 102 DDRB_CLK1
<4> DDRB_CLK0 CK0 CK1 DDRB_CLK1 <4>
DDRB_CLK0# 103 104 DDRB_CLK1#
<4> DDRB_CLK0# CK0# CK1# DDRB_CLK1# <4>
105 106
DDRAB_SMA10 107 VDD11 VDD12 108 DDRAB_SBS1#
A10/AP BA1 DDRAB_SBS1# <4,8>
DDRAB_SBS0# 109 110 DDRAB_SRAS#
<4,8> DDRAB_SBS0# BA0 RAS# DDRAB_SRAS# <4,8>
111 112
DDRAB_SWE# 113 VDD13 VDD14 114 DDRB_SCS0#
<4,8> DDRAB_SWE# WE# S0# DDRB_SCS0# <4>
DDRAB_SCAS# 115 116 DDRB_ODT0
<4,8> DDRAB_SCAS# CAS# ODT0 DDRB_ODT0 <4>
117 118
DDRAB_SMA13 119 VDD15 VDD16 120 DDRB_ODT1
A13 ODT1 DDRB_ODT1 <4>
DDRB_SCS1# 121 122
<4> DDRB_SCS1# S1# NC2
123 124 15mil
125 VDD17 VDD18 126
NCTEST VREF_CA +VREF_CA
127 128
VSS27 VSS28
1000P_0402_50V7K
129 130
0.1U_0402_16V4Z
DDRAB_SDQ32 DDRAB_SDQ36
DDRAB_SDQ33 131 DQ32 DQ36 132 DDRAB_SDQ37
DQ33 DQ37 1 2
C139
C174
133 134
DDRAB_SDQS4# 135 VSS29 VSS30 136 DDRAB_SDM4
<4,8> DDRAB_SDQS4# DQS#4 DM4
DDRAB_SDQS4 137 138
<4,8> DDRAB_SDQS4 DQS4 VSS31 2 1
139 140 DDRAB_SDQ38
DDRAB_SDQ34 141 VSS32 DQ38 142 DDRAB_SDQ39
3 DDRAB_SDQ35 143 DQ34 DQ39 144 3
145 DQ35 VSS33 146 DDRAB_SDQ44
DDRAB_SDQ40 147 VSS34 DQ44 148 DDRAB_SDQ45
DDRAB_SDQ41 149 DQ40 DQ45 150
151 DQ41 VSS35 152 DDRAB_SDQS5#
VSS36 DQS#5 DDRAB_SDQS5# <4,8>
DDRAB_SDM5 153 154 DDRAB_SDQS5
DM5 DQS5 DDRAB_SDQS5 <4,8>
155 156
DDRAB_SDQ42 157 VSS37 VSS38 158 DDRAB_SDQ46
DDRAB_SDQ43 159 DQ42 DQ46 160 DDRAB_SDQ47
161 DQ43 DQ47 162
DDRAB_SDQ48 163 VSS39 VSS40 164 DDRAB_SDQ52
DDRAB_SDQ49 165 DQ48 DQ52 166 DDRAB_SDQ53
167 DQ49 DQ53 168
DDRAB_SDQS6# 169 VSS41 VSS42 170 DDRAB_SDM6
<4,8> DDRAB_SDQS6# DQS#6 DM6
DDRAB_SDQS6 171 172
<4,8> DDRAB_SDQS6 DQS6 VSS43
173 174 DDRAB_SDQ54
DDRAB_SDQ50 175 VSS44 DQ54 176 DDRAB_SDQ55
DDRAB_SDQ51 177 DQ50 DQ55 178
179 DQ51 VSS45 180 DDRAB_SDQ60
DDRAB_SDQ56 181 VSS46 DQ60 182 DDRAB_SDQ61
DDRAB_SDQ57 183 DQ56 DQ61 184
185 DQ57 VSS47 186 DDRAB_SDQS7#
VSS48 DQS#7 DDRAB_SDQS7# <4,8>
DDRAB_SDM7 187 188 DDRAB_SDQS7
DM7 DQS7 DDRAB_SDQS7 <4,8>
189 190
DDRAB_SDQ58 191 VSS49 VSS50 192 DDRAB_SDQ62
DDRAB_SDQ59 193 DQ58 DQ62 194 DDRAB_SDQ63
R71 10K_0402_5% 195 DQ59 DQ63 196
1 2 197 VSS51 VSS52 198 MEM_MAB_EVENT#
SA0 EVENT# MEM_MAB_EVENT# <4,8>
199 200
+3VS VDDSPD SDA APU_SDATA0 <16,6,8>
1 2 201 202
SA1 SCL APU_SCLK0 <16,6,8>
203 204
VTT1 VTT2 +0.75VS
R72 10K_0402_5%
4 205 206 4
G1 G2
FOX_AS0A626-U4SN-7F
ME@
+5V_Display
U73
+3VS
+5VS 3
W=40mils
OUT
1
1
IN C543
1
2
C544 GND 0.1U_0402_16V7K 2
0.1U_0402_16V7K 2 AP2330W-7_SC59-3
D D
HDMI@
1
HDMI@ C R434
Q87 2 1 2
MMBT3904_NL_SOT23-3 B 150K_0402_5%
2
E
2
<4> HDMI_DET
@ HDMI@ R1470 R1471 HDMI@
1
R894 2.2K_0402_5% 2.2K_0402_5%
HDMI@ 200K_0402_5%
1
<4> DP2_TXP0 C51 HDMI@ 1 2 0.1U_0402_16V7K HDMI_TX2P R898
DP2_TXP0
1
<4> DP2_TXN0 C52 HDMI@ 1 2 0.1U_0402_16V7K HDMI_TX2N 100K_0402_5% JHDMI1
DP2_TXN0 19
HDMI_DET_R
2
DP2_TXP1 C53 HDMI@ 1 2 0.1U_0402_16V7K HDMI_TX1P 18 HP_DET
<4> DP2_TXP1 +5V_Display +5V
<4> DP2_TXN1 C54 HDMI@ 1 2 0.1U_0402_16V7K HDMI_TX1N 17
DP2_TXN1 DDC/CEC_GND
HDMIDAT_R 16
DP2_TXP2 C55 HDMI@ 1 2 0.1U_0402_16V7K HDMI_TX0P HDMICLK_R 15 SDA
<4> DP2_TXP2
DP2_TXN2 C56 HDMI@ 1 2 0.1U_0402_16V7K HDMI_TX0N
Close to HDMI connector 14 SCL
<4> DP2_TXN2 Reserved
13
DP2_TXP3 C57 HDMI@ 1 2 0.1U_0402_16V7K HDMI_CLKP HDMI_CLK-_CONN 12 CEC 20
<4> DP2_TXP3 CK- G1
<4> DP2_TXN3 C5888 HDMI@ 1 2 0.1U_0402_16V7K HDMI_CLKN D1 ESDU@ 11 21
DP2_TXN3 1 9 10 CK_shield G2 22
HDMI_TX2+_CONN HDMI_TX2+_CONN HDMI_CLK+_CONN
HDMI_TX0-_CONN 9 CK+ G3 23
HDMI_TX2-_CONN 2 8 HDMI_TX2-_CONN 8 D0- G4
C D0_shield C
HDMI_TX0+_CONN 7
WCM-2012HS-900T HDMI_TX1+_CONN 4 7 HDMI_TX1+_CONN HDMI_TX1-_CONN 6 D0+
HDMI_CLKP 4 3 HDMI_CLK+_CONN 5 D1-
4 3 HDMI_TX1-_CONN 5 6 HDMI_TX1-_CONN HDMI_TX1+_CONN 4 D1_shield
HDMI_TX2-_CONN 3 D1+
HDMI_CLKN 1 2 HDMI_CLK-_CONN 2 D2-
1 2 HDMI_TX2+_CONN 1 D2_shield
L30 EMIP@ 3 D2+
SUYIN_100042GR019M23DZL
WCM-2012HS-900T TVWDF1004AD0_DFN9 ME@
HDMI_TX0P 4 3 HDMI_TX0+_CONN
4 3
HDMI_TX0N 1 2 HDMI_TX0-_CONN
1 2 D2 ESDU@
L31 EMIP@ HDMI_TX0+_CONN 1 9 HDMI_TX0+_CONN
1
D
in Page 22 for 8P4R L30ESDL5V0C3-2_SOT23-3
ESDU@ +3VS 2 Q76
Q75A G 2N7002K_SOT23-3
HDMI@ S HDMI@
3
2
DMN66D0LDW-7_SOT363-6
A A
HDMI_DATA 4 3 HDMIDAT_R
<12,4> HDMI_DATA
Q75B
HDMI@ Security Classification Compal Secret Data Compal Electronics, Inc.
DMN66D0LDW-7_SOT363-6 2012/04/22 2015/04/22 Title
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDMI CONN
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
VAWGA/GB
Date: Monday, April 01, 2013 Sheet 10 of 37
5 4 3 2 1
5 4 3 2 1
W=60mils @
2 1
+3VS +LCDVDD_CONN R694 0_0402_5%
W=60mils
U72
D 1 +LCDVDD_CONN D
5 VOUT
4.7U_0603_6.3V6K
CMOS@ +3VS_CMOS
VIN Q70
PMV65XP_SOT23-3
C522
2 1
4 GND
SS (40 MIL) (40 MIL)
3 1
D
10U
1 3 1
EN 2 @
1
C16 APL3512ABI-TRG_SOT23-5 CMOS@ C1153
G
2
1500P_0402_50V7K C1152 R02 10U_0603_6.3V6M
2 R1458 CMOS@ 0.1U_0402_16V4Z 2
150K_0402_5% 2
<18> CMOS_ON#
<4> APU_ENVDD 1
C1155 CMOS@
2
0.1U_0402_16V4Z
R652 2
100K_0402_5%
1
C C
1 @ 2
1 1 R813 0_0805_5%
C1158
680P_0402_50V7K C1159
EMIU@ 4.7U_0805_25V6-K
2 2
JLVDS1
1
2 1 31
3 2 G1 32
4 3 G2 33
Add for protect BKOFF# damage 5 4 G3 34
Use APU control for WIN8 R1466 1 2 0_0402_5% 6 5 G4
BKOFF# 7 6
R1463 1 @ 2 0_0402_5% INVT_PWM 8 7
<4> APU_INVT_PWM 8
9
10 9
B <4> LVDS_ACLK 10 B
11
<4> LVDS_ACLK# 11
12
13 12
<4> LVDS_A2 13
1
14
<4> LVDS_A2# 14
15
<4> LVDS_A1 15
BKOFF# R826 16
<18> BKOFF# <4> LVDS_A1# 16
100K_0402_5% 17
<4> LVDS_A0 17
18
<4> LVDS_A0#
2
18
1
EDID_DATA 19
<4> 19
EDID_CLK 20
<4> 20
R899 21
+3VS 21
10K_0402_5% 1 22
+LCDVDD_CONN 22
(60 MIL) 23
2
680P_0402_50V7K 24 23
+3VS 24
C1160 EMIU@ 25
2 26 25
+3VS_CMOS 26
USB20_P3_R 27
USB20_N3_R 28 27
29 28
30 29
CMOS 30
0_0402_5%
USB20_P3 USB20_P3 2 @ 1 R696 USB20_P3_R
<5>
USB20_N3 USB20_N3 2 @ 1 R695 USB20_N3_R ACES_88341-3001 ME@
<5>
0_0402_5%
L58 EMIU@
USB20_P3 1 2 USB20_P3_R
1 2
A USB20_N3 4 3 USB20_N3_R A
4 3
WCM-2012-900T_4P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LVDS CONN / Camera
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
VAWGA/GB
Date: Thursday, March 28, 2013 Sheet 11 of 37
5 4 3 2 1
A B C D E
FCM1608CF-121T03 0603
<4> DAC_RED EMIP@ 1 2 RED
DAC_RED
L36
FCM1608CF-121T03 0603
<4> DAC_GRN EMIP@ 1 2 GREEN
DAC_GRN
L37
FCM1608CF-121T03 0603
1 DAC_BLU EMIP@ 1 2 BLUE 1
<4> DAC_BLU
L38
1
RP22
8 1 DAC_BLU C1107
7 2 DAC_GRN 6P_0402_50V8
2
6 3 DAC_RED
5 4 C1094 C1103 C1104 C1105 C1106
6P_0402_50V8 6P_0402_50V8 6P_0402_50V8 6P_0402_50V8 6P_0402_50V8
150_0804_8P4R_1%
+3VS
2 2
RP1
HDMI_CLK 1 8 +5V_Display
<10,4> HDMI_CLK
HDMI_DATA 2 7
<10,4> HDMI_DATA
CRT_DDC_DAT_CONN 3 6
CRT_DDC_CLK_CONN 4 5
1
4.7K_8P4R_5%
ESDP@ C600
+5VS 1000P_0402_50V7K
2
+5V_Display
1
C529
U10
0.1U_0402_16V7K
2 1 8 1 2
VCC_SYNC BYP C23 0.22U_0402_10V6K JCRT1
6
2 3 RED 11
+3VS VCC_VIDEO VIDEO1 T49
3 RED 1 3
7
7 4 GREEN CRT_DDC_DAT_CONN 12
VCC_DDC VIDEO2 GREEN 2
1 8 16
G
CRT_DDC_DATA 10 5 BLUE JVGA_HS 13 17
<4> DDC_IN1 VIDEO3 G
C537 BLUE 3
0.1U_0402_16V7K 9
2 11 9 CRT_DDC_DAT_CONN JVGA_VS 14
<4> CRT_DDC_CLK DDC_IN2 DDC_OUT1 4
T58
10
<4> 13 12 CRT_DDC_CLK_CONN CRT_DDC_CLK_CONN 15
CRT_VSYNC SYNC_IN1 DDC_OUT2 5
10P_0402_50V8J
10P_0402_50V8J
TPD7S019-15DBQR_SSOP16 R106 R107 for EMI @
1
@
1
C411
C412
+3VS
2 2
4 4
R693 1 2 4.7K_0402_5% CRT_DDC_DATA
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CRT CONN
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
VAWGA/GB
Date: Thursday, March 28, 2013 Sheet 12 of 37
A B C D E
A B C D E F G H
1 1
8
1 2 +3V_HDD 9 3.3V
+3VS 10 3.3V
R551 0_0805_5%
@ 11 3.3V
12 GND
13 GND
14 GND
1 2 +5V_HDD 15 5V
+5VS 16 5V
R550 0_0805_5%
@ 17 5V
18 GND
19 Reserved
+5V_HDD 10U 20 GND 23
R02 21 12V GND 24
22 12V GND
12V
1 1 1
SUYIN_127043FB022G278ZR
EMIP@ C598 C599 C602
1000P_0402_50V7K 0.1U_0402_16V4Z 10U_0603_6.3V6M
2 2 2
2 2
FOR 15"
SATA ODD FFC Conn.
JODD2
CAP in Small Board 1
SATA_ATX_DRX_P1 2 1
<5> SATA_ATX_DRX_P1 2
SATA_ATX_DRX_N1 3
<5> SATA_ATX_DRX_N1 3
4
SATA_DTX_C_ARX_N1 5 4
<5> SATA_DTX_C_ARX_N1 5
SATA_DTX_C_ARX_P1 6
<5> SATA_DTX_C_ARX_P1 6
1 2 ODD_DETECT# 7
R710 ZODD@ 0_0402_5% +5V_ODD 8 7
9 8
ODD_DA# 10 9
<18> ODD_DA# 10
R02 11
GND 12
GND
HB_A051020-SAHR21
ME@
Co-lay
3
ODD Power Control FOR 14" 3
1
J@ J6
2
Need OPEN SATA ODD Conn.
1 2 JODD1
+5VALW +5VS
JUMP_43X79 +5V_ODD 1
Q90 SATA_ATX_DRX_P1 14@ C619 1 2 0.01U_0402_25V7K SATA_ATX_C_DRX_P1_14 2 GND
SATA_ATX_DRX_N1 14@ C616 1 2 0.01U_0402_25V7K SATA_ATX_C_DRX_N1_14 3 A+
3 1 4 A-
S
+5V_ODD 9 DP
1 2 1 2 C641 10 +5V
10U_0603_6.3V6M ODD_DA# 11 +5V
MD
1
200K_0402_5% 2 R02 12 15
ZODD@ 0.1U_0402_16V4Z 13 GND GND 14
OUT
Q91
DTC124EKAT146_SC59-3
3
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDD/ODD/FAN/SCREW
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
VAWGA/GB
Date: Thursday, March 28, 2013 Sheet 13 of 37
A B C D E F G H
A B C D E
+3VALW +3V_LAN
+LX
Layout Notice : Place as close Close together
chip as possible. J10
J@ LL2 LL3 SWR@
1 2 LL1 SWR@
1 2 +LX_R 1 2 +LX FBMA-L11160808601LMA10T_2P FBMA-L11160808601LMA10T_2P
1 2 1 2
1000P_0402_50V7K
+1.1_AVDDL_L +1.1_AVDDL +LX_R
10U_0603_6.3V6M
4.7UH_SIA4012-4R7M_20%
0.1U_0402_16V7K
JUMP_43X79
CL1
CL2
0.1U_0402_16V7K
1U_0402_6.3V4Z
4.7U_0603_6.3V6K
1 1
CL4
CL5
CL6
@ Note: Place Close to LAN chip 1 1 1
3
D
1
1 2 2 LL1 DCR< 0.15 ohm 1
CL3
Rate current > 1A
RL3 2 2 2
QL1
G
2
LAN_PWR_ON# 2 @ 1 PMV65XP_SOT23-3~D
<18> LAN_PWR_ON#
2 10U
@
10K_0402_5% CL7 SWR@SWR@SWR@
1
0.1U_0402_16V7K Place close to Pin34
Close to
Pin40
LAN Chip Vendor recommand reserve the
PU resistor close LAN chip
AMD recommand reserve Diode UL1 8172@
RB751V-40TE17_SOD323-2
0.1U_0402_16V7K
1U_0402_6.3V4Z
CL10
CL8
1 @ 2 1 1
R577 0_0402_5%
UL1
2
Place Close to Chip 2 2 2
CL9 1 2 0.1U_0402_16V7K PCIE_DTX_ARX_N1 29 38 RL12 10K_0402_5%
<5> PCIE_DTX_C_ARX_N1 TX_N LED_0 39 2 LDO@ 1 mount RL12 if use LDO modue
CL11 1 2 0.1U_0402_16V7K PCIE_DTX_ARX_P1 30
Atheros LED_1 23
<5> PCIE_DTX_C_ARX_P1 TX_P LED_2
AR8151/AR8161 Place close to Pin16
36
<5> PCIE_ATX_C_DRX_N1 RX_N 12 MDI0-
TRXN0 MDI0- <15>
35 11 MDI0+
<5> PCIE_ATX_C_DRX_P1 RX_P TRXP0 MDI0+ <15>
15 MDI1-
TRXN1 MDI1- <15>
32 14 MDI1+
<5> CLK_PCIE_LAN# REFCLK_N TRXP1 MDI1+ <15>
33 18
<5> CLK_PCIE_LAN REFCLK_P TRXN2 17
LAN_PERST# 2 TRXP2 21
PERST# TRXN3 20
3 TRXP3 Place Close to PIN1
<18> LAN_WAKE# W AKE#
25 10 LAN_RBIAS 1 2 +3V_LAN
26 SMCLK RBIAS RL8 2.37K_0402_1%
SMDATA
Place Close to PIN1
28 1 +3V_LAN
NC VDD33
CL12
CL13
CL14
CL15
CL16
1000P_0402_50V7K
27
10U_0603_6.3V6M
10U_0603_6.3V6M
0.1U_0402_16V7K
1U_0402_6.3V4Z
TESTMODE 1 1 1 1
2
40 +LX
LX +LX
LAN_XTALO 7
1
LAN_XTALI 8 XTLO RL10 30K_0402_5% 2 2 2 2
XTLI 5 +1.7_VDDCT 1 2
VDDCT/ISOLAN +3V_LAN
4
<6> LAN_CLKREQ# CLKREQ# 24
DVDDL/PPS 37 +LX_R 10U
3
+1.1_AVDDL 13 DVDDL_REG/DVDDL 3
+1.1_AVDDL 19 AVDDL +2.7_AVDDH
+1.1_AVDDL 31 AVDDL 16 +3V_LAN
+1.1_AVDDL_L 34 AVDDL AVDDH/AVDD33 22 +2.7_AVDDH
+1.1_AVDDL 6 AVDDL AVDDH 9 +2.7_AVDDH
AVDDL_REG/AVDDL AVDDH_REG
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
CL17
CL18
CL19
CL20
CL21
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
1 1 1 1 1
CL22
CL23
CL24
CL25
CL26
41 1 1 1 1 1
GND
AR8162-AL3A-R_QFN40_5X5
2 2 2 2 2
Near 8162@
2 2 2 2 2
Pin6
Near
Near Near Near Pin9 Near Near
Pin13 Pin19 Pin31 Pin22 Pin37
LAN_XTALI
YL1 LAN_XTALO
4 3
NC OSC
4 1 2 4
OSC NC
1 25MHZ_20PF_FSX3M-25.M20FDO 1
CL28 CL29
15P_0402_50V8J 15P_0402_50V8J
2 2
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2012/04/22 Deciphered Date 2015/04/22 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LAN-AR8151
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
VAWGA/GB
Date: Thursday, March 28, 2013 Sheet 14 of 37
A B C D E
A B C D E
ESDU@
DL1
Place Close to TL1 AZC099-04S.R7G_SOT23-6 Reserve gas tube for EMI go rural solution
MDI1+ 1 4 MDI0+
I/O1 I/O3
DL1 2
GND VDD
5
1 1'S PN:SC300001G00 1
RL14 CL30
1 2 1 2
CHASSIS1_GND
75_0805_5% 10P_0603_50V
EMIP@ EMIP@
2 1
TL1
DLL1
<14> MDI0+ 1 16 MDO0+ BS4200N-C-LV_SMB-F2
MDI0+ 2 TD+ TX+ 15
<14> MDI0- MDO0- EMIGASP@
MDI0- TD- TX-
3 14 MCT
4 CT CT 13
5 NC NC 12
NC NC Place Close to TL1
1 6 11 MCT
MDI1+ 7 CT CT 10 MDO1+
<14> MDI1+ RD+ RX+
EMIP@ CL31 <14> MDI1- 8 9 MDO1-
MDI1- RD- RX-
0.01U_0402_25V7K
2
2
MHPC_NS681612A 2
EMIP@
CL63 1 2 0.1U_0603_50V7K
CL61 1 2 0.1U_0603_50V7K
EMIP@
CHASSIS1_GND
JLAN1
MDO0+ 1
PR1+
MDO0- 2
PR1-
MDO1+ 3
PR2+
MCT 4
PR3+
MCT 5
PR3-
3 MDO1- 6 3
PR2-
MCT 7 9
PR4+ GND 10
MCT 8 GND
PR4- 2 2
SANTA_130456-121 ESDP@ C173 C178 ESDP@
0.1U_0402_16V7K 0.1U_0402_16V7K
CHASSIS1_GND 1 1
ME@
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LAN_Transformer
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
VAWGA/GB
Date: Thursday, March 28, 2013 Sheet 15 of 37
A B C D E
A B C D E
+3VS +3VS_TS
1 TS@ 2 JTS1
R5583 0_0402_5% 8
7 GND
6 GND
+3VS_TS 6
D
3 1 5
4 5
<5> USB20_N1 4
3
1 <5> USB20_P1 3 1
Q156 2
G
2
@ PMV65XP_SOT23-3~D EC_TS_ON# R726 1 TS@ 2 0_0402_5% TS_RST# 1 2
R5581 1 2 100K_0402_5% 1
0.1U_0402_16V4Z
<18> @
EC_TS_ON#
C1322
1 2 ACES_50208-00601-P01
ME@
C1331
0.1U_0402_16V4Z TS@
2 1
@
2 2
+1.5VS
+3VS_WLAN
Mini-Express Card(WLAN/WiMAX)
JWLN1
<6> R1500 1 @ 2 0_0402_5% APU_PCIE_WLAN_WAKE# 1 2
APU_PCIE_WAKE# 1 2
3 4
5 3 4 6
<6> BT_DISABLE# 5 6
WLAN_CLKREQ# 7 8
<6> WLAN_CLKREQ# 7 8
9 10
11 9 10 12
<5> CLK_PCIE_WLAN# 11 12
<5> 13 14
CLK_PCIE_WLAN 15 13 14 16
17 15 16 18
19 17 18 20
19 20 WL_OFF# <6> +3VS +3VS_WLAN
21 22 APU_PCIE_RST#
21 22 APU_PCIE_RST# <6>
<5> 23 24 +3VS_WLAN
PCIE_DTX_C_ARX_N2 25 23 24 26
<5> PCIE_DTX_C_ARX_P2 25 26 J7
3 27 28 J@ 3
29 27 28 30 APU_SCLK0_W R1496 1 2 @ 0_0402_5% 1 2
29 30 APU_SCLK0 <6,8,9> 1 2
31 32 APU_SDATA0_W R1497 1 2 @ 0_0402_5%
<5> PCIE_ATX_C_DRX_N2 31 32 APU_SDATA0 <6,8,9>
<5> 33 34
PCIE_ATX_C_DRX_P2 35 33 34 36 JUMP_43X79
USB20_N5 <5>
+3VS_WLAN 37 35 36 38 USB20_N5
USB20_P5 <5>
37 38 USB20_P5
39 40
41 39 40 42
43 41 42 44
100_0402_1% 45 43 44 46
R1498 47 45 46 48
EC_TX 1 2 49 47 48 50
<18> EC_TX 49 50
EC_RX 1 2 51 52
<18> EC_RX 51 52
R1499
100_0402_1% 53 54
GND1 GND2
BELLW_80003-8041
ME@
<6> 1 2 BT_OFF#_R
BT_OFF#
R1520 1K_0402_5%
For EC to detect
4 4
debug card insert.
2
R1501
100K_0402_5%
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2012/04/22 Deciphered Date 2015/04/22 Title
1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MINI1 CARD (WLAN) / MINI2 CARD (Option)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
VAWGA/GB
Date: Thursday, March 28, 2013 Sheet 16 of 37
A B C D E
5 4 3 2 1
1 R567@ 2 U2DN0_L
Right Ext.USB Conn. <5> USB20_N6
0_0402_5% EMIU@
1 R566 2
<5> 1 R569@ 2U2DP0_L 0_0402_5%
+5VALW USB20_P6
0_0402_5%
+USB_VCCB L51
1 R574 2 4 EMIP@ 3 U2DN0
<5> USB30_N8 4 3
0_0402_5%
R02
U36 RIGHT USB PORT X1 1 R575 2 1 2 U2DP0
D <5> USB30_P8 1 2 D
1 8 0_0402_5%
C713 0.1U_0402_16V4Z 2 GND VOUT 7 WCM-2012-900T_4P
2 1 3 VIN VOUT 6 1 R562 2
4 VIN VOUT 5
<18> USB_ON# EN FLG USB_OC0# <6> Colay with USB2.0 only 0_0402_5%
EMIU@
USB2R@ G547I2P81U_MSOP8
2
6.3Φ * 5.9 2 2 ACES_88058-060N U3RXDP0 6 11
EMIUSB2RP@ SSRX+ GND
SF000001500 USB2R@ C858 4 12
L66 WCM-2012-900T_4P 0.1U_0402_16V7K WCM-2012HS-900T U3RXDN0 5 GND GND 13
USB20_N0 1 2 USB20_N0_C 1 2 U3TXDN0_L 1 2 U3TXDN0 SSRX- GND
1 2 <5> USB30_MTX_C_DRX_N0 1 2
C
TAITW_PUBAU1-09FNLSCNN4H0 C
ME@
USB20_P0 4 3 USB20_P0_C <5> USB30_MTX_C_DRX_P0 1 2 U3TXDP0_L 4 3 U3TXDP0
4 3 4 3
D25 ESDU@ C859 L49 EMIP@
1
PJDLC05_SOT23-3 0.1U_0402_16V7K
1 R570@ 2 U2DN1_L
<5> USB20_N7
0_0402_5% EMIU@
1 R728 2
1 R571@ 2U2DP1_L 0_0402_5%
<5> USB20_P7
0_0402_5%
L55
1 R572 2 4 EMIP@ 3 U2DN1
<5> USB30_N9 4 3
0_0402_5%
0.1U_0402_16V4Z
C1255
0.1U_0402_16V4Z
C1256
0.1U_0402_16V4Z
C1257
0.1U_0402_16V4Z
C1258
1000P_0402_50V7K
C1261
1000P_0402_50V7K
C1259
1 2
+3V_EC +EC_VCCA
R1266 33K +/- 5%
1 1
USB_ON# 1 2 3 0.712 V 0.819 V 0.875 V EVT
C1262 C1260 2 2 @2 @2 2 2
D D
0.1U_0402_16V4Z 1000P_0402_50V7K 10K_0402_5% +5VS
111
125
1 2 2 ECAGND 2 +3VALW
22
33
96
67
9
L43 U44
FBM-11-160808-601-T_0603
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD0
EC_VDD/VCC
EC_VDD/AVCC
1
R1562 TP_CLK R1568 1 2 4.7K_0402_5%
@ 100K_0402_5%
<6> GATEA20 1 21 ADP_65 <24> TP_DATA R1570 1 2 4.7K_0402_5%
GATEA20 2 GATEA20/GPIO00 GPIO0F 23 ADP_65
<6> KBRST# BEEP# <21>
KBRST# BEEP#
2
SERIRQ 3 KBRST#/GPIO01 BEEP#/GPIO10 26 EC_FAN_PWM
<5> SERIRQ SERIRQ GPIO12 EC_FAN_PWM <19> +3VS
LPC_FRAME# 4 27 ACOFF
<5,6> LPC_FRAME# LPC_FRAME# ACOFF/GPIO13 ACOFF <25>
LPC_AD3 5 MP BRDID
<5> LPC_AD3 LPC_AD3
<5> LPC_AD2 7 PWM Output
LPC_AD2 8 LPC_AD2 63
EMIU@ R1560 <5> LPC_AD1 BATT_TEMP <24> EC_FAN_PWM R1561 1 @ 2 10K_0402_5%
LPC_AD1 LPC_AD1 BATT_TEMP/AD0/GPIO38 BATT_TEMP
C1263 2 1 22P_0402_50V8J 2 EMIU@ 1 <5> LPC_AD0 10 LPC & MISC 64
LPC_AD0 LPC_AD0 AD1/GPIO39
10_0402_5% 65 ADP_I <24,25> EC_TACH R1581 1 2 10K_0402_5%
ADP_I/AD2/GPIO3A ADP_I
1
<5,6> LPC_CLK0_EC 12 AD Input 66 ADP_ID <23>
LPC_CLK0_EC CLK_PCI_EC AD3/GPIO3B ADP_ID
<6> LPC_RST# 13 75 BRDID R1564 EC_SMB_DA2 R1579 1 @ 2 2.2K_0402_5%
2 1 LPC_RST# EC_RST# 37 PCIRST#/GPIO05 AD4/GPIO42 76 ENBKL
+3V_EC EC_RST# IMON/AD5/GPIO43 ENBKL <4> 0_0402_5%
R818 47K_0402_5% EC_SCI# 20 EC_SMB_CK2 R1578 1 @ 2 2.2K_0402_5%
<6> EC_SCI# EC_SCII#/GPIO0E
2 1 <24> BATT_LEN# 38
2
C819 0.1U_0402_16V4Z BATT_LEN# GPIO1D +3V_EC
68 ADP_90 <24>
DAC_BRIG/GPIO3C ADP_90
DA Output 70
KSI0 55 EN_DFAN1/GPIO3D 71 EC_SMB_DA1 R1577 1 2 2.2K_0402_5%
KSI1 56 KSI0/GPIO30 IREF/GPIO3E 72
KSI2 57 KSI1/GPIO31 CHGVADJ/GPIO3F EC_SMB_CK1 R1574 1 2 2.2K_0402_5%
KSI3 58 KSI2/GPIO32 83 EC_MUTE#
KSI3/GPIO33 EC_MUTE#/GPIO4A EC_MUTE# <21>
C KSI4 59 84 USB_ON# C
KSI4/GPIO34 USB_EN#/GPIO4B USB_ON# <17>
KSI5 60 85 ADP_135 +3VALW
KSI5/GPIO35 CAP_INT#/GPIO4C ADP_135 <24>
KSO[0..17] KSI6 61 PS2 Interface 86
KSO[0..17] <20> KSI6/GPIO36 EAPD/GPIO4D
KSI7 62 87 TP_CLK
KSI7/GPIO37 TP_CLK/GPIO4E TP_CLK <20>
KSI[0..7] KSO0 39 88 TP_DATA
KSI[0..7] <20> KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA <20>
KSO1 40 EC_MUTE# R1565 1 2 10K_0402_5%
KSO2 41 KSO1/GPIO21
KSO3 42 KSO2/GPIO22 97 EC_TS_ON# LAN_WAKE# R1566 1 2 10K_0402_5%
KSO3/GPIO23 CPU1.5V_S3_GATE/GPXIOA00 EC_TS_ON# <16>
KSO4 43 98
KSO5 44 KSO4/GPIO24 WOL_EN/GPXIOA01 99 095VS_PWR_EN
KSO6 45 KSO5/GPIO25 Int. K/B ME_EN/GPXIOA02 109 NTC_V
095VS_PWR_EN <22>
KSO6/GPIO26 Matrix VCIN0_PH/GPXIOD00 NTC_V <24>
KSO7 46 SPI Device Interface LID_SW# R344 1 2 47K_0402_5%
KSO8 47 KSO7/GPIO27
KSO9 48 KSO8/GPIO28 119 EC_SPI_AISO
KSO9/GPIO29 SPIDI/GPIO5B EC_SPI_AISO <5>
KSO10 49 120 EC_SPI_AOSI <5>
KSO11 50 KSO10/GPIO2A SPIDO/GPIO5C 126 EC_SPI_CLK EC_SPI_AOSI
KSO11/GPIO2B SPI Flash ROM SPICLK/GPIO58 EC_SPI_CLK <5>
KSO12 51 128 EC_SPI_CS1#
KSO12/GPIO2C SPICS#/GPIO5A EC_SPI_CS1# <5>
KSO13 52
KSO14 53 KSO13/GPIO2D
KSO14/GPIO2E
For share ROM need
KSO15 54 73 APU_IMON APU_IMON <29>
KSO16 81 KSO15/GPIO2F ENBKL/AD6/GPIO40 74 VGATE SYS_PWRGD_EC 1 2
KSO16/GPIO48 PECI_KB930/AD7/GPIO41 VGATE <29>
KSO17 82 89 LAN_PWR_ON# <14> R208 100K_0402_5%
KSO17/GPIO49 FSTCHG/GPIO50 LAN_PWR_ON#
90 BATT_CHG_LED# <20>
BATT_CHG_LED#/GPIO52 91 BATT_CHG_LED#
CAPS_LED# <20>
CAPS_LED#/GPIO53 CAPS_LED#
<24,25> EC_SMB_CK1 77 GPIO 92 PWR_LED# PWR_LED# <20> 095_18ALW_PWR_EN 1 2
EC_SMB_CK1 EC_SMB_CK1/GPIO44 PWR_LED#/GPIO54
<24,25> EC_SMB_DA1 78 93 BATT_LOW_LED# <20> R1575 100K_0402_5%
EC_SMB_DA1 EC_SMB_DA1/GPIO45 BATT_LOW_LED#/GPIO55 BATT_LOW_LED# +3VLP
<19,4> EC_SMB_CK2 79 SM Bus 95 SYSON <22,27>
EC_SMB_CK2 EC_SMB_CK2/GPIO46 SYSON/GPIO56 SYSON
EC_SMB_DA2 80 121 VR_ON @ EC_RSMRST# 1 2
Pull high in APU side <19,4> EC_SMB_DA2 EC_SMB_DA2/GPIO47 VR_ON/GPIO57 VR_ON <29>
1
127 095_18ALW_PWR_EN <27,28> R1576 100K_0402_5%
B PM_SLP_S4#/GPIO59 095_18ALW_PWR_EN B
R343
47K_0402_5%
SLP_S3# 6 100 EC_RSMRST#
<6> SLP_S3# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 EC_RSMRST# <6>
SLP_S5# 14 101 EC_LID_OUT# BATT_TEMP 1 2
<6> SLP_S5# <6>
2
EC_SMI# 15 PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXIOA04 102 Turbo_V EC_LID_OUT# C1265 100P_0402_50V8J
<6> EC_SMI# EC_SMI#/GPIO08 PROCHOT_IN/GPXIOA05 Turbo_V <24>
<11> CMOS_ON# 16 103 <24> ACIN 1 2
CMOS_ON# 17 GPIO0A H_PROCHOT#_EC/GPXIOA06 104 PROCHOT
<26> C1266 100P_0402_50V8J
18 GPIO0B VCOUT0_PH/GPXIOA07 105 BKOFF# MAINPWON
Pull high in ODD side<13> ODD_DA#
ODD_DA# 19 GPIO0C
GPIO0D GPIO
GPO BKOFF#/GPXIOA08
PBTN_OUT#/GPXIOA09
106 PBTN_OUT# BKOFF#
PBTN_OUT#
<11>
<6> ACIN 1 @ 2
<23> ADP_ID_CLOSE 25 107 R1573 4.7K_0402_5%
ADP_ID_CLOSE EC_INVT_PWM/GPIO11 PCH_APWROK/GPXIOA10
<19> EC_TACH 28 108
EC_TACH LAN_WAKE# 29 FAN_SPEED1/GPIO14 SA_PGOOD/GPXIOA11
<14> LAN_WAKE# EC_PME#/GPIO15
<16> EC_TX 30
EC_TX EC_TX/GPIO16
<16> EC_RX 31 110 ACIN <25>
EC_RX 32 EC_RX/GPIO17 AC_IN/GPXIOD01 112 ACIN
<6> SYS_PWRGD_EC EC_ON <26> 095VS_PWR_EN 1 2
SYS_PWRGD_EC PCH_PWROK/GPIO18 EC_ON/GPXIOD02 EC_ON
<20> NOVO# NOVO# 34 114 ON/OFF <20> R207 100K_0402_5%
SUSP_LED#/GPIO19 ON/OFF/GPXIOD03 ON/OFF
36 GPI 115 LID_SW# <20> ENBKL 1 2
NUM_LED#/GPIO1A LID_SW#/GPXIOD04 116 LID_SW#
SUSP# 1 <22,27> R206 100K_0402_5%
SUSP#/GPXIOD05 117 SUSP#
GPXIOD06 118 ESDP@ C601
PECI_KB9012/GPXIOD07
AGND/AGND
XCLKO/GPIO5E V18R
1 H_PROCHOT# <24,29,4,6>
1
GND0
C823
1
1
R1587 @ C1271 4.7U_0603_6.3V6K D
100K_0402_5% 20P_0402_50V8 KB9012QF-A3_LQFP128_14X14 2 PROCHOT 2 1
2
11
24
35
94
113
69
Q82 S C1269
3
A A
2N7002H_SOT23-3 47P_0402_50V8J
2
ECAGND
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
EC ENE KB930/9012
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
VAWGA/GB
Date: Thursday, March 28, 2013 Sheet 18 of 37
5 4 3 2 1
5 4 3 2 1
+3VS
SMSC thermal sensor
C329
2 placed near APU
0.1U_0402_16V4Z
@
D 1 D
U9 THERMAL@
1 8 EC_SMB_CK2
VDD SCLK EC_SMB_CK2 <18,4>
1
REMOTE1+ 2 7 EC_SMB_DA2
D+ SDATA EC_SMB_DA2 <18,4>
C587 @
2200P_0402_50V7K REMOTE1- 3 6
2 D- ALERT#
+3VS 1 R335 2 4 5
THERM# GND
4.7K_0402_5%
@ EMC1402-2-ACZL-TR MSOP 8P
Address is 1001100xb
REMOTE1,2+/-:
Trace width/space:10/10 mil
Trace length:<8"
C C
CPU HDD
H1 H2 H3
HOLEA HOLEA HOLEA H18
HOLEA FD1 FD2 FD3 FD4
1
H_3P8 H_3P8 H_3P8
H_2P8
A C
B FAN1 Conn B
1
3 2
<18> EC_FAN_PWM
1
4 3
5 4
2 G5 H_2P8 H_2P8 H_2P8 H_2P8 H_2P8 H_3P0N
6 H_2P5X3P5N
C591 G6
ACES_85205-04001
橢橢橢 橢橢
1
10U_0603_6.3V6M
ME@ D E F
10U
2P8 * 9 pcd M/B M/B
A A
2
R643
@ 100K_0402_5% KSI[0..7] JKB1 ME@
KSI[0..7] <18>
KSI1 1 JKB2 ME@
KSO[0..17] KSI7 2 1 26
KSO[0..17] <18>
1
@ KSI6 3 2 25 GND2
SMT1-05_4P SWP1 @ 2 R630 1 KSO9 4 3 GND1
1 3 0_0402_5% KSI4 5 4 KSI1 24
KSI5 6 5 KSI7 23 24
2 4 +3VALW KSO0 7 6 KSI6 22 23
KSI2 8 7 KSO9 21 22
6 KSI3 9 8 KSI4 20 21
5 9 20
2
+3VLP KSO5 10 KSI5 19
R642 KSO1 11 10 KSO0 18 19
100K_0402_5% KSI0 12 11 KSI2 17 18
12 17
2
SMT1-05_4P SWP0 @ KSO2 13 KSI3 16
1 3 KSO4 14 13 KSO5 15 16
1
R701 D26 KSO7 15 14 KSO1 14 15
2 4 100K_0402_5% NOVO# 2 KSO8 16 15 KSI0 13 14
<18> NOVO# 16 13
1 NOVO_BTN# KSO6 17 KSO2 12
1
ON/OFF 3 KSO3 18 17 KSO4 11 12
6
5
KSO12 19 18 KSO7 10 11
KSO13 20 19 KSO8 9 10
DAN202UT106_SC70-3 KSO14 21 20 KSO6 8 9
ON/OFF KSO11 22 21 KSO3 7 8
ON/OFF <18> 22 7
KSO10 23 KSO12 6
KSO15 24 23 KSO13 5 6
KSO16 25 24 KSO14 4 5
KSO17 26 25 KSO11 3 4
27 26 KSO10 2 3
28 27 KSO15 1 2
29 28 31 1
30 29 GND 32 ACES_88514-2401
30 GND
ACES_88514-3001
L67 WCM-2012-900T_4P
USB20_N4 1 2 USB20_N4_R
1 2
USB20_P4 4 3 USB20_P4_R
4 EMICP@ 3 +3VS
JCR1
1
USB20_N4 R692 2 EMICU@1
EMICU@ 0_0402_5% USB20_N4_R 2 1
<5> USB20_N4 2
<5>
USB20_P4 R687 2 EMICU@
EMICU@1 0_0402_5% USB20_P4_R 3
USB20_P4 4 3
4
5
GND 6
GND
+5VS
CVILU_CF06041H0RB-NH
ME@
JTP1 ME@
C696 +3VALW
8
0.1U_0402_16V4Z 7 GND
GND
2
6
TP_CLK 5 6 ESDP@ C185
<18> TP_CLK 5
TP_DATA 4 0.1U_0402_16V7K
<18> TP_DATA 4 1
TP_3 3
TP_2 2 3
TP_1 1 2 JPWRB1
1 1
ACES_88058-060N 2 1
<18> LID_SW# 2
NOVO_BTN# 3
ON/OFF 4 3
15@ 5 4
2 R628 1 TP_3 6 5
LED1 14@
6
2
0_0402_5%
PWR_LED# 1 2 2 R623 1 ESDP@ 7
<18> PWR_LED# +5VALW GND
2 R629 1 14@ TP_1 649_0402_1% 8
0_0402_5% D24 GND
14@
19-213A-T1D-CP2Q2HY-3T_WHITE ACES_88058-060N
PJSOT24C 3P C/A SOT-23
1
ME@
15/17" 14"
LED2 14@
L R 1 VCC 1 VCC
<18> BATT_LOW_LED#
BATT_LOW_LED# 1 2 2 R764 1
+3VALW
470_0402_5%
SW4 14@ SW5 14@ 2 CLK 2 JLED1
TJG-533-V-T/R_6P TJG-533-V-T/R_6P
CLK 14@
HT-191UD5_AMBER 1
+5VALW 1
5
6
5
6
2
+3VALW 2
4 2 4 2 3
TP_3 TP_2
3 DAT 3 DAT +5VS
LID_SW# 4 3
3 1 3 1 LED5 14@ 5 4
PWR_LED# 6 5
4 GND 4 L BATT_CHG_LED# 1 2 2 R765 1 BATT_LOW_LED# 7 6
<18> BATT_CHG_LED# +5VALW 7
649_0402_1% BATT_CHG_LED# 8
CAPS_LED# 9 8
5 L 5 R 14@
19-213A-T1D-CP2Q2HY-3T_WHITE 10 9
10
11
SW6 15@ SW7 15@
GND 12 GND
TJG-533-V-T/R_6P TJG-533-V-T/R_6P
6 R 6 LED6 14@
GND
5
6
5
6
HB_A091020-SAHR21
4 2 4 2 CAPS_LED# 1 2 2 R303 1 ME@
<18> CAPS_LED# +5VS
TP_2 TP_1 649_0402_1%
3 1 3 1
14@
19-213A-T1D-CP2Q2HY-3T_WHITE
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
BIOS, I/O Port & K/B CONN/TP CONN/PBTN
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
VAWGA/GB
Date: Thursday, March 28, 2013 Sheet 20 of 37
5 4 3 2 1
1U_0603_10V6K
0.1U_0402_16V7K
0.1U_0402_16V7K
RA11 1 2 0_0402_5%
2.2U_0603_6.3V6K
+3VLP @ +AVDD_HP
1 1 2 1 AVDD_3.3 pinis output of
CA1
CA2
CA4
0.1U_0402_16V7K
1 2 5.11K_0402_1%
4.7U_0603_6.3V6K
internal LDO. NOT connect RA5 +3VS
CA3
1 1 to external supply.
CA5
CA6
1 2 2 2 1 2 mount RA6 on the Jack Sense circuit
+3VALW @ RA6 10K_0402_1%
1 2 to configure Port-C for mono MIC.
RA10 0_0402_5% 2 @ 2
1U_0603_10V6K
1U_0603_10V6K
0.1U_0402_16V7K
0.1U_0402_16V7K
1 1
CA8
CA9
1 1
CA15
CA10
Should be same supply rail as used for
PCH HDA bus controller section @
@ 2 2
2 2
Layout Note:Path from +5VS to LPWR_5.0
RPWR_5.0 must be very low
resistance (<0.01 ohms)
RA4 1 @ 2 0_0402_5%
+1.5VS
0.1U_0402_16V7K
4.7U_0603_6.3V6K
+5VS
1 1
CA16 +LDO_1.8V
CA17
0.1U_0402_16V7K
4.7U_0603_6.3V6K
+5VS
1 1
CA18
CA19
0.1U_0402_16V7K
0.1U_0402_16V7K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
@ 2 2 10 mils
1 1 1 1
CA20
CA21
CA22
CA23
0.1U_0402_16V7K
4.7U_0603_6.3V6K
@
2 2
1 1
CA24
CA25
@
2 2 2 2
For EMI
0.1U_0402_16V7K
EMIU@ 2 2
18
29
27
28
24
1
3
7
2
CA26
CA7 EMIU@ UA1
1 RA21 2
Combo Jack
VDD_IO
FILT_1.8
VDDO_3.3
DVDD_3.3
AVDD_3.3
VREF_1.65V
AVDD_5V
AVDD_HP
2
Please bypass caps very close to device.
22P_0402_50V8J 33_0402_5% 13
HDA_RST#_AUDIO 9
LPWR_5.0
RPWR_5.0
16
11
HGNDA, HGNDB 80mils (Normal Open)
<6> HDA_RST#_AUDIO RESET# CLASS-D_REF
C HDA_BITCLK_AUDIO 5 JHP1 C
<6> HDA_BITCLK_AUDIO BIT_CLK
HDA_SYNC_AUDIO 8 38 JSENSE APPLE_MIC RA16 1 EMIP@ 2 100_0402_1% CA28 1 2 2.2U_0402_6.3V6M HGNDB 4
<6> HDA_SYNC_AUDIO SYNC JSENSE
RA9 1 2 33_0402_5% HDA_SDIN0_R 6 NOKIA_MIC RA12 1 EMIP@ 2 100_0402_1% CA27 1 2 2.2U_0402_6.3V6M HGNDA 3
<6> HDA_SDIN0 SDATA_IN
HDA_SDOUT_AUDIO 4 34 HP_L RA13 1 EMIP@ 2 15_0402_5% HPOUT_L 1
<6> HDA_SDOUT_AUDIO SDATA_OUT MICBIASB +MICBIASB
35 HP_R RA14 1 EMIP@ 2 15_0402_5% HPOUT_R 2
MICBIASC +MICBIASC
PC_BEEP 10 32 MICB_L PLUG_IN 5
39 PC_BEEP PORTB_L_LINE 33 MICB_R
<18> EC_MUTE# SPKR_MUTE# PORTB_R_LINE Universal Jack 6
30 APPLE_MIC
PORTD_A_MIC 31 NOKIA_MIC
External MIC SINGA_2SJ2352-000131F
1 PORTD_B_MIC 25 HGNDA ME@
40 DMIC_DAT/GPIO1 HGNDA 26 HGNDB
DMIC_CLK / MUSIC_REQ/GPIO0 HGNDB For Universal jack
Internal analog MIC MIC_IN 36 22 HP_L
37 MUSIC_REQ/GPIO0/PORTC_L_MIC PORTA_L 23 HP_R
GPIO1/PORTC_R_MIC PORTA_R Headphone
CA36
MICB_L RA17 1 2 100_0402_1% 1 2 HP_L
SPK_L2+ 12 2.2U_0402_6.3V6M
SPK_L1- 14 LEFT+ CA46
LEFT- MICB_R RA18 1 2 100_0402_1% 1 2 HP_R
Internal SPEAKER 21 2.2U_0402_6.3V6M
SPK_R2+ 17 AVEE 19 RA20 1 2 3K_0402_5%
RIGHT+ FLY_P
0.1U_0402_16V7K
SPK_R1- 15 20 1 2
2.2U_0603_6.3V6K
RIGHT- FLY_N CA29 1U_0603_10V6K RA19 1 2 3K_0402_5%
1 2 +MICBIASB
CA35
CA30
GND
B
under codec (100 mils or more) ESD B
HPOUT_L HPOUT_L
HPOUT_R HPOUT_R
CA30 vendor suggest
PC Beep change to 2.2U HGNDB HGNDB
AZ5125-02S.R7G_SOT23-3
AZ5125-02S.R7G_SOT23-3
CA64 1 2 0.1U_0603_50V7K
<18> BEEP#
1 2 RA492
2
CA37 0.1U_0402_16V7K 1 2 PC_BEEP
EMIU@ 1 2 33_0402_5% DA1 DA2
<6> APU_SPKR
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
CA65 1 2 0.1U_0603_50V7K
ICH Beep CA45 0.1U_0402_16V7K
1
EMIU@
1
CA31
CA32
CA33
CA34
CA66 1 2 0.1U_0603_50V7K
EMIP@ LA1 LA2 EMIP@
2
@ RA22 0_0603_5% 0_0603_5%
10K_0402_5% ESDP@ ESDP@
1
EMIP@ LA3 LA4 EMIP@ LA1~LA4 vendor suggest mount 0 ohm first~
2
EMIP@
EMIP@
EMIP@
EMIP@
5
G5
1
1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
5 2 6
A
RA23
2.2K_0402_5%
VDD GND
wide 30MIL 1 1 1 1
G6
CA38
CA39
CA40
CA43
A
vendor suggest ME@
SPK_R2+_CONN 4 1 SPK_L1-_CONN change to 1000p
2
0.1U_0402_16V7K
WM-64PCY_2P
45@ CA41 vendor suggest
2 2 change to 1U
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/06/15 Deciphered Date 2012/07/11 Title
CA42
CA44
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CX20751 Codec
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
@ @ Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
VAWGA/GB
Date: Thursday, March 28, 2013 Sheet 21 of 37
5 4 3 2 1
A B C D E
1U_0402_6.3V6K
0.1U_0402_10V7K
4 11
2 VL VBIAS GND 1
C9 330P_0402_50V7K
SUSP# 5 10 1 2
ON2 CT2 +3VS
@
6 9 J3V J@
1 +3VALW 7 VIN2 VOUT2 8 +3VS_LS 1 2 1
VIN2 VOUT2
15 PAD-OPEN 4x4m 2
GPAD @ C14
TPS22966DPUR_SON14_2X3
0.1U_0402_10V7K
1 1
@ C11
1U_0402_6.3V6K
2
1 14 +1.8VS_LS 1 2
2 VIN1 VOUT1 13
+0.95VALW TO +0.95VS @
1 C24
SUSP# 3
VIN1 VOUT1
12
C21
1
180P_0402_50V8J
2
PAD-OPEN 4x4m 2
@ C26
ON1 CT1
Load switch @
0.1U_0402_10V7K
4 11
2 VL VBIAS GND 1
C15 330P_0402_50V7K
095VS_PWR_EN 5 10 1 2
<18> 095VS_PWR_EN ON2 CT2 +0.95VS
@
6 9 J95V J@
2 +0.95VALW 7 VIN2 VOUT2 8 +0.95VS_LS 1 2 2
VIN2 VOUT2
15 PAD-OPEN 4x4m 2
GPAD @ C25
TPS22966DPUR_SON14_2X3
0.1U_0402_10V7K
1 1
@ C22
1U_0402_6.3V6K
+1.5V +0.75VS
+1.5V to +1.5VS Vgs=-4.5V,Id=-2.8A,Rds=110mohm
+1.5V Q20 +1.5VS
1
3 1
1 1 1 R1627 R1629
1
@ 470_0603_5% 470_0603_5%
C470 LP2301ALT1G_SOT23-3 C469 C463 @ @
1 2
1 2
10U_0603_6.3V6M 10U_0603_6.3V6M 1U_0603_10V6K R1461
2
2 2 2 220_0603_5% D D
2 SYSON# 2 SUSP
2
G G
S Q93 S Q95
3
1
S Q23
3
2N7002K_SOT23-3
100K_0402_5% +RTCBATT_3V
R337
R339 +5VALW
2
2
1.5VS_GATE 1 @ 2 1.5VS_GATE_R
1 R1636
1
1
D 0_0402_5% 100K_0402_5%
SUSP# 2 Q26 C462 @
G 2N7002K_SOT23-3 0.1U_0402_25V6 R1638
1
S 2 SUSP 100K_0402_5%
3
2
Q101 SYSON#
1
DTC124EKAT146_SC59-3
1
OUT
OUT
2 Q102
<18,27> SUSP# IN SYSON 2 DTC124EKAT146_SC59-3
GND
<18,27> SYSON IN
1
GND
1
R1639 @
3
100K_0402_5% R1640
3
100K_0402_5%
2
2
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DC Interface
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
VAWGA/GB
Date: Thursday, March 28, 2013 Sheet 22 of 37
A B C D E
5 4 3 2 1
VIN
PF101 PL101
JDCIN1 7A_24VDC_429007.WRML SMB3025500YA_2P
1 APDIN 1 2 APDIN1 1 2
1 2
D 2 3 D
3
1000P_0402_50V7K
1000P_0402_50V7K
100P_0402_50V8J
100P_0402_50V8J
4
4 5
5
1
PC101
PC102
PC103
PC104
ACES_50312-00541-001
@
2
PQ102A
PR102 2N7002KDW-2N_SOT363-6
2 1 6 1
+3VALW ADP_ID <18>
680P_0603_50VK
0.1U_0402_16V7K
750_0402_1%
2
1
PC108
PC109
100K_0402_1%
2
2
PR104
2 1
VIN
2N7002KDW-2N_SOT363-6
1
3
100K_0402_1%
PQ102B
PR105
C 5 C
ADP_ID_CLOSE <18>
2
+CHGRTC
PR103
1K_0603_5%
+RTCBATT_3V 1 2
PD101
+3VLP
PU102 S SCH DIO BAS40CW SOT-323
+RTCBATT 3 2 +CHGRTC_R
Vout 1 +RTCBATT_3V 1
Vin
0.1U_0603_25V7K
2 3 PR101
GND
680P_0603_50VK
1K_0603_5% JRTC1 @
1
PC111
1 2 1
2 1
1
PC110
AP2138N-1.5TRG1_SOT23-3
3 2
2
4 GND
2
GND
ACES_50271-0020N-001
B B
RTC Battery
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-DCIN / RTC Battery
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom VAWGA/B 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, March 28, 2013 Sheet 23 of 37
5 4 3 2 1
5 4 3 2 1
VMB2 VMB
@ PF201 PL201
JBATT1 12A_65V_451012MRL SMB3025500YA_2P
SUYIN_200082GR007M229ZR
1 1 2 1 2
1 2 BATT+
2 3 EC_SMCA
3 4 EC_SMDA
4 5
5 6
6 7
1
7 8
1
100_0402_1%
100_0402_1%
D D
GND 9 PC201 PC203
GND 1000P_0402_50V7K 0.01U_0402_25V7K
2
PR201
PR204
2
2
EC_SMB_CK1 <18>
+3VALW
@ @ PR209
1
1 6.49K_0402_1% A/D +3VS
2
2
3
+EC_VCCA
3 <18,25> ADP_I
4 1 2
4 BATT_TEMP <18>
12.7K_0402_1%
5 PR207
5
1
100K_0402_1%
6 10K_0402_5%
6
PR215
PR226
7 @ @ PR229
7
2
8.45K_0402_1%
8 10K_0402_1%
GND <18,29,4,6> H_PROCHOT# PROCHOT
9 1 2
GND <18>
PR221
1
2
PQ201 NTC_V
<18>
1
D
1
C @ 2 ADP_OCP_1 C
G Turbo_V
<18>
1
S 2N7002KW_SOT323-3
3
PH201
2
25.5K_0402_1%
9.31K_0402_1%
5.9K_0402_1%
100K_0402_1%_TSM0B104F4251RZ
2
PR216
PR225
2N7002KW_SOT323-3
PR227
PR228
0_0402_5% PR222
2
PROCHOT 1 2 100K_0402_1%
@
1
1
1
VL +3VALW
1
D
PQ206
2N7002KW_SOT323-3
2
<18> ADP_65 G
2
S
3
VL
2N7002KW_SOT323-3
PR214 <18>
2
1
D ECAGND
PQ208
PC202 PR211 100K_0402_1% 2
<18>
1
6 1 ADP_90 G
1
PQ207
0.01U_0402_25V7K 100K_0402_1% BATT_OUT S
BATT_OUT <25>
3
PR202 PR210
2
1
2
1
D ECAGND
75K_0402_1% 47K_0402_1%
PQ202A 2
<18> ADP_135
2 2N7002KDW-2N_SOT363-6 G
2
3
3
PC208
1
1
8
0.068U_0402_16V7K
BATT_TEMP 3 PQ202B
P
+ 1 1 2 5 2N7002KDW-2N_SOT363-6
2 O
-
G
PU201A ECAGND
4
1
AS393MTR-E1 SO 8P OP
4
2
B PD201 B
PR213 VL PR205
1
100K_0402_1% 1N4148WS-7-F_SOD323-2
1
PC207 1.5M_0402_5%
2
100P_0402_50V8J
1
+3VLP
VMB
1
+3V_LDO
75K_0402_1%
@ PR218 PR220
2
47K_0402_1%
@ PR208
100K_0402_1%
8
@ PC210
2
1
1
D D
2N7002KW_SOT323-3
5 0.068U_0402_16V7K~N
P
+ 7 1 2 2 2 PQ205
<18>
1
6 O G G 2N7002KW_SOT323-3
- BATT_LEN#
G
PQ209
S S
3
3
2
100K_0402_1%
100P_0402_50V8J
4
1
PU201B
1N4148WS-7-F_SOD323-2
@ PR217
AS393MTR-E1 SO 8P OP @
@ PC213
PD203
@ PR223
1
1.5M_0402_5%
@
+5VALW
22U_0603_6.3V6M
@ PU202
1
@ PC212
1 5
IN OUT +3V_LDO
2
2
A GND A
1
3 4
SHDN# BYP @ PC214
G9191-330T1U_SOT23-5 4.7U_0402_6.3V6M
2
1
@PC211
@ PC211
1U_0402_16V6K
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-BATTERY CONN/OTP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom VAWGA/B 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, March 28, 2013 Sheet 24 of 37
5 4 3 2 1
5 4 3 2 1
P3
B+
P2
PQ301 PQ302
AO4407AL_SO8 AO4423L_SO8
8 1 1 8 PR301
VIN 7 2 2 7 0.01_1206_1% CHG_B+
6 3 3 6
5 5 1 4 1 2 PQ312
PL301 AO4407AL_SO8
2 3 1UH_PCMB061H-1R0MS_7A_20% 1 8
4
2 7
3 6
@ 10U_0805_25V6K
@ 10U_0805_25V6K
2200P_0402_50V7K
PQ304 5
10U_0805_25V6K
10U_0805_25V6K
D D
47K_0402_5%
1
2
200K_0402_1%
0.1U_0603_25V7K
PC319
4
1
PR302
PC310
PC313
PC315
PC316
DTA144EUA_SC70-3 DISCHG_G
PC302
PR304
1
1 2 PR322
200K_0402_1%
2
2
2 PC301 1 2
2
5600P_0402_25V7K ACN VIN
2ACOFF-1
1SS355_SOD323-2
2
1
ACP PR321
1DISCHG_G-1
47K_0402_1%
1
2
PD302
P2-1 PR325
0.1U_0402_25V6
1
2 200K_0402_1%
PQ303 PQ311
1
PC307 PC311 DTC115EUA_SC70-3
1
DTC115EUA_SC70-3
PR306 1 2 2 1
3
20K_0402_1%
1 2 0.1U_0402_25V6 2 1 2
6
PQ306
ACPRN
1
1
D
0.1U_0402_25V6
S
3
2 1 2 PACIN
1
1
PC324
VIN G
S
3
392K_0402_1%
2
1
P2-2
10_1206_5%
MDS1525URH 1N SO8
2
5
6
7
8
C C
PR309
2N7002KDW-2N_SOT363-6
PQ309
PR319
3
PQ307B
ACOK
CMPIN
CMPOUT
ACP
ACN
PR303 PR308 ADP_I
<18,24>
2
1
PACIN 1 2 5 1 2 6 TP 1 2 4
ACDET PC314
PC303 PC304 20 BQ24737VCC 1 2 0_0402_5%
4
1 2 1 2 7 VCC
IOUT PL302 PR324
3
2
1
1U_0603_25V6K
1
5
6
7
8
1 2ACOFF-1 2 9 2 3
ACOFF <18> <18> SCL
1
EC_SMB_CK1
PQ310
PR315 PR320 PC317
4.7_1206_5%
MDS1521URH 1N SO8
PR323
10K_0402_1% 316K_0402_1% 2.2_0603_5% 0.047U_0603_16V7K
1 2 10 17 BST_CHG 1 2 2 1 SRP SRN
10U_0805_25V6K
10U_0805_25V6K
124737_SN
ILIM BTST
1
+3VALW PD301
3
PR316 4 @
LODRV
1
16 2 1
PC322
PC323
PQ314 100K_0402_1%
GND
SRN
SRP
REGN
1
BM
2N7002KW _SOT323-3
2
BATT_OUT <24>
2
2
RB751V-40_SOD323-2
680P_0603_50V7K
G 11
12
13
14
15
3
2
1
1
PC320
S
3
2
PC312 BQ24737VDD
6.8_0402_5%
1
10_0402_5%
1U_0603_25V6K
2
PR317
PR318
@
PC306 DL_CHG
2
2
B 0.1U_0402_25V6 B
2 1
1
PC305 @ 1 PC309
0.1U_0402_25V6 0.1U_0402_25V6
2
BQ24737VDD
PR314
10K_0402_1%
1
1 2
ACIN <18>
PR310
PR307 10K_0402_1%
47K_0402_1%
PACIN
2
PQ308
1
2N7002KW _SOT323-3
1
D PR312
ACPRN 2
G 12K_0402_1%
2
S
3
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-CHARGER
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
VAWGA/B
Date: Thursday, March 28, 2013 Sheet 25 of 37
5 4 3 2 1
A B C D E
3V5V_EN_R 2 1 3V5V_EN
0.047U_0402_25V6
PR411
PC432
10K_0402_1%
2 1
1 1
PR402
PR414 499K_0402_1%
1 2 ENLDO_3V5V 2 1
B+
1
150K_0402_1%
1U_0603_25V6K
0_0402_5%
1
PR403
@ PR415
2 1
PC407
2
0_0402_5%
2
PU401
B+ PL401 7 1 3V5V_EN_R
HCB2012KF-121T50_0805 IN EN1 PC439 PR416
1 2 3V_VIN 8 3 1 2 2 1
IN EN2
2200P_0402_50V7K
68P_0402_50V8J
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
PC402
6 1
BST_3V 2 1 2 0.01U_0402_25V7K 1K_0402_5%
BS
PC401
PC403
1
1
PC404
PC405
PC406
PR401 0.1U_0603_25V7K
0_0402_5% PL402
@ @ 10 LX_3V 1 2
+3VALWP
2
@ LX
9 4 1.5UH_PCMC063T-1R5MN_9A_20%
GND OUT
470P_0402_50V8J
470P_0402_50V8J
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
@ @
1
PC412 @
PC413 @
PC434
PC435
4.7_1206_5%
2 5
<27> SPOK PG LDO +3VLP
PC408
PC409
PC410
PC411
1
PR404
SY8208BQNC_QFN10_3X3
2
PC414
13V_SN
100K_0402_1%
100K_0402_1%
4.7U_0603_6.3V6M
2
1
680P_0603_50V7K
PR417
PR410
1 ENLDO_3V5V
PC415 @
2 2
@
+3VLP
2
2
+3VALWP
0_0402_5%
PR412
B+ PL403
HCB2012KF-121T50_0805
1 2 5V_VIN @
2 PC436 PR413
1 2 2 1
6800P_0402_25V7K 1K_0402_5%
2200P_0402_50V7K
10U_0805_25V6K
10U_0805_25V6K
68P_0402_50V8J
0.1U_0402_25V6
PU402
8 1 3V5V_EN
IN EN1
1
1
PC419
PC420
PC416
PC417
PC418
3 PC421
EN2 0.1U_0603_25V7K
6 BST_5V 1 2 1 2
2
@ @ BS
PR405
0_0402_5% PL404
9 10 LX_5V 1 2 +5VALWP
GND LX
5V_VCC 5 4 1.5UH_PCMC063T-1R5MN_9A_20%
150U_D2_6.3VY_R15M
VCC OUT 1
1
470P_0402_50V8J
470P_0402_50V8J
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
680P_0603_50V7K 4.7_1206_5%
@ @
1
PR406 @
PC427 @
PC428 @
PC433
PC437
PC438
2 7 +
PG LDO VL
1
PC422
PC423
PC424
PC425
PC426
4.7U_0603_6.3V6M
SY8208CQNC_QFN10_3X3
2
2@
1 5V_SN
2
2
1
PC430
4.7U_0603_6.3V6M
3 3
PC429 @
2
@PJ401
@ PJ401
+3VALWP 1 2 +3VALW
1 2
PR407 JUMP_43X118
2.2K_0402_5%
EC_ON 2 1
<18> EC_ON
MAINPWON 1 2 @PJ402
@ PJ402
<18> MAINPWON
+5VALWP 1 2 +5VALW
PR408 1 2
0_0402_5% JUMP_43X118
3V5V_EN
1M_0402_1%
4.7U_0402_6.3V6M
1
1
PR409
PC431
2
2
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-3VALWP/5VALWP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom VAWGA/GB 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, March 28, 2013 Sheet 26 of 37
A B C D E
A B C D
PL502
1.5V_B+ 1 2 B+
HCB2012KF-121T50_0805
2200P_0402_50V7K
STATE S3 S5 1.5VP VTT_REFP 0.75VSP
10U_0805_25V6K
0.1U_0402_25V6
4.7U_0805_25V6-K
MDU1516URH_POWERDFN56-8-5
1
PC501
PC520
PC509
PC513
S0 Hi Hi On On On
5
Off
2
@ @
S3 Lo Hi On On (Hi-Z) +1.5VP
PQ501
UG_1.5V 4
S4/S5 Lo Lo Off Off Off
2
1 1
LX_1.5V
3
2
1
PR503
Note: S3 - sleep ; S5 - power off 0_0402_5%
PR501 PC512 PL501
1
2.2_0603_5% 0.1U_0603_25V7K 1UH_PCMB104T-1R0MH_18A_20%
BST_1.5V 1 2 BST_1.5V-1 1 2 2 1
+0.75VSP +1.5VP
10U_0805_25V6K
10U_0805_25V6K
1
MDU1511RH_POWERDFN56-8-5
5
@
20
19
18
17
16
1
1
PC504
PC505
PU501 PR515
4.7_1206_5% @
VTT
VLDOIN
BOOT
UGATE
PHASE
21 1 1
2
PAD
PQ502
1 15 LG_1.5V 4 + +
VTTGND LGATE PC521 PC522
1
@
2 14 PC517 330U_2.5V_M 2 2 220U_6.3V_M
VTTSNS PGND PR511 680P_0603_50V7K
3
2
1
2
6.65K_0402_1%
3 13 2 1
GND RT8207MZQW _W QFN20_3X3 CS
4 12
+VTT_REFP VTTREF VDDP
5 11 2 1
+1.5VP VDDQ VDD
+5VALW
PGOOD
PR514
+3VALW +1.5VP
1
5.1_0603_5%
1U_0603_10V6K
TON
PC506 OCP min 20A
FB
S3
S5
2 0.033U_0402_16V7K 2
2
1
OVP min 1.65V
PC510
10K_0402_5%
PC511
10
PR510
1U_0603_10V6K
S3_1.5V
2
PR502
S5_1.5V
49.9K_0402_1% @
2
SUSP# 1 2
<18,22>
PGOOD_1.5V
PR509
PR505
887K_0402_1%
SYSON <18,22>
1 2 2 1 1.5V_B+
@ PC526
1
1 2 PJ505
+1.5VP 2 1 +1.5V
PR506 2 1
5.76K_0402_1% 68P_0402_50V8J @ JUMP_43X118
2
PJ506
2 1
+0.75VSP 2 1 +0.75VS
JUMP_43X79
@
3 3
PU502
SY8033BDBC_DFN10_3X3
PL503
4
PJ502 1UH_PH041H-1R0MS_3.2A_20%
2 1 1.8VSP_VIN 10 2 1.8VSP_LX 1 2
+3VALW
PG
2 1 PVIN LX +1.8VALWP
@ JUMP_43X79 9 3
4.7_1206_5%
PVIN LX
1
1
8
PR508
PC502
22U_0805_6.3VAM SVIN
68P_0402_50V8J
1
6 FB=0.6Volt
2200P_0402_50V7K
68P_0402_50V8J
0.1U_0402_25V6
2
FB
1
5 @ PC525
22U_0805_6.3VAM
22U_0805_6.3VAM
1 2
EN
1
PC518
PC519
NC
NC
PR512
TP
PC514
PC515
PC516
20K_0402_1% PJ507
680P_0603_50V7K
2
SPOK
PC523
2
1 2 EN_1.8VSP 2 1
<26,28>
2
@ @ @ JUMP_43X79
0_0402_5% @ @
0.1U_0402_10V7K
2
1
PC507 @
1
PR504 PC524
1M_0402_5% 0.1U_0402_10V7K
2
1.8VSP_FB
PR611
095_18ALW_PWR_EN
2
1
1 2
<18>
0_0402_5% PR513
10K_0402_1%
4 4
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-+1.5VP/+1.8VALWP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
VAWGA/GB
Date: Thursday, March 28, 2013 Sheet 27 of 37
A B C D
5 4 3 2 1
D D
PL601
HCB2012KF-121T50_0805
0.95V_B+ 1 2 B+
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
2200P_0402_50V7K
5
6
7
8
1
PQ601
PC602
PC603
PC604
PC605
MDS1525URH 1N SO8
2
PR609 @
1 2 4
0_0402_5%
3
2
1
095_18ALW_PWR_EN PR610
1 2 PR602 PC606 PL661
<18> 40.2K_0402_1% PU601 2.2_0603_5% 0.22U_0603_16V7K 1UH_PCMC063T-1R0MN_12A_20%
0_0402_5%
PR603
1
PGOOD VBST
10 1
BST_0.95V 2BST_0.95V-11 2 1 2 +0.95VALWP
@ PR601 2 1 0.95V_TRIP 2 9 DH_0.95V
0_0402_5% TRIP DRVH
1 2 0.95V_EN 3 8 LX_0.95V
4.7_1206_5%
<27> SPOK EN SW
1
1
5
6
7
8
0.95V_FB 4 7
PR604
VFB V5IN +5VALW
2
+ PC607
PQ602
47K_0402_5%
.1U_0402_16V7K
MDS1521URH 1N SO8
1 PR606 2 0.95V_RF 5 6 DL_0.95V 220U_6.3V_M
@ PR605
RF DRVL
1
PC608 @
@ PC601
2
470K_0402_1% 11 1U_0603_10V6K 2
PR607
2
TP 4
680P_0603_50V7K
1
1 2 TPS51212DSCR_SON10_3X3
1
VFB=0.7V
PC609
PR605 reserve 3.48K_0402_1%
1
3
2
1
2
@
PR608
C 10K_0402_1% +0.95VALWP OCP(min)=15.6A C
2
PJ602
2 1
2 1
@ JUMP_43X118
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-+0.95VALWP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
VAWGA/B
Date: Thursday, March 28, 2013 Sheet 28 of 37
5 4 3 2 1
5 4 3 2 1
CPU_B+ PL901
HCB2012KF-121T50_0805
1 2 B+
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
2200P_0402_50V7K
0.1U_0402_25V5K
MDU1516URH_POWERDFN56-8-5
MDU1516URH_POWERDFN56-8-5
5
5
1
1
PC1027
PC1029
PC1030
PC1032
PC901 PR901 + PC1031
PC1028
330P_0402_50V7K 2K_0402_1% 220U_25V_M
2
2 1 2 1 PR954 @
UGATE_NB1 1 2 4 4 2
PQ905
PQ901
<4> 150P_0402_50V8J
APU_VDDNB_SEN PC1033
PR902 PR903 PR904 @ PR905
10_0402_5% 1.54K_0402_1% 267K_0402_1% 41.2K_0402_1% 0_0402_5%
2 1 2 1 2 1 2 1 2 1 SH00000N900 (DCR 1.1+-5%)
+APU_CORE_NB PL902
3
2
1
3
2
1
0.36UH_VMPI1004AR-R36M-Z03_30A_20%
PR906 PC1034 PR907 PC1035
D 2011/10/21 0_0402_5% 1000P_0402_50V7K 499_0402_1% 47P_0402_50V8J PHASE_NB1 1 4 D
1
VSUMP_NB PC1037 2.2_0603_1% 0.22U_0603_25V7K
0.01U_0402_50V7K BOOT_NB1 2 1 2 1 @ PR910
2.61K_0402_1%
10K_0402_5%_ERTJ0ER103J
1
4.7_1206_5%
5
2 1
PR909
680P_0603_50V7K
0.022U_0402_25V7K
0.15U_0603_16V7K
1 2
2
MDU1511RH_POWERDFN56-8-5
MDU1511RH_POWERDFN56-8-5
PR912
11K_0402_1%
3.65K_0402_1%
PR911
12
VSUMP_NB 2 1
PH901
PC1038
PC1039
LGATE_NB1 4 4 @ PC1040
1
2
PQ906
PQ902
PR914
1
PR913 1_0402_1%
324_0402_1% VSUMN_NB 2 1
2
VSUMN_NB 2 1
3
2
1
3
2
1
1
@ PR915 @ PC1042
PC1041 100_0402_1% 220P_0402_50V7K LGATE_NB1
0.1U_0603_50V7K 2 1 2 1
2
PHASE_NB1
2011/10/21 UGATE_NB1
NTC near NB_CORE H/S mos BOOT_NB1
PR916 27.4K_0402_1% 20K_0402_1% 2012/10/30
2 1
PR917 Load Line:VDD-->4m
41
40
39
38
37
36
35
34
33
32
31
2 1 2 1 PU901 VDDNB-->4.0m
TP
ISUMP_NB
ISUMN_NB
VSEN_NB
FB_NB
COMP_NB
PGOOD_NB
LGATE_NB
PHASE_NB
UGATE_NB
BOOT_NB
470K_0402_5%_TSM0B474J4702RE
PH902
1 30
PC1043 NTC_NB BOOT2
1000P_0402_50V7K
2 1 2 29
PR918 0_0402_5% IMON_NB UGATE2
C 2 1 <4> 1 2 SVC 3 28 C
APU_SVC SVC PHASE2
PR920 0_0402_5%
H_PROCHOT# 1 2 4 27 +5VALW
PR919 133K_0402_1%
<18,24,4,6>
PR921 0_0402_5% VR_HOT_L LGATE2
100K_0402_1% @ PR922 <4>
1 2 SVD 5 26
APU_SVD SVD VDDP
+3VS
2 1 PR923 0_0402_5% ISL62771HRTZ-T_TQFN40_5X5 PR924
+1.8VS 1 PR953 2 1 2 VDDIO 6 25 2 1
0_0402_5% PR925 0_0402_5% VDDIO VDD 1_0603_5%
1U_0603_25V6K
0.1U_0402_25V6
2
2 1 1 2 SVT 7 24 LGATE1
PC1073
1
@ PR952 PC1044 PR926 0_0402_5%
1U_0603_25V6K
0_0402_5% <18> 1 2 ENABLE 8 23 PHASE1
PC1046
VR_ON
1
PC1045
1
2
1 PR951 2 2 1 2 PWROK 9 22 UGATE1 CPU_B+
<4> APU_PWRGD PWROK UGATE1
0_0402_5%
1 PR928 2 10 21 BOOT1
133K_0402_1% IMON BOOT1 +3VS
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
2200P_0402_50V7K
0.1U_0402_25V5K
PGOOD
PC1047
ISUMN
ISUMP
COMP
ISEN2
ISEN1
VSEN
1000P_0402_50V7K 1
NTC
RTN
MDU1516URH_POWERDFN56-8-5
MDU1516URH_POWERDFN56-8-5
1 2
FB
1
PC6601
PC1049
PC1048
PC1050
PC1051
PC1052
20K_0402_1% 1000P_0402_50V7K
11
12
13
14
15
16
17
18
19
20
PR930 27.4K_0402_1% PR929 2
1 PR931
2
2 1 2 100K_0402_1% @
PR955
2
+5VS 1 2 4 4
PQ907
PQ903
PH903 UGATE1
470K_0402_5%_TSM0B474J4702RE <18>
2 1 VGATE 0_0402_5%
SH00000GH00 (DCR 1.25+-7%)
PL903
3
2
1
3
2
1
PR932 0.36UH_FDUE1030D-H-R36M=P3_32A_20%
1 2 ISEN2
PHASE1 1 4
0_0402_5%
PR933 PC1053 2 3
+APU_CORE
2 1 ISEN1 2.2_0603_1% 0.22U_0603_25V7K
1
PR934 BOOT12 1 2 1 @ PR935
10K_0402_1% 4.7_1206_5% PR936
PC1054 PR937 PC1055 PR938 @ 3.65K_0402_1%
5
B B
1000P_0402_50V7K 499_0402_1% 47P_0402_50V8J 32.4K_0402_1% VSUM+ 2 1
2 1 2 1 2 1 2 1
2011/10/21
330P_0402_50V7K
1 2
MDU1511RH_POWERDFN56-8-5
MDU1511RH_POWERDFN56-8-5
@ PC1057
@ 680P_0603_50V7K PR941
NTC near CPU_CORE H/S mos
2
2
10K_0402_5%_ERTJ0ER103J
1
2 1 2 1 2 1
PQ908
PQ904
1
PR942
0.01U_0402_50V7K
0.15U_0603_16V7K
2
PR944 PC1061
3
2
1
3
2
1
2
2K_0402_1% 330P_0402_50V7K
11K_0402_1%
12
2 1 2 1
PH904
PR943
PC1059
PC1060
1
1
1
PR945 PR946
487_0402_1% 10_0402_5%
2
VSUM- 2 1 2 1 +APU_CORE
PC1063@ PR947
1
PR949
0_0402_5%
1 2
0.01U_0402_50V7K
2 1
PC1064
1
2011/10/21
NTC near phase 1 choke
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
APU_CORE/APU_CORE_NB
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
VAWGA/B
Date: Thursday, March 28, 2013 Sheet 29 of 37
5 4 3 2 1
A B C D E
1 1
10U_0603 *3
10U_0603 * 4
+APU_CORE +APU_CORE_NB
PC1001
PC1002
PC1003
PC1004
PC1067
PC1068
PC1065
PC1066
PC1009
PC1010
PC1011
PC1071
PC1072
PC1069
PC1070
PC1013
PC1014
PC1015
PC1016
22U_0603_6.3V6MPC1005
22U_0603_6.3V6MPC1006
22U_0603_6.3V6MPC1007
22U_0603_6.3V6MPC1008
1
1
@ @ @ @ @ @ @
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
2
2
0.01U_0402_25V7K~N
0.01U_0402_25V7K~N
1
PC1019
1
PC1017
2 2
2
@
2
0.1U_0402_25V7K~N
0.1U_0402_25V7K~N
1
PC1020
1
PC1018
2
@
2
3 3
330U_D2_2V_Y
330U_D2_2V_Y
330U_D2_2V_Y
1 1 1
330U_D2_2V_Y
330U_D2_2V_Y
330U_D2_2V_Y
1 1 1
PC1024
PC1025
PC1026
+ + +
PC1021
PC1022
PC1023
+ + +
2 2 2@
2 2 2
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-PROCESSOR DECOUPLING
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom VAWGA/B 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, March 28, 2013 Sheet 30 of 37
A B C D E
5 4 3 2 1
1
D D
C C
9
10
11
12
13
14
B B
15
16
17
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PIR (PWR)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C38-G series Chief River Schematic1.0
Date: Thursday, March 28, 2013 Sheet 31 of 37
5 4 3 2 1
5 4 3 2 1
1
D D
C C
9
10
11
12
13
14
B B
15
16
17
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PIR (PWR)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C38-G series Chief River Schematic1.0
Date: Thursday, March 28, 2013 Sheet 32 of 37
5 4 3 2 1
5 4 3 2 1
1 For share rom 18 Change SYS_PWRGD_EC from pin 86 to pin 32 12/17 DVT
D D
3 22
For VBIAS first raise up Change U1895V, U35P, U1895P VBIAS from +5VALW to VL 12/17 DVT
4 For follow VIWGP design 17 Change JUSB3 pin define 12/18 DVT
5 For Audio Precision 21 Change CA36, CA46 from 1U to 2.2U 12/21 DVT
8 For reserve EC +3VL 18 Add J11, J12 and modify +3VALW to +3V_EC 12/24 DVT
05
C C
9 For share ROM 05 modify ROM net-name & resistor value 12/24 DVT
10 For common VIWGP design 12 modify R106, R107 to 22ohm 12/24 DVT
14 For 1.5VS discharge 22 Change R339 to 0ohm, mount Q23 & R1461 12/29 DVT
17 For ESD request 12 Add C600, C601, PC6601, PC6602 01/03 DVT
18
29
18 For no support DC wake & LID function 18 Pull high only SMB & RST use +3V_EC, other use +3VALW 01/04 DVT
19 For reserve cost down experiment 20 Add R630, R643 01/04 DVT
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PIR (PWR)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C38-G series Chief River Schematic1.0
Date: Thursday, March 28, 2013 Sheet 33 of 37
5 4 3 2 1
5 4 3 2 1
1 For EMI request 20 Change L67 to EMICP@, Change R692,R687 to EMICU@ 02/02 PVT
D D
6 For Corret Net-name to prevet confuse 04 Change TL_INVT_PWM, TL_ENVDD to APU_INVT_PWM, APU_ENVDD 02/02 PVT
11
7 For Reserve DDC CLK DATA pull high 12 Add R693, R697 02/02 PVT
8 For Common Intel project 20 Change R623,R765,R303 to 620ohm 02/02 PVT
C C
9 For Common Intel project 13 Reserve R551 02/02 PVT
10 For reduce BOM 21 Delete RA3, and Change RA4 to short-pad 02/05 PVT
11 For reduce BOM 16 Change R1498,R1499 from 0 ohm to 100 ohm 02/05 PVT
12 For reduce BOM 11 Change R1463 from 0 ohm to short-pad 02/06 PVT
13 For better audio precision performance 21 Change CA27,CA28 from 1U to 2.2U 02/08 PVT
14 For reduce BOM & layout concern 07 Delete C195 02/16 PVT
15 For test point request 12 Add T49, T58 on JCRT1 02/18 PVT
17 For reduce BOM 05 Change R116, R119, R125, R126 to short-pad 02/18 PVT
18 For Crystal timming 06 Change C682 from 18P to 22P 02/20 PVT
19 For ESD request 20 Change D24 from ESDU@ to ESDP@, Part number from SCA00000E00 02/23 PVT
to SCA00001G00
11
20 For EMI request Change L58,L51,L55,L66,L67 from SM070000K00 to SM070000Z00 02/23 PVT
17
20
21
22
23
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PIR (PWR)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C38-G series Chief River Schematic1.0
Date: Thursday, March 28, 2013 Sheet 34 of 37
5 4 3 2 1
5 4 3 2 1
3 For Reduce BOM 11 Change R696, R695, R813 to short-pad 03/11 PreMP
C C
9 For Reduce BOM 07 Change R582 to short-pad 03/11 PreMP
11 For Module Design 12 Change R693, R697 from 10k to 4.7k 03/25 PreMP
B B
15
16
17
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PIR (PWR)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C38-G series Chief River Schematic1.0
Date: Thursday, March 28, 2013 Sheet 35 of 37
5 4 3 2 1
A B C D E
EC_ON
B+ +3VLP
PU401
SY8208BQKC +3VALW
+EC_VCCA
LAN_PWR_ON#
+3V_LAN
P-CHANNEL
PMV65XP
1 1
SUSP#
U35P +3VS
TPS22966DPUR
SPOK
PU502 +1.8VALW
SY8033BDBC
SUSP#
U1895P +1.8VS
TPS22966DPUR
2 EC_ON 2
+VL
PU402
SY8208CQKC
+5VALW
SUSP#
U35P +5VS
TPS22966DPUR
SUSP# / SYSON
+0.75VS
PU501
RT8207MZQW
+1.5V
SUSP#
P-CHANNEL +1.5VS
LP2301ALT1G
3 3
SPOK
PU601 +0.95VALW
TPS51212DSCR
SUSP#
U1895P +0.95VS
TPS22966DPUR
VR_ON
+APU_CORE
PU901
ISL62771HRTZ
+APU_CORE_NB
4 4
SPOK
PQ204 +VSB
TP0610K
+3VALW B+ +5VALW
+3VALW / +1.8VALW / +1.5VALW / +0.95VALW
+3VS / +1.8VS / +1.5VS / +0.95VS
+3VLP +3VALW
+APU_CORE / +APU_CORE_NB
PU502 PU601 +RTCBATT
+1.8VALW
V V +0.95VALW
V V
D EC EC_RSMRST# 5 D
V V
3A 3B
PBTN_OUT# 6 APU
095_18ALW_PWR_EN
SLP_S3# / SLP_S5# 7
V
V V
4A 5
B+ B+
KBRST# 10 17 APU_PCIE_RST#
3B 5
V
3A 3B 15 APU_PWRGD +3VS +1.5VS
PU402 PU401 SPOK
SYS_PWRGD_EC 14
V
+5VALW / VL +3VALW/+3VLP
V V
LPC_RST# 16
V
2A 2B EC_ON
WLAN / WiMAX
V
Mini-Express Card
1A ACIN
V V
C C
ON/OFF
4A 1B
+5VS / +3VS / +1.8VS D4
V
AC MODE +5VALW B+
Diode
VIN 095VS_PWR_EN 11
15
+3V_LAN
APU_PWRGD 13
V
PU901 VGATE
V
BATT MODE 12 +APU_CORE /
VR_ON
BATT+ +APU_CORE_NB
V
LAN
V
SYSON
SUSP#
+5VALW
RTC Battery LAN_PERST# 18
+CHGRTC_R 8 9
+3VALW
V
B
+5VALW +3VALW +5VALW U35P B
B+ +5VS
+CHGRTC_R +3VLP VIN BATT+
+1.8VALW +5VALW
U35P
V
PU501 +3VS
V
+RTCBATT B+
+1.8VS
+3VALW
Q20
V
V
A
PCB NAME: +0.75VS +0.95VS A
REVISION:
DATE: 2011/11/23 Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date Title
Deciphered Date
Power sequence
COMPAL CONFIDENTIAL THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Sheet of
Rev
1.0
5 4 3 2 1
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