7/16/2020

K L Deemed to be University
Department of ECE -- KLVZA
Course Handout
2020-2021, Odd Sem
Course Title :LPVLSI
Course Code :18EC3061
L-T-P-S Structure : 3-0-0-0
Pre-requisite :
Credits :3
Course Coordinator :ERNEST RAVINDRAN R S
Team of Instructors :
Teaching Associates :
Syllabus :Low Power CMOS VLSI Design: Sources of Power Dissipation, Static and Dynamic Power
Dissipation, Active Power Dissipation, Designing for low-power, Circuit techniques for leakage power
reduction. Simulation and Power Analysis: SPICE circuit Simulation, Discrete Transistor Modelling and
Analysis, Gate level logic simulation, architecture level analysis, Date correlation analysis in DSP systems,
monte carlo simulation. Random Logic Signals, Probability and Frequency, Probabilistic power analysis
techniques, signal entropy. Low Voltage, Low Power Adders and Multipliers: Standard Adder cells, CMOS
Adder’s architectures, Bi-CMOS Adders, Low-voltage, Low-power design techniques, Current-mode
adders. Low Voltage Low-Power Multipliers Introduction, Overview of Multiplication, Types of Multiplier
Architectures, Booth Multiplier, Wallace Tree Multiplier. Low-Voltage, Low-Power Memories: Basics of
ROM, Low-Power ROM Technology, Future Trend and Development of ROMs, Basics of SRAM, Memory
Cell, Precharge and Equalization Circuit, Low-Power SRAM Technologies, Basics of DRAM, Self-Refresh
Circuit, Future Trend and Development of DRAM
Text Books :1. Kiat-Seng Yeo, Kaushik Roy, Low-Voltage, Low-Power VLSI Subsystems –TMH
Professional Engineering. 2. Gary K. Yeap, Practical Low Power Digital VLSI Design –Kluwer Academic
Press, 2002.
Reference Books :1. Rabaey, Pedram, “Low Power Design Methodologies” Kluwer Academic. 2. Kaushik
Roy, Sharat Prasad, “Low-Power CMOS VLSI Circuit Design” Wiley. 3. Yeo, “CMOS/BiCMOS ULSI
Low Voltage Low Power” Pearson Education.
Web Links :1. https://www.youtube.com/watch?v=nmLw3ONx8L8 2. https://www.youtube.com/watch?
v=TIdMKf7jR70 3. https://www.youtube.com/watch?v=t-PyfAI-fX4
MOOCS :1. https://www.udemy.com/course/vlsi-academy-circuit-design-part2/ 2.
https://www.udemy.com/course/vlsi-academy-circuit-design/
Course Rationale :This course allows students to perform analysis of power dissipation of VLSI circuits,
identify logic blocks which are the cause of high power dissipation and addresses ways to design VLSI
circuits to minimize power consumption without sacrificing the twin goals of maximum throughput and
minimum latency. It is expected that upon completion of this course students will be able to use simulation
approaches and probabilistic approaches to identify areas of the design which have unduly high-power
consumption. Students will be able to analyze a given design and suggest alternatives to minimize the
dynamic power of a digital CMOS circuit and apply techniques that are taught in this course.
Course Objectives :The greatest business segment for VLSI designs are areas in Mobile communication
such as LTE/ UMTS base stations, smart mobile devices, WiFi nodes, Zigbee nodes and devices destined
for IoT. All these devices have stringent requirements on dynamic and leakage power which must be
observed without comprising data transfer performance. The same need for low power extends to all VLSI
circuits deployed in server farms and in the cloud. Power is the major driver of the economics and shapes
the way to transform VLSI design methodology across the board.

COURSE OUTCOMES (COs):

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Blooms
CO Taxonomy
Course Outcome (CO) PO/PSO
NO Level
(BTL)
Understand the physics of power dissipation including short
circuit power, dynamic power and leakage power, techniques
CO1 PO1 2
that makes a low power circuit and introduction to simulation
power analysis.
Illustrate probabilistic power analysis and apply low power
CO2 PO1,PO2 2
techniques at circuit level for CMOS circuits.
Apply low power techniques at gate level, architecture level and
CO3 PO1,PO2,PO3 3
system levels
Illustrate essential tasks in algorithm and architecture level low
CO4 power design environments and Apply low power clock tree PO1,PO2 2
distribution techniques to create low power devices.

COURSE OUTCOME INDICATORS (COIs)::

Outcome Highest
COI-1 COI-2 COI-3 COI-4
No. BTL
Btl-2
Identify power
CO1 2
dissipation sources
in VLSI circuits
Btl-2
Recognize circuit
CO2 2 level low power
simulation
techniques
Btl-3
Applying different
CO3 3 architectures to
design Low voltage
Low power circuits
Btl-2
Recognize advanced
CO4 2
low power low
voltage memory

PROGRAM OUTCOMES & PROGRAM SPECIFIC OUTCOMES (POs/PSOs)

Po
Program Outcome
No.
Engineering Knowledge :An ability to apply knowledge of mathematics, science, engineering
PO1 fundamentals and an engineering specialization for the solution of complex engineering problems in
engineering
Problem Analysis :An ability to identify, formulate, research literature, analyze complex engineering
PO2 problems in mechanical engineering using first principles of mathematics, natural sciences and
engineering sciences
Design/ development of solutions :An ability to design solutions for complex engineering problems
PO3 and system component or processes that meet the specified needs considering public health & safety
and cultural, societal & environment
PO4 Conduct investigations of complex problems :An ability to use research-based knowledge and
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research methods including design of experiments, analysis and interpretation of data and synthesis
of the information to obtain solutions to engineering problems
Modern tool usage :Ability to create, select and apply appropriate techniques, resources and modern
PO5
engineering activities, with an understanding of the limitations
The engineer and society :Ability to apply reasoning informed by the contextual knowledge to assess
PO6 societal, health, safety, legal and cultural issues and the consequent responsibilities relevant to the
professional engineering practice
Environment and sustainability Ability to demonstrate the knowledge of engineering solutions,
PO7 contemporary issues understanding their impacts on societal and environmental contexts, leading
towards sustainable development
Ethics : An ability to apply ethical principles and commit to professional ethics and responsibilities
PO8
and norms of engineering practice
Individual and team work :An ability to function effectively as an individual, and as a member or
PO9
leader in diverse teams and in multi-disciplinary settings
Communication :Ability to communicate effectively oral, written reports and graphical forms on
PO10
complex engineering activities
Project management and finance :Ability to demonstrate knowledge and understanding of the
PO11 engineering and management principles and apply those one’s own work, as a member and leader in
team, to manage projects and in multi-disciplinary environments
Lifelong learning An ability to recognize the need for and having the preparation and ability to
PO12
engage independent and life-long learning in broadest context of technological change
PSO1 An ability to Understand the theoretical and mathematical concepts to analyze real time problems.
PSO2 An Ability to Design and Analyze systems based on the theoretical and Practical Knowledge

Lecture Course DELIVERY Plan:

Teaching-
Book No[CH
Sess.No. CO COI Topic Learning EvaluationComponents
No][Page No]
Methods

Description of the course

T BOOK[1],
COI- handout in detail, End Semester
1 CO1 CH 1.1, PAGE Chalk,PPT,Talk
1 Introduction to low power Exam,SEM-EXAM1
NO 1
VLSI

Sources of power T BOOK [1],

COI- End Semester
2 CO1 dissipation, Introduction CH 1.2,1.3 Chalk,PPT,Talk
1 Exam,SEM-EXAM1
to static power dissipation Page no 2-3

T BOOK [1],
COI- Transistor leakage End Semester
3 CO1 CH 1.3.1 Page Chalk,PPT,Talk
1 mechanisms Exam,SEM-EXAM1
no 3

Channel Engineering for

leakage current reduction, T BOOK [1],
COI- End Semester
4 CO1 Introduction to CH 1.3.2, 1.4, Chalk,PPT,Talk
1 Exam,SEM-EXAM1
active/dynamic power Page no 25-31
dissipation

T BOOK[1],
Short circuit dissipation
COI- CH 1.4.2, End Semester
5 CO1 and switching power PPT,Talk
1 1.4.3, PAGE Exam,SEM-EXAM1
dissipation
NO 32-34

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Teaching-
Book No[CH
Sess.No. CO COI Topic Learning EvaluationComponents
No][Page No]
Methods

T BOOK[1]
Introduction to circuit CH.
COI- End Semester
6 CO1 techniques for low power 2.1,2.2,2.3, PPT,Talk
1 Exam,SEM-EXAM1
design, transistor stacking 2.3.1 PAGE
41-43

Multiple vth techniques T BOOK[1]

COI- End Semester
7 CO1 and Dynamic vth CH 2.3.2,2.3.3 PPT,Talk
1 Exam,SEM-EXAM1
techniques PAGE 46-53

Supply voltage scaling

T BOOK[1]
COI- techniques, Leakage End Semester
8 CO1 CH 2.3.4, 2.3.5 PPT,Talk
1 reduction techniques for Exam,SEM-EXAM1
PAGE 54-56
cache(SRAM)

T BOOK[2],
COI- End Semester
9 CO2 SPICE introduction CH 2..3Page PPT
2 Exam,SEM-EXAM1
no 30-33

Basics of Gate-level
analysis, capacitive
power dissipation Internal T BOOK[2],
COI- End Semester
10 CO2 switching energy, static CH 2..3Page Chalk,PPT,Talk
2 Exam,SEM-EXAM1
state power Gate-level no 33-39
capacitance estimation,
Gate-level power analysis

Power model based on

activities Power model T BOOK [2],
COI- End Semester
11 CO2 based on component CH 2.4 Page Chalk,PPT,Talk
2 Exam,SEM-EXAM1
operations Abstract no 40- 43
statistical power models

Dual bit type signal

T BOOK [2],
COI- model Datapath module End Semester
12 CO2 CH 2.5 Page Chalk,PPT,Talk
2 characterization and Exam,SEM-EXAM1
no 44-46
power analysis

Statistical estimation of T BOOK [2],

COI- End Semester
13 CO2 mean Monte Carlo power CH 2.6 Page Chalk,PPT,Talk
2 Exam,SEM-EXAM1
simulation no 50- 54

Characterization of logic T BOOK

COI- End Semester
14 CO2 signals Continuous and [2],CH 3.1 Chalk,PPT,Talk
2 Exam,SEM-EXAM1
discrete random signals Page no 60- 62

Propagation of Static & T BOOK [2],

COI- End Semester
15 CO2 Probability in Logic CH 3.3- 3.4 Chalk,PPT,Talk
2 Exam,SEM-EXAM1
Circuits Page no 62-78

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Teaching-
Book No[CH
Sess.No. CO COI Topic Learning EvaluationComponents
No][Page No]
Methods

COI- End Semester

16 CO2 Revision CO - 1 & 2 NA Chalk,PPT,Talk
2 Exam,SEM-EXAM1

T
COI- BOOK[1],CH ATTN,End Semester
17 CO3 Standard Adder cells LTC,PPT,Talk
3 3.1Page no Exam,SEM-EXAM2
6371

T
Ripple carry adder Carry ATTN,End Semester
COI- BOOK[1],CH
18 CO3 look ahead adder Carry LTC,PPT,Talk Exam Online,HA,SEM-
3 3.3Page no
select adder EXAM2
7281

T
Carry save adder Carry
COI- BOOK[1],CH ATTN,End Semester
19 CO3 skip adder Conditional LTC,PPT,Talk
3 3.3 Page no Exam,SEM-EXAM2
sum adder
8189

T
COI- Bi CMOS adder PT- Bi ATTN,End Semester
20 CO3 BOOK[1],CH LTC,PPT,Talk
3 CMOS Gate Exam,SEM-EXAM2
3.4Page no 909

Trends of technology and

T ALM,ATTN,End
COI- power supply Voltage
21 CO3 BOOK[1],CH PPT,Talk Semester Exam,SEM-
3 Low - voltage low- power
3.5Page no 959 EXAM2
logic style

Current – mode CMOS T BOOK[2], ALM,ATTN,End

COI-
22 CO3 adders using multiple CH 3.6 Page PPT,Talk Semester Exam,SEM-
3
valued logic no 100-10 EXAM2

T BOOK [2], ALM,ATTN,End

COI-
23 CO3 PDA, Residue adders CH 3.6 Page PPT,Talk Semester Exam,SEM-
3
no 100-104 EXAM2

Fast addition using the T BOOK [2],

COI- ATTN,End Semester
24 CO3 new signed-digit number CH 3.6 Page PPT,Talk
3 Exam,SEM-EXAM2
system no 100-104

T BOOK [2],
Introduction to multiplier, CH 4.1- 4.2
ALM,ATTN,End
COI- Serial multipliers Parallel Page no
25 CO3 PPT,Talk Semester Exam,SEM-
3 multipliers Serial-Parallel 119122, CH
EXAM2
multiplier 4.3 Page no
122-124

Booth’s algorithm
T BOOK [2], ALM,ATTN,End
COI- Modified Booth
26 CO3 CH 4.6 Page PPT,Talk Semester Exam,SEM-
3 algorithm Performance
no 131-138 EXAM2
consideration

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Teaching-
Book No[CH
Sess.No. CO COI Topic Learning EvaluationComponents
No][Page No]
Methods

4:2 compressors Wallace

T BOOK [2], ALM,ATTN,End
COI- tree construction
27 CO3 CH 4.7 Page PPT,Talk Semester Exam,SEM-
3 Performance
no 139-14 EXAM2
consideration

T BOOK[1],
COI- Chip architecture ROM End Semester
28 CO4 CH 5.5Page Chalk,PPT,Talk
4 cell arrays Exam,SEM-EXAM2
no163-164

Low power techniques at

T BOOK[1],
COI- architecture level Low End Semester
29 CO4 CH 5.6Page Chalk,PPT,Talk
4 power techniques at Exam,SEM-EXAM2
no167-173
circuit level

Comparison of EEPROM T BOOK[1],

COI- End Semester
30 CO4 and Flash memory CH 5.7Page Chalk,PPT,Talk
4 Exam,SEM-EXAM2
Technology Roadmap no171-173

SRAM basic, SRAM T BOOK[1],

COI- End Semester
31 CO4 architecture, Timing CH 6.4Page Chalk,PPT,Talk
4 Exam,SEM-EXAM2
diagram of SRAM no181-185

T BOOK[1]
COI- SRAM cell 6T Page No 257- ALM,End Semester
32 CO4 PPT,Talk
4 architecture and design 258 & Web Exam,SEM-EXAM2
references

T
COI- Low voltage Low power BOOK[1],CH End Semester
33 CO4 Chalk,PPT,Talk
4 SRAM cell 6.4Page Exam,SEM-EXAM2
no181-185

Bit line precharge using

nMOS and pMOS loads
COI- T BOOK[1], End Semester
34 CO4 Precharge and Chalk,PPT,Talk
4 CH 6.5Pag 192 Exam,SEM-EXAM2
equalization circuit using
nMOS and pMOS.

Source of SRAM power T BOOK[1],

COI- End Semester
35 CO4 Development of low CH 7.3Page no Chalk,PPT,Talk
4 Exam,SEM-EXAM2
power circuit techniques 226

T BOOK[1],
COI- Basic architecture Read End Semester
36 CO4 CH 7.3Page no Chalk,PPT,Talk
4 and Write operation Exam,SEM-EXAM2
226

nMOS differential
T BOOK[1],
COI- amplifier, CMOS End Semester
37 CO4 CH 7.4Page no Chalk,PPT,Talk
4 differential to digital Exam,SEM-EXAM2
228
converter

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Teaching-
Book No[CH
Sess.No. CO COI Topic Learning EvaluationComponents
No][Page No]
Methods

T BOOK[1],
COI- Future trends of DRAM End Semester
38 CO4 CH 7.10Page Chalk,PPT,Talk
4 cell Exam,SEM-EXAM2
no 253

T
COI- Future development of BOOK[1],CH End Semester
39 CO4 Chalk,PPT,Talk
4 DRAM cell 7.10Page no Exam,SEM-EXAM2
253

Lecture Session wise Teaching – Learning Plan

SESSION NUMBER : 1

Session Outcome: 1 Remember the sources of power dissipation including short circuit power, dynamic
power and leakage power, techniques that makes a low power circuit

Teaching- Active
Time(min) Topic BTL Learning Learning
Methods Methods
Immediate
10 ATTENDANCE/POPUP QUESTIONS 1 Talk
feedback
--- NOT
10 Discussion on course handout 2 PPT APPLICABLE
---
--- NOT
20 Introduction to Low power VLSI design 2 PPT APPLICABLE
---
Quiz/Test
10 Quiz 1 Talk
Questions

SESSION NUMBER : 2

Session Outcome: 1 Sources of Dynamic Power Dissipation

Teaching- Active
Time(min) Topic BTL Learning Learning
Methods Methods
Immediate
10 Revision of the previous lecture & Pop-up quiz 1 Talk
feedback
--- NOT
Sources of power dissipation, Introduction to static
20 2 PPT APPLICABLE
power dissipation
---
Quiz/Test
10 Simple quiz 1 Talk
Questions
--- NOT
10 Discussion on quiz and Summary 2 Talk APPLICABLE
---

SESSION NUMBER : 3

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Session Outcome: 1 Low Power design techniques

Teaching- Active
Time(min) Topic BTL Learning Learning
Methods Methods
Immediate
10 Recall and Pop-up quiz 1 Talk
feedback
--- NOT
5 Doubt clarification on flipped class 1 Talk APPLICABLE
---
Quiz/Test
25 Quiz 1 Talk
Questions
--- NOT
10 Discussion on quiz 1 PPT APPLICABLE
---

SESSION NUMBER : 4

Session Outcome: 1 Circuit Techniques for Leakage power reduction

Teaching- Active
Time(min) Topic BTL Learning Learning
Methods Methods
Immediate
5 Recall and pop-up quiz 1 Talk
feedback
--- NOT
Channel engineering for leakage current reduction,
20 1 PPT APPLICABLE
Active/dynamic power dissipation
---
--- NOT
20 Transistor leakage 2 PPT APPLICABLE
---
Immediate
5 Attendance/Popup/Polling 1 Talk
feedback

SESSION NUMBER : 5

Session Outcome: 1 Short circuit dissipation and switching power dissipation

Teaching- Active
Time(min) Topic BTL Learning Learning
Methods Methods
--- NOT
5 Revision of the previous lecture 1 Talk APPLICABLE
---
--- NOT
Short circuit power dissipation and switching power
20 2 PPT APPLICABLE
dissipation
---
--- NOT
Problem-solving on short circuit and switching power
10 2 Chalk APPLICABLE
dissipation
---
--- NOT
10 Discussion on problem solving 2 Talk APPLICABLE
---
5 Attendance/Popup/Polling 1 Talk Immediate
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feedback

SESSION NUMBER : 6

Session Outcome: 1 Circuit techniques for low power reduction

Teaching- Active
Time(min) Topic BTL Learning Learning
Methods Methods
--- NOT
5 Revision of the previous lecture 1 PPT APPLICABLE
---
--- NOT
20 Designing for low power and circuit techniques 1 PPT APPLICABLE
---
--- NOT
Standby leakage control using transistor stacks (self
20 1 PPT APPLICABLE
reverse bias)
---
--- NOT
5 Attendance/popup/polling 1 Talk APPLICABLE
---

SESSION NUMBER : 7

Session Outcome: 1 Multiple and Dynamic Vth techniques

Teaching- Active
Time(min) Topic BTL Learning Learning
Methods Methods
--- NOT
5 Revision of the previous lecture 1 PPT APPLICABLE
---
--- NOT
30 Multiple vth techniques 1 PPT APPLICABLE
---
--- NOT
10 Dynamic vth techniques 1 PPT APPLICABLE
---
--- NOT
5 Attendance/popup/polling 1 Talk APPLICABLE
---

SESSION NUMBER : 8

Session Outcome: 1 Supply voltage scaling techniques

Teaching- Active
Time(min) Topic BTL Learning Learning
Methods Methods
--- NOT
5 Revision of the precious lecture 1 Talk APPLICABLE
---
--- NOT
10 Supply voltage scaling techniques 1 PPT APPLICABLE
---
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20 Leakage reduction techniques for cache (SRAM) in brief 1 PPT --- NOT
APPLICABLE
---
--- NOT
10 Revision of CO1 1 Talk APPLICABLE
---
--- NOT
5 Attendance/popup/polling 1 Talk APPLICABLE
---

SESSION NUMBER : 9

Session Outcome: 1 Able to understand the SPICE simulation tool

Teaching- Active
Time(min) Topic BTL Learning Learning
Methods Methods
--- NOT
10 Recap/Polling question 1 Talk APPLICABLE
---
--- NOT
Doubt clarification from flipped class video and SPICE -
10 2 PPT APPLICABLE
Introduction
---
Quiz/Test
20 Quiz from flipped class video 1 Talk
Questions
--- NOT
10 Discussion on the quiz 2 Talk APPLICABLE
---

SESSION NUMBER : 10

Session Outcome: 2 Understand Gate level logic simulation

Teaching- Active
Time(min) Topic BTL Learning Learning
Methods Methods
Immediate
10 Attendance & Recap 1 Talk
feedback
--- NOT
Basics of Gate-level analysis, capacitive power
10 2 PPT APPLICABLE
dissipation
---
--- NOT
10 Internal switching energy, static state power 2 PPT APPLICABLE
---
--- NOT
Gate-level capacitance estimation, Gate-level power
10 2 PPT APPLICABLE
analysis
---
Immediate
10 Summary & pop-up quiz 2 Talk
feedback

SESSION NUMBER : 11

Session Outcome: 2 Architecture level analysis

Time(min) Topic BTL Teaching- Active

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Learning Learning
Methods Methods
Immediate
10 Attendance & Recap 2 Talk
feedback
--- NOT
10 Power model based on activities 2 PPT APPLICABLE
---
--- NOT
Power model based on component operations and
10 2 PPT APPLICABLE
Abstract statistical power models
---
Quiz/Test
10 Quiz 1 PPT
Questions
Quiz/Test
10 Summary & Conclusions 2 Talk
Questions

SESSION NUMBER : 12

Session Outcome: 2 Understanding Data correction analysis in DSP system

Teaching- Active
Time(min) Topic BTL Learning Learning
Methods Methods
Immediate
10 Attendance & Recap 1 Talk
feedback
--- NOT
10 Dual bit type signal model 2 PPT APPLICABLE
---
--- NOT
20 Datapath module characterization and power analysis 2 PPT APPLICABLE
---
Immediate
10 Summary & Pop-up quiz 1 Talk
feedback

SESSION NUMBER : 13

Session Outcome: 2 Understand Monte Carlo simulation

Teaching- Active
Time(min) Topic BTL Learning Learning
Methods Methods
Immediate
10 Attendance & Recap 1 Talk
feedback
--- NOT
10 Statistical estimation of mean 2 PPT APPLICABLE
---
--- NOT
10 Monte Carlo power simulation 2 PPT APPLICABLE
---
Quiz/Test
20 Quiz 1 Talk
Questions

SESSION NUMBER : 14

Session Outcome: 2 Understand Random logic signals

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Teaching- Active
Time(min) Topic BTL Learning Learning
Methods Methods
Immediate
10 Attendance & Recap 1 Talk
feedback
--- NOT
20 Characterization of logic signals 2 PPT APPLICABLE
---
--- NOT
10 Continuous and discrete random signals 2 PPT APPLICABLE
---
Quiz/Test
10 Summary & ALM 2 Talk
Questions

SESSION NUMBER : 15

Session Outcome: 2 Probabilistic power analysis techniques and Entropy

Teaching- Active
Time(min) Topic BTL Learning Learning
Methods Methods
Immediate
5 Recap & Pop-up 1 Talk
feedback
--- NOT
Propagation of Static Probability in Logic Circuits ,
5 2 Talk APPLICABLE
Transition Density Signal Model
---
--- NOT
Propagation of Transition Density, Gate Level Power
10 2 Talk APPLICABLE
Analysis Using Transition Density
---
--- NOT
10 Basics of Entropy, Power Estimation Using Entropy 2 PPT APPLICABLE
---
--- NOT
Static probability and frequency, Conditional probability
10 2 PPT APPLICABLE
and frequency &
---
--- NOT
10 Word-level and bit-level statistics 2 PPT APPLICABLE
---
--- NOT
5 Summary 1 PPT APPLICABLE
---

SESSION NUMBER : 16

Session Outcome: 2 Revision

Teaching- Active
Time(min) Topic BTL Learning Learning
Methods Methods
Immediate
5 Attendance & Recap 1 Talk
feedback
Group
20 Revision CO-1 2 Talk
Discussion
20 Revision CO-2 2 Talk Group
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Discussion

SESSION NUMBER : 17

Session Outcome: 1 Understanding adders circuits

Teaching- Active
Time(min) Topic BTL Learning Learning
Methods Methods
--- NOT
5 Recap 1 Talk APPLICABLE
---
--- NOT
20 Standard HA,FA design by using tool 2 LTC APPLICABLE
---
--- NOT
5 Creating a breakout room 1 Talk APPLICABLE
---
--- NOT
20 Different configurations of FA 2 Talk APPLICABLE
---
--- NOT
40 Designing different configurations of FA using Tool 3 LTC APPLICABLE
---
--- NOT
10 Problems Discussion 2 Talk APPLICABLE
---

SESSION NUMBER : 18

Session Outcome: 1 Understand CMOS Adder architectures and apply in different circuits

Teaching- Active
Time(min) Topic BTL Learning Learning
Methods Methods
Immediate
5 Recap & Pop-up 1 Talk
feedback
--- NOT
20 RCA,CLA Architecture 2 PPT APPLICABLE
---
--- NOT
5 Creating a breakout room 1 Talk APPLICABLE
---
--- NOT
20 Designing of 4bit RCA,CLA using tool 3 LTC APPLICABLE
---
--- NOT
40 Designing 16/32 bit RCA, CLA using tool 3 LTC APPLICABLE
---
--- NOT
10 Problems Discussion 2 Talk APPLICABLE
---

SESSION NUMBER : 19
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Session Outcome: 1 Understand CMOS Adder architectures and apply in different circuit

Teaching- Active
Time(min) Topic BTL Learning Learning
Methods Methods
--- NOT
5 Recap of the previous session 1 Talk APPLICABLE
---
--- NOT
20 CSL, CSA, CSK Architecture 2 PPT APPLICABLE
---
--- NOT
5 Creating a breakout room 1 Talk APPLICABLE
---
--- NOT
20 Designing of 4bit CSL using tool 3 LTC APPLICABLE
---
--- NOT
40 Designing 4 bit CSA, CSK using tool 3 LTC APPLICABLE
---
--- NOT
10 Problems Discussion 2 Talk APPLICABLE
---

SESSION NUMBER : 20

Session Outcome: 1 Understand Bi CMOS adder

Teaching- Active
Time(min) Topic BTL Learning Learning
Methods Methods
--- NOT
Recap of previous session & COS, BiCMOS
20 1 Talk APPLICABLE
Architecture
---
--- NOT
5 Creating a breakout room 1 Talk APPLICABLE
---
--- NOT
20 Designing of PT- XOR/XNOR gate 3 LTC APPLICABLE
---
--- NOT
5 Problems Discussion 2 Talk APPLICABLE
---

SESSION NUMBER : 21

Session Outcome: 3 Able to Understand Low-voltage, Low-power design techniques

Teaching- Active
Time(min) Topic BTL Learning Learning
Methods Methods
--- NOT
20 Recap, Trends of technology and power supply Voltage 2 PPT APPLICABLE
---

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20 Doubts, Low -voltage low- power logic styles 2 PPT --- NOT
APPLICABLE
---
Quiz/Test
10 Quiz 1 Talk
Questions

SESSION NUMBER : 22

Session Outcome: 3 Able to Understand current mode adders

Teaching- Active
Time(min) Topic BTL Learning Learning
Methods Methods
--- NOT
Recap, Current – mode CMOS adders using multiple-
20 2 PPT APPLICABLE
valued logic
---
--- NOT
20 Doubts, SDDA 2 PPT APPLICABLE
---
Quiz/Test
10 Quiz though LMS 5 Talk
Questions

SESSION NUMBER : 23

Session Outcome: 3 Able to understand the architecture of PDA, Residue adders

Teaching- Active
Time(min) Topic BTL Learning Learning
Methods Methods
--- NOT
20 Recap, PDA Architecture 2 PPT APPLICABLE
---
--- NOT
20 Doubts, Introduction to Residue adders 2 PPT APPLICABLE
---
Quiz/Test
10 Quiz though LMS 5 Talk
Questions

SESSION NUMBER : 24

Session Outcome: 3 Able to understand the performance of Residue adders based on binary adders

Teaching- Active
Time(min) Topic BTL Learning Learning
Methods Methods
--- NOT
Recap, Fast addition using new signed digit number
20 2 PPT APPLICABLE
system
---
--- NOT
5 Creating a breakout room 1 Talk APPLICABLE
---
--- NOT
20 Problems on PDA, Residue adders, Fast addition 3 Talk APPLICABLE
---
5 Problems Discussion 2 Talk --- NOT
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APPLICABLE
---

SESSION NUMBER : 25

Session Outcome: 3 able to recall the multiplication

Teaching- Active
Time(min) Topic BTL Learning Learning
Methods Methods
--- NOT
20 Recap, Overview of multiplication 1 Talk APPLICABLE
---
--- NOT
20 Doubts, Types of multipliers 2 PPT APPLICABLE
---
Quiz/Test
10 Quiz though LMS 5 Talk
Questions

SESSION NUMBER : 26

Session Outcome: 1 Able to perform Booth’s algorithm Modified Booth algorithm Performance

Teaching- Active
Time(min) Topic BTL Learning Learning
Methods Methods
--- NOT
20 Recap, Booth algorithm, Modified Booth algorithm 2 PPT APPLICABLE
---
--- NOT
5 Doubts 2 Talk APPLICABLE
---
--- NOT
20 Problems on Booth, modified Booth algorithm 3 Talk APPLICABLE
---
--- NOT
5 Problems Discussion 2 Talk APPLICABLE
---

SESSION NUMBER : 27

Session Outcome: 1 able to understand and perform Wallace tree construction

Teaching- Active
Time(min) Topic BTL Learning Learning
Methods Methods
--- NOT
20 Recap, Wallace tree multiplier 2 PPT APPLICABLE
---
--- NOT
20 over all review 1 Talk APPLICABLE
---
Quiz/Test
10 Quiz 1 Talk
Questions

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SESSION NUMBER : 28

Session Outcome: 1 Able to understand the Chip architecture ROM cell arrays

Teaching- Active
Time(min) Topic BTL Learning Learning
Methods Methods
Immediate
5 Attendance and Recap 1 Talk
feedback
--- NOT
20 Chip architecture 2 PPT APPLICABLE
---
--- NOT
10 ROM cell arrays 2 PPT APPLICABLE
---
Quiz/Test
10 Quiz 1 Talk
Questions

SESSION NUMBER : 29

Session Outcome: 1 Able to understand Low power techniques at architecture level & circuit level

Teaching- Active
Time(min) Topic BTL Learning Learning
Methods Methods
--- NOT
10 Attendance and recap 2 Talk APPLICABLE
---
--- NOT
20 Low power techniques at architecture level 2 PPT APPLICABLE
---
--- NOT
20 Low power techniques at circuit level 2 PPT APPLICABLE
---

SESSION NUMBER : 30

Session Outcome: 1 Able to understand the difference between EEPROM and Flash Memory

Teaching- Active
Time(min) Topic BTL Learning Learning
Methods Methods
--- NOT
10 Attendance and Recap 1 Talk APPLICABLE
---
--- NOT
20 Comparison of EEPROM and Flash memory 2 Talk APPLICABLE
---
--- NOT
10 Technology Roadmap 2 PPT APPLICABLE
---
Quiz/Test
10 Summary & Quiz 1 Talk
Questions

SESSION NUMBER : 31
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Session Outcome: 1 Able to understand SRAM

Teaching- Active
Time(min) Topic BTL Learning Learning
Methods Methods
Immediate
10 Attendance and recap 1 Talk
feedback
--- NOT
10 SRAM basic 2 Talk APPLICABLE
---
--- NOT
20 SRAM architecture 2 PPT APPLICABLE
---
--- NOT
10 Timing diagram of SRAM 2 PPT APPLICABLE
---

SESSION NUMBER : 32

Session Outcome: 1 Understand architecture and design of SRAM cell

Teaching- Active
Time(min) Topic BTL Learning Learning
Methods Methods
--- NOT
5 Recap of the previous session 1 Talk APPLICABLE
---
--- NOT
20 SRAM cell architecture 2 PPT APPLICABLE
---
--- NOT
5 Creating a breakout room 1 Talk APPLICABLE
---
--- NOT
20 Design of 6T SRAM cell in DSCH 3 Talk APPLICABLE
---
--- NOT
40 Layout construction of SRAM cell in MICROWIND 3 Talk APPLICABLE
---
--- NOT
10 Discussion on simulation results 4 Talk APPLICABLE
---

SESSION NUMBER : 33

Session Outcome: 1 Able to understand Low voltage Low power SRAM cell

Teaching- Active
Time(min) Topic BTL Learning Learning
Methods Methods
Immediate
10 Attendance and recap 1 Talk
feedback
30 Low voltage Low power SRAM cell 2 PPT --- NOT
APPLICABLE
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---
--- NOT
10 Summary 2 Talk APPLICABLE
---

SESSION NUMBER : 34

Session Outcome: 1 Able to understand and perform bit line precharge

Teaching- Active
Time(min) Topic BTL Learning Learning
Methods Methods
--- NOT
10 Attendance and recap 1 Talk APPLICABLE
---
--- NOT
20 Bit line precharge using nMOS and pMOS loads 2 Talk APPLICABLE
---
--- NOT
Precharge and equalization circuit using nMOS and
20 2 Talk APPLICABLE
pMOS.
---

SESSION NUMBER : 35

Session Outcome: 1 Able to understand Source of SRAM power

Teaching- Active
Time(min) Topic BTL Learning Learning
Methods Methods
--- NOT
10 Attendance and recap 1 Talk APPLICABLE
---
Group
20 Source of SRAM power 2 Talk
Discussion
--- NOT
20 Development of low power circuit techniques 2 PPT APPLICABLE
---

SESSION NUMBER : 36

Session Outcome: 1 Able to understand Basic architecture Read and Write operation

Teaching- Active
Time(min) Topic BTL Learning Learning
Methods Methods
Immediate
10 Attendance and recap 1 Talk
feedback
--- NOT
20 Basic architecture Read and Write operation 2 PPT APPLICABLE
---
Quiz/Test
20 Quiz 1 Talk
Questions

SESSION NUMBER : 37

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Session Outcome: 1 able to understand various circuits

Teaching- Active
Time(min) Topic BTL Learning Learning
Methods Methods
Immediate
10 Attendance and recap 1 Talk
feedback
--- NOT
10 nMOS differential amplifier 2 PPT APPLICABLE
---
--- NOT
20 CMOS differential to digital converter 2 PPT APPLICABLE
---
--- NOT
10 Summary & Assignment 2 Talk APPLICABLE
---

SESSION NUMBER : 38

Session Outcome: 1 Understand the future trends of DRAM

Teaching- Active
Time(min) Topic BTL Learning Learning
Methods Methods
--- NOT
10 Attendance and recap 1 Talk APPLICABLE
---
Group
30 Future trends of DRAM cell 2 Talk
Discussion
--- NOT
10 Summary 2 Talk APPLICABLE
---

SESSION NUMBER : 39

Session Outcome: 1 Able to understand Future development of DRAM cell

Teaching- Active
Time(min) Topic BTL Learning Learning
Methods Methods
--- NOT
10 Attendance and recap 2 Talk APPLICABLE
---
--- NOT
20 Future development of DRAM cell 2 PPT APPLICABLE
---
Group
20 Revision CO-4 1 Talk
Discussion

Tutorial Course DELIVERY Plan: NO Delivery Plan Exists

Tutorial Session wise Teaching – Learning Plan

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No Session Plans Exists

Practical Course DELIVERY Plan: NO Delivery Plan Exists

Practical Session wise Teaching – Learning Plan

No Session Plans Exists

Skilling Course DELIVERY Plan: NO Delivery Plan Exists

Skilling Session wise Teaching – Learning Plan

No Session Plans Exists

WEEKLY HOMEWORK ASSIGNMENTS/ PROBLEM SETS/OPEN ENDEDED PROBLEM-SOLVING EXERCISES

etc:

Assignment Assignment
Week Topic Details co
Type No
Weekly
5 Homework 4 Performance evaluation RCA, CLA, ELM CO3
Assignments
o Multiple valued logic o
CMMVL system o 4-digit
decimal adder o Structure
Weekly
of SDDA o Positive digit
6 Homework 5 Current mode Adders CO3
Adder (PDA) o Residue
Assignments
adders o Fast addition
using new Signed-Digit
number system (I2T)
Weekly
7 Homework 6 SRAM cell characteristics 6T and 4T memory cell CO4
Assignments
Weekly
Basic architecture Read and Write Basic architecture Read and
9 Homework 7 CO4
operation Write operation
Assignments
Bit line precharge using
Bit line precharge using nMOS and
Weekly nMOS and pMOS loads
pMOS loads Precharge and
10 Homework 8 Precharge and equalization CO4
equalization circuit using nMOS
Assignments circuit using nMOS and
and pMOS.
pMOS.
Transistor stacking
Multiple Vth techniques
Multiple channel doping
Weekly
Circuit techniques for low power Multiple oxide CMOS
1 Homework 2 CO1
design Multiple channel length
Assignments
Multiple body bias
MTCMOS VTMOS
DTMOS DGDTMOS
Weekly DRG-Cache Dynamic Vdd
2 Homework 1 Static Power dissipation Cache Dynamic threshold CO1
Assignments voltage SRAM
4 Weekly 3 Standard Adder cells o Conventional CMOS FA CO3
Homework o Modified Conventional
Assignments CMOS FA o FA without

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XOR gates o TFA (16 T) o

14-T FA o 17-T FA o 10-T
FA

COURSE TIME TABLE:

Hour 1 2 3 4 5 6 7 8 9
Day Component
Theory -- -- -- -- -- -- -- -- --
Tutorial -- -- -- -- -- -- -- -- --
Mon
Lab -- -- -- -- -- -- -- -- --
Skilling -- -- -- -- -- -- -- -- --
Theory -- -- -- -- -- -- -- -- --
Tutorial -- -- -- -- -- -- -- -- --
Tue
Lab -- -- -- -- -- -- -- -- --
Skilling -- -- -- -- -- -- -- -- --
Theory -- -- -- -- -- -- -- -- --
Tutorial -- -- -- -- -- -- -- -- --
Wed
Lab -- -- -- -- -- -- -- -- --
Skilling -- -- -- -- -- -- -- -- --
Theory -- -- -- -- -- -- -- -- --
Tutorial -- -- -- -- -- -- -- -- --
Thu
Lab -- -- -- -- -- -- -- -- --
Skilling -- -- -- -- -- -- -- -- --
-- -- -- -- V-S1,V-S2,V-S3,V- V-S1,V-S2,V-S3,V-
Theory --- --- ---
- - - - S4 S4
-- -- -- --
Tutorial -- -- --- --- ---
- - - -
Fri
-- -- -- --
Lab -- -- --- --- ---
- - - -
-- -- -- --
Skilling -- -- --- --- ---
- - - -
-- -- -- --
Theory --- --- --- --- V-S1,V-S2,V-S3,V-S4
- - - -
-- -- -- --
Tutorial --- --- --- --- --
- - - -
Sat
-- -- -- --
Lab --- --- --- --- --
- - - -
-- -- -- --
Skilling --- --- --- --- --
- - - -
Theory -- -- -- -- -- -- -- -- --
Tutorial -- -- -- -- -- -- -- -- --
Sun
Lab -- -- -- -- -- -- -- -- --
Skilling -- -- -- -- -- -- -- -- --

REMEDIAL CLASSES:

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Supplement course handout, which may perhaps include special lectures and discussions that would be
planned, and schedule notified according

SELF-LEARNING:

Assignments to promote self-learning, survey of contents from multiple sources.

S.no Topics CO ALM References/MOOCS

DELIVERY DETAILS OF CONTENT BEYOND SYLLABUS:

Content beyond syllabus covered (if any) should be delivered to all students that would be planned, and
schedule notified accordingly.
Advanced Topics, Additional Reading, Research
S.no CO ALM References/MOOCS
papers and any

EVALUATION PLAN:

Evaluation Evaluation Assessment Duration

Weightage/Marks CO1 CO2 CO3 CO4
Type Component Dates (Hours)
End
Semester Weightage 40 10 10 10 10
Summative END SEM
End Semester Exam 180
Evaluation dates
Total= 40 Max Marks 100 25 25 25 25
%
In Semester Weightage 17.5 SEM IN 1 8.75 8.75
Summative Semester in Exam-I Max Marks 50 dates
120
25 25
Evaluation
Total= 35 Weightage 17.5 SEM IN 2 8.75 8.75
Semester in Exam-II 120
% Max Marks 50 dates 25 25
Weightage 12 3 3 3 3
ALM 50
In Semester Max Marks 120 30 30 30 30
Formative Weightage 5 1.25 1.25 1.25 1.25
Evaluation Attendance 50
Total= 25 Max Marks 5 1.25 1.25 1.25 1.25
% Home Assignment Weightage 8 2 3 3
50
and Textbook Max Marks 80 20 30 30

ATTENDANCE POLICY:

Every student is expected to be responsible for regularity of his/her attendance in class rooms and
laboratories, to appear in scheduled tests and examinations and fulfill all other tasks assigned to him/her in
every course
In every course, student has to maintain a minimum of 85% attendance to be eligible for appearing in
Semester end examination of the course, for cases of medical issues and other unavoidable circumstances the
students will be condoned if their attendance is between 75% to 85% in every course, subjected to
submission of medical certificates, medical case file and other needful documental proof to the concerned
departments

DETENTION POLICY :

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7/16/2020

In any course, a student has to maintain a minimum of 85% attendance and In-Semester Examinations to be
eligible for appearing to the Semester End Examination, failing to fulfill these conditions will deem such
student to have been detained in that course.

PLAGIARISM POLICY :

Supplement course handout, which may perhaps include special lectures and discussions

COURSE TEAM MEMBERS, CHAMBER CONSULTATION HOURS AND CHAMBER VENUE DETAILS:

Supplement course handout, which may perhaps include special lectures and discussions
Chamber
Delivery Sections Chamber Chamber Signature
Name of Consultation
Component of Consultation Consultation of Course
Faculty Timings for each
of Faculty Faculty Day (s) Room No: faculty:
day
LAKSHMI
L 2-MA - - - -
JAGUPILLA
EDIGA
L 3-MA - - - -
RAGHUVEERA
ERNEST
RAVINDRAN R L 1-MA - - - -
S
VAMSEE
KRISHNA L 4-MA - - - -
SOMAVARAPU

GENERAL INSTRUCTIONS

Students should come prepared for classes and carry the text book(s) or material(s) as prescribed by the
Course Faculty to the class.

NOTICES

Most of the notices are available on the LMS platform.

All notices will be communicated through the institution email.

All notices concerning the course will be displayed on the respective Notice Boards.

Signature of COURSE COORDINATOR

(ERNEST RAVINDRAN R S)

Signature of Department Prof. Incharge Academics & Vetting Team Member

Department Of ECE

HEAD OF DEPARTMENT:

Approval from: DEAN-ACADEMICS

(Sign with Office Seal) [object HTMLDivElement]

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