Pardue Dissertation 2018 PDF

WIRELESS POWER TRANSFER USING INTEGRATED AND EMERGING
TECHNOLOGIES
A Dissertation
Presented to
The Academic Faculty
By
Colin A. Pardue
In Partial Fulfillment
of the Requirements for the Degree
Doctor of Philosophy in the
School of Electrical and Computer Engineering
Georgia Institute of Technology
August 2018
Copyright
c Colin A. Pardue 2018
WIRELESS POWER TRANSFER USING INTEGRATED AND EMERGING
TECHNOLOGIES
Approved by:
Dr. Madhavan Swaminathan

School of Electrical and Computer Dr. Arijit Raychowdhury
Engineering School of Electrical and Computer
Georgia Institute of Technology Engineering
Dr. Saibal Mukhopadhyay
School of Electrical and Computer Dr. Paul Kohl
Engineering School of Chemical and Biomolec-
Georgia Institute of Technology ular Engineering
Dr. Hua Wang
School of Electrical and Computer Date Approved: April 20, 2018
Engineering
2 Corinthians 3:5 - Not that we are competent in ourselves to claim anything for ourselves,
but our competence comes from God.
ACKNOWLEDGEMENTS
To expand on my dedication, God deserves the singular credit for this dissertation. To
Him belongs all credit for the relationships and friendships I’ve developed that have helped
me, my passion for engineering, major decisions I’ve made, ideas and inspiration, and my
foundation during my most frustrating moments. As a Christian, I know God has a purpose
for me getting a PhD, and He wouldn’t let my shortcomings prevent His plan. And for that
I am endlessly grateful. Even if you don’t believe in the existence of God, then I would say
it’s still undeniable that my faith in God sustained me.
But acknowledgements aren’t fun if I only recognize God, so I need to recognize a few
others. First, my advisor Dr. Swaminathan. The opportunities he granted me to pursue
many different research paths, culminating in this dissertation, gave me plentiful interest-
ing research thrusts to pursue. In addition, Dr. Swaminathan provided superior guidance in
research objectives, publications, industry connections, and presentations that was all the
mentorship a PhD student needs and then some. An advisor in every sense of the word. I
also need to mention the postdocs Dr. Anto K Davis and Mohamed Bellaredj. Both of them
were crucial in meeting various research objectives, as noted in the following dissertation.
It was a pleasure working with both of you and I hope you benefited from working with me
even half as much as I did with you. I also would like to thank my reading committee mem-
bers Dr. Saibal Mukhopadhyay and Dr. Hua Wang and other defense committee members
Dr. Arijit Raychowdhury and Dr. Paul Kohl for their feedback, and more importantly, their
time and attendance at my defense since this is never an easy thing for any GT professor.
Thanks to fellow PhD students (current and graduated), with Hakki, Sridhar, Huan, Satyan,
Kyuhwan, Majid, and David particularly helpful during my PhD time. I appreciate your
support during my graduate studies, as well all the other Swami Ph.D. students, visiting
students, visiting scholars, masters students, and more too numerous to count.
To my family, Dad, Mom, Jacob, and Grace, who let me vent and provided encour-
iv
agement, I thank you. Also to my late grandmother Kazuko Bryant, who might have been
more proud of my intellectual accomplishments than anyone else. To all my friends, I came
to Atlanta knowing no one and now find leaving all the friends I’ve made here the hardest
part about graduating. I particularly want to single out Jason, Michael, Philip, the Wynns,
Ruben, and Daniella as well as fellow students I met at GT studying for the Prelim and
sharing many (sometimes embarassing) memories with, the rest of my FBA Mission Pos-
sible family (I don’t use this word lightly), the Reynolds and Alaska Mission Trip teams,
and all the Mary George crew. To my future dog, I’ve told myself I can adopt you once I
graduate so you might have been the strongest incentive I had.
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TABLE OF CONTENTS
Acknowledgments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iv
List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xi
List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xiii
Chapter 1: Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Survey of Wireless Power Transfer Techniques . . . . . . . . . . . . . . . . 2
1.3 Effect of Frequency on Resonant Inductive Coupling . . . . . . . . . . . . 8
1.4 Integrated Wireless Power Transfer Solutions . . . . . . . . . . . . . . . . 11
1.5 Dissertation Contributions . . . . . . . . . . . . . . . . . . . . . . . . . . 14
1.6 Dissertation Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Chapter 2: RF Near Field Coupling Architecture and Efficiency Analysis . . . . 17
2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2.2 RF WPT System Architecture . . . . . . . . . . . . . . . . . . . . . . . . . 17
2.3 Power Loss Modeling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2.3.1 RFNFC and Coil and Source Efficiency . . . . . . . . . . . . . . . 23
2.3.2 RF-DC Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . 26
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2.3.3 PDU Input Voltage and System Efficiency Analysis Procedure . . . 29
2.4 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Chapter 3: Subsystem Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
3.2 Design Identification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
3.3 Coil Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
3.3.1 Selection of Coil Geometry . . . . . . . . . . . . . . . . . . . . . . 41
3.3.2 Coil Parameter Modeling . . . . . . . . . . . . . . . . . . . . . . . 42
3.3.3 Coil Design and Efficiency . . . . . . . . . . . . . . . . . . . . . . 46
3.3.4 Effect of Misalignment . . . . . . . . . . . . . . . . . . . . . . . . 53
3.4 Rectifier Topology and Diode Selection . . . . . . . . . . . . . . . . . . . 55
3.4.1 Diode Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
3.4.2 Rectifier Topology . . . . . . . . . . . . . . . . . . . . . . . . . . 57
3.5 Coil + Rectifier Experimental Work . . . . . . . . . . . . . . . . . . . . . 58
3.5.1 Bridge vs Half Wave Rectifier . . . . . . . . . . . . . . . . . . . . 59
3.5.2 Rectifier Efficiency with Increasing Input Power . . . . . . . . . . . 59
3.5.3 Rectifier Efficiency with Increasing Resistance . . . . . . . . . . . 60
3.5.4 Different Frequencies . . . . . . . . . . . . . . . . . . . . . . . . . 61
3.5.5 Different Transmission Distance . . . . . . . . . . . . . . . . . . . 62
3.6 4 Coil Circuit Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
3.7 PDU Selection and Circuit Design . . . . . . . . . . . . . . . . . . . . . . 65
3.8 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
vii
Chapter 4: RF NFC Integration Challenges . . . . . . . . . . . . . . . . . . . . . 68
4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
4.2 Component Value Selection for RF Inductive WPT . . . . . . . . . . . . . 68
4.2.1 Purpose of External Components . . . . . . . . . . . . . . . . . . . 68
4.2.2 Parasitic Capacitance Adjustment . . . . . . . . . . . . . . . . . . 69
4.2.3 Significance of Microstrip Lines . . . . . . . . . . . . . . . . . . . 70
4.2.4 The Dynamic Behavior of Half Wave Rectifiers in RF Near Field

Coupling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
4.2.5 Component Selection Process . . . . . . . . . . . . . . . . . . . . 77
4.3 Reverse Power Distribution Network . . . . . . . . . . . . . . . . . . . . . 80
4.3.1 Reverse PDN for Continuous Power Demand . . . . . . . . . . . . 80
4.3.2 Reverse PDN for Discontinuous Power Demand . . . . . . . . . . . 92
4.4 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
Chapter 5: Integrated Inductor for Light Load Applications . . . . . . . . . . . 97
5.1 Package Embedded Inductor for 10 MHz Integrated Buck Converter . . . . 98
5.1.1 System Architecture and Loss Analysis . . . . . . . . . . . . . . . 98
5.1.2 Integrated Inductor Design . . . . . . . . . . . . . . . . . . . . . . 99
5.1.3 Spiral Inductor Design and Modeling . . . . . . . . . . . . . . . . 103
5.1.4 Package Embedded Inductor Fabrication . . . . . . . . . . . . . . . 106
5.1.5 Inductor Measurement and Discussion . . . . . . . . . . . . . . . . 108
5.1.6 Inductor Comparison . . . . . . . . . . . . . . . . . . . . . . . . . 112
5.2 Integrated Inductor for TPS62615 at Light Load Discontinuous Conduction

Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
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5.2.1 Inductor Loss Analysis for Discontinuous Conduction Mode . . . . 114
5.2.2 Harmonics of DCM Inductor Current . . . . . . . . . . . . . . . . 115
5.2.3 DCM Inductor Loss Analysis . . . . . . . . . . . . . . . . . . . . . 115
5.2.4 Integrated Inductor Design . . . . . . . . . . . . . . . . . . . . . . 118
5.2.5 Integrated Inductor and SMT Inductor Comparison . . . . . . . . . 120
5.2.6 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . 124
5.3 Inductor Comparison with State of the Art . . . . . . . . . . . . . . . . . . 126
5.4 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128
Chapter 6: Complete System Measurements . . . . . . . . . . . . . . . . . . . . 129
6.1 Experimental Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
6.2 Full System Measurements . . . . . . . . . . . . . . . . . . . . . . . . . . 131
6.2.1 Fabricated Full Systems . . . . . . . . . . . . . . . . . . . . . . . 131
6.2.2 Fully Integrated Systems Measurements . . . . . . . . . . . . . . . 131
6.2.3 Other Systems with Half-Wave Rectifier . . . . . . . . . . . . . . . 134
6.2.4 Other Systems with Bridge Rectifier . . . . . . . . . . . . . . . . . 137
6.2.5 4 Coil System with Boost Converter . . . . . . . . . . . . . . . . . 141
6.3 Correlation with Calculated Efficiency Analysis and Loss Distribution . . . 143
6.3.1 Calculated and Measured Efficiency Comparison . . . . . . . . . . 143
6.3.2 Measured PDU Input Voltage . . . . . . . . . . . . . . . . . . . . . 148
6.4 Comparison to State of Art . . . . . . . . . . . . . . . . . . . . . . . . . . 152
6.5 Discussion and Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . 154
Chapter 7: Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157
ix
7.1 Future Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157
7.1.1 Decreasing Source Resistance . . . . . . . . . . . . . . . . . . . . 157
7.1.2 Application of Machine Learning . . . . . . . . . . . . . . . . . . 158
7.1.3 Flexible Hybrid Electronics . . . . . . . . . . . . . . . . . . . . . . 159
7.1.4 Figure of Merit for Inductive WPT Systems . . . . . . . . . . . . . 159
7.1.5 Improved Efficiency Analysis . . . . . . . . . . . . . . . . . . . . 160
7.1.6 Multi-power Charging Platform . . . . . . . . . . . . . . . . . . . 161
7.2 Key Accomplishments . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161
7.3 Conclusion and Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . 164
7.4 Publications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165
Appendix A: Literature Survey Comparisons . . . . . . . . . . . . . . . . . . . 169
A.1 Comparison of Inductive WPT Systems . . . . . . . . . . . . . . . . . . . 169
A.2 Comparison of Frequency vs Coil Size . . . . . . . . . . . . . . . . . . . . 169
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169
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LIST OF TABLES
1.1 RF Inductive Coupling Coils in Literature . . . . . . . . . . . . . . . . . . 9
1.2 Complete WPT Systems with Regulated Output . . . . . . . . . . . . . . . 11
1.3 Integrated WPT Systems in Literature . . . . . . . . . . . . . . . . . . . . 12
2.1 Variables used in efficiency analysis . . . . . . . . . . . . . . . . . . . . . 22
3.1 Coil Geometry and Parameters . . . . . . . . . . . . . . . . . . . . . . . . 41
3.2 Comparison of RF Diodes . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
3.3 Four Coil Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
3.4 Comparison of MHz switching PDU . . . . . . . . . . . . . . . . . . . . . 66
4.1 Component Values for Full System Measurement . . . . . . . . . . . . . . 79
5.1 Spiral Inductor Geometries . . . . . . . . . . . . . . . . . . . . . . . . . . 106
5.2 Measured Inductor Comparison . . . . . . . . . . . . . . . . . . . . . . . . 112
5.3 Geometry Parameters of Both Integrated Inductors . . . . . . . . . . . . . . 119
5.4 Comparison of Embedded and SMT Inductor . . . . . . . . . . . . . . . . 122
5.5 Comparison with Other Package Inductors . . . . . . . . . . . . . . . . . . 128
6.1 Comparison of ML design to other bridge designs . . . . . . . . . . . . . . 141
6.2 Comparison to RF near field coupling systems in literature . . . . . . . . . 152
xi
6.3 Comparison to Integrated WPT Systems in Literature . . . . . . . . . . . . 153
6.4 Comparison to Complete WPT Systems with Regulated Output . . . . . . . 153
6.5 Comparison to IoT related power delivery systems . . . . . . . . . . . . . . 154
A.1 Complete Resonant Inductive Coupling Systems in Prior Literature . . . . . 170
A.2 Resonant Inductive Coupling Coils in Literature . . . . . . . . . . . . . . . 171
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LIST OF FIGURES
1.1 Relationships between the main metrics for inductive resonant coupling
WPT systems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2 Example implementation of integrated RF near field coupling for IoT ap-
plications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.3 Characteristics of RIC systems in academic literature, relating to their coil

area, transmission distance, load power, and efficiency . . . . . . . . . . . . 7
1.4 Correlation between frequency and coil area in prior literature . . . . . . . 10
2.1 Some previous system architectures for inductive wireless power transfer
systems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.2 System architecture for RF near field coupling WPT system for mW load . 19
2.3 (a) WPT system circuit model (b) Equivalent circuit model with reflected
impedance from receiver circuit and (c) Equivalent circuit model for source
efficiency calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
2.4 Components from circuit model on fabricated circuit . . . . . . . . . . . . 21
2.5 Classification of power losses in RF near field coupling system . . . . . . . 23
2.6 Efficiency of a half wave rectifier as a function of frequency . . . . . . . . . 27
2.7 Efficiency of a half wave rectifier as a function of diode junction capacitance 28
2.8 Comparison of diode switching loss from ADS simulation and machine
learning model for HSMS 2820 diodes in RF near field coupling system . . 29
2.9 Comparison of PDU efficiency from LTSpice simulation and ML model . . 32
2.10 Procedure for determining efficiency for regulated RFNFC system . . . . . 34
xiii
3.1 Comparison of Q and k for 1, 2, and 3 turn RF coils . . . . . . . . . . . . . 42
3.2 Coil geometry for this dissertation, with side length l, line width w, and gap
distance g . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
3.3 HFSS model of coils (coil2 ) at (a) 10 mm transmission distance and (b) 2
mm transmission distance . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
3.4 Simulated H-field of coil2−2 at 5 mm transmission distance . . . . . . . . . 45
3.5 Effect of the transmission distance on the simulated Q factor for coil4 ge-
ometry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
3.6 (a) Plot of how k and Q vary with coil geometry and (b) plot of how the
maximum PTE varies with coil geometry . . . . . . . . . . . . . . . . . . . 47
3.7 The coil efficiency for coil3−3 link with Rin = 1000Ω at 1 GHz . . . . . . . 48
3.8 Geometry effect on source efficiency at 850 MHz with Rin = (a) 500Ω (b)
1000Ω and (b) 3000Ω . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
3.9 HFSS simulation with receiver coil l = 6mm, w = 1.5mm, and varying
geometry for transmit coil at 800 MHz . . . . . . . . . . . . . . . . . . . . 50
3.10 Simulated inductance and quality factor of each coil . . . . . . . . . . . . . 51
3.11 Transmission distance vs k for different coil links, at 900 MHz . . . . . . . 52
3.12 Coil (top) and source (bottom) efficiency for different transmission distance
d and Rin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
3.13 (a) HFSS simulated k on coil2 change with lateral misalignment, and the
corresponding effect on the coil and source efficiency and (b) Picture of the
HFSS simulation model for this setup . . . . . . . . . . . . . . . . . . . . 55
3.14 Comparison of analysis techniques for half and bridge rectifier with coil4,4
with 14.5 dBm, 700 MHz source, 1mm transmission distance . . . . . . . . 58
3.15 Comparison of the bridge and half-wave rectifier with coil2,2 . . . . . . . . . 59
3.16 Effect of the input power on efficiency for bridge2,2 . Lm = 0.3 nH, Cm =
0.2 pF, C1 = 3.5 pF, C2 = 3.5 pF . . . . . . . . . . . . . . . . . . . . . . . 60
3.17 (a) Effect of changing load resistance on bridge rectifier efficiency . . . . . 61
xiv
3.18 Efficiency at 600 MHz and 1000 MHz for half2,1 and half1,1 . . . . . . . . 62
3.19 Measured efficiency of rectifier for half2,2 and half2,1 at 1mm and 2.5mm
transmission distance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
3.20 (Left) 4 coil system when viewed from left and (right) 4 coil system when
viewed from right . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
4.1 Effect of the transmission line length between L2 and C2 on the resonant
frequency for (a) half4,1 and (b) half4,4 . . . . . . . . . . . . . . . . . . . 71
4.2 (a) Measured rectifier output voltage of half4,1 coil+rectifier system with
different positions of C2 and the smoothing capacitor as classified in (b)
photo of circuit used in testing . . . . . . . . . . . . . . . . . . . . . . . . 73
4.3 Circuit model for determining resonant frequency detuning from microstrip
lines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
4.4 Comparison of the measured output voltage of a RF half wave rectifier

and bridge rectifier with identical near field coupling circuit at (a) 1mm
transmission distance and (b) 0.5mm transmission distance . . . . . . . . . 75
4.5 Circuit model for determining Lhalf . . . . . . . . . . . . . . . . . . . . . 75
4.6 Difference in the simulated ic current and dVdtc between the half-wave and
bridge rectifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
diL
4.7 Change in Vc and dt
between half and bridge rectifier between time t1 : t2 77
4.8 Comparison of the receiver resonant frequency with varying C2 values for
various measured and calculated data . . . . . . . . . . . . . . . . . . . . . 79
4.9 Change in measured and simulated resonant frequency between half-wave

and bridge rectifier with different C2 . . . . . . . . . . . . . . . . . . . . . 80
4.10 Simulated rectifier output voltage with 500 MHz rectifier with 100 pF smooth-
ing capacitor with (a) ESL = ESR = 0 (b) ESL = 0.3 nH, ESR = 0.1Ω and
(c) ESL = 5 nH, ESR = 0.3Ω . . . . . . . . . . . . . . . . . . . . . . . . . 83
4.11 Equivalent T-circuit model for the reverse PDN capacitor network . . . . . 84
4.12 (a) Comparison of the simulated rectifier output voltage when C6 = 2 nF

(left) and 20 nF (right) (b) Capacitance in the equivalent T-circuit model
for both simulated reverse PDN cases and (c) Phase of each reverse PDN case 85
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4.13 Impedance profile of each individual capacitor and the total parallel com-
bination for 5 capacitor reverse PDN demonstration . . . . . . . . . . . . . 86
4.14 Comparison of the simulated impedance profile for the 5 cap reverse PDN
and cases without the reverse PDN . . . . . . . . . . . . . . . . . . . . . . 87
4.15 Fabricated receiver circuit with 5 cap reverse PDN for half2,2 . . . . . . . . 88
4.16 Designed reverse PDN (top) impedance magnitude and (bottom) effective
capacitance and phase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
4.17 (Top) Measured PDU input voltage for both capacitance cases and (bottom)
measured PDU output voltage for system with the reverse PDN . . . . . . . 91
4.18 (a) Impedance of the designed reverse PDN and (b) Phase of the designed
reverse PDN and (c) Effective smoothing capacitance value extracted from
T-circuit model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
4.19 (Left) Simulated rectifier open circuit voltage with C = 100 pF (right) with
100Ω equivalent PDN resistance with C = 100 pF . . . . . . . . . . . . . . 94
4.20 Extracted T-circuit model resistance of the simulated 4 coil system reverse
PDN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
4.21 Comparison of measured rectifier output voltage in 4 coil system between

2 cap case and the reverse PDN . . . . . . . . . . . . . . . . . . . . . . . . 96
5.1 Example system in package implementation for RFNFC system with inte-
grated inductor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
5.2 Plot of efficiency of the buck converter plus inductor stage, for the exam-
ined architecture. The inductor is assumed to have a quality factor 25 and
DC resistance of 600 mΩ . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
5.3 (a) Spiral inductor parameters of the top plane and (b) the bottom ground
plane and (c) Side view of inductor with no magnetic layer, top magnetic
layer, and top and bottom magnetic layer. . . . . . . . . . . . . . . . . . . 101
5.4 (a) Permeability and magnetic loss tangent measurements for the NiZn fer-
rite composite material (b) Permittivity and dielectric loss tangent measure-
ments and (c) Hysteresis curve measurement . . . . . . . . . . . . . . . . . 102
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5.5 Simulated magnetic field strength on a plane centered on the inductor,
viewed from the side for (a) air core and (b) double sided magnetic core
inductor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
5.6 Plots of the simulated inductance and RAC with increasing magnetic layer
thickness, same for both layers, for (a) 0.79 mm thick substrate (b) 0.2 mm
thick substrate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
5.7 Simulated magnetic field strength with current excitation of (a) 100 mA (b)
500 mA (c) 1.0 A (d) 1.5 A . . . . . . . . . . . . . . . . . . . . . . . . . . 105
5.8 Fabrication process flow for the planar inductors: (a) PWB etching to define
the inductor copper windings and back side trenches (b) Screen printing of
NiZn ferrite core on the top side of the PWB (c) Screen printing of NiZn
ferrite core on the back side of the PWB . . . . . . . . . . . . . . . . . . . 107
5.9 Inductor structure patterning on both sides of the flexible 0.2 mm PWB (a)
full view of a 12 cm by 10 cm fabricated board top layer (b) Bottom layer
with the cutout/void shown . . . . . . . . . . . . . . . . . . . . . . . . . . 108
5.10 The fabricated inductors (a) top layer (b) bottom layer and (c) magnetic
layer thickness profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
5.11 (a) Inductance comparison and (b) Q comparison for inductor 4 . . . . . . . 110
5.12 Inductance comparison between simulations and measurements (a) 0.79

mm thick PWB (b) 0.2 mm thick PWB . . . . . . . . . . . . . . . . . . . . 111
5.13 Modeled efficiency with measured inductor data for each 0.20mm substrate
thickness, double magnetic layer design. . . . . . . . . . . . . . . . . . . . 113
5.14 Breakdown of losses in converter/power inductor . . . . . . . . . . . . . . 113
5.15 (a) PWM inductor current for different load power and (b) spectral content
of these currents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
5.16 (a) Top view of inductor with geometry parameters and (b) side view of
inductor structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
5.17 (a) Variation in inductor current spectral content with inductance value and
(b) Cumulative power loss with frequency at 5 mW load with different in-
ductance value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
5.18 Comparison of integrated and SMT inductor (a) inductance and (b) RAC . . 123
xvii
5.19 (a) Comparison of calculated inductor loss for SMT and integrated from
(5.11) and (5.13) at 2.5V input and (b) comparison of calculated inductor
loss from (5.13) and Rweighted at 3.5V input . . . . . . . . . . . . . . . . . 124
5.20 (a) Fabricated 0.2mm thick substrate integrated inductor top (left) and bot-
tom (right) layer and (b) TPS62615 circuit with integrated inductor . . . . . 125
5.21 Measured PDU efficiency comparison between the two inductors in (a)
PFM mode and (b) PWM mode . . . . . . . . . . . . . . . . . . . . . . . . 127
6.1 Experimental setup for all full system measurements . . . . . . . . . . . . 130
6.2 Fabricated full receivers for select 2 and (bottom right) 4 coil systems . . . 131
6.3 Measured efficiency of the complete half4,4 . . . . . . . . . . . . . . . . . 133
6.4 Measured system efficiency with integrated inductor and TPS62615 . . . . 134
6.5 (a) Measured efficiency of the half4,1 system and (b) PDU input voltage
with 1V, 15 mW output . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135
6.6 Measured efficiency of the half2,1 system at 1.2V and 3.3V output at 1mm . 136
6.7 Measured efficiency of the half2,2 system at 1.2V and 3.3V output at 2.5mm 137
6.8 Measured results for bridge2,2 . . . . . . . . . . . . . . . . . . . . . . . . 138
6.9 Measured results for bridge3,3 . . . . . . . . . . . . . . . . . . . . . . . . 139
6.10 Algorithm flow process for (a) WPT coils plus rectifier front end and (b)
PDU with embedded inductor . . . . . . . . . . . . . . . . . . . . . . . . . 140
6.11 ML coil design geometry parameters for (left) top layer and (right) ground
layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140
6.12 (a) Fabricated ML coil and comparison to an earlier design with 100 mm2
coil area and (b) measured results . . . . . . . . . . . . . . . . . . . . . . . 142
6.13 Measured boost converter output with reverse PDN in 4 coil system . . . . 143
6.14 (a) Comparison between measured and calculated efficiency for bridge2,2
and (b) calculated subsystem efficiency . . . . . . . . . . . . . . . . . . . . 144
xviii
6.15 (a) Comparison between measured and calculated efficiency for half2,1 at
1mm transmission and (b) calculated subsystem efficiency . . . . . . . . . 146
6.16 (a) Comparison between measured and calculated efficiency for half2,2 at
2.5mm transmission distance and (b) calculated subsystem efficiency . . . . 147
6.17 Measured Vin,P DU for (a) half2,2 at 1mm, 1.2V output with TPS62615 (b)
half2,2 at 2.5mm and half2,1 at 1mm, 1.2V output with LTC3564 and (c)
half2,2 at 2.5mm, 3.3V output with LTC3564 . . . . . . . . . . . . . . . . 149
6.18 Comparison of measured and calculated efficiency for half2,2 at 2.5mm

transmission distance for variable Vin,P DU (developed efficiency analysis)
and fixed Vin,P DU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151
7.1 Coupling coefficient necessary for the same system efficiency as the source
resistance changes. Efficiency calculated for half4,4 system with 1000Ω
rectifier load and 14.5 dBm, 700 MHz source . . . . . . . . . . . . . . . . 158
xix
SUMMARY
To support the next generation of compact low power devices, a wireless power trans-
fer solution needs to have an improved combination of receiver coil area and efficiency.
This dissertation examines RF near field coupling as a means to minimize coil area while
maximizing efficiency in integrated, regulated systems. Presented contributions include
the efficiency analysis, design procedure, and integration challenges for high efficiency RF
near field coupling systems. Along the way, the use of a reverse power distribution net-
work and integrated inductors are explored. A few designs are fabricated and measured,
showing a superior combination of receiver coil area and efficiency for low power appli-
cations. While RF near field coupling is only a viable solution for select applications, this
dissertation serves as a guide for understanding the various challenges and considerations
for designing regulated, RF near field coupling systems.
xx
CHAPTER 1
INTRODUCTION
1.1 Motivation
According to Intel, the world will have 200 billion smart devices by the year 2020, corre-
sponding to 26 smart devices per person on the planet [1]. With these devices connected
through the Internet of Things (IoT), the application space is seemingly endless in support
of industry, healthcare, urban environments, and at home. The ’things’ in the IoT have
limitless combinations of size, energy consumption, technological complexity, and load
application power.
One problem common to all IoT devices however is power delivery and regulation. If
there are truly 200 billion smart devices within the next couple of years, creative solu-
tions for powering these devices would enable the IoT to expand beyond current hardware
limitations. Specifically, relying solely on batteries and the grid is not an ideal solution.
Batteries become costly in high volume and need to be replaced - an inconvenience at best
and completely impractical at worst. Providing wired power delivery requires a physical
connection, limiting the placement and location of an IoT device while being subject to
physical wear and tear on the devices. Wireless power transfer (WPT) offers a convenient,
contactless charging solution for various applications. WPT is especially discussed and
used in conjunction with the IoT. The design objectives for a WPT system changes greatly
depending on the application (i.e. load power), each with their unique challenges. The ob-
jective of this thesis is to demonstrate a fully integrated receiver solution for milliwatt-scale
wireless charging applications.
1
1.2 Survey of Wireless Power Transfer Techniques
Various WPT systems have been demonstrated in prior literature. WPT systems may be
generally evaluated by 3 main metrics: efficiency, transmission distance, and receiver area.
The tradeoffs between these metrics are shown in Fig. 1.1. Receiver area for the purpose
of this dissertation is defined specifically by the area of the power transfer element, such as
an antenna or an inductor. It is impossible to be superior to all other WPT systems in all 3
of these areas. For a given transmission distance and receiver area, for example, there will
be a fundamental limit to efficiency that cannot be exceeded. For higher efficiency, one
of the other two metrics has to be sacrificed. For low power applications, receiver area is
a more important consideration than for higher power applications. The application space
for milliwatt-scale loads includes wearables, biomedical devices such as hearing aids and
implantables, and various small IoT devices (ex: sensors). Wireless power transfer systems
have been designed to support mW load power previously, such as for compact smart ev-
eryday objects [2], implantables and biomedical devices [3], [4], electronic shelf label [5],
and wearables [6]. As many of these electronics are already small in size, it is imperative
for a WPT solution to have a fully integrated receiver with small area and high efficiency
to support these devices, sacrificing transmission distance to accomplish these goals. With
high efficiency, a low power source can be used to charge the devices, decreasing poten-
tial interference issues that will only become a bigger concern as the number of wireless
devices continues to increase.
A sample implementation of an integrated RF near field coupling system for low power,
compact IoT devices is shown in Fig. 1.2. This system consists of the RF WPT near field
receiver coil, RF rectifier, PDU (or power management unit), battery or energy storage
device, low power IoT module (such as microcontroller units and/or wireless connectivity
chips), and application hardware (such as sensors). This dissertation focuses on the inte-
grated design of the power transfer front end - the RF near field coupling, rectification, and
2
Figure 1.1: Relationships between the main metrics for inductive resonant coupling WPT
systems
PDU. The back end - the battery, IoT module, and application hardware - are not shown
in this dissertation but modeled as a resistor load for demonstration. This back end is very
common among IoT implementations. For low power sensors, the load power is com-
monly in the 0.1-5mW range for temperature sensors, humidity sensors, positional sensors,
accelerometers, etc. Rather than power these sensors continuously, an IoT module with
MCU/transceiver capabilities interfaces with the application hardware and wirelessly con-
nects to the IoT cloud, operating on demand. Examples of low power IoT modules include
the Dialog Semiconductor DA14580 SmartBond(TM) SoC (15 mW active power consump-
tion), Radiocrafts RC18x0 radio module platform (5.5 mA/22 mA, receiver/transmit cur-
rent consumption), Texas Instruments CC2640R2F SimpleLinkTMBluetooth low energy
Wireless MCU (5.9 mA/9.1 mA active consumption), STMicroelectronics BlueNRG Blue-
tooth modules (7.7 mA/8.2 mA active consumption), and Maxim Integrated MAX32620
low power MCU (122µW/MHz active consumption). By pairing the control/connectivity
modules with the application hardware, endless IoT applications may be supported. For
3
Figure 1.2: Example implementation of integrated RF near field coupling for IoT applica-
tions
instance, Dialog Semiconductor partnered with Bosch Sensortec to develop a low power
smart sensor platform for IoT devices [7]
The main motivation for developing ultra-low power IoT modules is to preserve battery
life. Even so, eventually the battery or energy storage module will need recharging. While
the active power consumption of the aforementioned IoT modules is variable and load
application dependent, the general range is 1-50 mW. This is where the objectives of this
dissertation apply. IoT applications prefer wireless power transfer solutions, replacing the
need for connection to the grid and need for a physical charging port on the device (crucial
for compact devices). For this level of power consumption, near field coupling is the ideal
solution. Energy harvesting is commonly used in conjunction with the IoT because it does
not need a dedicated power source. RF energy harvesting has been demonstrated in [8]-
[11], but these implementations require a bulky antenna integrated with the receiver. The
amount of harvestable RF energy according to [12] may not for suitable for many mW loads
4
and battery charging applications. Alternative forms of energy harvesting, such as solar
[13] and thermoelectric [14], also require a bulky off board harvester that is not suitable for
integrated WPT receiver. To this point, energy harvesting is ideal for applications such as
self-sustaining, low power, batteryless sensors and devices but not for wireless charging of
compact IoT platforms.
Farfield power transfer is another commonly used technology for IoT applications.
With farfield power transfer, the receiver may be far from the power source, increasing
the convenience for device recharging. Unlike energy harvesting, farfield power transfer is
capable of transmitting sufficient power to the receiver to support low power IoT devices. In
[15], a distributed farfield WPT system was developed for wireless charging of low power
IoT devices. However, this implementation requires an off board, bulky dipole antenna.
Furthermore, to increase the receiver output power depending on application needs, a po-
tentially harmful source power may be used, though this may be avoided through the use of
distributed control algorithms such as demonstrated in [16]. The more significant issue is
farfield power transfer is unable to provide the combination of low device area and output
power necessary for compact IoT platforms. A small area antenna (8 mm2 ) for farfield
WPT was demonstrated in [17], but with only 1 µW output power. Conversely, farfield
power transfer systems providing milliwatt-scale output power, as is suitable for low power
IoT devices, have large antenna area even at RF as seen in [18] (17,000 mm2 , 2.45 GHz)
and [19] (8,000 mm2 , 1.85 GHz). While some low power IoT devices will prefer the con-
venience and transmission distance provided by farfield WPT, compact devices needing an
integrated receiver solution will not find a suitable combination of output power and device
area supported by this method.
Capacitive wireless power transfer delivers power through an electrical field. Examples
of these systems include [20] and [21]. These papers discuss capacitive power transfer as
an alternative to near field inductive resonant coupling, showing capacitive power transfer
maintains efficiency better when the receiver is flexible (and flexed) or in the case of lateral
5
misalignment. Neither of these cases are a focus of this dissertation.
Inductive based wireless power transfer is the most commonly used technique for WPT
systems. Inductive power transfer (IPT) is differentiated here from near field inductive res-
onant coupling. IPT operates as a transformer, with a secondary coil in close proximity to
the primary to subtend as much of the magnetic flux generated from the primary as possi-
ble. Few recent demonstrations use IPT, most commonly seen with very high power output
for applications such as vehicle charging [22]. IPT systems are generally characterized by
very large coil area, small transmission distance, and very high efficiency.
Most recently demonstrated systems in academic literature and almost all commercially
available systems utilize near field resonant inductive coupling (RIC). RIC transfers power
in an oscillating magnetic field generated by a transmit coil to a receive coil tuned to the
same resonant frequency. This power transfer efficiency is not just dependent on the cou-
pling coefficient, as with IPT, but on the quality factor of the inductors as well. Because of
this, the transmission distance may be increased OR the coil area decreased while maintain-
ing good efficiency. For RIC systems, the WPT design metrics show a strong correlation
with load power. This is shown in Fig. 1.3, where each listed reference includes a complete
RIC or IPT system consisting of at least a 2-4 resonant coil link and rectifier (complete de-
tails on these numbers and references are provided in a table in the appendix) [23]-[53]. As
seen from the graphic, higher power applications are often designed with high transmission
distance and efficiency, at the cost of large coil area. On the other hand, RIC systems with
small coil area and small transmission distance favor lower power, as is appropriate for this
dissertation. However, the smaller coil area, lower load power demonstrations also have
low efficiency, as shown in the graphic. This dissertation focuses on a near field coupling
receiver that achieves both high efficiency and small coil area at the expense of transmission
distance.
6
Figure 1.3: Characteristics of RIC systems in academic literature, relating to their coil area,
transmission distance, load power, and efficiency
7
1.3 Effect of Frequency on Resonant Inductive Coupling
The maximum power transfer efficiency (PTE) for a pair of inductive resonant coupling
coils is given by (1.1), where k is the coupling coefficient and Q1 , Q2 are the quality factor
of the coils. Almost all of the WPT systems from Fig. 1.3 operate at high kHz or low
MHz frequency. A main objective in this dissertation is to show that by operating the
coils with a RF source frequency, the area of the coils may be greatly reduced without
sacrificing power transfer efficiency. The quality factor of an inductor, shown in (1.2), may
be increased 3 ways: decreasing the resistance, increasing the inductance, or increasing
the source frequency. These quantities are interdependent. For example, increasing the
frequency will increase the resistance due to skin effect at minimum.
k2Q Q
ηP T E,max = p 1 2 (1.1)
(1 + 1 + k 2 Q1 Q2 )2
2πf reqRF source Ln

Qn = (1.2)
Rn
However, by increasing the source frequency by a couple of orders of magnitude com-

pared to most resonant coupling demonstrations, the same quality factor may be achieved
with a couple of orders of magnitude inductance reduction. This leads to substantial po-
tential for area decrease. While the resistance must be more carefully considered at RF, RF
operation offers the best potential for high PTE, low area inductive resonant coupling coils.
Increasing the frequency to decrease circuit area is well established in electrical engi-
neering, and this may be seen with resonant inductive coupling work. Figure 1.4 shows a
comprehensive comparison of prior demonstrated RIC coils. The scope of the cited work
is increased from Fig. 1.3, as some references include just two power transfer coils and no
AC-DC conversion, others 4 coils with rectifier, and other works 2 coils with an inverter,
rectifier, and power distribution unit (PDU) in a complete system suitable for a fully inte-
grated wireless charging receiver (essentially, if a reference has at least 2 coils operated at
8
Table 1.1: RF Inductive Coupling Coils in Literature
Transmission
Reference Frequency Load Power Coil Area Efficiency Rectifier PDU
Distance
[25] 986 MHz 1 mW 5 mm 2.25 mm2 7% Y Y
[56] 4.7 GHz 0.1 µW 1.2 mm 0.01 mm2 1% N N
[54] 5.8 GHz 10 µW 1 mm 0.01 mm2 1% N N
[47] 1 GHz 12 mW 30 µm 0.04 mm2 14% Y N
[64] 460 MHz 10 µW* 200 mm 100 mm2 0.6% N N
resonance, it can be included in the table). However, Fig. 1.4 is merely intended to give a
sense of how operating frequency plays a major role in inductor size for resonant inductive
coupling coils (with complete details provided in a table in the appendix). The RF near
field coupling coils in Fig. 1.4 have the smallest coil area, while the lowest frequency sys-
tems have the largest receiver coil area. However, these low coil area systems also share
another trait - low efficiency. Table 1.1 shows a comparison of just the near field coupling
demonstrations that have a RF source frequency. This table shows that while operating near
field coupling coils with RF source frequency and smaller size is not new, accomplishing
this with a very high efficiency, fully integrated receiver has not been previously demon-
strated. A creative RF WPT system with very small coil size and use of backscattering in
the RF-DC conversion is demonstrated in [25], but the efficiency and load power (1 mW
and below) is much lower than suitable for this dissertation. A chip-chip RF WPT system
is demonstrated in [47], but this work prioritizes coil area much more than efficiency, as is
appropriate for a chip implementation. The other three works only demonstrate the coils
themselves with no RF-DC conversion. This is the problem this dissertation addresses -
achieving high efficiency and small coil size in an integrated, regulated WPT receiver.
A more suitable benchmark for this dissertation is found in Table 1.2, where each refer-
ence demonstrates an inductive WPT system with regulated output, but at lower frequency.
In [23], a high efficiency WPT system is shown but with lower frequency and accordingly
large coil size. A regulating rectifier is demonstrated in [35] with decent efficiency and
small coil area; however, both this efficiency and coil area may be improved with higher
frequency operation. A system architecture and design very similar to the goals of this
dissertation is presented in [27], however the coil area is very large and not practical for in-
9
Figure 1.4: Correlation between frequency and coil area in prior literature
10
Table 1.2: Complete WPT Systems with Regulated Output
Transmission
Reference Frequency Load Power Coil Area Efficiency PDU
Distance
[23] 305 kHz 7.6 W 55 mm 12272 mm2 76% Buck
Regulating
[35] 13.56 MHz 60 mW 3 mm 71 mm2 50%
Rectifier
[27] 13.56 MHz 40 W 150 mm 80425 mm2 70% Buck
[30] 13.56 MHz 151 mW 140 µm 0.02 mm2 15.1% Buck
tegrated receiver for IoT applications. Finally, [30] demonstrates a complete WPT system
with very small coil area but lower efficiency in an interposer level implementation. While
higher efficiency is needed for this dissertation, this demonstrates the idea of an integrated
WPT receiver similar to this dissertation.
1.4 Integrated Wireless Power Transfer Solutions
A key goal of this dissertation is to not only demonstrate RF near field coupling as an
efficient and compact solution, but as an integrated solution as well. A comparison of
some integrated near field coupling solutions is shown in Table 1.3. This table shows
an ideal integrated solution to support the discussed low power IoT devices has not been
previously demonstrated. The system in [40] is a good example of higher power, lower
frequency near field coupling. The 5W output power is more than enough to support low
power devices, the 51% efficiency is adequate, and the receiver hardware is integrated in a
2.5x2.5 mm2 chip. The problem is this system is powered through a 1600 mm2 receiver
coil. The advantage of compact receiver for low power IoT applications is lost when the
receiver coil area is so large. The works in [63] and [30] show that small area coil near
field coupling has been previously demonstrated, but for different applications than the
target of this dissertation. Zargham et al demonstrates a very compact and integrated WPT
system for biological implants. This coil area (4 mm2 ) is smaller than will be demonstrated
in this dissertation, thus this work is more suitable for biological implants, as was the
goal [63]. For IoT devices with few mW active power consumption, the output power
and efficiency in [63] is not suitable. A chip-chip WPT system is demonstrated in [30],
11
Table 1.3: Integrated WPT Systems in Literature
Output
Reference Frequency Load Power Efficiency Coil Area
Regulation
[40] 6.78 MHz 5W 51% Yes 1600 mm2
[63] 160 MHz 1 mW 1% Yes 4 mm2
[33] 100 MHz 741 mW 85.6% No 100 mm2
[30] 13.56 MHz 151 mW 15.1% Yes 0.02 mm2
with the same efficiency limitation as [63] when applied to low power IoT devices and a
transmission distance (140 mum) not practical either for these devices. The work of [33]
comes the closest to meeting the design objectives, though the efficiency drops severely
(to 44%) when using a 50Ω source as used in this dissertation. This implementation also
has no form of output regulation. Thus there exists a gap in the current state of art for an
integrated WPT solution for low power IoT applications, one this dissertation proposes to
fill through integrated RF near field coupling.
One key contribution of this thesis is integrating embedded inductors into the WPT
system with the PDU. By using advanced packaging technologies, embedded passive com-
ponents may be utilized to decrease the influence of parasitics and to allow for custom
design of component electrical parameters for improved utility in the WPT receiver. Also,
embedded components increase the reliability of the integrated solution. There is not much
prior work on integrating passives in WPT systems. The main work on embedded inductors
in this dissertation is for the power inductor for the PDU. While embedded power induc-
tors are rarely integrated in a WPT system, there have been numerous demonstrations of
fabrication and design of embedded power inductors in academic literature in general.
The fabrication process should be simple, cheap, and easily integrated with planar PCB
process. The most suitable fabrication method for this is to integrate magnetic layers on
the power inductor through screen printing. Therefore, a key goal of this dissertation is
to introduce a screen printing fabrication for magnetic core planar inductors with similar
quality but less steps than previously demonstrated, and not only demonstrate the embed-
ded inductor but integrate it in the complete WPT system for optimal efficiency. Since
device size and cost are key design concerns for IoT hardware, the power inductors used
12
for the regulation become significant. Air core inductors are not area efficient enough for
IoT design, and non planar inductor topologies require more complex fabrication than ideal
for IoT design. Thus the focus of this review is on planar inductors with magnetic core as
is suitable for an IoT architecture and fabrication. Kondo et al [65] demonstrates an in-
silicon, packaged power inductor with a screen printed carbonyl-iron composite magnetic
layer. The resulting inductor has very low area and DC resistance, but low inductance
with corresponding mediocre inductance density. The work of [66] demonstrates another
in-silicon spiral power inductor. The magnetic layer was created by manual pressing. The
demonstrated inductor has good quality factor (21) and very good inductance density (47.8
nH/mm2 ), and comparable efficiency when tested with the commercial converter as com-
pared to the commercial converter with commercial inductor, but still lower efficiency than
the compared surface mount technology (SMT) inductor. In fact, this dissertation will
make a comparison using the same commercial converter as in this work, but with effi-
ciency improvement. Also, the in-silicon fabrication is inherently more expensive than
printed wiring board process, especially when integrating with the remainder of the IoT
architecture. An example of PCB compatible inductor with screen printed magnetic layers
is seen in [67]. Bang et al demonstrate a high quality factor (45) and high inductance den-
sity (33.1 nH/mm2 ) packaged spiral inductor on FR4. The inductor was created using basic
PCB build up process, with screen printed NiZn magnetic layer on the top and bottom. The
fabrication is simple and creates quality packaged power inductors. However, the build up
process adds extra fabrication steps over a basic 2 layer design. Furthermore, the double
inductor pattern creates a large increase in DC resistance over the two power inductors
previously discussed, leading to a potentially significant amount of inductor conduction
loss even in a light load IoT application, whereas the previous two would have negligible
inductor conduction loss.
Use of integrated inductor with buck converter has been previously demonstrated, but
not in a WPT system. The integrated WPT systems in [38],[40], [61], and [75] demon-
13
strate integrated buck converter, but with SMT inductor. Previous work has demonstrated
the design of integrated inductors for buck converters, including magnetic core inductor for
GaN-based sychronous buck converter [68], planar air core inductor for 10 MHz buck con-
verter [69], on-chip magnetic core inductor for 4 MHz two-phase converter [70], in-silicon
inductor for 6 MHz buck converter IC [66], on-chip spiral inductor for 450 MHz buck con-
verter [71], planar coupled inductor for tapped-inductor buck converter [72], in-package
spiral inductor for four-phase buck converter [73], and ferrite-filled PCB inductor [74].
However, only in [68] is a comparison made to commercial inductor with meaningful effi-
ciency improvement, as is the motivation of this work. Previous integrated WPT systems
focus on improving the coil system, rectifier, and/or regulation scheme for improved effi-
ciency, such as [25] and [27], but a secondary objective in this dissertation is to demonstrate
WPT system efficiency may also be increased through improved power inductor design as
well.
1.5 Dissertation Contributions
The main objective of this dissertation is to demonstrate RF near field coupling (RFNFC)
is capable of achieving a superior combination of efficiency and receiver coil area com-
pared to other WPT architectures. Specifically, this combination of low coil area and high
efficiency is beneficial for light load applications, such as for IoT edge devices. While high
efficiency WPT systems and small area RF near field coupling systems have been analyzed
before, this combination has never been previously explored. Accordingly, this dissertation
presents the design procedure and analysis unique to efficient, regulated, and integrated RF
near field coupling systems. The main contributions of the dissertation are:
• The development of a system architecture that focuses on achieving high power trans-
fer efficiency with small coil area for an integrated WPT receiver by using RF source
frequency.
14
• Development of an efficiency analysis for low power, efficient RF near field coupling
that demonstrates more robustness than simulation based methods
• Establishing the design process and considerations for a RF near field coupling sys-
tem with regulated output, specifically identifying the differences in design of a high
efficiency RF near field coupling system compared to other WPT systems.
• Identifying detuning high frequency effects and system level integration challenges
unique to RF near field coupling, with solutions, most notably through a reverse
power distribution network.
• Integration of packaging technology, such as magnetics and screen printing, into the
system architecture to demonstrate a fully integrated receiver with embedded power
inductor, leading to improved efficiency
• The fabrication and measurement of near field resonant inductive coupling WPT sys-
tems with superior combination of coil area and efficiency compared to state of the
art.
1.6 Dissertation Organization
Chapter 2 discusses the system architecture developed for the RF near field coupling in-
tegrated receiver, and introduces the modeling and efficiency analysis used to guide the
design. Chapter 3 presents the modeling and design process for each stage of the devel-
oped architecture, focusing specifically on a few designs and key considerations. Chapter 4
investigates layout and component selection challenges for RFNFC that arise from electro-
magnetic resonant frequency shifting effects, and also demonstrates a reverse power distri-
bution network as a key part of the system for integrating RF-DC conversion with a PDU.
Chapter 5 discusses the application of advanced packaging technologies for the receiver,
specifically exploring screen printed magnetics in integrated power inductors. Chapter
15
6 details the complete system measurements, and provides a discussion of the merits of
RFNFC as well as a comparison to state of art. Chapter 7 provides discussion on future
work, specifically how ML algorithms and flexible hybrid electronics may be used to en-
hance the current work, as well as the conclusion.
16
CHAPTER 2
RF NEAR FIELD COUPLING ARCHITECTURE AND EFFICIENCY ANALYSIS
2.1 Introduction
A system architecture must be established to meet the goals of high efficiency, small coil
area integrated WPT receiver with regulated output. The only requirements for the system
are a single RF input and wireless power transmission via near field coupling to support
mW load. This chapter describes the general system architecture used by all demonstrations
in this dissertation, highlighting the innovations in system design due to the special needs
of a high efficiency, high frequency system.
This chapter also introduces the efficiency analysis and design metrics for the devel-
oped architecture. The distribution of power losses in an efficient RFNFC system will be
much different than any previously demonstrated WPT system. To design for optimal ef-
ficiency, the main sources of loss must be identified and estimated. This chapter discusses
why the input voltage to the PDU in the system is dynamic with changing load. An itera-
tive procedure is presented for calculating system efficiency in a RFNFC system, utilizing
machine learning models to allow the iterative procedure to run without needing external
simulations for each iteration.
2.2 RF WPT System Architecture
Some previously demonstrated WPT system architectures are shown in Fig. 2.1. Of par-
ticular note is the initial architecture for the proposed RF near field coupling system for
the PDES Consortium at Georgia Tech (the primary source of funding for this dissertation
research). In this initial architecture, several chips and power inductors were needed. With
such an implementation, the area is increased and more potential for integration issues
17
Figure 2.1: Some previous system architectures for inductive wireless power transfer sys-
tems
arise.
In response, a simpler system architecture needing only a single chip and single power
inductor was developed, leading to decreased complexity and receiver area. The general
system architecture developed for all work in this dissertation is shown in Fig. 2.2. A RF
signal generator is used for the source in this dissertation, with 14.5 dBm (28.2 mW) max-
imum power output. This is followed by the near field coupling coil link. Every complete
system demonstration consists of a single transmitter board and single receiver. This dis-
sertation mainly examines high efficiency integrated receivers operating with a 2 coil link
at transmission distances of 1-3 mm. However, a 4 coil link is also investigated to provide
discontinuous power at greater transmission distance. In this instance, the transmitter board
and receiver board will have 2 coils each integrated on separate layers, hence still a single
transmitter and receiver board.
18
Figure 2.2: System architecture for RF near field coupling WPT system for mW load
A diode rectifier converts the RF power to DC. While other works utilize synchronous
rectifiers/on chip rectifiers with optimal efficiency, innovating rectifier topology or process
is not part of this dissertation. These works often design these rectifiers for very narrowly
defined operating conditions, while this dissertation requires a more general rectifier so-
lution suitable for testing many different designs and systems without having to overhaul
the rectifier design in each instance. Standard diode rectifiers utilizing components off the
shelf (COTS) are sufficient for the full system design and demonstration.
Because of the voltage smoothing capacitance requirements for the RF-DC conversion
(pF scale) and the input capacitance requirements for the PDU (µF scale), a large parallel
resonant peak is created between the two capacitors that may result in an unstable voltage
supply to the PDU [76]. To solve this integration challenge, a reverse power distribution
network (PDN) is designed to deliver a clean voltage supply to the PDU. The reverse PDN
design, modeling, and demonstration for a variety of cases is provided in Chapter 4.
A PDU is the final stage in the system architecture. A PDU provides the regulated
output necessary for a fully integrated WPT receiver. The PDUs used for measurement
demonstrations in this dissertation are all COTS DC-DC converters. DC-DC converters
19
have been demonstrated in WPT systems previously, generally showing they decrease peak
efficiency but maintain efficiency over a wider range of load [58]. While integrating DC-
DC converters in a WPT system is common, this is seldom done for low power/high fre-
quency systems, as illustrated by Table 1.1. The type of DC-DC converter depends on the
design goals. For optimal efficiency, a switched inductor buck converter is the best option,
as discussed later in this chapter. To increase the transmission distance, a boost converter is
the best option. With a boost converter, a lower rectifier output voltage is acceptable, with
full range of regulated output voltage available after the ’boosting’ of this voltage. Ac-
cepting a lower rectifier output voltage enables the transmission distance to be increased.
The load power range examined for this dissertation is 1-20 mW, mainly due to RF source
power available in instrumentation. However, the design process and analysis presented in
this dissertation scales to all load power in the mW range. PDU load voltages from 0.5-4V
are used in this dissertation, but most of the focus is on output voltage of 1.2V or 3-3.3V,
as is typically used for many compact devices.
In a switched inductor buck converter, the power inductor selection is a significant
design choice. While not an explicit part of the system architecture, this dissertation will
also examine the use of an integrated inductor, as opposed to commercial inductor, as a
means to improve the efficiency and packaged reliability of the WPT system. So while
using a power inductor is not novel from a system standpoint (every switched inductor
regulator must have an inductor obviously), the approach of custom designing this inductor
for improved efficiency in light load WPT system does have novelty.
2.3 Power Loss Modeling
The general equivalent circuit for a 2 coil, high efficiency system is shown in Fig. 2.3(a).
A L-C matching network with values Lm and Cm match the source resistance Rs to the
following circuit. The resonant capacitors C1 and C2 are integrated with the coils as SMT
components. A series-parallel resonant capacitor network is selected, as has been demon-
20
C1 L (1 − k 2 )
Rs Lm 1 Rs
R1
RFin Cm RFin Req
Zeq
Figure 2.3: (a) WPT system circuit model (b) Equivalent circuit model with reflected
impedance from receiver circuit and (c) Equivalent circuit model for source efficiency cal-
culation
Figure 2.4: Components from circuit model on fabricated circuit
strated ideal for a WPT system with diode rectifier as it operates with high current at the
transmit side and high voltage at the secondary side [77]. The coils L1 and L2 have resis-
tance R1 and R2 with mutual inductance M . The reverse PDN is the network of capacitors
labeled Csmooth , as voltage smoothing capacitors. A generic model is used for the buck
converter, with input resistance Rin,P DU and loading conditions of Vout and RLoad . To
give perspective for these values in the actual RFNFC system, Fig. 2.4 shows a fabricated
RFNFC system with the equivalent labeling from Fig. 2.3. For additional reference, all
variable and component names used in the following analysis are provided in Table 2.1.
To design for optimal efficiency for a given transmission distance and coil size limita-
21
Table 2.1: Variables used in efficiency analysis
RFin , Pin Input RF Power
Pin,coil Input power to transmit coil
Pin,rect Input power to diode rectifier
Pin,P DU Input power to PDU
PLoad Output power
Zeq , Req Reflected impedance from receiver to transmit coil
L1 , L2 RF coil inductance
Lsw PDU inductor inductance
ωphase Source frequency (rad/s)
frect Source frequency (Hz)
fsw PDU switching frequency
Rs Source resistance
R1 , R2 RF coil resistance
Rin AC resistance seen at rectifier input
Rin,P DU DC resistance seen at PDU input
RLoad DC resistance at PDU output
RAC PDU inductor AC resistance
RDC PDU inductor DC resistance
Rdiode Diode forward resistance
D PDU duty cycle
Vin,P DU PDU input voltage
Vout PDU output voltage
Q1 , Q2 RF coil quality factors
k RF coil coupling coefficient
M Mutual inductance between transmit/receive coil
Lm , Cm Transmit circuit matching network components
C1 , C 2 RF coil resonant capacitors
Csmooth , CRP DN Voltage smoothing/reverse PDN capacitors
ZC2 Impedance of receiver resonant capacitor
n Number of conducting diodes
Vf Diode forward voltage
ηcoil,loaded , ηcoil Coil efficiency
ηtransmit Efficiency of transmit circuit coil
ηreceive Efficiency of loaded receive coil
ηsource Source efficiency
ηrect,max Max possible rectifier efficiency, after Vf
ηbuck PDU efficiency
Attenuation of microstrip conduction loss per unit
αconductive
length
Attenuation of microstrip dielectric loss per unit
αdielectric
length
∆Ipk−pk PDU inductor peak to peak ripple current
PLoss,V f Diode forward voltage power loss
PLoss,total Sum of all power losses
22
Figure 2.5: Classification of power losses in RF near field coupling system
tion, the sources of power loss in the architecture must be known. Much previous work has
been done in this area for inductive WPT. In [78] and [79], robust general equations for
determining the efficiency of a near field coupling link are provided, but these papers only
focus on the coil link and do not provide the necessary analysis for a full system architec-
ture. In [22], [40], [58], detailed efficiency analyses for full WPT systems with a similar
system architecture (coil link, rectifier, PDU) are provided. However, these analyses are
not applicable to a low power, RF system, as the distribution of rectifier losses are very
different and the influence of the source resistance is more significant in RFNFC systems.
This dissertation provides an efficiency analysis in this same spirit as these previous works,
but specific to RF and mW load operation. A list of the relevant power losses are provided
in Fig. 2.5. The following sections detail each of these losses through equations or sim-
ulation, and later chapters use this analysis to guide the design of the coil and to select
appropriate components, such as the diodes and PDU.
2.3.1 RFNFC and Coil and Source Efficiency
Most RF near field resonant inductive coupling design primarily uses (1.1), the maximum
power transfer efficiency (PTE), to evaluate the effectiveness of the near field coupling
coils. Both transmission losses and coil resistive losses are accounted for in this equation.
As the coupling coefficient decreases, the transmission loss increases. As the coil resistance
increases, the quality factor decreases, also accounted for in (1.1). The maximum PTE
23
is useful because it simplifies design of the coils into two metrics (Q and k) for quick
evaluation of a coil design using an electromagnetic simulator such as HFSS.
However, the maximum PTE assumes perfect matching and optimal loading. Depend-
ing on the loading conditions of the PDU, the PTE of the coils in practice will deteriorate.
This is shown in the loaded coil efficiency (2.1), where α is the ratio of loading resistance
of the coil to the reactance of the secondary resonant capacitor. Rin is the AC resistance
seen at the input of the rectifier and is related to the input resistance of the PDU (and load-
ing resistance of the rectifier) as given in (2.3), where n is the number of diodes ’on’ during
AC-DC conversion, Vf is the forward voltage of the diode, and Vin,P DU is the PDU input
voltage [80].
k 2 Q1 Q22
ηcoil,loaded = Q2
(2.1)
(1 + α
+ k 2 Q1 Q2 )(α + Q2 )
Rin
α= (2.2)
|ZC2 |
Rin,P DU n ∗ Vf
Rin = (1 + ) (2.3)
2 Vin,P DU
The loaded coil efficiency is the cascaded efficiency of the primary side efficiency and
the secondary side efficiency. The primary side efficiency is a measure of how much of
the power from the primary may be delivered to the secondary, and is shown in (2.4) [80].
It is simply a voltage divider of the transmit coil resistance and the equivalent (reflected)
impedance of the receive coil to the transmit. When operating the receiving coil at the
phase resonant frequency, the reflected impedance will be purely real. This is shown in
(2.5), where (2.6) gives the phase resonant frequency.
Zeq
ηtransmit = (2.4)
Zeq + R1
24
αQ2
Zeq = Req = k 2 L1 ωphase (2.5)
α + Q2
s
1 1
ωphase = − 2 2 (2.6)
L2 C2 Rin C2
The receive link efficiency is a measure of how much of the power received by the sec-
ondary coil is delivered to the load. This is shown in (2.7). When the load is fixed, this
efficiency may only be improved by increasing the quality factor of the receive coil or by
designing the coils to operate with different C2 to lower α. Else, the optimal efficiency
point may be found by changing the load resistance for minimal α.
Q2
ηreceive = (2.7)
α + Q2
The system may be designed for maximum power transfer or maximum energy effi-
ciency. For a given source resistance, the maximum power that may be transferred to a
load occurs when the load is conjugate matched to the source. All experimental work in
this disseration uses a RF signal generator with a 50Ω source, thus to transfer the maxi-
mum power, the equivalent impedance of the coiling coils needs to be 50Ω. The equivalent
circuit for the transmit circuit with reflected receiver coil impedance at the phase resonant
frequency is shown in Fig. 2.3(b). The transmit coil leakage inductance may be negated
by the resonant capacitor C1 , resulting in the circuit in Fig. 2.3(c). R1 , the resistance of
the transmit coil, should be very small for optimal efficiency (less than 1Ω), thus may be
neglected relative to the source impedance and Req . This gives the efficiency of the source,
shown in (2.8), calculated as a voltage divider. That said, none of the designs in this dis-
sertation use maximum power transfer, but rather maximum energy efficiency. If Req =
50Ω, the maximum power is transferred for a 50Ω source resistance with 50% efficiency.
However, if Req is greatly increased, then the efficiency of the system can increase far be-
yond 50% [81]. Accordingly, as high efficiency is a key goal, maximum energy efficiency
25
is chosen as the key metric.
Req
ηsource = (2.8)
Rs + Req
2.3.2 RF-DC Conversion
The remainder of the losses in system that operates at RF are either diode losses or mi-
crostrip losses. At low power, the forward voltage of the diodes is a significant source of
efficiency loss. Even using Schottky diodes with a forward voltage of around 0.3V, the
efficiency loss is significant. The maximum rectifier efficiency considering the forward
voltage of the diodes is given as,
Vin,P DU
ηrect,max = (2.9)
Vin,P DU + n ∗ Vf
where ηrect, max is the maximum possible efficiency of the RF-DC conversion. The specific
power loss from the forward voltage then is given as,
PLoss,V f = Pin,rect (1 − ηrect,max ) (2.10)
For low power applications, the current through the diodes will be small and the con-
duction loss can be neglected (very unlike higher power applications as shown in [22]). It
should be noted the forward voltage loss is included as conduction loss by some sources.
However, at RF the switching loss of the diodes becomes more significant. This can also be
referred to as diode reverse recovery loss. The RF-DC conversion efficiency of a half-wave
rectifier as a function of frequency is shown in Fig. 2.6. Each simulation was completed
in Keysight ADS with the SPICE parameters for HSMS 282x series Schottky diodes, loss-
less traces, 500Ω load, and a LC matching network reoptimized for each frequency. Setup
this way, the switching loss is the only variable loss in the simulation. Clearly, the effi-
ciency drops by a few percent as the frequency increases, showing the switching loss is not
negligible at RF operation.
26
Figure 2.6: Efficiency of a half wave rectifier as a function of frequency
Most calculations of diode switching loss require transient waveforms of the diode cur-
rent and voltage, and these measurements and calculations are very difficult to perform at
RF [82]. To compare diode components more easily and re-evaluate the switching loss at
different frequency, a way to estimate the switching loss as a function of the diode SPICE
parameters is needed. The main contributor to switching loss is the diode junction capaci-
tance Cj . This is confirmed by a series of ADS simulations as shown in Fig. 2.7, where the
junction capacitance is varied for a 1 GHz half wave rectifier with 500Ω load. Again, the
matching network is optimized for each simulation. As the junction capacitance increases,
the switching loss increases.
In addition, the system parameters of input power Pin and rectifier load resistance
Rin,P DU affect the switching loss. These parameters affect the amount of voltage across
the diode when it is ’off’, thus increasing the switching loss at higher voltage as it becomes
more difficult for the diode to reverse/recover. A series of ADS simulations was run for
both a bridge and half wave rectifier in ADS, to generate data for efficiency as a function
of these parameters. Each time, the circuit matching network was reoptimized. Then, each
simulated efficiency was compared to the efficiency of the optimized circuit with the same
27
Figure 2.7: Efficiency of a half wave rectifier as a function of diode junction capacitance
parameters except with Cj = 0pF (no switching loss), to determine the amount of switching
power loss. Different data must be generated for the bridge and half wave rectifiers, as the
amount of voltage across the diode in the off state is different in each case, affecting the
switching loss.
This data was used to develop machine learning model for the diode switching loss.
This was accomplished in Matlab using a neural net, using a Bayesian regularization algo-
rithm with the help of Ph.D. student Huan Yu. A comparison between the ADS simulated
switching loss and the neural net predicted switching loss is provided in Fig. 2.8 for a
bridge rectifier, for Cj = 0.7 pF, 1000Ω load, and Pin = 14.5 dBm. While the accuracy is
not perfect, there is less than 0.1 mW difference, which translates to less than 0.5% effi-
ciency difference. This demonstrates a simple and novel approach for estimating the diode
switching loss in a RF WPT system without need for extra simulation.
The other losses are microstrip losses. This is exhibited with the microstrip lines in the
both the transmitter circuit and the receiver circuit at the receiver coil and rectifier. These
losses are either conduction or dielectric loss and shown respectively in (2.11) and (2.12),
where σ is the conductivity of the microstrip line, Z0 is the characteristic impedance of
28
Figure 2.8: Comparison of diode switching loss from ADS simulation and machine learn-
ing model for HSMS 2820 diodes in RF near field coupling system
the line, W is the width of the microstrip line, e is the effective dielectric constant, r is
the relative dielectric constant, and tan(δ) is the loss tangent of the substrate [81]. If the
substrate parameters and dimensions of the microstrip lines are known, these losses may
be calculated.
p
ωµ0 /2σ
αc = (2.11)
Z0 W
k0 r (e − 1)tan(δ)
αd = √ (2.12)
2 e (r − 1)
2.3.3 PDU Input Voltage and System Efficiency Analysis Procedure
A key reason for using a buck converter as the PDU for high efficiency is it allows the rec-
tifier to be operated at a higher intermediate load voltage, and then ’bucked’ to the desired
output voltage. This improves the efficiency from (2.9), especially for output voltages of
PDU 1.2V or less. At small output voltage (such as 1.2V), the efficiency with rectifier alone
is lower compared to using a PDU (small efficiency loss) and rectifier output operated at
29
3V, for instance. However, to properly design the coils the resistance seen at the load of
the rectifier must be known, as this will affect the loaded coil efficiency from (2.1) and
the source efficiency from (2.8). The relationship between the input resistance of the buck
converter and the load resistance of teh buck converter is given in (2.13), where D is the
duty cycle of the buck converter [83].
RLoad
Rin,P DU,lossless = (2.13)
D2
However, this assumes a lossless converter. To account for the losses in the converter,
(2.14) should be used. This adjusts the input power to the PDU to give the necessary
output power, accounting for the buck converter efficiency. For a given range of converter
output voltage and resistance combinations, the load resistance range of the rectifier (and
thereby the coils) may be known.
RLoad
Rin,P DU = (2.14)
D2 ηbuck
The input voltage to the PDU is similarly increased by the efficiency of the buck con-
verter, shown in (2.15).
Vout
Vin,P DU = (2.15)
Dηbuck
The efficiency of the buck converter is degraded by inductor losses and conduction and
switching losses in the converter. The inductor losses will be explored in greater detail in
chapter V, but the general calculation of inductor DC (PInd(DC) ) and AC (PInd(AC) ) power
losses for the buck converter can be estimated using,
2
PInd(DC) = RDC ∗ ILoad (2.16)
2
RAC ∆Ipk−pk
PInd(AC) ≈ (2.17)
12
30
(Vin,P DU − Vout )D
∆Ipk−pk = (2.18)
fsw Lsw
where RDC is the DC resistance of the inductor, ILoad is the load current, RAC is the AC
resistance of the inductor, fsw is the switching frequency, ∆Ipk−pk is the maximum ripple
current, Vin,P DU and Vout are the input and output voltages for the converter, Lsw is the
inductance of the power inductor and D is the duty cycle. While analytical forms of the
calculation of the buck converter switching and conduction losses exist, device specific
capacitances are not known for the devices used in this thesis, so simulators will be relied
on instead to determine the contribution of these losses. Similar to the diode switching
loss, a ML model is developed for the losses. The PDU efficiency was simulated in Linear
Techonology LTSpice as a function of Vin,P DU , Vout and load power PLoad . A machine
learning model was trained with the data with a gaussian process regression algorithm
with the help of Ph.D. student Hakki Torun. A comparison of the PDU efficiency (just
considering conduction/switching loss, no inductor loss) from LTSpice simulation and the
ML model based on simulated data is shown in Fig. 2.9. At different operating points, the
ML modeled loss is within 2%, and typically within 1%, of the LTSpice efficiency. This
is tolerable error for the PDU switching/conduction losses, as these losses comprise only a
small portion of the overall loss in the entire system. In contrast, like the diode switching
loss an extra simulation is not needed when a new load/circuit is considered, and all losses
may be evaluated concurrently, representing a key benefit from using the ML model.
The remaining missing link is that the input voltage to the PDU is not actually known
from the above equations. From (2.14) and (2.15), for a given load and converter efficiency,
Rin,P DU and Vin,P DU may take an infinite amount of values (along a line) to satisfy these
equations. This leads to one of the quirks with using a PDU in a power driven (opposed to
voltage driven) WPT system - the input voltage to the PDU will regulate to the minimum
necessary voltage to supply the load, when the PDU output voltage is less than the input
voltage. The voltage will be the minimum necessary to supply a given load, as this will be
31
Figure 2.9: Comparison of PDU efficiency from LTSpice simulation and ML model
the highest efficiency point for the buck regulator (as opposed to increased voltage input, as
increasing the conversion ratio will lower the efficiency). However, the input voltage and
corresponding input resistance will increase to whatever point necessary to improve the
WPT system efficiency to supply the load. As the values of the input voltage to the PDU
and Rin,P DU change, the source, coil, and rectifier efficiencies will be altered as shown in
earlier equations. For a given input power, the PDU will set Vin,P DU to the value which
matches the output power of the rectifier to the input power necessary at the PDU to supply
a given load. Essentially, the converter nautrally adjusts the input voltage to match the
PDU input power times the converter efficiency to the load power. If no value of Vin,P DU
accomplishes this, insufficient power is provided and the input power needs to be increased
or the load power decreased. Since the circuit is powered with a controlled power source,
and not a controlled voltage source, it is possible more power is available to the input of the
PDU than is necessary. What happens in this case? The input voltage to the PDU will rise,
as the PDU will attempt to dissipate this power by increasing the voltage conversion ratio
and thereby decrease its efficiency. It also happens that if the voltage is increased beyond
the optimal efficiency point, the input resistance to the PDU will also increase and start to
decrease the efficiency of the WPT system, helping to match the power in the case when
the efficiency is too high for a given load. If the input power continues to increase, the input
voltage will continue to increase until it exceeds the maximum operating input voltage for
32
the PDU. At this point, the PDU responds by releasing the magic smoke. This has been
confirmed multiple times with different PDU chips over the course of experimental work
for this thesis, never intentionally.
As an example of this power matching, if 10 mW power is necessary at the buck input to
power a certain load, the input voltage could be 2.5V and the load resistance 625Ω to satisfy
this. However, the corresponding calculated efficiency for the source, coil, and rectifier
might be too low to supply 10 mW at this rectifier loading conditions. Instead, the converter
input could be 4V with 1600Ω load resistance. At these rectifier loading conditions, the
WPT system efficiency might be sufficient to supply 10 mW at the converter input. If the
input power at the PDU is increased to 15mW, 5 mW of power needs to be dissipated. The
PDU responds by increasing the input voltage until the power is matched. And if it can’t
be matched, the PDU will be overloaded and stop working. For this dissertation, the only
power of interest is the minimum input power necessary to power a given load, as this will
be the maximum efficiency point for that load.
Therefore for a given PDU output, the efficiency analysis procedure must determine
when there is a combination of Vin,P DU and Rin,P DU that can supply enough power to the
input of the PDU for a given RF input power. This procedure is shown in Fig. 2.10. This
procedure determines the minimum Pin necessary to supply a given load Vout , RLoad , which
is by definition the optimal efficiency point. This process starts at the minimum possible
Pin (assuming 100% efficiency), then incrementally increases Vin,P DU to determine if there
is sufficient power available at the input to the PDU to power the specified load, using
the aforementioned analysis. If not, Pin is also incrementally increased until a minimum
combination of Pin and Vin,P DU is found that can power the load, from which the efficiency
can be calculated as PLoad /Pin . There is some error due to the discrete nature of the iterative
process, but this procedure appropriately accounts for the dynamic nature of the PDU input
voltage to calculate the system efficiency.
This is also why a model for the diode switching loss and PDU losses is vital - it
33
Figure 2.10: Procedure for determining efficiency for regulated RFNFC system
34
eliminates the need to run numerous extra simulations for each iteration of this procedure.
Each iteration of the procedure uses a new combination of Vin,P DU and Pin . As Vin,P DU
changes, so will Rin,P DU . As each iteration has a unique combination of Pin and Rin,P DU ,
the diode switching losses will change for each calculation. In addition, the PDU losses
vary considerably with each new Vin,P DU . Thus, by not needing a new simulation to find
a new value of these losses for each iteration, the machine learning model enables much
faster efficiency analysis.
In this thesis, often just the coil plus rectifier circuit will be examined, without the
PDU. The individual sources of loss are calculated the same, but in this case the efficiency
is determined by solving a quadratic equation of the rectifier output voltage to determine
what value matches the input power minus the calculation of losses to the rectifier load
power.
Because the system operates with a controlled power source, when the PDU output
voltage is above the minimum input operating voltage for the PDU (2.5V for the LTC3564
for example), the PDU powers itself from its output. Using a form of bootstrapping, in
this mode of operation the PDU input voltage and the output voltage are equal. In this
state, continuing to increase the input power will not change the input voltage, unlike the
previously discussed situation when Vout is less than Vin,P DU . While the losses of the
coil + rectifier front end are calculated the same, the PDU losses change. First, because
no ’bucking’ is actually needed the inductor switching is much less, approximated using
ripple current with input voltage 50-100 mV greater than the output. Second, the PDU
losses are harder to estimate, through simulation or measurement. The LTC3564 does not
provide a way to externally bias the bootstrap circuit, so the losses from the self-powering
cannot be calculated through measurement. Thus simulated losses must be relied upon,
with efficiency around 99% in this mode of operation typically simulated. While this is
certainly greater efficiency than received in practice, the PDU losses are a small portion of
the overall system losses thus the error will not affect the design of the system front end. As
35
discussed in Chapter 6, by assuming variable Vin,P DU and using the efficiency analysis as
normal (with revised inductor loss), better correlation to the system efficiency is achieved
compared to calculating the losses with fixed Vin,P DU = Vout .
This efficiency analysis is meant to be used as a tool guiding the design than a perfect
predictor of the system efficiency. Standard simulation based methods, using ADS, HFSS,
LTSpice, etc., to design separate subsystems does not properly account for the interdepen-
dence of each subsystem on various other subsystem parameters. One good example of this
is the expanded form of the source efficiency, given as
2
Vin,P DU RLoad
V2 η n∗Vf
out,P DU buck
2 (1+ )
Vin,P DU
|ZC2 |
Q2
k 2 L1 ωphase V2 RLoad
in,P DU
V2 η n∗Vf
out,P DU buck
2 (1+ )
Vin,P DU
|ZC2 |
+Q2
ηsource = V2 R
(2.19)
in,P DU Load
V2 η n∗Vf
out,P DU buck
2 (1+ )
Vin,P DU
|ZC2 |
Q2
Rs + k 2 L1 ωphase V2 RLoad
in,P DU
V2 η n∗Vf
out,P DU buck
2 (1+ )
Vin,P DU
|ZC2 |
+Q2
This equation illustrates that the source efficiency is dependent on several characteris-
tics that aren’t intuitive, such as the buck converter efficiency, the diode forward voltage,
and the receiver resonant capacitance value. Capturing these complex relationships be-
tween the subsystems is very difficult, if not impossible, with simulation based methods.
Thus the design of the complete system, specifically with component selection and coil
design, uses the developed efficiency analysis to better understand and consider the effects
of the various system parameters on system efficiency.
However, while this efficiency analysis captures how the system efficiency trends with
different design parameters, the use of several approximations prevents it from being an
extremely precise system efficiency predictor in all cases. Some design variables may be
tuned to help model to measured correlation as noted. Some of these approximations and
36
limitations are listed below.
• Matching losses are unaccounted for. The matching network is utilized to improve
efficiency, while the efficiency analysis assumes there are no matching losses. Many
measurements in this dissertation occur over a large resistance range with the same
matching network, where a perfect match across all these loads is impossible. As
such, part of the load resistance range will have a lower efficiency than predicted,
especially at larger values of RLoad . This effect is more pronounced with PDU absent,
as the PDU functions to keep a more stable value of Rin,P DU to the rectifier.
• In addition, the impedance matching will lead to much improved efficiency in cases
where Req is very small, such as at increased transmission distance and/or small
load resistance. When Req is below 50Ω, even by using maximum power transfer
matching, the efficiency will be much improved over what the efficiency analysis
predicts. The efficiency analysis still functions as a better design guide, but must be
used in conjuction with other design processes and tools for matching the design to
achieve optimal efficiency.
• The inductor losses must be mitigated, especially at low load power. As the se-
lected PDUs operate with complex operation at the load power examined, they are
designed specifically to diminish inductor losses compared to what would typically
be predicted. Based on LTSpice simulations, when the inductor loss from (2.17) is
halved, the resultant calculated PDU efficiency much more closely matches the LT-
Spice simulated efficiency, thus that adaptation is made for the calculated efficiency.
As the best resistance value is difficult to estimate exactly, it may be tuned to help
modeled to measured efficiency correlation within reasonable values.
• Vin,P DU functions much more complexly than assumed. While the predicted PDU
input voltage closely matches the measured for some load power, at other times the
input voltage behaves very strangely, especially under 5 mW. This will be shown in
37
a couple of measurements in later chapters, but in one instance a PDU settles at 1.9V
PDU input across a range of 3-4 mW, though the minimum operating input voltage
is 2.4V for this PDU. Interestingly, the measured efficiency in these cases still trends
very similarly with the calculated efficiency, though the actual input voltage behaves
strangely in what is attributed to device specific peculiarities.
• The analysis assumes the PDU operates in pulse frequency modulation ’burst’ mode,
as is the mode of operation for the LTC3564 at light load. While the TPS62615 may
use single or multi pulse, the converter switching and conduction losses are not a
major portion of the power losses. In addition, there is not much control over these
in the design (as off the shelf components are used), thus the use of simulated losses
offer an acceptable approximation.
• The efficiency analysis is very sensitive to the coil characteristics, such as L1 , k, and
Q2 , so any discrepancies between simulation and the fabricated coils hurts accuracy
• Pin is discretely increased in analysis and measurement, with corresponding loss in

accuracy
• Diode switching loss and PDU losses are calculated with a ML model, based off
simulated data. This results in sufficient accuracy to understand how these losses
affect trends in subsystem efficiency, but will not result in a perfect estimation of
these losses.
2.4 Summary
This chapter examined the development of a system architecture for a RF WPT system
with regulated output, detailing the improvements over previous examples. In addition,
this chapter discussed the efficiency metrics developed to guide the design of the RFNFC
systems discussed in later chapters of this dissertation. The efficiency analysis improves
38
upon previous work by classifying and quantifying losses tailored specifically to low power,
high frequency WPT systems, utilizing machine learning models for certain power losses
to decrease the number of external simulations needed to calculate efficiency, and using
an iterative system efficiency analysis procedure to model the dynamic nature of the input
voltage to the PDU.
39
CHAPTER 3
SUBSYSTEM DESIGN
3.1 Introduction
The previous chapter introduced the system architecture and the modeling of the power
losses relevant to a low power, RFNFC system. The system architecture consists of a mW
RF source, near field coupling coil link with matching network, diode rectifier, reverse
power distribution network, and DC-DC converter. Equations for the various power losses
and efficiency analysis procedure were provided. The importance of system level design
was also discussed.
This chapter presents specific design examples. All modeling and simulation work
for each of the subsystems are included here. This chapter uses the modeling and power
loss equations introduced in the prior chapter to dictate design choices such as component
selection, rectifier topology, and coil geometry. Various pieces of the system architecture
are demonstrated through simulation and measurement through several designs, focused
on low power applications. The design process is described, explaining how the design
approach for RF near field coupling systems varies compared to other WPT systems. The
designs developed in this chapter will be further evaluated in chapter 6 as complete system
demonstrations.
3.2 Design Identification
Because of the scope of this dissertation, different designs are examined to demonstrate
different aspects of the approach, modeling, or dissertation objectives. Each system uses
one of four different coil designs, in varying combinations. The geometry parameters for
each of these coils are given in Table 3.1, and the design process to choose this geometry
40
Table 3.1: Coil Geometry and Parameters
l (mm) w (mm) g (mm) L (nH) @ 1 GHz Cpar (pF)
coil1 5.75 1.31 0.58 6.06 0.484
coil2 7.25 1.65 0.73 7.95 0.563
coil3 7.5 1.5 2.0 9.72 0.452
coil4 8 1.1 0.80 14.19 0.534
is provided in the following section. For systems, either a half wave or bridge rectifier is
used. Systems are designated by the rectifier type and coils used. Half2,2 for instance uses
a half wave rectifier and coil2 for both the transmit and receive. Bridge4,1 would use a
bridge rectifier with coil4 for the transmit and coil1 for the receive.
In addition, providing full simulation and design details for each of these designs would
make the body of this dissertation needlessly long. Significant design approaches, design
decisions, subsystem measurements, and simulation details only are included in this chap-
ter.
3.3 Coil Design
3.3.1 Selection of Coil Geometry
To demonstrate an integrated solution, the RF coils for this design are integrated on the
same substrate as the rest of the transmitter or receiver circuit (instead of off board coils
often seen in WPT demonstrations). Various coil implementations have been previously
demonstrated, including wirewound [58], planar spirals [33], and planar rings [25]. For RF
operation, single turn rings give the best maximum PTE, as shown in Fig. 3.1. The coil
geometry for all designs in the dissertation has the parameters shown in Fig. 3.2. In the Fig.
3.1 HFSS simulation comparison, 1, 2, and 3 turn planar inductors on FR4 are compared,
with l = 7.5mm, w = 1mm for the 1 turn coil, l = 5mm, w = 0.5mm for the 2 turn coil, and
l = 4.5mm, w = 0.25mm for the 3 turn coil. The Q and k are significantly degraded when
more than one turn is simulated. Because the parasitic capacitance is much greater in the
multiple turn coils (from the interwinding coupling), the self resonant frequency is much
lower. This causes an artificial increase in k as frequency increases as shown in Fig. 3.1.
41
Figure 3.1: Comparison of Q and k for 1, 2, and 3 turn RF coils
To keep coil area small and prevent the inductance from increasing and further lowering
the self-resonant frequency, smaller line width must be used when more turns are added.
This greatly increases the resistance and decreases the quality factor at RF. Because of this,
single turn rings are used for all designed coils.
Both the transmit and receiver coils are designed with the same geometry. However,
area is only a consideration for the receiver coil. An HFSS model for the coils is shown in
Fig. 3.3, with 1 oz copper on FR4 substrate. One important geometry and modeling note
for the coils is a void is added in the ground plane directly beneath the coil (with slightly
larger area). This leads to increased inductance, and therefore greater efficiency, for the
coils. The simulated magnetic fields, viewed from the side, for the coil2,2 link is shown in
Fig. 3.4. HFSS is used for all full wave 3D electromagnetic simulations in this dissertation.
3.3.2 Coil Parameter Modeling
Before introducing the coil design, a couple of notes should be made about the parameters
used in the calculated efficiency analysis from Chapter 2. First, the HFSS simulated quality
factors change greatly with the transmission distance, shown in Fig. 3.5. This simulation
sweep shows coil4 simulated Q at 1 GHz as a function of transmission distance. One rea-
son for this variation is the capacitive coupling between the coils increases as transmission
distance decreases, decreasing the self-resonant frequency and artificially increasing the
42
Figure 3.2: Coil geometry for this dissertation, with side length l, line width w, and gap
distance g
resistance of the coil. The reason it is artificial is that the coils are designed to operate at
resonance, thus operating closer to the self-resonant frequency does not degrade efficiency
as much the HFSS simulation would suggest but rather lessens the extra capacitance needed
from the resonant capacitor. While the Q does degrade some in practice as distance short-
ens, using this simulated value results in large efficiency underestimation when compared
to measurement. The most accurate calculated efficiency, compared to measurements, oc-
curs when using the quality factor of the coils when not closely coupled to the other coil.
Therefore, the quality factor of each coil is simulated alone, with this value used in all
efficiency calculations, with some slight tuning allowed.
Second, the microstrip feedline on the transmitter side needs to be modeled to calculate
the source efficiency. The extra inductance from the microstrip feed line also adds to the re-
flected impedance to the transmit coil and correspondingly increases the source efficiency.
Microstrip line length is appoximated and simulated in HFSS for each transmit coil used,
and this value added to L1 for use in efficiency calculation. By doing this, much better
43
Figure 3.3: HFSS model of coils (coil2 ) at (a) 10 mm transmission distance and (b) 2 mm
transmission distance
44
Figure 3.4: Simulated H-field of coil2−2 at 5 mm transmission distance
Figure 3.5: Effect of the transmission distance on the simulated Q factor for coil4 geometry
45
agreement between the calculated and measured efficiency is achieved.
3.3.3 Coil Design and Efficiency
There are three metrics to analyze the effectiveness of the coils: the maximum PTE (1.1),
the loaded coil efficiency (2.1), and the source efficiency (2.8). The maximum PTE is the
least effective method, as it is system agnostic, but it allows for the quickest evaluation of
a design. The loaded coil efficiency (referred to as just the coil efficiency going forward)
and the source efficiency are the more accurate metrics for evaluating the coils for use in a
specific system.
The maximum PTE is used first to quickly evaluate a wide range of coil geometry to
narrow the focus of the design. For example, if a coil geometry only has 60% max PTE,
then there is no need to further consider that geometry. An HFSS simulation sweep was
performed for various square coil geometry at 2mm transmission distance, with the same
geometry for both coils. The k, Q, and maximum PTE as a function l and the ratio of w/l
at 868 MHz is shown in Fig. 3.6. For this sweep, g is set to l/10. The coupling coefficient
is increased at larger l, and for intermediate line width. For all l, the coupling coefficient is
largest when the line width is one quarter of l (2*w/l = 0.5). In contrast, Q is the largest at
smaller l and thicker line width. With very small coil size and thick lines, the resistance is
very small even at RF operation. Using these values to calculate the maximum PTE, Fig.
3.6 shows the design of the coils should avoid using very small line width (less the 10%
of l). For the receiver coil, the maximum l considered is 10mm. While good maximum
PTE can be achieved with larger l as well, a key design goal is to minimize receive coil
area. If the same efficiency can be achieved with smaller coils, then no reason exists for
considering l above 10mm.
While the maximum PTE suggested the best efficiency could be obtained with large w
coils, when factoring in the load resistance the optimal geometry changes. Smaller w may
demonstrate better coil efficiency, shown in Fig. 3.7. This is because smaller w increases
46
Figure 3.6: (a) Plot of how k and Q vary with coil geometry and (b) plot of how the
maximum PTE varies with coil geometry
47
Figure 3.7: The coil efficiency for coil3−3 link with Rin = 1000Ω at 1 GHz
the inductance. While the quality factor decreases, a smaller value for C2 is used for the
same 1 GHz resonant frequency, decreasing α and thereby increasing the coil efficiency
from (2.1). A similar effect is seen on the source efficiency. In Fig. 3.8, the effect of the
geometry on the source efficiency is shown for 850 MHz frequency and varying Rin for the
coil3 geometry at 1mm transmission distance. The geometry for both coils is the same. The
source efficiency increases with Rin and may be very high at thousands of Ω Rin despite the
low transmit inductance compared to lower frequency WPT systems. This is a reason why
low power, mW applications are ideal for RFNFC - large load resistance is necessary for
1-20 mW output power. With large load resistance, the high source efficiency is possible
despite the 5-15 nH L1 . Increasing the load power would decrease the load resistance (for
the same output voltage), and accordingly the source efficiency would suffer greatly and
result in a need to increase the coil area and decrease the frequency for adequate efficiency.
The optimal source efficiency occurs for larger area coils, with intermediate ratio of
w/l. Similar to before, smaller w leads to increased inductance, thus smaller C2 and α.
More significantly, smaller w and greater l lead to increased L1 , increasing the reflected
48
Figure 3.8: Geometry effect on source efficiency at 850 MHz with Rin = (a) 500Ω (b)
1000Ω and (b) 3000Ω
resistance Req and thus source efficiency. Too small w and the quality factor decreases.
Too large w and the inductance decreases, thus the ideal value of w is an intermediate
value. This consideration is unique to high efficiency, RF near field coupling. Lower
frequency systems have greatly increased L1 , thus the source efficiency will be guaranteed
large without having to consider this as a factor.
This also highlights part of the design choice. While larger l, especially for the transmit
coil, leads to increased source efficiency, it also increases the area. Hypothetically, it is
worth 5% source efficiency decrease to decrease the area by 36%, moving from l = 10mm
to l = 8mm. But why not just use a very large inductance transmit coil and very small
area receive coil? This can be done to an extent (as will be demonstrated), but very large
inductance mismatch will not necessarily lead to better efficiency. When using very large
area, large inductance transmit coil, the receiver coil should not be drastically different in
area lest the k will suffer. From (2.5), Req improves linearly with the inductance L1 but with
the square of k, so if an increase in L1 is met with a similar decrease in k, source efficiency
will suffer. Further, the coil efficiency is dependent on k and not L1 , so any difference in
the coil geometry to operate with large L1 and Q2 need not have a meaningful reduction in
49
Figure 3.9: HFSS simulation with receiver coil l = 6mm, w = 1.5mm, and varying geometry
for transmit coil at 800 MHz
k. A HFSS simulation demonstrating this is shown in Fig. 3.9, for fixed small area receiver
coil and varying the size of the transmit coil. Using the same coil geometry for the transmit
and receiver coils (l = 6mm, 2* w/l = 0.5) has the largest k, but small L1 . Similar k can
be achieved by increasing both transmit l and w, but this leads to equal or lesser transmit
inductance, thus no benefit. Changing the coil geometry to get improved L1 decreases k.
Since the receiver coil inductance is small (around 6 nH), L1 should be improved. The
peak efficiencies in this dissertation occur at the greatest load power, thus lowest Rin,P DU ,
so the source efficiency cannot rely on huge Rin,P DU for acceptable efficiency even after
accounting for matching. Thus for very small inductance receiver coils, a balancing of the
decrease in k and increase in L1 should occur.
Considering all these factors, 4 different coils were selected for full system design.
These designs were selected for best combination of receiver coil area and coil+source
efficiency. The quality factor and inductance of each coil is shown in Fig. 3.10. One
may refer back to Table 3.1 for the geometry parameters. Coil4 has the largest inductance
because it was chosen to have the lowest ratio of w/l, sacrificing quality factor at higher
frequency for increased inductance. Coil4 was designed and intended to operate as the
50
Figure 3.10: Simulated inductance and quality factor of each coil
highest efficiency transmit coil. The smallest area coil is coil1 (33 mm2 ), but has the lowest
quality factor. This demonstrates the tradeoff between area and efficiency inherent to the
design. Coil1 has similar geometry to the receiver coil examined in Fig. 3.9, and a similar
balancing of k and L1 shows both coil4 and coil2 are suitable for use as transmit coils for
coil1 . Coil2 has the best overall Q across different frequency, and is selected as the coils for
demonstrations of the reverse PDN in Chapter 4 and the integrated inductor in Chapter 5
to give operating frequency flexibility. The HFSS simulated coupling coefficient variation
with distance for different coil combinations used in the full system is shown in Fig. 3.11.
51
Figure 3.11: Transmission distance vs k for different coil links, at 900 MHz
For each combination the system efficiency can be estimated by using the k for a given
transmission distance with the Q and L from Fig. 3.10. Note that the larger line width coil2
has higher k as the transmission distance increases, as the metal area of the coil is greater.
As the mismatch in geometry to coil1 is greater for coil4 than coil2 , the k is notably smaller
in this case. However, when using coil2 for both coils, the best k is achieved due to the fact
the coil geometry is the same and the line width (and metal area) of the coils is larger. This
makes a coil2,2 system optimal for operating at increased transmission distance.
The coil and source efficiency as a function of frequency for various coil links is shown
in Fig. 3.12 at 1mm and 2mm transmission distance and varying Rin . This graphic captures
most of the previous discussion, while showing how the selected designs balance the var-
ious constraints. For the coil efficiency, all the designs have very high quality factor such
that increasing the transmission distance has minimal effect on the coil efficiency. The coil
efficiency can operate with lower k without a large decrease in the efficiency. However,
the coil efficiency sharply decreases when Rin increases from 500Ω to 5000Ω. A system
with coil1 receive is most susceptible, as the small L2 causes α to be larger. This receiver
coil is not a good fit for the smallest load power (less than 5 mW). While the other systems
have efficiency decrease, they are still suited for the lowest load power. In addition, the
52
half4,1 link shows the most variation in coil efficiency with frequency, as the Q of coil4
varies most with frequency. Thus systems with a transmit coil4 are chosen to have lower
source frequency in experimental work.
The source efficiency shows the opposite trend to the coil efficiency: the efficiency is
greatly improved by increasing Rin . This is by design, as the coil geometry was selected
to balance the decrease in coil efficiency with increasing load resistance with substantial
gain in source efficiency. When Rin is 500 Ω, the increase in transmission distance has
a larger effect on the source efficiency. Unlike the coil efficiency, the source efficiency is
very susceptible to decrease in k. When the load resistance is greatly increased, the source
efficiency shows much less decrease with transmission distance. While the efficiency is
still slightly better at 1mm, the transmission distance can be increased by 100% with only
slight efficiency decrease as the coil efficiency remains largely constant at smaller k and
the source efficiency remains largely constant at large Rin . When operating at increased
transmission distance (2-3mm), it should be expected then that the peak efficiency will
occur at larger load resistance than for 1mm transmission distance.
3.3.4 Effect of Misalignment
To demonstrate the effect of misalignment of the coils, a link with coil2,2 was simulated
at 2mm distance with varying lateral misalignment, up to half of the length of coil2 . The
effects of misalignment on k, the coil efficiency, the source efficiency, and the combined
source+coil efficiency is shown in Fig. 3.13. Up to 1 mm misalignment, k and the efficiency
of the system is not noticably changed. This is expected, as near field coupling is less
suspectible to misalignement, compared to inductive power transfer for instance. As the
misalignment increases, the k starts to fall off but the coil efficiency stays high. Again, this
is as expected because near field coupling can operate with high coil efficiency at lower k if
the Q is high. The source efficiency suffers greatly, however, as k starts to decrease. Thus,
while the coils still transfer the power with high efficiency with large misalignment, much
53
Figure 3.12: Coil (top) and source (bottom) efficiency for different transmission distance d
and Rin
54
Figure 3.13: (a) HFSS simulated k on coil2 change with lateral misalignment, and the cor-
responding effect on the coil and source efficiency and (b) Picture of the HFSS simulation
model for this setup
power is lost in the source such that low power, RF near field coupling can only tolerate
around 1mm misalignment in either direction without compromising efficiency.
3.4 Rectifier Topology and Diode Selection
3.4.1 Diode Selection
The selection of an appropriate diode is crucial for efficiency. Three factors are impor-
tant in a RF near field coupling system: the junction capacitance Cj , the forward voltage
Vf , and the breakdown voltage. Cj and Vf relate to the switching and forward voltage
55
Table 3.2: Comparison of RF Diodes
Breakdown Efficiency
Diode Model Cj Vf Loss from (2.10) Switching loss
Voltage Decrease
HSMS-2820 0.7 pF 0.34V 15V 3.4 mW 0.34 mW 13.3%
SMS-7630 0.14 pF 0.26V 2V 2.6 mW 0.04 mW N/A
BAR64 0.17 pF 1.1V 150V 11 mW 0.05 mW 39.2%
HSMS-2860 0.18 pF 0.25V 4V 2.5 mW 0.05 mW N/A
SMS3922 0.7 pF 0.34V 8V 3.4 mW 0.34 mW N/A
SMS3923 0.9 pF 0.37V 20V 3.7 mW 0.58 mW 15.2%
loss, respectively, and the breakdown voltage limits the maximum rectifier output voltage,
decreasing the efficiency at larger load power. Table 3.2 shows a comparison of several
diodes used in RF design. The two sources of power loss are determined from (2.10) and
the neural net switching model for a bridge rectifier with 1000Ω load and 14.5 dBm, 800
MHz source. Note that while Vf is not constant, the diode current change is small over all
loads considered such that the value of Vf is assumed not to change significantly.
An ADS simulation of a half-wave rectifier with 14.5 dBm source, optimized for effi-
ciency, shows reverse voltage in excess of 5V across the diode. Accordingly, the SMS-
7630, HSMS-2860, and SMS3922 diodes all have insufficient breakdown voltage. At
increased power load, the rectifier output voltage will be limited and the efficiency will
decrease. Among the rest of the diodes, the Avago HSMS-2820 series diodes have the low-
est loss, and as they have the best combination of breakdown voltage and low loss, they are
selected for this work. The forward voltage loss is dominant over the switching loss, such
that even though the BAR64 diode has much smaller switching loss, the large increase in
forward voltage loss leads to the greatest efficiency drop in the given system. If very light
loads were considered (less than 1 mW) such that the voltages are less, the SMS-7630 se-
ries diodes would be the optimal choice. If higher power and voltage were considered, the
BAR64 diode would be the superior option. The efficiency decrease from the diode is 13%
even with HSMS-2820 diodes in this example. Even though the diode selection is much
less interesting from a design standpoint compared to the rest of this thesis, this highlights
the importance of proper diode selection to achieve the best efficiency.
56
3.4.2 Rectifier Topology
Three different rectifiers were considered for RF-DC conversion: half-wave, bridge (full-
wave), and Class E. A Class E rectifier is a modified version of the half-wave rectifier. A
class E rectifier is a resonant rectifier that seems ideal for low power, RF operation because
it uses only a single diode (only one forward voltage loss) and because it uses zero-voltage
switching to mitigate switching loss in the diode. Using the equations from [85] for a
1000Ω rectifier load at 868 MHz, the calculated class E filter inductance value is 472 nH
and filter capacitance value is 0.07 pF. For RF design, this is very, very difficult to achieve
in practice. Moreover, the class E rectifier has its own resonant frequency which needs to be
perfectly matched to the coils to have optimal efficiency - adding extra design complexity.
A RF near field coupling system designing a custom chip rectifier might be able to use the
class E rectifier, but it is unsuitable for the work in this dissertation using components off
the shelf.
Full systems using both the half-wave rectifier and the bridge are designed to compare
the two rectifier topologies. Both the calculated efficiency and the ADS optimized, sim-
ulated efficiency for the coil4,4 link with both a half-wave and bridge rectifier are shown
in Fig. 3.14 for 14.5 dBm, 700 MHz source. The ADS simulation used the same HFSS
simulated coil data as the calculated efficiency, with microstrip line components added.
The values of Cm , Lm , C1 , and C2 were optimized for best efficiency. The correlation of
efficiency to load resistance in the two cases is very different. In fact, the ADS simulation
suggests the bridge rectifier should have the best efficiency. This cannot possibly be true,
as the only major difference with respect to efficiency is that the bridge rectifier has an
extra forward voltage loss such that, if both rectifiers are optimally matched, the half wave
should have higher efficiency. This represents a key finding of this dissertation - simulation
based techniques are less accurate for efficiency analysis than the demonstrated analysis.
While this example was chosen specifically to make this point, other ADS comparisons
between the bridge and half wave rectifiers have shown both the half wave and bridge as
57
Figure 3.14: Comparison of analysis techniques for half and bridge rectifier with coil4,4
with 14.5 dBm, 700 MHz source, 1mm transmission distance
superior for different designs. Again, this defies reason as one of the two should be supe-
rior to the other more generally, as will be shown in measurement results. ADS simulation
does have value for RF near field coupling systems, as will be discussed in the next chapter,
but not for efficiency analysis. Bridge rectifiers will still be used in full system measure-
ments for analysis purposes, as the bridge rectifier is less susceptible to dynamic effects
with a RFNFC system for better correlation with modeling, as will also be discussed in the
following chapter.
3.5 Coil + Rectifier Experimental Work
Various aspects of the coil design were validated through measurement. Without the PDU,
isolating the influence of various parameters is more easily demonstrated. In addition, most
of these measurements will not be repeated in Chapter 6 measurements of full systems, as
the purpose (validating design considerations) is already completed. The measurements
were performed with a HP 8648D RF signal generator and an oscilloscope, with variable
resistor rectifier load. Chapter 6 gives more complete details on the measurement setup and
procedure.
58
Figure 3.15: Comparison of the bridge and half-wave rectifier with coil2,2 .
3.5.1 Bridge vs Half Wave Rectifier
A comparison of a half-wave and bridge rectifier with coil2,2 for both RF coils is shown in
Fig. 3.15. The measurement is completed at 1mm transmission distance with 14.5 dBm,
868 MHz source. The half wave rectifier has a higher efficiency across all load. In addition,
the efficiency difference is largest at low load resistance, as this is the lowest output voltage.
Accordingly, the bridge rectifier is more affected by the forward voltage, while at large load
resistance the output voltage is larger and diminishes the efficiency decrease from forward
voltage loss.
3.5.2 Rectifier Efficiency with Increasing Input Power
The effect of the input power on the efficiency of bridge2,2 is shown in Fig. 3.16. The
measurement was completed at 1mm transmission distance with 1000Ω load resistance and
780 MHz source frequency. As the input power increases, the efficiency improves. With
constant resistance load, the coil efficiency and source efficiency is mostly unchanged as
the input power increases. Only slight variation in Rin with rectifier output voltage leads
to changes in these values, and their changes mostly cancel each other out as the input
power increases. Thus the efficiency increase comes via the rectifier, because the rectifier
59
Figure 3.16: Effect of the input power on efficiency for bridge2,2 . Lm = 0.3 nH, Cm = 0.2
pF, C1 = 3.5 pF, C2 = 3.5 pF
output voltage increases with input power. This leads to improved efficiency from (2.9) as
previously discussed.
3.5.3 Rectifier Efficiency with Increasing Resistance
Figure 3.17 shows the effect of increasing resistance on the efficiency of the bridge3,3 de-
sign. This measurement is completed at 1mm transmission distance with 14.5 dBm, 1040
MHz source. The rectifier efficiency is improved in a similar way to increasing the input
power - by increasing the output resistance the output voltage is increased, for improved
efficiency. Unlike the input power variation measurement, the load resistance is not fixed.
The coil efficiency decreases and matching loss increases as the load resistance increases.
This leads to an intermediate voltage having the highest efficiency. At smaller load resis-
tance the loss is dominated by the rectifier efficiency, but as the load resistance increases
the coil efficiency decrease outpaces the rectifier efficiency increase.
The largest limitation with the calculated efficiency is it assumes an optimally matched
system. Over a wide range of resistance, this is not necessarily the case. In this instance,
there is disagreement between the calculated and measured efficiency at the large load resis-
tance, because the same matching circuit was used for all load resistance in measurement.
60
Figure 3.17: (a) Effect of changing load resistance on bridge rectifier efficiency
While the calculated efficiency expects that the efficiency will still be large, the measured
efficiency shows a sharper decrease as the matching loss increases. If this circuit were
matched for a 2000Ω load instead, the agreement would be much better at the higher load
resistance, but worse at the lower load resistance. This is shown from the ADS simulation.
Ignoring the fact the ADS simulation grossly overestimates the efficiency (count this as
more evidence of the calculated efficiency superiority to simulated), the general shape of
the ADS simulation using the same matching network more closely resembles the shape
of the measured curve. This shows that a portion of the loss at the upper end of the load
resistance is matching loss - not captured by the proposed analysis. When the matching
network is reoptimized for each resistance point in ADS, a curve more like the calculated
efficiency results. The calculated efficiency analysis should then just be used to predict the
best possible efficiency for a single point, and not used to determine the efficiency over a
wide range of load.
3.5.4 Different Frequencies
A comparison for the rectifier efficiencies of half2,1 and half1,1 at 600 MHz and 1000 MHz
is shown in Fig. 3.18. At load resistance less than 1000Ω, the efficiency of all systems is
61
Figure 3.18: Efficiency at 600 MHz and 1000 MHz for half2,1 and half1,1
similar. In general, using coil2 as the transmit has slightly higher efficiency as the quality
factor of this coil is much improved over coil1 and has slightly higher L1 , while the k is
very similar. However, as the load resistance increases, the 600 MHz design efficiency
decreases much faster. This is not intuitive, as at higher frequency it would be expected
there are greater diode switching and microstrip losses. However, a larger value of C2 is
needed to resonate at 600 MHz (C2 = 7pF was used) than 1000 MHz (C2 = 0.2pF). This
leads to a corresponding larger value of α, which leads to a greater decrease in the coil
efficiency. If larger load resistance is needed for a system, it is beneficial to increase the
frequency of the system to limit the value of C2 necessary for resonance.
3.5.5 Different Transmission Distance
A comparison of half2,2 and half2,1 with 14.5 dBm, 850 MHz source is shown in Fig. 3.19
at both 1mm and 2.5mm transmission distance. At 1 mm transmission distance, the effi-
ciency peaks in the 500-1000Ω load range. While half2,2 has slightly higher efficiency, the
half2,1 design has smaller receiver coil area, again showing the tradeoff between receiver
coil area and efficiency inherent to the design. When the transmission distance is increased
to 2.5mm, it can be seen the efficiency now peaks in the 1500-2500Ω load range. As dis-
62
Figure 3.19: Measured efficiency of rectifier for half2,2 and half2,1 at 1mm and 2.5mm
transmission distance
cussed in an earlier section, a large value of Rin,P DU is needed for high source efficiency
to compensate for smaller k (∼0.2 at 2.5mm distance compared to ∼0.5 at 1mm distance).
This is why the efficiency peaks for a different load resistance range. Also, using coil2
here as the receive coil leads to much greater efficiency improvement. While at 1mm the
marginal gain in k did not lead to large efficiency increase, at 2.5mm transmission distance
this increase in k is much more significant. The effect of matching loss may also be seen
when Rin,P DU = 4000Ω. At 2.5mm transmission distance, the half2,2 circuit shows higher
measured efficiency than at 1mm. This is not actually possible from the efficiency analy-
sis, or logically as the circuit has the same parameters except smaller k, which will only
decrease efficiency. As the circuits are matched optimally for their peak efficiency (and
this occurs at smaller load resistance for 1mm transmission distance), more matching loss
is present at 4000Ω at 1mm transmission distance.
3.6 4 Coil Circuit Design
While most of the designs examined in this dissertation are very similar, one unique 4
coil network will be examined. In this design, the goal is very different. The objective
63
is to increase the transmission distance and provide similar power output discontinuously
without increasing the source power or significantly increasing coil area. Accordingly,
efficiency is not a large concern compared to the transmission distance and coil area (for
discontinuous use, it is assumed adequate time is given to ’charge’ the rectifier output
to provide increased output power). For this demonstration, large storage capacitance is
located at the output of the rectifier, to power a boost converter. The integration challenges
for this are discussed in the following chapter. To store as much energy as possible at the
output of the rectifier, the voltage should be as high as possible from 1/2CV 2 . The rectifier
is charged with open circuit load, such that with infinite resistance load, a ’loaded coil’
efficiency metric is not valid. Efficiency should not be completely ignored, lest the rectifier
output voltage will suffer, and the efficiency metric used is given as [60],
2 2 2
(k12 Q1 Q2 )(k23 Q2 Q3 )(k34 Q3 Q4 )
η4coil = 2 2 2 2 2
(3.1)
[(1 + k12 Q1 Q2 )(1 + k34 Q3 Q4 ) + k23 Q2 Q3 ][1 + k23 Q2 Q3 + k34 Q3 Q4 ]
The geometry of the 4 coil system is shown in Fig. 3.20. The coil1 is supplied by the RF
source through a matching network, and coil2 is on the opposite layer of the board, center
aligned. Coil3, on the receiver board, faces coil2. Coil4 is on the other layer of the receiver
board, center aligned, and connects to a half wave rectifier. The same single turn ring
geometry is used, though with the increased number of coils the number of variables rises.
To limit the HFSS simulations, coil1 and coil4 were picked to have the same geometry, and
coil2 and coil3 were picked to have the same geometry. In addition, this system operates
at 30mm transmission distance with 14.5 dBm, 960 MHz source. As k23 quickly falls
with the increase in transmission distance, coils2/3 were designed to have much larger area
to have adequate k23 . The maximum area at 960 MHz is restricted though, as the self-
resonant frequency will be exceeded if the coil is too large. Restricting the area to 400
mm2 , the optimal efficiency was reached with the geometry shown in Table 3.3 at 0.2%
At this geometry, k23 = 0.0072, which while small, is sufficient to store enough energy to
64
Figure 3.20: (Left) 4 coil system when viewed from left and (right) 4 coil system when
viewed from right
Table 3.3: Four Coil Parameters

Coil 1, 4 Coil 2, 3
l 10 mm 19 mm
w 2.3 mm 6.5 mm
L 10.2 nH 10.4 nH
Q 188 131
power milliwatt-scale loads.
3.7 PDU Selection and Circuit Design
This dissertation uses COTS converters for the PDU. Accordingly, the ’design’ aspect for
the PDU circuit is not in PDU design but selecting the appropriate PDU and modeling the
PDU in the entire system. While the main weakness of the efficiency analysis is that it
loses accuracy over a wide range of load, the PDU helps rectify this (no pun intended).
A PDU is shown to help maintain the efficiency over a wide range of load [58]. Because
the input resistance to the PDU is a function of the duty cycle and the change in Vin,P DU ,
Rin,P DU will not change as much as the corresponding change in RLoad , opposed to using
a rectifier alone. This leads to improved efficiency over a wider range of load, using the
same component values for the matching network, though the peak efficiency is sacrificed.
As the designed system operates with maximum 28 mW input, the optimal PDU will have
high efficiency at this loading range. In the two coil system targeting high efficiency, the
buck regulator needs to be able to convert down to at least 1V. Similar to the diodes, the
65
Table 3.4: Comparison of MHz switching PDU
Switching
PDU Model Eff @ 1V, 10 mW Vin range Vout range
Frequency
LTC3564 2.25 MHz 85% 2.5-5.5V 0.6-5.5V
LTC3600 4 MHz 70% 4-15V 0-14.5V
TPS54A20 4-10 MHz 50% 8-14V .5-2V
TPS62088 4 MHz 87% 2.4-5.5V 0.6-4.0V
TPS62650 6 MHz 89% 2.3-5.5V .75-1.44V
selection of PDU is less interesting from a design standpoint but crucial for achieving opti-
mal efficiency. The input voltage needs to work in the range of the rectifier output voltage
measurements completed earlier (up to around 5V). In addition, the switching frequency is
desired to be as high as possible. This enables a much smaller power inductor to be used for
smaller overall system size. Few commercially available buck converters operate at MHz
frequency, and a few are shown in Table 3.4. The LTC3600 and TPS54A20 are suited for
higher voltage/power output than examined in this dissertation. The TPS62650 has the best
combination of efficiency and switching frequency, but the output voltage range is very
low. However, the TPS62615 (fixed 1.2V output, else the same as the TPS62650) will be
used for demonstration of the integrated inductor in Chapter 5 due to the 6 MHz switching
frequency. This dissertation needs to examine a wider range of output voltage to compre-
hensively explore and validate the efficiency model and calculations, but for a fixed voltage
output this PDU would be superior. Among the other two, the LTC3564 has more out-
put voltage range and the TPS62088 has slightly higher efficiency and frequency. Either
could be used with equal effectiveness. To break dissertation formality briefly, all fabri-
cated designs in this thesis are hand-soldered by myself. The TPS62088 is only available
in wafer chip-scale package and the LTC3564 is available in SMT SOT package, such that
the LTC3564 is significantly easier to hand solder for experimental work and is selected as
the PDU for this dissertation.
No innovation in PDU circuit design is presented in this dissertation, as the circuit
design simply follows the datasheet for the DC-DC converter, just changing the feedback
resistors to give different output voltage. The guidelines for the layout were to minimize the
amount of resistance on the output, input, and inductor traces, as this can lead to significant
66
power loss in the conductive losses of the PDN.
3.8 Summary
This chapter discussed the main design considerations for the coils for RFNFC systems.
The modeling approaches and design tradeoffs, using the previous chapter analysis as a
guide, were explained in this chapter. In particular, the transmit inductance, the effect
of load resistance on the coils, and implications of source efficiency were examined both
through calculation and measurements. The justification of the selection of diode and PDU
components was also given in this chapter.
67
CHAPTER 4
RF NFC INTEGRATION CHALLENGES
4.1 Introduction
The previous chapter discussed the design, simulation, and modeling of the subsystems and
complete system architecture. However, further integration challenges still remain. Merely
piecing together and connecting the previously designed subsystems leads to an ineffective
complete system. Various high frequency effects affect the selection of component values
in RF near field coupling circuits. The conventional equations and analysis used to select
these values do not necessarily hold at RF operation. It was previously shown the devel-
oped efficiency analysis is better suited for designing the system than simulators, but for
component value selection the use of simulators greatly improves accuracy. This chapter
discusses how to model microstrip line effects and parasitic capacitance, and investigates
further adjustment of the resonant capacitance value in the case of the half wave rectifier.
This chapter also discusses the design of a reverse power distribution network (PDN).
The reverse PDN is necessary for system integration to deliver a stable voltage supply to
the PDU. Layout considerations, capacitance selection, and experimental validation of the
reverse PDN is provided in this chapter for two coil, continuous power output systems and
four coil, discontinuous power output systems to integrate large storage capacitance.
4.2 Component Value Selection for RF Inductive WPT
4.2.1 Purpose of External Components
This chapter discusses, in part, the selection of component values in RFNFC systems. For
this dissertation, this pertains to the matching network values Lm and Cm and the reso-
nant capacitor values C1 and C2 . The value of C2 is the most influential on the resonant
68
frequency and should be determined first. Lm , Cm , and C1 are then selected to provide
optimal efficiency at the resonant frequency with the selected value of C2 . Even without
Lm , Cm , and C1 , over 50% efficiency of the coil + rectifier system is possible, as the pur-
pose of these values is just impedance matching. This includes C1 , whose purpose is to
cancel the leakage inductance from the transmit coil L1 at the resonant frequency. While
poorly chosen values for these components can increase matching loss, and even change
the optimal resonant frequency if the circuit is optimally matched for a different frequency
close to the resonant value with C2 , there is much greater margin for error on the selection
of these values than the selection of resonant capacitor C2 , which will greatly change the
resonant frequency of the system depending on its value.
4.2.2 Parasitic Capacitance Adjustment
Another effect of operating with higher frequency, lower inductance coils is that the para-
sitic capacitance, Cpar , becomes a more influential factor. This effect has been previously
examined in [86], but in near field coupling circuits at short transmission distance the par-
asitic coupling between the coils themselves must also be accounted for. The parasitic
capacitance restricts the amount of inductance that can be designed in a RF near field cou-
pling system. However, unlike other inductors (such as power inductors discussed in the
next chapter), the near field coupling coils may be operated up to their self-resonant fre-
quency with no disadvantages. To determine the value of Cpar , the 2-port S-Parameters
of each individual coil are simulated in HFSS. Then, the parasitic capacitance Cpar is ex-
tracted from the self-resonant frequency and the inductance of each coil at 1 GHz. The
simulated values of Cpar are given in Table 3.1.
As parasitic capacitance is traditionally modeled in parallel with the inductor, this value
of Cpar should be subtracted from the value of C2 as C2 is in parallel with L2 and thereby
with the parasitic capacitance as well. If not, the resonant frequency will be downshifted
from the desired resonant frequency. Take for example coil4 . For a phase resonant fre-
69
quency of 1 GHz with 1000Ω load, the value of C2 should be 4.1 pF. However, when
the value of the parasitic capacitance of coil4 , 0.484 pF, is added to this value, the phase
resonant frequency becomes 954 MHz = more than 4% frequency shift. In practice, this
modeling may be accomplished through a combination of HFSS and ADS simulation. The
value of Cpar determined from HFSS simulation can be used in subsequent ADS simulation
to determine the appropriate value of C2 .
4.2.3 Significance of Microstrip Lines
The coil inductance and resonant capacitance values demonstrated in the previous chapter
are in the range of 5-20 nH and 0.2-10 pF. Because these values are smaller than observed
for lower frequency systems and the source frequency is at RF, the microstrip lines in the
design have a considerable effect on the resonant frequency of the system. HFSS exported
S-Parameters of half4,1 were simulated in ADS, shown Fig. 4.1(a), with different lengths
of microstrip line between the receive coil and receive resonant capacitor. With just 2 mm
of microstrip line added, the resonant frequency is shifted by over 20%. The receive coil
has only 6 nH inductance, thus it is more susceptible to this frequency variation. When
half4,4 is simulated, the effect is less pronounced as the inductance of coil4 in the half4,4
receiver is larger than coil1 , though almost 100 MHz shift is still observed.
The influence of microstrip lines is verified through measurement of the half4,1 sys-
tem at 0.5mm transmission distance and 14.5 dBm source and 1000Ω load, shown in Fig.
4.2. The rectifier output voltage was measured with C2 and a 100 pF voltage smoothing
capacitor in different locations (shown in Fig. 4.2(b)) for three cases as follows: i) C2 at
position 1 and the smoothing capacitor at position 3, ii) C2 at position 2 and the smoothing
capacitor at position 3, and iii) C2 at position 1 and the smoothing capacitor at position 2.
The circuit was measured with no matching circuit (short Lm and C1 , open Cm ) and C2
= 3.5 pF. Even though the circuit/schematic is the exact same in each case, the amount of
microstrip line between various points is not. Accordingly, the rectifier output voltage fre-
70
Figure 4.1: Effect of the transmission line length between L2 and C2 on the resonant fre-
quency for (a) half4,1 and (b) half4,4
71
quency response greatly changes in each of the cases. It should be noted that the efficiency
with 1000Ω load peaks around 60% (4.1V output) without matching network, emphasiz-
ing the significance of determining C2 first and then selecting the transmit circuit values to
further increase efficiency. The circuit was operated in very close proximity (0.5mm), but
this highlights the significance of determining C2 primarily, and then selecting the other
values to squeeze extra efficiency out of the system. In particular, the value of C2 must
be adjusted to account for transmission lines in the receiver for operation at the desired
frequency. The influence of microstrip lines and vias are modeled directly in ADS through
MLine and via components, to help select the optimal values of C2 and transmit impedance
matching values.
The microstrip lines in the receiver are modeled in ADS using the equivalent WPT cir-
cuit shown in Fig. 4.3, using equivalent circuit values for the coils and equivalent modeled
microstrip line geometry. Note that in this simulation, no transmit circuit values are used
as they are not needed to determine the receiver resonant frequency. A generic diode com-
ponent is shown as the rectifier, to be replaced with the appropriate rectifier topology being
simulated. The simulated S21 parameter can determine the needed down adjustment of C2
to resonate at a specific frequency. If a bridge rectifier is selected for the design, this is the
final adjustment of C2 to account for the detuning of the resonant frequency.
4.2.4 The Dynamic Behavior of Half Wave Rectifiers in RF Near Field Coupling
As discussed in the previous chapter, to achieve high source efficiency, large k is necessary.
However, operating the coils with large k has an unusual effect on the half-wave rectifier:
it shifts the resonant frequency lower. This is shown by a measurement of half4,4 for two
cases with no PDU. First, at 1mm transmission distance with C1 = 5 pF, C2 = 3.5 pF, and
no matching network, both a bridge and half-wave rectifier were measured with 14.5 dBm
source and 1000Ω load, shown in Fig. 4.4(a). There is more than 100 MHz difference
in source frequency giving the best output voltage despite the same circuit. This is not
72
Figure 4.2: (a) Measured rectifier output voltage of half4,1 coil+rectifier system with dif-
ferent positions of C2 and the smoothing capacitor as classified in (b) photo of circuit used
in testing
Figure 4.3: Circuit model for determining resonant frequency detuning from microstrip
lines
73
just the influence of the microstrip line, because the current path in the bridge rectifier is
more inductive than the half-wave rectifier. Next, the circuit was operated in very close
proximity - 0.5mm - with a completely identical comparison. There was no matching
network or C1 , C2 = 2.4 pF, and the exact same board was used in the comparison. This
was accomplished by using a diode where appropriate for a half-wave rectifier, using a
shorting resistor at the other diode location for the positive half-cycle for the bridge rectifier,
and keeping the locations for the diode in the bridge negative half-cycle open. This way,
the half-wave circuit has a completely identical current path to the bridge rectifier in the
positive half-cycle, with only an extra shorting resistor added in the current path for the
half-wave rectifier. The rectifier output voltage comparison for these two cases is shown in
Fig. 4.4(b). There is over 300 MHz shift - over 25% resonant frequency shift - between the
two rectifiers. Even accounting for possible minor variations in the measurement, diode
impedance, shorting resistor, etc, there has to be a fundamental difference in how the RF
coil link interacts with the two rectifier types to account for such a drastic shift.
When using a half-wave rectifier, the effective inductance of the coil increases and
downshifts the resonant frequency. A half-wave rectifier is the superior choice for high
efficiency in a light load system. The forward voltage of the diode has a significant factor on
the efficiency at the voltages examined in this paper, and having only one forward voltage
drop in the half-wave rectifier leads to notable efficiency improvement. This differs from
conventional wisdom though as the half-wave rectifier in theory only rectifies half the signal
and wastes the other half, such that greater than 50% efficiency should be impossible. In a
resonant WPT system, this is not the case as energy is stored in the reactive components in
the negative half cycle. This is evidenced in a comparison of the half and bridge rectifiers in
an ADS transient simulation of the WPT circuit in Fig. 4.5, with equivalent inductance and
k to the half4,1 link. Here, microstrip lines are not included in simulation as they disturb
the transient waveforms, and the value of C1 is adjusted for similar output power across
different simulations.
74
Figure 4.4: Comparison of the measured output voltage of a RF half wave rectifier and
bridge rectifier with identical near field coupling circuit at (a) 1mm transmission distance
and (b) 0.5mm transmission distance
Figure 4.5: Circuit model for determining Lhalf
75
dV c
Figure 4.6: Difference in the simulated ic current and dt
between the half-wave and bridge
rectifier
For the half-wave rectifier, the stored energy is released in the positive half cycle, lead-
ing to a different ic C2 current in comparison of the bridge and half-wave rectifier as shown
in Fig. 4.6. In the half-wave rectifier, there is an extra ’burst’ of current as the capacitor
releases stored energy. The value of the C2 capacitance calculated from iC = C dVdtc is the
same as the given value for C2 + Cpar in simulation for both rectifiers, thus the capacitor
voltage adjusts as expected with the current. This difference in capacitor current leads to a
similar difference in dV c/dt between the rectifiers, shown in Fig. 4.6.
If only considering the difference in the half-wave and bridge rectifier between the
time points t1 and t2, where the half-wave current is greater than the bridge current in the
positive half cycle, the difference in C2 capacitor voltage ∆V c can be calculated from the
dV c
difference in dt
as shown in Fig. 4.7. As the receive capacitor and inductor are in parallel,
this difference in capacitor voltage is matched with an equivalent change in L2 inductor
voltage. From VL = L diL
dt
, this change in inductor voltage is matched by either a change
in inductance or current derivative. The simulation shows negligible difference in receiver
coil current in the bridge and half-wave rectifiers, thus there is effectively extra inductance
Lhalf in the receiver coil during this time when integrated with a half-wave rectifier. This
creates the downshift in resonant frequency when using a half-wave rectifier.
Lhalf may be calculated as shown in (4.1), where ∆Vc is the additional voltage in the
76
diL
Figure 4.7: Change in Vc and dt
between half and bridge rectifier between time t1 : t2
half-wave rectifier during time t1 : t2 and ∆ diL

dt
is the change in inductor current derivative
over the same time frame, calculated from transient ADS simulation with either a bridge
or half wave rectifier. ∆Vc is a difference from simulation of both the bridge and half wave
circuits, while ∆ diL
dt
is a difference in just one of the circuits (either), calculated from the
same time period. This leads to a new formulation of the phase resonant frequency, given
in (4.2), where Csum = C2 + Cpar .
∆Vc
Lhalf = (4.1)
∆ diL
dt
s
1 1
ωphase,half = − 2 (C 2
(4.2)
(L2 + Lhalf )(Csum ) Rin sum )
4.2.5 Component Selection Process
To select the appropriate values of the circuit components Lm , Cm , C1 , and C2 , first the
correct value of C2 must be selected. The value of C2 is the dominant value on the reso-
nant frequency. The other values, including C1 , function mainly as impedance matching
components and are selected to increase efficiency. This selection process is accomplished
through the following procedure:
77
• In HFSS, simulate Cpar for the designed coil link at the selected transmission distance
• In ADS simulation, adjust value of C2 to resonate at the desired source frequency,

from the simulated S-Parameters of circuit shown in Fig. 4.3
• (Only with half-wave rectifier) Calculate the value of Lhalf from ADS transient sim-
ulation of circuit shown in Fig. 4.5 and (4.1). Adjust value of C2 to resonate at same
frequency using (4.2)
• Select the values of Lm , Cm , and C1 to optimally match source to following RF

near field coupling circuit, with microstrip components added at transmit circuit,
using simulated S-Parameters in ADS circuit. It should be noted this is the trickiest
portion of the component selection process, as the matching is highly sensitive to the
microstrip line geometry and needs to be precisely modeled for appropriate transmit
circuit values in simulation.
As an example, the following describes this process for half4,4 and half4,1 at 1mm
transmission distance and 700 MHz source frequency. The calculated values for C2 are 4.4
pF for half4,4 and 8.6 pF for half4,1 , from (2.6), for 700 MHz resonance. The simulated
value of Cpar from HFSS at 1mm distance was 0.48 pF for half4,4 and 0.43 pF for half4,1 .
After modeling the microstrip lines in ADS simulation, the adjusted values of C2 were
2.0 pF (Csum = 2.5 pF) for half4,4 and 5.9 pF (Csum = 6.3 pF) for half4,1 for 700 MHz
resonance. The calculated values of Lhalf from (4.1) were 6.0 nH for half4,4 and 1.2 nH
for half4,1 . Thus, to maintain 700 MHz resonance frequency with a half-wave rectifier
with this extra inductance, the final selected value for the C2 component was 1.2 pF for
half4,4 and 5.0 pF for half4,1 . Note that these values of C2 are significantly smaller than
the calculated value without compensation. Finally, values of Lm , Cm , and C1 were chosen
for optimal matching as listed in Table 4.1 for a sample of different designs to be examined
in full system measurements.
78
Table 4.1: Component Values for Full System Measurement
Freq Lm Cm C1 C2
half4,4 700 MHz 1.2 nH 0.2 pF 3 pF 1.2 pF
half4,1 700 MHz 1.0 nH 0.2 pF 5 pF 5 pF
bridge2,2 780 MHz 0.3 nH 0.2 pF 3.5 pF 3.5 pF
bridge3,3 1000 MHz 1.5 nH 0.2 pF 5.1 pF 2.4 pF
Figure 4.8: Comparison of the receiver resonant frequency with varying C2 values for
various measured and calculated data
To demonstrate the effectiveness of the modeling of the microstrip lines and Lhalf on
the resonant frequency, a bridge4,1 and half4,1 link were measured with 14.5 dBm source
and 1000Ω rectifier load and different values for C2 . For the transmit circuit, Lm and C1
were short circuits and Cm was an open circuit. The source frequency was swept and the
resonant frequency was determined from the source frequency giving the largest rectifier
output voltage. The measured resonant frequency of these half-wave and bridge rectifiers
is shown in Fig. 4.8. It can be seen that the calculation of the phase resonant frequency
from (2.6), even including Cpar , is much higher than the measured resonant frequencies. It
can also be seen that the measured half-wave rectifier resonant frequency is lower than the
measured bridge rectifier resonant frequency despite the identical circuits (aside from the
rectifier topology), validating a downshift in frequency when utilizing a half-wave rectifier.
When modeling the resonant frequency from simulation with microstrip lines added,
79
Figure 4.9: Change in measured and simulated resonant frequency between half-wave and
bridge rectifier with different C2
the simulated resonant frequency closely matches with the measured bridge resonant fre-
quency. This is expected, as the bridge rectifier only needs to account for the effects of
the parasitic capacitance and microstrip lines to determine the shift in resonant frequency.
When adding the simulated value of Lhalf for each C2 case, the simulated resonant fre-
quency closely matches the half-wave measured resonant frequency. The simulated and
measured frequency shift between the half-wave and bridge rectifier is shown in Fig. 4.9,
fbridge −fhalf
where ∆f /f = fhalf
. This shows that the extra inductance Lhalf appropriately mod-
els the frequency shift between the half-wave and bridge rectifier. The simulated resonant
frequency is slightly higher than the measured data for the smallest values of C2 , likely due
to the effect of capacitor mounting parasitics not included in the modeling. The error from
mounting parasitics will be larger at higher frequency, with smaller C2 .
4.3 Reverse Power Distribution Network
4.3.1 Reverse PDN for Continuous Power Demand
In the designed system architecture, the RF diode rectifier is directly followed by a PDU.
Lower frequency systems may use similar capacitance values for the voltage smoothing
capacitor for the rectifier and the input capacitor for the PDU. For the LTC3564, an input
capacitance of 4.7-22 µF is recommended. The self resonant frequency of any version of
80
this capacitor will occur far before the operating frequency of the rectifier. A capacitor on
the pF scale is needed for the rectifier. However, when putting a pF capacitor and a µF
capacitor in parallel, a very large parallel resonant peak will occur [87]. This leads to large
voltage variation in the supply to the PDU.
To solve this issue, a reverse power distribution network is designed to successfully
integrate the RF rectifier and PDU. The reverse PDN is a network of parallel capacitors
designed to mitigate the parallel resonance between the smoothing capacitor and PDU input
capacitor. The reverse PDN name arises from the fact a small value capacitor at the supply
side is integrated with a large value capacitor at the chip, the reverse of what is seen in
a digital PDN [88]. This name and development of the original idea of the reverse PDN
was accomplished with postdoctoral researcher Dr. Anto K. Davis. First, the design of
a reverse PDN for continuous power demand is presented. For continuous power output,
both the PDU and rectifier create voltage ripple. Establishing a target impedance is a useful
design metric, in the same way as conventional PDN design. The general form for the
target impedance is defined in (4.3), where ∆V is the allowable voltage ripple and ∆I is
the maximum transient current ripple.
∆V
Zt = (4.3)
∆I
From the PDU perspective, the current ripple arises from the switching power inductor.
The current ripple for a buck converter is given in (4.4), where D is the duty cycle, Vin,P DU
is the input voltage to the PDU, Vout is the output voltage of the PDU, D is the duty cycle,
fsw is the PDU switching frequency, and LSW is the inductance (note that this was the same
ripple current used to estimate the inductance AC loss in chapter 2). The reverse PDN is
designed for the LTC3564 buck converter, which operates with a ’burst’ mode. This means
the converter delivers more energy to the load in shorter bursts and then shuts off circuitry
until the output voltage falls below a specified value, at light loads. It is essentially a variant
of discontinuous conduction mode (DCM), where the load is regulated in bursts as opposed
81
to typical DCM, and as such the current ripple will exceed the values typical for a given
inductance and load. For the reverse PDN the max current ripple is set to the limit allowed
by the LTC3564 - 360 mA. From this, the target impedance for the reverse PDN for the
worst case scenario from the PDU side is given in (4.5).
D(Vin,P DU − Vout )
∆Ibuck = (4.4)
fSW LSW
Zt,P DU = 2.78∆V (4.5)
A rectifier has guaranteed voltage ripple from the output voltage smoothing. The voltage
smoothing ripple for a half rectifier is shown in (4.6), where Iload,rect is the output current
of the rectifier (and input current of the PDU), frect is the near field coupling and rectifier
frequency, and Cs is the smoothing capacitance value of the rectifier. The total voltage
ripple arising from the rectifier cannot be less than this value, irrespective of the target
impedance. From this voltage ripple, the current ripple Irip,rect is calculated as shown in
(4.7). Finally, the target impedance for the reverse PDN from the rectifier perspective is
shown in (4.8), where Vin,P DU = Iload,rect Rin,P DU .
Iload,rect
Vripple,half = (4.6)
frect Cs
Vripple,half
Irip,rect = (4.7)
Rin,P DU
∆Vallowable,rect ∆Vallowable,rect
Zt,rect = = Vin,P DU
(4.8)
∆Irip,rect 2 Rin,P DU frect Cs
The total voltage ripple arising from the rectifier is the sum of (4.6) and (4.8), shown in
(4.9). It can be seen that even if a large target impedance is set, the voltage ripple will not
82
Figure 4.10: Simulated rectifier output voltage with 500 MHz rectifier with 100 pF smooth-
ing capacitor with (a) ESL = ESR = 0 (b) ESL = 0.3 nH, ESR = 0.1Ω and (c) ESL = 5 nH,
ESR = 0.3Ω
be largely affected as the input resistance of the PDU for this system will be at least a few
hundred Ω. The more significant factor is the ripple from the rectifier voltage smoothing.
Because of this, the reverse PDN phase is also an important consideration, as shown in
Fig. 4.10. For the same value smoothing capacitor, the equivalent series resistance (ESR)
and equivalent series inductance (ESL) are changed in a series of 3 simulations in Keysight
ADS. When the ESR = ESL = 0 (ideal capacitor), the voltage ripple equates with (4.6). As
the ESR and ESL increase (the phase becomes less ideal), the voltage ripple increases.
Zt,rect
Vrect,allowable = (1 + )Vripple,half (4.9)
Rin,P DU
The voltage ripple may be split into two parts: the consistent voltage ripple and per-
oidic voltage spikes. The periodic voltage spikes arise from the impedance of the reverse
PDN, and will be controlled so long as a reasonable target impedance is set. The consistent
voltage ripple comes from (4.6), and as the phase becomes less ideal, the equivalent ca-
pacitance of the reverse PDN will decrease and lead to increased voltage ripple. To better
approximate the smoothing voltage ripple, the simulated Z-Parameters of the reverse PDN
capacitor network are converted to an equivalent T-circuit model, shown in Fig. 4.11. A
T-circuit model is chosen because an admittance based model (such as a Pi-circuit model)
83
Figure 4.11: Equivalent T-circuit model for the reverse PDN capacitor network
is not accurate at high frequency. Also, the T-circuit model, with a capacitor as the only
shunt component, is an intuitive model to use for a network of parallel capacitors.
As an example, a reverse PDN with 6 capacitors was simulated as the smoothing ca-
pacitance for a 700 MHz half wave rectifier with 14.5 dBm power source and 1000 Ω load.
Each capacitor had ESL = 0.3 nH, ESR = 0.5 Ω, and 0.5 mm of microstrip line between
each parallel capacitor (the approximate the effects on a fabricated system). The first five
capacitor values were 30 pF//100 pF//600 pF//2 nF//2 nF, and two cases were simulated for
the final capacitor C6 : 2nF and 20 nF. From (4.6), the voltage ripple should be around 4x
less with a 20 nF capacitor, as the total parallel capacitance is 6.7 nF when C6 = 2 nF and
24.7 nF when C6 = 20 nF. Figure 4.12(a) shows the smoothing voltage ripple is the same
for both cases. While the capacitance in the extracted T-circuit model is equal to the total
capacitance at low frequency, it is approximately the same at 700 MHz as shown by Fig.
4.12(b). Using this value in (4.6) gives a smoothing voltage ripple of 3 mV, approximately
the same value as in the ADS simulation. The design of the reverse PDN needs to both
limit the impedance to prevent large voltage spikes and control the phase to have enough
effective smoothing capacitance at the near field coupling frequency to limit the smoothing
voltage ripple.
A simple demonstration of the reverse PDN was designed for the half2,2 system at 820
MHz with the LTC3564, first just considering the contribution of the PDU on the voltage
ripple. For a voltage ripple specification of 150 mV, the target impedance is 417mΩ. For
this demonstration, the voltage smoothing capacitor has value 330 pF, and the PDU input
84
Figure 4.12: (a) Comparison of the simulated rectifier output voltage when C6 = 2 nF
(left) and 20 nF (right) (b) Capacitance in the equivalent T-circuit model for both simulated
reverse PDN cases and (c) Phase of each reverse PDN case
85
Figure 4.13: Impedance profile of each individual capacitor and the total parallel combina-
tion for 5 capacitor reverse PDN demonstration
capacitor has value 4.7 µF. The Z-Parameters of different value capacitors were calculated
with manufacturer provided ESR and ESL for each capacitance value. When just the 330
pF and 4.7 µF capacitor are in parallel, a large parallel resonance occurs at 200 MHz,
such that the target impedance is exceeded between 40 and 400 MHz as shown in Fig
4.13. From interposing the impedance profile of different capacitor combinations, it was
determined that adding three capacitors -1nF, 10nF, and 100nF-between the 330 pF and 4.7
µF was sufficient to meet the target impedance as shown in Fig. 4.13. The capacitance
values were chosen closer together at the low end because lower value capacitors have
higher ESR [87], increasing the impedance minimum of these capacitors. The crossing
of individual capacitor impedance profiles for larger valued capacitors needs to have a
comfortable margin under the target impedance, as the low ESR of these capacitors leads
to an increased parallel resonant peak, while the opposite is true for the smaller valued
capacitors, as seen in Fig. 4.13.
The reverse PDN capacitor selection was verified with a subsequent Keysight ADS
simulation of these five capacitors in parallel, with 0.5mm of microstrip line between them
to model the design in the fabricated system. The simulated impedance of this network
is shown in Fig. 4.14. This impedance profile is compared to a capacitor network with
4x330pF in parallel with the 4.7 µF PDU input capacitor such that the number of capacitors
86
Figure 4.14: Comparison of the simulated impedance profile for the 5 cap reverse PDN and
cases without the reverse PDN
in each case is the same, as will be compared in measurement. The reverse PDN meets the
target impedance specification, while the case without the reverse PDN has a large parallel
resonant peak impedance (9Ω). This large parallel resonant peak destabilizes the PDU
input voltage and can lead to significant loss in the system.
The two cases were measured with a 1 mm separation with the half2,2 system and
LTC3564 with 1 µH SMT inductor, with the tested receiver board shown in Fig. 4.15.
The output voltage was fixed at 1.2V and measured with 138Ω resistor load (10 mW).
The system was measured with a 820 MHz source from a HP 8648D signal generator.
The same receiver board is used in both cases. The reverse PDN uses 0603 package X7R
surface mount capacitors of values 330 pF//1 nF//10 nF//100 nF at the reverse PDN area in
Fig. 5, and the second case uses 4x330 pF capacitors in the same location.
For the reverse PDN case, the PDU was able to regulate the 1.2V, 10 mW output with
13.1 dBm input power. At this same input power, the case without the reverse PDN is un-
able to regulate the output. When the input power was increased to 13.7 dBm, the second
case was able to regulate the output successfully. The large parallel resonance in the case
without the reverse PDN introduces an additional source of power loss to the system. With-
out the reverse PDN, the system efficiency was 44.6%, while the system efficiency with the
reverse PDN was 51.2%. This 6.6% system efficiency difference is solely accounted for by
87
Figure 4.15: Fabricated receiver circuit with 5 cap reverse PDN for half2,2
the capacitor selection and reverse PDN design, as the same circuit was used in both mea-
surements, identical in every other way. This demonstrates the importance of the reverse
PDN in RF WPT to link RF-DC conversion with a PDU.
For more through demonstration of the necessity of the reverse PDN and design process,
a reverse PDN was designed for the half2,2 system at 860 MHz, this time accounting for
the rectifier ripple and more thorough consideration of layout effects. For this example, the
buck converter output is 1.2V with 200Ω load with a 1 µH power inductor. From (4.5),
for 50 mV allowable voltage ripple specification, the target impedance is 0.14Ω. From
the rectifier side, the input resistance to the buck converter is determined from RLoad /D2 ,
and is calculated as 868Ω. From (4.9), even if the target impedance is set to 0.14Ω, the
contribution of the PDN impedance from the rectifier current ripple to the overall voltage
ripple is very small. The effective smoothing capacitance is the more significant factor. For
this demonstration the system operates at 860 MHz. Assuming 10 mV allowable voltage
ripple specification from the rectifier, the effective smoothing capacitance needed from
(4.6) is 335 pF.
All capacitors used are SMT ceramic in 0603 package of 3 types: (i) C0G capacitors
for small pF capacitance, (ii) X7R for intermediate value (100 pF-100nF) capacitance and
(iii) X7R for large (100 nF and greater) capacitance. To simplify design, the ESL values
and ESR values are modeled from manufacturer supplied data for a capacitor of each type.
88
These values are then used in the design as the default values for each of the three cate-
gories. The ESL was modeled as a single value inductance. The ESR of the capacitors
is much more frequency dependent, especially over the range considered. Manufacturer
supplied 2 port series S-parameters were converted to the equivalent 1 port S-Parameter
with just the resistance characteristic. This data was then used as a frequency dependent
resistor in ADS, with a separate characteristic for each capacitor category as the ESR varies
considerably with capacitance value for ceramic capacitors [87].
In the fabricated structure, two parallel lines are used to conserve area, with the ground
of both capacitor lines connected to the ground plane shared with the PDU through vias.
The transmission lines and vias are modeled directly through ADS components, while the
spreading inductance in the ground plane is approximated as seen in [[87], eq. (6.72)].
The capacitor value selection followed using the impedance sculpting method for decou-
pling capacitor selection in a conventional PDN [87], in a similar process as Fig. 4.13.
The designed reverse PDN uses 13 capacitors (6 pF//20 pF//47 pF//100 pF//220 pF//470
pF//1000 pF//22 nF//47 nF//100 nF//330 nF//1µF//4.7µF) to meet the target impedance for
the PDU, the smoothing capacitance for the rectifier, and with at least 5 µF capacitance at
the input of the PDU. In practice, fewer capacitors may be used with no noticeable drop
in efficiency, as the LTC3564 can tolerate a fairly large amount of voltage ripple. How-
ever, for the purpose of examining general integrated solutions for all RFNFC systems in
this dissertation, the methodology for a reverse PDN for any RFNFC system needs to be
demonstrated. The impedance profile of the designed reverse PDN is shown in Fig. 4.16.
The target impedance requirement for the PDU is met, while the effective capacitance is
700 nF at 860 MHz and 5 µF at 2.25 MHz, meeting the capacitance requirements for both
the PDU and the rectifier. The reverse PDN does not become inductive until after 1 GHz,
despite the large amount of capacitance in the circuit.
The half2,2 system was measured at a transmission distance of 1mm with a 14.5 dBm,
860 MHz source to power a 200 Ω resistor with 1.2V regulated output. The system was
89
Figure 4.16: Designed reverse PDN (top) impedance magnitude and (bottom) effective
capacitance and phase
90
Figure 4.17: (Top) Measured PDU input voltage for both capacitance cases and (bottom)
measured PDU output voltage for system with the reverse PDN
measured for two capacitor combinations between the rectifier and PDU: (i) a 6 pF capac-
itor and 10 µF capacitor in parallel and (ii) the designed reverse PDN capacitor network
(starting with 6 pF and ending with 4.7 µF). When just the two capacitors were used, the
system was unable to supply and regulate the needed 1.2V output. As expected, the strong
parallel resonance between the two capacitors leads to unmanageable PDU input voltage
ripple, shown in Fig. 4.17. In contrast, the system with the reverse PDN integrated shows
much lower PDU input voltage ripple and successfully regulates the output as designed.
A reverse PDN is designed for all two coil systems using the same impedance sculpt-
ing method for the capacitors. 50 mV of allowable ripple is set for the allowable voltage
ripple from the PDU, giving a target impedance of 114 mΩ from (4.5). This same target
91
impedance is set for the rectifier, and from (4.8) if this target impedance is met at higher
frequency there will be negligible ripple contribution from the voltage spikes as Rin,P DU
will be at least 500 Ω. Second, the effective smoothing capacitance needs to meet the
standard from 500 MHz to 1100 MHz (the span of frequency examined for the near field
coupling system in this dissertation). The maximum value of ILoad,rect occurs at the mini-
mum LTC3564 operating voltage (2.5V) and maximum power output (around 20 mW), for
maximum 10 mA rectifier output current. From this, the effective smoothing capacitance
needed in this frequency range is 2000 pF for a half wave rectifier. For the systems with a
bridge rectifier, the ripple will be half, thus if the half-wave rectifier smoothing capacitance
specification is met, then the bridge must be as well. The total voltage ripple should be less
than the sum of these two, or 60 mV.
The reverse PDN was designed with the same process as before. The designed reverse
PDN has the simulated impedance profile shown in Fig. 4.18, consisting of 11 capacitors
in parallel (100 pF//220 pF//470 pF//1 nF//3.3 nF//10 nF//33 nF//100 nF//330 nF//1 µF//4.7
µF). The reverse PDN impedance does not become inductive (positive phase) until after
1.1 GHz, despite 6.2µF total capacitance in the circuit. Both the target impedance and
effective smoothing capacitance specifications are met, and at 2.25 MHz (the switching
frequency for the buck converter) there is 6.2 µF capacitance, meeting the input capacitance
requirement for the regulator. This reverse PDN is applicable to all measured full systems,
though the full systems in chapter 6 might use a few less capacitors, as allowable, for
systems operating at lower power (less ILoad,rect or higher frequency).
4.3.2 Reverse PDN for Discontinuous Power Demand
The design of the reverse PDN to integrate large storage capacitance is different than the
continuous power system. With mF capacitance at the rectifier output, the smoothing volt-
age ripple will not be an issue, even at 1 GHz. The issue is the rectifier DC output voltage
can decrease without the reverse PDN. This is shown through the T-circuit model. If the
92
Figure 4.18: (a) Impedance of the designed reverse PDN and (b) Phase of the designed
reverse PDN and (c) Effective smoothing capacitance value extracted from T-circuit model
93
Figure 4.19: (Left) Simulated rectifier open circuit voltage with C = 100 pF (right) with
100Ω equivalent PDN resistance with C = 100 pF
T-model equivalent resistance of the capacitor network is large, the rectifier open circuit
voltage decreases. In Fig. 4.19, a half wave rectifier operating at 1 GHz is simulated in
ADS with open circuit load and T-circuit model output capacitor for two cases: i) C = 100
pF and L = 0 nH, R = 0Ω and ii) C = 100 pF, R = 100Ω, and L = 0 nH. The DC voltage
is decreased in the latter case, though minimal voltage ripple is observed in both cases. To
prevent drop in rectifier DC output, the reverse PDN target impedance in the equivalent
T-circuit model is set at 1Ω.
Lead based aluminum electrolytic capacitors are selected for the mF capacitance in the
reverse PDN. Even though electrolytic capacitors are polarity dependent, using them in the
rectifier output ensures the voltage across the capacitor terminals will never be negative.
Lead based are preferred over SMT because SMT electrolytic capacitors would need in-
creased length of transmission line, leading to a larger shift in resonant frequency as shown
earlier. A reverse PDN was designed with 4 ceramic capacitors (100 pF, 10 nF, 1 µF, and
100 µF) and 4 electrolytic capacitors (1 mF, 2x4.7 mF, 10 mF), using the same design
94
Figure 4.20: Extracted T-circuit model resistance of the simulated 4 coil system reverse
PDN
process as for the two coil system. The T-circuit model was extracted from the simulated
reverse PDN. The extracted resistance is shown in Fig. 4.20, and is less than the 1Ω target
impedance set for the design.
A measurement of the designed 4 coil system with a half-wave rectifier was completed
with 967 MHz source frequency at a 30 mm transmission distance. The measurement was
completed with both the designed reverse PDN as the rectifier output capacitor network
and a 100 pF capacitor in parallel with a 22 mF electrolytic capacitor as the rectifier output
capacitor network. A comparison of the output voltage for the two cases is shown in Fig.
4.21. The output voltage with the reverse PDN is 1.5V compared to 0.8V for the two
capacitor case. This is almost a 4x increase in the energy stored when integrating the
reverse PDN. This demonstrates the suitability of the reverse PDN for integrating large
storage capacitance with a RF rectifier in addition to successfully integrating a RF rectifier
and PDU.
4.4 Summary
This chapter examined the integration challenges following the design of the subsystems.
When integrating the complete RFNFC system, various issues arises that must be remedied
through modeling and design. One of these issues are various resonant frequency detuning
95
Figure 4.21: Comparison of measured rectifier output voltage in 4 coil system between 2
cap case and the reverse PDN
effects as demonstrated in this chapter through measurements, with various modeling solu-
tions presented to guide effective selection of circuit component values. The second issue
is the integration of the RF-DC conversion with a PDU, solved through the innovative use
of a reverse power distribution network. The design metrics for the reverse PDN, namely
target impedance and phase considerations, were presented in this chapter and the necessity
of the reverse PDN was then demonstrated through measurement.
96
CHAPTER 5
INTEGRATED INDUCTOR FOR LIGHT LOAD APPLICATIONS
The previous chapters outline the design of a RFNFC system, discussing the efficiency and
modeling challenges for each part of the system. Due to the unique goal of achieving a high
efficiency system with RF source, various integration challenges arise from electromagnetic
effects that other WPT systems do not need to account for. In the preceding chapter, these
issues were identified and solutions presented.
One last part for a complete, fully integrated WPT system is needed: the integration of
embedded passives through advanced packaging technologies. This chapter discusses the
fabrication and integration of embedded inductors with NiZn ferrite epoxy composite mag-
netic core into the final design. The fabrication and characterization details are outlined,
discussing the advantages of the technologies utilized. A comparison between the designed
components and prior art is also provided.
Integrated inductor design for two separate cases is examined. First, the design of pack-
age embedded inductor for a system in package implementation of a WPT system with
integrated buck converter is investigated. In this case, the fabrication and characterization
of the inductors are thoroughly explored, with a discussion about the application of these
inductors to fully integrated systems such as mentioned in the future work section of Chap-
ter 7. Second, integrated inductor design for a Texas Instruments TPS62615 synchronous
buck converter for light load (1-10mW) applications is examined and compared to a SMT
inductor. A revised loss analysis is provided in this second case and used to demonstrate an
integrated inductor with higher efficiency in the designed WPT system than a comparable
SMT inductor. This chapter is unique in that much of this work was collaborative. The
contributions of postdoctoral researcher Dr. Mohamed L. F. Bellaredj and Ph.D. student
Hakki Torun are noted where appropriate.
97
Figure 5.1: Example system in package implementation for RFNFC system with integrated
inductor
5.1 Package Embedded Inductor for 10 MHz Integrated Buck Converter
5.1.1 System Architecture and Loss Analysis
The first case for integrated inductor considers a fully integrated, 1 GHz system in package
(SiP) RFNFC system, such as shown in Fig. 5.1. As shown, the losses in the source,
coil, and rectifier are dominant, such that the buck converter and inductor losses need to
be minimal. As an example, the buck converter chip in Fig. 5.1 uses Global Foundries
(GF) 130 nm process with a 3V input voltage. The chip, discussed in [89], has multiple
conversion ratios and the 3:1V conversion ratio is used for this discussion. The inductor
DC (PInd(DC) ) and AC (PInd(AC) ) power losses for the buck converter can be estimated as
given in (2.16)-(2.17). The buck converter losses can be estimated using:
2 2
PBuck(Cond) = RSW (ILoad + ∆IRM S) (5.1)
Vin 2 Vin Vin Vin

PBuck(Switching) = fSW [CGSN ( ) +2CGDN ( )2 +CGSP ( )2 +2CGDP ( )2 ] (5.2)
2 2 2 2
98
∆Ipk−pk
∆IRM S = √ (5.3)
2 3
where PBuck(Cond) is the conduction loss in the buck converter transistors, PBuck(Switching)
is the buck converter switching losses calculated using the various gate capacitances with
CGSN = 0.813 pF, CGDN = 0.583 pF, CGSP = 0.71 pF, CGDp = 0.59 pF, and RSW is the
resistance of the transistor switches [89]. For the GF 130nm process, the transistor resis-
tances and capacitances were modeled for Vin = 3V, Vout = 1V, and output power of 50 mW.
The quality factor Q for a power inductor can be defined as:
ωL
Q= (5.4)
RAC
where the Q factor takes into account both the winding and core losses. At 10 MHz, assum-
ing a quality factor of 25 and a DC resistance of 600 mΩ for the inductor, an efficiency in
the range of 82% - 92% is possible for inductances in the range of 200 nH-800 nH as shown
in Fig. 5.2. Thus in this proposed SiP RFNFC implementation, the focus is on the design,
fabrication and characterization of embedded planar power inductors where the inductance
is in the range of 200-800 nH, a DC resistance less than 600 mΩ, and a quality factor of 25
or greater to ensure a buck converter efficiency higher than 80%.
5.1.2 Integrated Inductor Design
Planar spiral inductors have been shown to provide high inductance density and hence are
used here, as shown in Fig. 5.3(a). The critical design parameters are the outermost length,
d, metal trace width, w, the trace separation s, and number of turns, N . The inductor is
designed both on a 2 layer PWB core of thickness 0.79 mm and 0.2 mm, as shown in
Fig. 5.3(c) where the 0.2 mm thickness makes the substrate semi-flexible. The inductor
windings are defined on the top while a ground plane is provided on the bottom layer with
an void (cutout) in the ground plane beneath the inductor as shown in Fig. 5.3(b). The
99
Figure 5.2: Plot of efficiency of the buck converter plus inductor stage, for the examined
architecture. The inductor is assumed to have a quality factor 25 and DC resistance of 600
mΩ
cutout helps increase the inductance and Q factor of the inductors, leading to reduced area
and losses as with the RF coils.
The magnetic material is applied to one or both sides of the inductor. For the double-
sided case, inductance is increased over the single sided case due to the presence of the
magnetic field in the magnetic material on both sides of the inductor. As a comparison,
three structures have been designed and fabricated as shown in Fig, 5.3(c): air core in-
ductor, single layer magnetic material inductor (on one side of the PWB) and two layer
magnetic material inductor (on both sides of the PWB). By examining these various layer
combinations with the different substrate thicknesses, the characterized inductors give com-
prehensive insight to the influence of the magnetic core on the inductor characteristics.
At 10 MHz, the magnetic material can introduce additional AC losses. The magnetic
material used is a Nickel Zinc (NiZn) ferrite epoxy composite with a volume loading of
0.78, with details available in [90]. The magnetic composites used in this dissertation were
designed and fabricated by Georgia Tech postdoctoral researcher Dr. Mohamed L.F. Bel-
laredj. To accurately model the inductor, the electromagnetic properties of the magnetic
material are required. The measured permeability and permittivity spectrum of the NiZn
ferrite composite magnetic material up to 100 MHz is shown in Fig. 5.4, measured by
Dr. Bellaredj. Dr. Bellaredj synthesized the magnetic material from FP350 NiZn ferrite
100
Figure 5.3: (a) Spiral inductor parameters of the top plane and (b) the bottom ground plane
and (c) Side view of inductor with no magnetic layer, top magnetic layer, and top and
bottom magnetic layer.
powder from pptechnology, prepping the powder with a variety of washing and jar rolling
procedures, and then adding it to epoxy material. More detailed procedures on this process
are available in [90]. This process results in ideal dispersion of the powder in the epoxy,
and ideal viscosity of the ferrite power/epoxy composite for screen printing on organic sub-
strate. Samples of the NiZn composite were fabricated using toroid aluminum molds. The
dielectric and magnetic properties of the material were measured with a Keysight 4291B RF
Impedance/Material Analyzer with 16453A Dielectric Material Test Fixture and 16454A
Magnetic Material Test Fixture, from a frequency of 1 MHz to 400 MHz. The composite
has a relative permeability of 9.3, magnetic loss tangent of 0.25, relative permittivity of
6.3, and dielectric loss tangent of 0.01 at a frequency of 10 MHz, which corresponds to the
switching frequency. Notice µr peaks between 10-30 MHz while the magnetic loss tangent
is slow to rise in this range - making this the optimal frequency range to apply the magnetic
composite to integrated inductor design.
101
Figure 5.4: (a) Permeability and magnetic loss tangent measurements for the NiZn fer-
rite composite material (b) Permittivity and dielectric loss tangent measurements and (c)
Hysteresis curve measurement
102
Figure 5.5: Simulated magnetic field strength on a plane centered on the inductor, viewed
from the side for (a) air core and (b) double sided magnetic core inductor
5.1.3 Spiral Inductor Design and Modeling
The inductors were designed using HFSS to accurately estimate the AC losses at 10MHz.
FR4 material (r = 4.5, tan(δ) = 0.02) was used as the substrate to ensure low cost with
thicknesses of 0.2 mm and 0.79 mm. The copper traces have a thickness of 35 m with trace
width (w) and spacing (s) ranging from 100 to 250 µm. As seen in the inductor side cross
section in Fig. 5.5, the application of magnetic material concentrates the magnetic field
strength in the area of the inductor for increased inductance.
For initial simulations, a magnetic material thickness of 50 µm-600 µm was used - con-
sistent with the thicknesses attained by the stencil printing process (50-600 µm) described
in the following section. Figure 5.6 shows the effect of the magnetic layer thickness and the
substrate thickness on the inductance and resistance at 10 MHz. For a spiral geometry of d
= 7.5 mm, w = 0.15 mm, s = 0.20 mm, and N = 7, the magnetic layer thickness on both the
top and bottom layer was swept for both a 0.79 mm thick and 0.2 mm thick PWB. As the
magnetic layer thickness increases, both the inductance and the ac resistance increase, as
expected. For the 0.2 mm thick, flexible substrate, the inductance and resistance increase
is more significant due to the decreased distance between the bottom magnetic layer and
spiral inductor. Since the core losses in the inductor must be carefully balanced with the
inductance increase, a target magnetic layer thickness of 200-400 µm is desired. The in-
103
Figure 5.6: Plots of the simulated inductance and RAC with increasing magnetic layer
thickness, same for both layers, for (a) 0.79 mm thick substrate (b) 0.2 mm thick substrate
104
Figure 5.7: Simulated magnetic field strength with current excitation of (a) 100 mA (b) 500
mA (c) 1.0 A (d) 1.5 A
ductance and inductance density is less than desired with less than 200 µm thickness, and
the quality factor can fall below 25 with greater than 400 µm thickness. This magnetic
layer thickness range has sufficiently small ac resistance to have allowable quality factor
for both substrate thicknesses while significantly increasing inductance from the magnetic
layer.
Magnetization measurements were performed on the NiZn ferrite epoxy composite and
the results showed that magnetic composite material saturates at 0.13 Tesla. From B =
µH, with the saturating magnetic flux density B and permeability µ already known for
the material, a HFSS simulation of the magnetic field strength as a function of inductor
current can provide an estimate of the saturation current. This is shown in Fig. 5.7, where
the inductor 1 geometry was simulated with a top magnetic layer of 0.3 mm thickness
for varying current excitations. The magnetic field strength does not reach the saturation
condition until approximately 1.5A, which is far greater than the currents typical for these
low power applications. Thus it can be assumed the magnetic core will not saturate for the
normal operation of these inductors.
105
Table 5.1: Spiral Inductor Geometries
Peak Q
Inductor# d(mm) w(mm) s(mm) N turns RDC (mΩ) L(nH) Peak Q
Freq (MHz)
1 5.94 0.23 0.23 5 171 200 27 12
2 5.94 0.15 0.15 6 337 374 26 14
3 8.38 0.23 0.23 7 333 436 29 14
4 7.47 0.23 0.23 6 261 341 29 13
5 7.47 0.15 0.15 7 506 608 28 14
Based on simulations and requirements, five inductors were designed, with geometries
defined in Table 5.1. Each design was simulated with no, one, and two magnetic layers and
with 0.2 mm and 0.79 mm substrate thickness to determine the effect of NiZn ferrite com-
posite on inductance density and magnetic losses in the inductor. The DC resistance of the
inductor was calculated using (5.5), while the inductance and RAC values were extracted
from simulations at 10 MHz with 200 µm thick magnetic layers on the top and bottom,
where N , d, w, and s are as described in Fig. 5.1 and ρcopper is the resistivity of copper
[91].
ρcopper (4N d − 4N 2 w − (2N − 1)2 s)

RDC = (5.5)
w(thicknesscopper )
5.1.4 Package Embedded Inductor Fabrication
The fabrication process for the inductor is shown in Fig. 5.8. This fabrication process
was mainly devised by Dr. Bellaredj, with assisted contribution from myself in stencil
design and inductor fabrication. Starting with a basic two copper layer FR4 PWB, the top
and bottom copper layers are etched, creating the inductor pattern and the ground plane
void respectively, as shown in Fig. 5.8(a). The patterned planar inductors and voids are
shown in Fig. 5.9. The copper trace width and separation were measured using an optical
microscope. The copper trace thickness and void depth were obtained using the Veeco
Dektak 150 surface profilometer. The copper trace thickness was around 42 µm and the
void depth was 35 µm for the inductors.
The top magnetic layer was deposited with the NiZn ferrite composite using stencil
106
Figure 5.8: Fabrication process flow for the planar inductors: (a) PWB etching to define the
inductor copper windings and back side trenches (b) Screen printing of NiZn ferrite core
on the top side of the PWB (c) Screen printing of NiZn ferrite core on the back side of the
PWB
printing (MPM SPM 7279 Semiautomatic Stencil Printer), as shown in Fig. 5.8(b). The
board was designed symmetrically so the same stencil could be used for the top and bottom
layers deposition. Alignment marks on the stencil and the board ensured that the magnetic
material were placed precisely on the inductor.
The boards were cured for one hour at 180◦ C to form the top magnetic composite core.
To prevent the creation of air bubbles, the curing temperature increased gradually up to the
final temperature. For depositing the second magnetic layer, the same stencil screen and
magnetic paste are used. The bottom magnetic layer was stencil printed and the boards
were cured again for one hour at 180◦ C to form the bottom magnetic composite layer, as
shown in Fig. 5.8(c).
A fabricated inductor and the thickness of the magnetic layers on the inductor measured
using the profilometer is shown in Fig. 5.10. In addition to providing a low cost method
for applying magnetic layers to both sides of the PWB, a key advantage of this process is
107
Figure 5.9: Inductor structure patterning on both sides of the flexible 0.2 mm PWB (a) full
view of a 12 cm by 10 cm fabricated board top layer (b) Bottom layer with the cutout/void
shown
ease of integration in a SiP solution for IoT applications. Since the spiral inductors can be
co-designed and fabricated with the rest of the RFNFC system, an optimum design with
high integrated reliability is possible, thereby enabling a higher power efficiency.
5.1.5 Inductor Measurement and Discussion
The fabricated inductors were measured between 10 MHz and 50 MHz using an Agi-
lent H8363B Vector Network Analyzer, calibrated using SOLT standards. One port S-
Parameters were measured and subsequently converted to Z-Parameters. The inductance
and Q were extracted using (10) and (11) for a frequency range between 10 MHz and 50
108
Figure 5.10: The fabricated inductors (a) top layer (b) bottom layer and (c) magnetic layer
thickness profile
MHz, where Z11 is the Z-Parameter converted from the measured S-Parameter. The induc-
tance of the feedline/SMA connector was also measured and de-embedded, which had an
inductance contribution of 6-8 nH for the various line widths used in the designs.
Im(Z11 )
L= (5.6)
ω
Im(Z11 )
Q= (5.7)
Re(Z11 )
Fig. 5.11 shows the measurement results for inductor design 4, showing the compari-
son of inductance and quality factor between the different cases. For this comparison, all
designs had the same spiral geometry and a void in the ground plane, where the rigid sub-
strate has thickness 0.79 mm and the flexible substrate has thickness 0.20 mm. At 15 MHz,
inductor 4 has an inductance increase from 194 nH to 268 nH from the application of a
single magnetic layer on the top layer of the inductor - an increase of over 30%. At lower
frequencies, the Q factor is higher for the single magnetic layer case compared to the air
core case since the increase in inductance is much larger than the increase in resistance. At
higher frequencies, however, the Q factor reduces because the loss tangent of the magnetic
material increases with frequency while the permeability does not, as shown in Fig. 5.4.
109
Figure 5.11: (a) Inductance comparison and (b) Q comparison for inductor 4
The peak Q occurs between 10 and 20 MHz.

For the rigid substrate with double magnetic layer, the inductance increases to 310 nH,
which corresponds to a 60% inductance increase over the air core inductor. The Q factor has
similar values as the single magnetic layer near the frequency of operation, and therefore
AC losses are not significantly increased.
For the double sided magnetic layer on flexible substrate, the inductance measured was
351 nH for inductor 4. This inductance increase as compared to the rigid substrate can be
attributed to the increased magnetic field density in the inductor due to the reduced sub-
strate thickness. However, the higher magnetic field density results in increased magnetic
losses which affects the quality factor of the inductors. As shown in Fig. 5.11, the quality
factors are still above 25 and remain large enough to maintain the RAC losses for the power
inductor below the required value.
Based on the measurement results, the inductors were re-modeled using HFSS by ac-
110
Figure 5.12: Inductance comparison between simulations and measurements (a) 0.79 mm
thick PWB (b) 0.2 mm thick PWB
counting for the measured thickness for the magnetic material to obtain good model-to-
hardware correlation. Here only inductors 1 and 5 are examined, as examples. Using a
one port simulation the self-impedance was calculated from the S-parameter (S11 ). The
self-impedance provides the frequency response of the inductance loop, from which the
inductance and Q factor can be extracted using (10) and (11).
The inductance comparison between simulation and measurement results for the 0.2
and 0.79 mm thickness boards are shown in Fig. 5.12. The simulations slightly overes-
timate the inductance, which can be attributed to the fabricated magnetic layers having
minor air pockets after curing, which were not included in the simulations. As mentioned
earlier, the magnetic thickness was modeled as an average thickness in HFSS based on
measurements, accounting for some variation in the inductance and quality factor.
111
Table 5.2: Measured Inductor Comparison
Single Single 0.79 mm 0.79 mm 0.2 mm 0.2 mm
Peak Q
Inductor Air Core Air Core Magnetic Magnetic Two Magnetic Two Magentic Two Magnetic Two Magnetic Area
Freq
# Inductance Peak Q Layer Layer Layers Layers Layers Layers (mm2 )
(MHz)
Inductance Peak Q Inductance Peak Q Inductance Peak Q
1 109 nH 26 145 nH 36 182 nH 40 201 nH 26 14 35.33
2 201 nH 27 258 nH 33 293 nH 34 357 nH 30 12 35.33
3 271 nH 32 374 nH 38 439 nH 37 501 nH 34 15 70.26
4 194 nH 32 268 nH 41 310 nH 39 351 nH 32 13 55.77
5 334 nH 32 468 nH 36 552 nH 38 696 nH 31 14 55.77
5.1.6 Inductor Comparison
All five inductor geometries were measured with no magnetic layers, with only a top mag-
netic layer, and with magnetic layers on the top and bottom. The measurement results
for all seven inductor designs show similar trends as the data shown for inductor 4, and
these results are listed in Table 5.2. For all seven designs, the inductance showed signifi-
cant increase from the application of NiZn ferrite magnetic layer(s). As expected, the 0.2
mm substrate with double magnetic layers had the largest overall inductance, significantly
increasing the inductance over the air core inductor without increasing the DC resistance.
Unlike SMT inductors which are discrete, these power inductors can be custom de-
signed for obtaining the optimum efficiency for a variety of IoT applications. Figure 5.13
shows the modeled efficiency of the 10MHz buck converter using the measured data for
the double sided, 0.20mm substrate thickness inductor for all the designs discussed. The
modeled efficiency is between 85% - 94%. The breakdown of losses for the buck con-
verter for inductor 5, double sided 0.2 mm thickness at 10 MHz is shown in Fig. 5.14.
Inductor AC and DC loss contribute 45% and 10% of the total power losses, respectively.
This compares to 45% of the power losses arising from the FET transistor losses (conduc-
tion and switching). From this analysis, it can be concluded that the integrated inductor
with screen printed NiZn magnetic composite is suitable for fully integrated RFNFC sys-
tems with higher frequency (10 MHz in this case) buck regulator, ideal for use with future
technologies as device frequency scales upwards and fabrication process nodes shrink.
112
Figure 5.13: Modeled efficiency with measured inductor data for each 0.20mm substrate
thickness, double magnetic layer design.
Figure 5.14: Breakdown of losses in converter/power inductor
113
5.2 Integrated Inductor for TPS62615 at Light Load Discontinuous Conduction Mode
5.2.1 Inductor Loss Analysis for Discontinuous Conduction Mode
Instead of demonstrating the WPT systems with SMT inductor alone, an integrated induc-
tor is also designed for a demonstrated RFNFC system. For a comparison between the
integrated inductor and a SMT inductor, a Texas Instruments TPS62615 buck converter in
ball grid array (BGA) package is selected. The reason for this is the TPS62615 buck con-
verter has an increased switching frequency - 6 MHz - which will highlight the influence of
harmonics and the advantage of the designed integrated inductor much better than the 2.25
MHz LTC3564. In the previous chapter is was shown the magnetic composite is most ef-
fective at 10-20 MHz, such that the increased switching frequency is necessary to validate
efficiency improvement compared to SMT inductor.
The calculation of inductor ripple current in DCM buck converter is shown in (5.8) -
(5.9), where ∆I is the inductor ripple current, fsw is the PDU switching frequency, L is the
inductance of the integrated inductor, D is the duty cycle of the buck converter in DCM
and where K is defined in (5.10) [92]. The calculation of the ripple current is the same as
continuous conduction mode (CCM), but with an altered calculation of the duty cycle for
DCM operation. All measured systems in this dissertation operate with the buck regulator
in DCM, as the load power is small.
(Vin,P DU − Vout )D
∆I = (5.8)
fsw L
s
4K
D= V
(5.9)
(2( in,P
Vout
DU
) − 1)2 − 1
2Lfsw
K= (5.10)
RLoad
114
5.2.2 Harmonics of DCM Inductor Current
The TPS62615 has two modes of operation: pulse width modulation (PWM) and pulse fre-
quency modulation (PFM). PFM mode has increased efficiency at the load range considered
in this dissertation, though PWM can be used for noise/output ripple sensitive applications
[93]. Both will be examined in measurement between the integrated and SMT inductor.
PWM operation has an added benefit - the ideal inductor current waveform is known for a
given switching frequency, inductance, input voltage, and load, using (5.8) and (5.9). Fig-
ure 5.15(a) shows the ideal PWM inductor current calculated for the 6 MHz TPS62615 for
1.2V output, 2.5V input, 1.5µH inductance, and varying load power. Figure 5.15(b) shows
the difference in frequency content of the inductor current for these different current wave-
forms. In DCM, as the load power decreases, there is increased influence of harmonics of
the switching frequency. At 1 mW, the harmonic content of the inductor current is almost
as significant as the switching frequency. PFM mode is similar to ’burst’ mode for the
LTC3564. The inductor current in this mode also has increased influence of harmonics as
the load power decreases, though this effect is less severe than in the PWM case. Thus, in
order to design integrated inductors for light load applications, the inductor characteristics
at harmonics of the switching frequency must be accounted for in addition to the switching
frequency.
5.2.3 DCM Inductor Loss Analysis
Incorporating the frequency content of the inductor current is particularly important for
light load applications. A shortcoming in the analysis of other works for light load applica-
tions is the use of the Q-factor of the integrated inductor at the switching frequency without
regard to higher order harmonic frequencies. To improve the evaluation of inductor power
loss for buck converter in DCM mode, a calculation that includes the frequency spectrum
of the inductor current is needed.
For evaluating inductor loss, the conventional formulation is given in (5.11), where Rind
115
Figure 5.15: (a) PWM inductor current for different load power and (b) spectral content of
these currents
116
is the inductor resistance and Iout is the PDU load current. This calculation is typically
separated into the inductor DC resistance with Iout and the inductor AC resistance at the
switching frequency with ∆I [89]. A calculation of just the inductor AC power loss from
the ripple current is shown in (5.12).
2 ∆I
Ploss,L = Rind ∗ (Iout + ( p )2 ) (5.11)
2 (3)
∆I
Ploss,LAC = Rind (fsw ) ∗ (( p )2 ) (5.12)
2 (3)
The change in the frequency content of the inductor current with different inductance
and load would not be an issue if the inductor resistance was constant with frequency,
which is certainly not the case. Equation (5.11) assumes a perfect triangular wave form
and approximates the inductor AC loss accordingly. An improved inductor loss equation
for DCM is shown in (5.13). There are two differences between this revised calculation and
the calculation in (5.11). First, the DC component is neglected. This is an approximation
only valid for light load applications. Consider the maximum output current for the 1.2V
output. At 10 mW output, this gives Iout = 8.3 mA. Even with a DC resistance of 1Ω,
the inductor DC loss will be 69 µW - less than 1% efficiency decrease in the worst case
scenario. In a WPT system supplied by a controlled power source, the input voltage to
the PDU is not fixed as discussed in Chapter 2. As the load power changes, the PDU
input voltage will vary such that the power at the output of the rectifier and the power
needed at the input of the PDU are equal. As the efficiency of both the RF near field
coupling coil+rectifier system and the PDU are affected by the input voltage to the PDU,
the PDU input voltage that matches these two will vary with the load power. As such, the
ripple current and corresponding inductor AC loss will increase as the PDU input voltage
increases, such that the most important design consideration is designing for low inductor
117
AC loss across a wide range of Vin,P DU .
∆I
Ploss,DCM = Rweighted ∗ ( p )2 (5.13)
2 (3)
The second difference is a weighted value of the resistance is used instead of the in-
ductor resistance at the switching frequency. For a given DCM inductor current waveform,
the frequency content is extracted from a fast Fourier transform as shown in (5.14), where
I(t) is the inductor current waveform. Then, Rweighted is found from (5.15), where R(ω)
is the frequency dependent resistance of the inductor over the frequency range ω1 :ω2 . The
resistance is weighted with respect to the square of the spectral content of the inductor cur-
rent, as this correlates better with power loss (i2 R). This is an improved resistance for loss
calculation compared to the inductor AC resistance at the switching frequency.
I(ω) = f f t(I(t)) (5.14)
Pω2 2
ω=ω1 R(ω)|I(ω)|
Rweighted = Pω2 2
(5.15)
ω=ω1 |I(ω)|
5.2.4 Integrated Inductor Design
The integrated inductors have the same geometry as demonstrated in the previous section,
with the key difference that a spiral inductor is located on the top and bottom layer, con-
nected through a via as shown in Fig. 5.16. This leads to a much larger inductance density
for the inductor, therefore this section briefly shows the design and characteristics of the
inductor with this slight design change. The spiral inductor geometry was designed for
0.30mm thick FR4 substrate using a Two-Stage Bayesian Optimization algorithm by Ph.D.
student Hakki Torun to achieve high inductance and low area while permitting very high
DC resistance (around 1Ω). 1Ω DC resistance is allowable because minimal power loss
from the DC resistance in the inductor is expected at the highest output power loads for
118
Figure 5.16: (a) Top view of inductor with geometry parameters and (b) side view of in-
ductor structure
this system, while permitting much higher inductance density for smaller area inductor.
The geometry of the spiral is given in Table 5.3.
A NiZn ferrite epoxy composite was screen printed on both layers of the spiral inductor,
with material details available in [90]. The screen printed magnetic layer has area similar to
the spiral, with 4.7x4.7mm area. The maximum thickness from a single screen printing ap-
plication, 500µm, was selected as the core thickness for both the top and bottom layers. The
reason for the selection of thicker magnetic layers is because at higher inductance, there
Table 5.3: Geometry Parameters of Both Integrated Inductors

Substrate Thickness 0.3 mm 0.79 mm
Side length (mm) 4.65 5.16
Trace width (mm) 0.1 0.1
Trace spacing (mm) 0.1 0.15
Number turns 7 7
Area (mm2 ) 21.6 26.6
119
is less harmonic content in the DCM inductor current, shown in Fig. 5.17(a). The power
loss for a 5 mW load for the designed integrated inductor is calculated from (5.13), with
different value of Rweighted extracted from the different inductor current waveforms. As
the inductance increases, there is less power loss in harmonics of the switching frequency
as shown in Fig. 5.17(b). For all three inductance cases, only a fraction of the power loss
occurs at the switching frequency. In fact, the 1500 nH case has the largest power loss
at the switching frequency. As the power loss contribution of higher order harmonics is
considered, however, the 500 nH inductance case has a rapidly rising power loss while the
1500 nH case power loss levels off. However even this inductance consideration must be
balanced, as the law of diminishing returns means there is a limit to how much increased
inductance is beneficial. Eventually, adding extra inductance will have minimal effect on
inductor current harmonics while increasing the area. For the demonstrated system, induc-
tance beyond 1500 nH yields little benefit.
A second inductor was also designed for 0.79mm thick substrate using the same pro-
cedure as the 0.30mm thick substrate inductor. This inductor is less effective at similar
area, as the inductance is less, and the design characteristics are shown in Table 5.3. This
inductor is only used for full system measurements in Chapter 6 on designs with 0.79mm
thickness substrate, and not used for any of the following comparisons/measurements in
this chapter. The inductance is 928 nH and the Q is 7.8 at 2.25 MHz, for use only with the
LTC3564.
5.2.5 Integrated Inductor and SMT Inductor Comparison
The integrated inductor is compared with a SMT inductor from Murata (Part LQM21PN1R5MC0)
with 260 mΩ DC resistance. This is a multilayer inductor with ferrite core. This SMT in-
ductor is selected because it has similar inductance to the embedded inductor, but more
importantly, because it is an inductor recommended for use with the TPS62615 for good
efficiency on the datasheet [93]. A comparison of the integrated inductor and the SMT
120
Figure 5.17: (a) Variation in inductor current spectral content with inductance value and
(b) Cumulative power loss with frequency at 5 mW load with different inductance value
121
Table 5.4: Comparison of Embedded and SMT Inductor
Embedded SMT
L @ 6 MHz 1.36 µH 1.35 µH
Area (mm2 ) 22 2.5
0.5 mm (one
Height 0.5 mm
layer)
L Density
63 540
(nH/mm2 )
RDC 1Ω 260mΩ
RAC @ 6
3.77Ω 4.3Ω
MHz
Self resonant
88 MHz 70 MHz
freq
Q @ 6 MHz 13.6 11.9
inductor with manufacturer supplied data is shown in Table 5.4. The two inductors have
similar inductance at 6 MHz, though the integrated inductor has slightly improved Q and
the SMT inductor has smaller area. A comparison between the inductance and AC resis-
tance of the two inductors is shown in Fig. 5.18.
When calculating the loss conventionally from (5.11), the power loss is very similar for
the two inductors as shown in Fig. 5.19(a), for 2.5V input and 1.2V output. However, the
two inductors differ greatly in their AC resistance at higher frequency, shown in Fig. 5.18.
Data for the SMT inductor is only supplied up to 30 MHz, but at this frequency the SMT
inductor has approximately 5x larger RAC than the integrated inductor. The NiZn magnetic
composite has a slowly increasing magnetic loss tangent in this frequency range, therefore
the RAC also increases at a much slower rate when compared to the SMT inductor. When
accounting for harmonics of the switching frequency and calculating the inductor power
loss with the developed analysis using (5.13), the power loss of the integrated inductor is
much improved over the SMT inductor as shown in Fig. 5.19(a). While the resistance at
6 MHz is similar for the two inductors, Rweighted is higher for the SMT inductor, shown
in Fig. 5.19(b). By including the harmonic content of the inductor current, the inductor
power loss evaluation changes considerably. When calculating the inductor loss with 3.5V
input voltage compared to 2.5V, the power loss improvement from the integrated inductor
from (5.13) becomes even greater as shown in Fig. 5.19(b). This is because the as the ripple
122
Figure 5.18: Comparison of integrated and SMT inductor (a) inductance and (b) RAC
123
Figure 5.19: (a) Comparison of calculated inductor loss for SMT and integrated from (5.11)
and (5.13) at 2.5V input and (b) comparison of calculated inductor loss from (5.13) and
Rweighted at 3.5V input
current increases, the difference in Rweighted between the two inductors becomes even more
significant.
5.2.6 Experimental Results
Receiver Fabrication
The complete WPT receiver was fabricated on 0.20mm thick FR4 substrate using standard
PWB process. The NiZn ferrite epoxy composite was stencil and screen printed on the
top and bottom layer on top of the copper windings defined on both sides of the substrate
using the same stencil and cured at 180◦ C for 1h, with the fabricated inductor shown in
124
Figure 5.20: (a) Fabricated 0.2mm thick substrate integrated inductor top (left) and bottom
(right) layer and (b) TPS62615 circuit with integrated inductor
Fig. 5.20(a) and the full receiver shown in Fig. 5.20(b). Following the screen printing,
the BGA package TPS62615 and surface mount components were assembled with reflow
soldering, and then the remaining through hole components were soldered to the design.
This demonstrates the durability of the integrated inductor with various assembly processes.
Comparison with PDU Only
First, just the PDU efficiency with the embedded and SMT inductor was compared. The
efficiency as a function of input voltage was measured for 3 different output power with
variable resistor load: 1mW, 5 mW, and 10 mW. The DC power supply was an Agilent
E3633A, and the PDU input current was measured with a HP 3478A multimeter to deter-
mine the input power for each measurement point. The efficiency was measured for the
buck converter operating in PFM mode (Fig. 5.21(a)) and PWM mode (Fig. 5.21(b)). In
all cases, the integrated inductor has improved efficiency over the SMT inductor. For PFM
125
operation, the efficiency difference between the two inductors increases as the PDU input
voltage increases. This is because the DC power loss in the inductor stays constant (the
load is unchanged), but the inductor AC loss increases with the increase in inductor ripple
current. Because the integrated inductor has lower resistance at harmonics of the switching
frequency, the efficiency of the integrated inductor decreases less with the increase in input
voltage. At 10 mW load at 2.5V input, the difference between the integrated and SMT
inductor is very small - the added inductor DC loss in PFM mode and the fact Rweighted
is more similar at 10 mW is the cause of this. However, at 1 mW load, the efficiency
difference is largest, and exists even at 2.5V input. This is supported by the calculation
of inductor loss from (5.13) as shown in Fig 5.19. At 1 mW, there is greatly increased
inductor current harmonics, leading to the more significant improvement from the embed-
ded inductor. For PWM operation, the efficiency difference changes less with PDU input
voltage. In PWM mode, the DC current component is less, thus at all input voltages the
inductor power loss is dominated by the AC component. The demonstrates a reliable, in-
tegrated integrated inductor with compact, high frequency buck converter with improved
efficiency over a SMT inductor. The fully integrated WPT receiver system measurements
will be shown in the following chapter.
5.3 Inductor Comparison with State of the Art
The fabricated integrated inductors also compare favorably with other implementations of
PWB compatible planar inductors with simple magnetic layer application published in the
open literature, as shown in Table 5.5. In this comparison, the integrated inductor designed
for the TPS62615 in the previous section is shown. Compared to [96] and [66], the induc-
tance density of the demonstrated integrated inductor is much larger. The Q of the demon-
strated inductor is similar to [96], [66], and [65], though the Q in [67] is larger. However,
the inductance density and thereby inductance is smaller in [67], and the other inductors for
that matter, such that there will be a much larger influence of harmonics in the inductor cur-
126
Figure 5.21: Measured PDU efficiency comparison between the two inductors in (a) PFM
mode and (b) PWM mode
127
Table 5.5: Comparison with Other Package Inductors
This Work [96] [67] [66] [65]
Inductor Photo-
PWB Etch PWB Etch In-Silicon In-Silicon
Fabrication lithography
Magnetic Screen Screen Screen Screen Manual
Application Printing Printing Printing Printing Pressing
RDC (mΩ) 1000 15 >2000 25 84
Inductance
1360 150 810 6.6 430
(nH)
Peak Q 14 20 45 16 21
Inductance
Density 63 .7 33.1 6.6 47.8
(nH/mm2 )
Area (mm2 ) 21.6 225 24.4 1 9
Frequency
6 1 10 50 6
(MHz)
rent for application to DCM buck converter. In fact, the inductor in [66] was compared to
essentially the same Texas Instrument buck converter (where the only difference is a 1.8V
output compared to 1.2V), and the integrated inductor in that work demonstrated lower
efficiency compared to the inductor that came with the evaluation board. The DC resis-
tance in [67] is at least twice that of the demonstrated integrated inductor, which will start
to introduce non-negligible power loss at the larger load power studied in this dissertation.
The demonstrated integrated inductors show a simpler fabrication process needing less fab-
rication steps compared to the other screen printed magnetic core inductors and superior
inductance density, while having electrical properties better suited for DCM buck regulator
operation in integrated WPT receiver.
5.4 Summary
This chapter examined the fabrication, characterization, and design of embedded inductors
for integrated WPT systems. A simply fabricated embedded inductor with screen printed
NiZn ferrite magnetic core was characterized at a variety of substrate thickness and with
different numbers of magnetic layers. An embedded inductor was then designed for discon-
tinuous conduction mode buck converter by considering the AC resistance of the inductor
at harmonics of the switching frequency. In measurement, a PDU demonstrated higher
efficiency with the embedded inductor compared to a similar SMT inductor.
128
CHAPTER 6
COMPLETE SYSTEM MEASUREMENTS
Each of the previous chapters discuss various pieces and challenges for the design of in-
tegrated RFNFC systems. These included the system architecture development, the coil
design, component selection, RF layout challenges, the reverse PDN, and embedded induc-
tor integration. This chapter examines all of the work completed in prior chapters through
measurements of complete systems. The experimental setup is explained, and the mea-
surements of all complete systems are provided. This chapter demonstrates the dissertation
objectives have been reached, and provides comparison to state of the art and discussion of
the advantages and disadvantages of RF near field coupling.
6.1 Experimental Setup
The power supply for all measurements performed was a HP 8648D signal generator. The
Textronic TDS 3012B oscilloscope was used to observe the waveforms at output of the
DC-DC converter with variable resistor load, and the output resistance was measured and
voltage verified with a multimeter. Plastic screws and clips were used to fix the transmis-
sion distance. This setup is shown in Fig. 6.1. The efficiencies presented in this dissertation
are the total system efficiency, with the output power referenced to the input power at the
transmit circuit from the signal generator. Specifically, this is not just the receiver effi-
ciency, as is commonly reported, but the total system efficiency. This efficiency is given by
(6.1), where Vout is the DC voltage at the output of the rectifier or buck converter (rectifier
output for Chapter 3 measurements, PDU output for measurements in this chapter), RLoad
is the load resistance, and Pin is the input power from the RF signal generator supplied to
the transmitter circuit.
129
Figure 6.1: Experimental setup for all full system measurements
2
Vout
RLoad
ηW P T = (6.1)
Pin
For the full system, the measurement procedure differs from the PDU only measure-
ment (with voltage source supply) and coil+rectifier only measurement (no PDU). Without
the PDU, the input power can be freely increased and the rectifier output voltage will in-
crease accordingly. As the purpose of the PDU is to supply output regulation, this will not
occur for the full system. For full system measurements, the transmit circuit was supplied
with 1 mW (0 dBm) and the power was slowly increased until there was sufficient power
to supply the given load with constant DC output. This establishes the minimum input
power necessary to achieve the desired voltage output and thus the peak efficiency for that
operating point. Further increasing the input power would still result in the desired output
voltage, but with lower efficiency as the output power is unchanged but the input power is
increased.
130
Figure 6.2: Fabricated full receivers for select 2 and (bottom right) 4 coil systems
6.2 Full System Measurements
6.2.1 Fabricated Full Systems
All designs with the LTC3564 were fabricated on 0.79mm thick FR4. The design with
the TPS62615 was fabricated on 0.3mm thick substrate as discussed (and shown) in the
previous chapter. Standard PCB manufacturing was used for the traces and metal patterns,
on 1 or 2 oz copper. Only bridge3,3 designs use 2 oz copper. The copper thickness only
has a meaningful effect on the integrated inductor, which was not used for this system
measurement. Some fabricated receivers are shown in Fig. 6.2.
6.2.2 Fully Integrated Systems Measurements
The differentiation between fully integrated and the other measurements in this chapter
are the fully integrated systems in this section used the embedded inductor, and the other
systems use a SMT inductor. The measurement of the half4,4 system at 700 MHz, 1mm
131
transmission distance with the 0.79mm substrate thickness embedded inductor is shown in
Fig. 6.3 at 3.3V and 1.2V output. At 3.3V output, the inductor is less active as the PDU
switches seldomly, and the efficiency difference between SMT and integrated inductor in
measurement was negligible. At 3.3V output, the buck converter is more efficient com-
pared to 1.2V output, as the PDU losses are much lower. Also, at 1.2V output the PDU
input voltage decreases at lower load power. When the load resistance is increased, the sys-
tem wants to minimize the increase in Rin,P DU to keep the coil efficiency from diminishing,
thus it tries to minimize the voltage conversion ratio. At the higher load power, the load re-
sistance is diminished such that Vin,P DU has some flexibility to increase, for better rectifier
and source efficiency, without compromising the coil efficiency. At the maximum power
supplied by the RF source, the efficiency is 68.4% - the highest ever demonstrated for a RF
near field coupling system. At 1.2V output the PDU more actively switches and the 1muH
(similar inductance) Murata LQH3NPN1R0NJ0L SMT inductor has better efficiency at the
2.25 MHz switching frequency at higher output power. This SMT inductor has only 40 mΩ
DC resistance, and in burst mode the LTC3564 has a larger inductor current DC component
than typical for DCM. At the higher power output the significantly smaller DC resistance
leads the SMT inductor to be more efficient. At lower output power (5 mW), the embed-
ded inductor is more efficient. At this output power, the inductor current DC component is
decreased and the AC loss dominates, such that the embedded inductor has slightly lower
loss and is thus more efficient. Even at 2.25 MHz, below the optimal frequency for the
embedded inductor, the lower resistance at harmonics of the switching frequency leads to
better efficiency with the embedded inductor at lightest loads. The efficiency of the RFNFC
system with embedded inductor and LTC3564 at 1.2V output peaks at 52.8%.
The half2,2 system with the TPS62615 was measured with the integrated inductor on
0.3mm thick FR4 substrate. The system was supplied with a HP 8648D RF signal genera-
tor at 587 MHz and the coils were operated at 1 mm transmission distance. The measured
efficiency for the full system is shown in Fig. 6.4. The peak efficiency is 42.7% at 1.2V
132
Figure 6.3: Measured efficiency of the complete half4,4
output. This efficiency is lower than other systems at similar output voltage in this disserta-
tion, but still offers an improved combination of coil area and efficiency in a WPT receiver
compared to systems not in this dissertation. The efficiency decreases for a couple of rea-
sons. First, other demonstrations use the LTC3564, which has better efficiency compared
to the TPS62615. Also, this system is on 0.30mm thick substrate. In the curing process and
reflow soldering process, the substrate warps. The system efficiency is highly dependent on
the value of Q2 , and even minor warping can lead to minor decrease in this quality factor
with noticeable efficiency decrease.
However, what differentiates this demonstration compared to the others is a high level
of integration. In this design, a compact, 6 MHz chip is integrated with the embedded
inductor - with improved efficiency as demonstrated in the previous chapter. The TPS62615
chip uses fewer components compared to the LTC3564 chip, increasing the reliability of
the integrated solution. As such, the overall area of this receiver is smaller than the other
demonstrations in this chapter. Excluding the reverse PDN and load, this implementation
has only 3 external components and 1 chip added while demonstrating 42.7% efficiency
and a reliable, compact, packaged, integrated solution.
133
Figure 6.4: Measured system efficiency with integrated inductor and TPS62615
6.2.3 Other Systems with Half-Wave Rectifier
The measured efficiency of the system with half4,1 at 689 MHz, 1mm transmission distance
is shown in Fig. 6.5(a). The optimal frequency in measurement was 689 MHz as opposed
to the designed 700 MHz, likely due to slight error in capacitor tolerances and transmission
distance (honestly, it is very surprising the optimal source frequency for the half4,4 system
was exactly 700 MHz). While the efficiency is smaller than that of the half4,4 system,
the receiver coil area is almost half, demonstrating the tradeoff between efficiency and coil
area in a RF near field coupling system. It also illustrates the importance of integrating a
buck regulator. Figure 6.5(b) shows the input voltage to the PDU when the output voltage
is 1.0V in the half4,1 system at 15 mW load power. First, the input voltage ripple is at
the metric set for the design of the reverse PDN (60 mV). Second, the PDU input/rectifier
output voltage is about 3.7V. The rectifier is more efficient at this voltage and the Rin,P DU
is not a burden to coil efficiency at higher power with lower load resistance as discussed
earlier. With a diode rectifier alone, the efficiency of the rectifier at 1.0V, 15 mW output
would be much lower according to (2.9), compared to using a buck regulator with larger
rectifier output voltage. As a final note, one can refer back to Fig. 3.14 to see that the
measured efficiency follows the trends of the calculated coil+rectifier efficiency for half4,4
- the best efficiency occurs at smallest load resistance (highest power), as opposed to the
134
Figure 6.5: (a) Measured efficiency of the half4,1 system and (b) PDU input voltage with
1V, 15 mW output
ADS simulated efficiency.

The measured efficiency of the half2,1 system at 1mm transmission distance is shown
in Fig. 6.6. The measurement uses a 786 MHz source frequency. The efficiency peaks at
67% at 3.3V output and 62% at 1.2V output. While the half4,4 system has higher peak
efficiency and utilizes integrated inductor, no other design demonstrated has over 60%
measured efficiency at 1.2V output. In fact, nothing in all of academic literature comes
close to this efficiency value at low voltage, and this is accomplished with a 33mm2 area
receiver coil. As expected, at low load power (high resistance) the efficiency is very low.
With the small area receiver coil, a larger value of C2 is necessary for resonance, degrading
the coil efficiency at large load resistance. However, as the load resistance decreases, the
efficiency rises. Because the coils are operated at 1mm, the k is large and high source
135
Figure 6.6: Measured efficiency of the half2,1 system at 1.2V and 3.3V output at 1mm
efficiency is achieved even at lower load resistance as shown in the measurement in Chapter
3 without PDU. Interestingly, the optimal source frequency occurs around 50 MHz lower
than the PDU absent measurement, as the additional microstrip line in the full system
design downshifts the frequency.
The measured efficiency of the half2,2 system at 2.5mm transmission distance with
800 MHz source frequency is shown in Fig. 6.7. A peak efficiency of 51% is achieved at
this distance with 3.3V output. Unlike the other demonstrated designs at 1mm distance,
where the efficiency peaks at either the maximum input power available from the source
or close to it, the efficiency here peaks around 7 mW and then slightly decreases. As
increasing the load power will decrease the load resistance for constant output voltage,
the source efficiency degrades as this occurs. Thus the optimal load occurs lower power,
higher resistance as also seen in the rectifier measurement at this transmission distance
in Chapter 3. While this peak efficiency is lower than other demonstrated designs in this
dissertation, this is also achieved at over 2x the transmission distance. This demonstrates
how the developed design methodology can be used to sacrifice some efficiency to greatly
increase the transmission distance. Even at 1.2V output, the 44% peak efficiency offers a
never before seen combination of low output voltage, transmission distance, efficiency, and
coil area.
136
Figure 6.7: Measured efficiency of the half2,2 system at 1.2V and 3.3V output at 2.5mm
6.2.4 Other Systems with Bridge Rectifier
The measured results for systems with bridge rectifiers are shown in Fig. 6.8 for bridge2,2
(780 MHz) and Fig. 6.9 for bridge3,3 (1008 MHz), both at 1mm transmission distance. The
efficiency is lower when compared to the half-wave rectifier, as expected, but still higher
than any other RF near field coupling system not in this dissertation. The measured results
of these systems are also used for a direct comparison to a machine learning based design
in the immediately following section. The measured results for bridge3,3 demonstrate the
effect of the loading resistance on the coil and source efficiency. The 3.6V output has lower
efficiency than the 2.5V and 3V outputs at 5mW and 10mW. This seems counterintuitive as
the output voltage is higher, and the corresponding rectifier output voltage is higher for im-
proved rectifier efficiency. However, for equal load power across different output voltages,
increased resistance is needed for increased output voltage. At the input voltage minimum
for the LTC3564 (2.5V) and above, Rin,P DU is transformed up by a similar proportion
(PDU efficiency is very similar for all these areas). Thus, the Rin,P DU is much higher for
the 5 mW case at 3.6V (2600Ω) compared to 2.5V (1300Ω) and 3.0V (1800Ω). This leads
to a large decrease in the coil efficiency, outpacing the gain in the rectifier efficiency. As the
load power increases, Rin,P DU decreases as RLoad decreases. At the maximum input power
from the used supply, the 3.0V and 3.6V output efficiency are essentially equal. If larger
137
Figure 6.8: Measured results for bridge2,2
power source were used, the efficiency of the 3.6V output would be higher than the lower
output voltages via improved rectifier efficiency. This demonstrates the importance of de-
signing for the system, factoring how the output power and voltage, for instance, affects
the efficiency of all subsystems.
The bridge2,2 system demonstrates higher efficiency than the bridge3,3 system, despite
similar coil characteristics, for a couple of reasons. First, the bridge3,3 system was an
earlier design iteration with well characterized efficiency as a function of PDU output volt-
age - valuable data for validating several efficiency trends as discussed in the preceding
paragraph. However, this design has larger ohmic losses, especially with the PDU and re-
verse PDN through much longer traces. While the other measured complete systems use
an upgraded PDU layout, the ’original’ design in bridge3,3 had 5-10% efficiency decrease
on just the PDU subsystem in a separate measurement - undoubtedly the contribution of
ohmic losses from longer traces on the input and output voltage lines because the input and
output voltage capacitors were located much farther from the PDU. Second, the system
operates at higher frequency - 1008 MHz - such that there is an increased contribution of
diode switching loss and slight decrease in coil efficiency at this increased frequency.
138
Figure 6.9: Measured results for bridge3,3
Application of Machine Learning
Ph.D. student Hakki Torun applied his Two-Stage Bayesian Optimization (TSBO) to the
full RFNFC system with a bridge rectifier at 1mm transmission distance, with the results
shown in this dissertation to provide details on an avenue for continuing to decrease coil
area/increase system efficiency. Full details of this process and results are provided in [94],
with a summary provided here. This algorithm and design process used a stage by stage
approach, with the algorithm process flow shown in Fig. 6.10.
This design process used the maximum PTE as the metric for the coils and optimized
ADS simulations to determine the optimal coils for the design. One of the main benefits of
utilizing a machine learning (ML) based design approach is that it enables many more geo-
metric parameters to be explored. Specifically, the ’hand tuned’ designs in this dissertation
mainly focused on square coils with varying side length and line width. However, the ML
based approach is able to consider many more geometric parameters, such as rectangular
139
Figure 6.10: Algorithm flow process for (a) WPT coils plus rectifier front end and (b) PDU
with embedded inductor
Figure 6.11: ML coil design geometry parameters for (left) top layer and (right) ground
layer
coils, gap width, and ground plane void geometry as shown in Fig. 6.11. This enables
the potential for much more efficient/smaller coils than able to be designed without aid of
algorithms.
A fabricated ML design and measured result is shown in Fig. 6.12. In the provided
photo, the ML design is compared to an earlier, published WPT system with bridge rectifier
with 100 mm2 coil area (this design was greatly improved upon in later dissertation work,
thus not detailed in this dissertation). This ML receiver coil has 20.1 mm2 area and peak
55.7% measured system efficiency at 3V output. A comparison with the measured bridge2,2
and bridge3,3 designs is shown in Table 6.1. The ML design is strictly superior to the
bridge3,3 design and has more than 60% area reduction compared to the bridge2,2 design
140
Table 6.1: Comparison of ML design to other bridge designs
ML Design bridge2,2 bridge3,3
Efficiency 55.7% 63.3% 54.0%
Rx Coil Area 20.1 mm2 53.3 mm2 56.3 mm2
with only 8% efficiency decrease. The ML algorithm enables much smaller receiver coil
area without sacrificing much efficiency. Though the best designs with half-wave rectifier
in this dissertation still offer an improved combination of coil area/efficiency, at varying
output voltages, the following chapter on future work discusses how this same algorithm
may be applied to great effect to further improve these designs as well.
6.2.5 4 Coil System with Boost Converter
The four coil link was measured at a distance of 30 mm. From Fig. 4.21, the rectifier
output voltage with the reverse PDN is almost twice that of the two capacitor case, as
the parallel resonance between the two capacitors greatly diminishes the output voltage as
shown in Chapter 4. For the rectifier integrating the storage capacitance through the reverse
PDN, the output was charged for a couple of minutes. Next, the 1.5V rectifier output with
20 mF total reverse PDN capacitance was used to power a Linear Technology LTC3400
boost converter with 3.2V, 10 mW load for approximately a second combined as shown
in Fig. 6.13. From the output voltage and capacitance, a little over 2s worth of 10mW
power is supplied, but much of this power is lost in the startup of the boost converter and
efficiency loss of the boost converter while ’boosting’. Even so, by storing low voltage
at large capacitance in the reverse PDN, 10 mW of discontinuous power at 3.2V could be
supplied with a small power source (28 mW) and coil area (361 mm2 ) at 30 mm distance.
This is a unique approach to four coil systems as the source power is much smaller than
typically seen in such systems, and an approach particularly suited for the needs of light
load IoT applications with discontinuous power demands.
141
Figure 6.12: (a) Fabricated ML coil and comparison to an earlier design with 100 mm2 coil
area and (b) measured results
142
Figure 6.13: Measured boost converter output with reverse PDN in 4 coil system
6.3 Correlation with Calculated Efficiency Analysis and Loss Distribution
6.3.1 Calculated and Measured Efficiency Comparison
In this subsection, all measured results were shown previously in this chapter (not new
results), but here compared with the efficiency analysis. A comparison of the measured
and calculated efficiency analysis for the bridge2,2 design at 1.2V output, 780 MHz is
shown in Fig. 6.14(a), with the calculated subsystem efficiencies shown in Fig. 6.14(b).
By tuning some of the variable modeling values, as discussed in Chapter 2, very good
agreement between the calculated and measured efficiency is achieved. The calculated
efficiency assumed 5cm of microstrip line length, and a Murata 1.5µH chip inductor with
RAC = 0.5Ω was used for the inductor AC loss calculation. At the largest output power,
there is less than 1% efficiency difference between the calculated and measured efficiency.
At the lowest output power, the error increases, likely due to overestimation of inductor
loss.
One benefit to the proposed efficiency analysis is that the sources of the power loss
can be compared to identify the areas to target for improved efficiency. At the lowest load
power, the PDU is the dominant source of loss. This is because at the lowest load power,
the PDU efficiency is lowest and inductor losses comprise a large portion of the overall
loss. Moreover, rectifier and coil efficiencies are at their lowest at low load power. Due to
143
Figure 6.14: (a) Comparison between measured and calculated efficiency for bridge2,2 and
(b) calculated subsystem efficiency
small value of Vin,P DU at lowest load power, the rectifier efficiency suffers from increased
influence of forward voltage loss. As the value of RLoad is greatest at low load power
for constant Vout , the corresponding increase in Rin,P DU degrades the coil efficiency with
this large loading resistance. Thus, from Chapter 2, improving the receive coil Q2 would
be the simplest path to improved coil efficiency. At the higher power loads, the source
efficiency is a larger percentage of the power loss. This is because the higher power load
has smaller load resistance, leading to a smaller value of Req and correspondingly lower
source efficiency. To improve the efficiency at the highest load power, the transmit coil
inductance or k should be increased.
A comparison between the measured and calculated efficiency for the half2,1 system
at 1mm transmission distance at both 1.2V and 3.3V PDU output is shown in Fig. 6.15.
144
Here, there is more error between the calculated and measured efficiency. The most likely
culprit for this is the coil parameters used in the calculation - if the measurement occurs at
a slightly different transmission distance (rather than the exact 1mm simulated) or there is
slight difference in the k, Q, or L simulated, there will be discrepancy between measured
and calculated efficiency. Because this comparison shows the most difference, it is likely
there is some error in the simulated parameters of coil1 , as the systems using only coil2
show much better agreement.
In the calculated individual subsystem efficiencies, the trends are similar to the bridge2,2
efficiency trends. The source efficiency decreases slightly with load power, as RLoad de-
creases. The coil and PDU efficiency decrease sharply at the lightest loads. At this load
power, RLoad is very high, and inductor loss comprises a larger portion of the overall loss,
such that these efficiencies are very tough to design for at this load power. The rectifier
efficiency stays relatively steady (with some variance for the ML modeling switching loss),
decreasing slightly with load power. There is strange behavior in the calculated rectifier
efficiency at the lightest load, due to the diode switching loss. At small load power, slight
errors in the ML modeling diode switching loss are magnified. This error can be mitigated
with increased training data.
A comparison between the measured and calculated efficiency for the half2,2 system at
2.5mm transmission distance at both 1.2V and 3.3V PDU output is shown in Fig. 6.15. The
agreement to measurement is much better here compared to half2,1 at both output voltages,
and the efficiency trend with load power is very similar to the measured data as well. As
discussed earlier, this is likely because the simulated parameters for the coil2,2 link are more
accurate. This correlation demonstrates the robustness of the efficiency analysis for guiding
design in various operating conditions, as this comparison is for a 2.5mm transmission
distance.
The calculated subsystem efficiency demonstrates the efficiency analysis understands
how the distribution of losses changes for different operating conditions. At the increased
145
Figure 6.15: (a) Comparison between measured and calculated efficiency for half2,1 at
1mm transmission and (b) calculated subsystem efficiency
146
Figure 6.16: (a) Comparison between measured and calculated efficiency for half2,2 at
2.5mm transmission distance and (b) calculated subsystem efficiency
transmission distance, the k is much smaller (approximately 0.23). Accordingly, the source
efficiency is much less at larger load power when compared to the designs at 1mm while
the other subsystems show much less difference, as agrees with intuition from previous
discussion in this dissertation.
It should also be noted the bridge efficiency shows much better correlation with mea-
surement. One explanation for this is the complex interaction of the half-wave rectifier
with the coils as explained in Chapter 4. If the effective inductance of the coil is acting
differently than the expectation from HFSS simulation, then the equations used to calculate
the source and coil efficiencies cannot be expected to be as accurate as they would be for
use with the bridge rectifier.
147
6.3.2 Measured PDU Input Voltage
The value of Vin,P DU in measurement for a few test cases is shown in Fig. 6.17. This
data shows that the efficiency analysis correlates with the general trends of the PDU input
voltage with load power, but specific buck regulator peculiarities inhibit consistent, accurate
prediction of this value. The half2,2 link Vin,P DU was measured with the TPS62615 at
1.2V output. Because simulated losses for the TPS62615 are not available, only measured
data is available for this case. As the load power increases, the input voltage to the PDU
increases. This is exactly as expected: at low output power the load resistance is largest.
Vin,P DU wants to be small, else the value of Rin,P DU will be transformed to a very large
value and greatly decrease the coil efficiency much more than the source efficiency would
benefit (source efficiency is already large at this load range). In addition, larger value of
Vin,P DU would lead to larger PDU switching and PDU inductor AC loss. However, as
the load power increases, RLoad decreases. Accordingly, Vin,P DU increases, such that the
transformed value of Rin,P DU is increased and maintains its value better over the load range.
The gains in source efficiency and rectifier efficiency (less forward voltage efficiency loss)
by doing this outpace the losses in coil/PDU efficiency at higher power, larger Vin,P DU .
A similar trend is seen with the half2,2 measurement at 1.2V output with the LTC3564
at 2.5mm, but here much more peculiar PDU behavior may observed. At 2.5mm transmis-
sion distance, Vin,P DU needs to take a large value to overcome the low coupling coefficient
else the source efficiency will be very low, even at large RLoad . In addition, after 5 mW, the
measured PDU input voltage gradually increases as seen with the TPS62615, to overcome
the decrease in RLoad . This is predicted by the efficiency analysis. However, in the 4-5 mW
load region, an input voltage to the PDU below 2V is measured. First, these data points
are at odds with rest of the data. More significantly, this value is more than half a Volt
below the specified minimum operating input voltage for the LTC3564 - and the system
successfully regulates! This is not measurement error, as this phenomenon was replicated
in the half2,1 system at 1mm transmission distance as well at similar loading conditions.
148
Figure 6.17: Measured Vin,P DU for (a) half2,2 at 1mm, 1.2V output with TPS62615 (b)
half2,2 at 2.5mm and half2,1 at 1mm, 1.2V output with LTC3564 and (c) half2,2 at 2.5mm,
3.3V output with LTC3564
149
While the exact cause of this is not known, it is suspected this is a transition point in the
operating mode for the LTC3564 (based on the output current value and output voltage
waveforms observed). As seen in Fig. 6.7, however, there is no unusual behavior in the
system efficiency at this load power, meaning the efficiency analysis correlates much better
with the measured efficiency than the measured PDU input voltage does. Compare half2,2
at 2.5mm to half2,1 at 1mm, however. Vin,P DU shows no strong trend with half2,1 , though
at 4 mW load the strange behavior is again observed. This is not surprising, as a large value
of Vin,P DU is not necessary for high source efficiency as the k is large. As the input power
and load resistance is varied discretely, the variation in Vin,P DU to dissipate slight extra,
unneeded power is stronger than any trend due to load power in this range. Observe though
that Vin,P DU is smaller in this case than half2,2 at 2.5mm distance. This is not what might
be expected, as this is opposite of what was seen for these links at these distances without
PDU in Chapter 3. At greater transmission distance the efficiency was less, so the rectifier
output voltage was less for half2,2 at 2.5mm distance than half2,1 at 1mm. However, as
captured in the developed efficiency analysis, the PDU input voltage settles at higher value
in the increased transmission distance case to overcome the limitations of the small k on
source efficiency. This is a crucial piece of data, as the measured PDU input voltage both
validates the efficiency analysis procedure of varying Vin,P DU to find the optimal efficiency
and demonstrates the effect of source efficiency. If these two were not true, then the PDU
voltage should not be higher at increased transmission distance at the same load power.
What happens when the PDU output voltage is greater than the minimum operating
input voltage? As discussed in Chapter 2, the PDU input bootstraps to the output, and the
PDU input voltage is equal to the output voltage at all values. The same measurement result
has been observed for other coil links at other PDU output voltage greater than 2.5V for the
LTC3564. This is not what the efficiency analysis predicts, as it suggests at the larger out-
put power the input voltage should increase for improved source efficiency as seen in other
measurements. However, the efficiency analysis still better predicts the system efficiency
150
Figure 6.18: Comparison of measured and calculated efficiency for half2,2 at 2.5mm trans-
mission distance for variable Vin,P DU (developed efficiency analysis) and fixed Vin,P DU
than trying to correlate the efficiency with the measurement. Calculating the power losses
with the measured Vin,P DU , and Rin,P DU equal to RLoad , leads to very inaccurate results,
while using the modeled values from the efficiency analysis well predicts the system effi-
ciency as shown in Fig. 6.18. In this comparison, the efficiency is calculated both as done
normally in all other cases (variable Vin,P DU ) and with assuming Vin,P DU = Vout (fixed
Vin,P DU ). The best explanation for why the variable Vin,P DU approach better matches the
measured system efficiency, despite less measured agreement with Vin,P DU , is that while
the equation for correlating Rin,P DU and RLoad based on the PDU input/output voltage is
generally true (2.14), the LTC3564 operates at times with complex behavior where that re-
lationship does not hold. A better understanding of this dynamic would be a good area for
future work. It should be noted that in the cases when Vin,P DU = Vout , the efficiency analy-
sis uses the variable Vin,P DU approach but assumes far reduced inductor losses, accounting
for the very infrequent switching action in this case. The overall conclusion drawn is that
while the efficiency analysis well predicts the general trends in the system efficiency under
these various conditions, it cannot (and frankly should not) predict and capture unusual de-
vice specific behavior as it relates to the PDU input voltage and resistance. Thus as stated
in Chapter 2, the developed efficiency analysis is ideal for guiding system design, but not
for consistent, accurate predictions of the system efficiency.
151
Table 6.2: Comparison to RF near field coupling systems in literature
Transmission
Frequency Load Power Coil Area Efficiency Rectifier PDU
Distance
half4,4 700 MHz 19.3 mW 1 mm 64 mm2 68.4% Y Y
half4,1 689 MHz 17.4 mW 1 mm 33 mm2 63.3% Y Y
bridge2,2 780 MHz 17.4 mW 1 mm 53 mm2 63.3% Y Y
bridge3,3 1008 MHz 15.2 mW 1 mm 56 mm2 54.0% Y Y
half2,1 786 MHz 18 mW 1 mm 33 mm2 67% Y Y
half2,2 800 MHz 11 mW 2.5 mm 53 mm2 51% Y Y
[25] 986 MHz 1 mW 5 mm 2.25 mm2 7% Y Y
[56] 4.7 GHz 0.1 µW 1.2 mm 0.01 mm2 1% N N
[54] 5.8 GHz 10 µW 1 mm 0.01 mm2 1% N N
[47] 1 GHz 12 mW 30 µm 0.04 mm2 14% Y N
[64] 460 MHz 10 µW* 200 mm 100 mm2 0.6% N N
6.4 Comparison to State of Art
Multiple comparisons are made between the measured designs in this dissertation and prior
art. First, a comparison to other RF near field coupling systems is shown in Table 6.2. This
comparison demonstrates a RF WPT system has never been designed with such a system
architecture and for these design goals before. Most RF near field coupling systems focus
on achieving as small area as possible with the coil area, with little attention to efficiency
or incorporating an integrated, regulated solution. This dissertation uses larger, though
still not large, coil area to dramatically increase the efficiency to higher points than ever
demonstrated before in RF near field coupling systems, for all full systems demonstrated!
The table does not demonstrate an improved design approach compared to the prior art
as the design goals for this dissertation are much different than the other RF near field
coupling systems. Said another way, this dissertation applies RF near field coupling system
much differently than has ever been previously demonstrated, incorporating high efficiency,
power regulation, and integrated inductor in the same RF near field coupling receiver.
Next a comparison is made between the compact, integrated design with the TPS62615
and integrated inductor and other fully integrated WPT designs (with SMT inductor) as
shown in Table 6.3. This dissertation design offers the best combination of efficiency and
low coil area as an integrated solution for low power, regulated, compact IoT devices. None
of the other designs utilize an embedded inductor.
Next a comparison is made to the best, regulated inductive resonant coupling systems
152
Table 6.3: Comparison to Integrated WPT Systems in Literature
Output
Reference Frequency Load Power Efficiency Coil Area
Regulation
half2,2 600 MHz 12 mW 43% Yes 53 mm2
[40] 6.78 MHz 5W 51% Yes 1600 mm2
[63] 160 MHz 1 mW 1% Yes 4 mm2
[33] 100 MHz 741 mW 85.6% No 100 mm2
[30] 13.56 MHz 151 mW 15.1% Yes 0.02 mm2
Table 6.4: Comparison to Complete WPT Systems with Regulated Output

Transmission
Reference Frequency Load Power Coil Area Efficiency
Distance
half4,4 700 MHz 19.3 mW 1 mm 64 mm2 68.4%
half2,1 800 MHz 18 mW 1 mm 33 mm2 67%
[23] 305 kHz 7.6 W 55 mm 12272 mm2 76%
[35] 13.56 MHz 60 mW 3 mm 71 mm2 50%
[58] 13.56 MHz 40 W 150 mm 80425 mm2 70%
[30] 13.56 MHz 151 mW 140 µm 0.02 mm2 15.1%
[40] 6.78 MHz 5W 30 mm 1600 mm2 51%
[25] 986 MHz 1 mW 5 mm 2.25 mm2 7%
previously demonstrated in literature in Table 6.4. The half4,4 and half2,1 designs have
slightly lower efficiency than the lower frequency WPT systems of [23] and [58], but much
improved receiver coil area with decreased transmission distance and decreased load power.
Compared to [35] and [40], both the efficiency and the coil area is improved. In [25] and
[30], the coil area is much smaller than this designs of this dissertation, but the efficiency
of the designs in this dissertation are much higher at similar transmission distance. While
the transmission distance is smaller than all but [30], the purpose of this dissertation was
to demonstrate a high efficiency, small coil area WPT system, and the final chapter will
provide a discussion on a simple way to improve transmission distance without sacrificing
efficiency as part of future work. This comparison demonstrates the dissertation objective
has been met - if the design considerations for a WPT system are the best combination
of coil area and efficiency, RF near field coupling is the leading option. In addition, the
demonstration of half4,4 is an integrated solution, with embedded inductor and regulated
output across a wide range of output conditions, showing the fully integrated solutions
coveted for WPT are possible in a RF near field coupling system.
Finally, a comparison is made to other low power, IoT oriented WPT systems in Table
6.5 at low voltage output. This comparison demonstrates the application space in which
153
Table 6.5: Comparison to IoT related power delivery systems
Receive
Source Load Transmission
Type Frequency Efficiency Element Regulation
Power Power Distance
Area
half4,4 @
Near Field 15.2
1.2V 700 MHz 28 mW 52.8% 64 mm2 Y 1 mm
Coupling mW
output
half2,1 @
Near Field
1.2V 800 MHz 28 mW 62% 17 mW 33 mm2 Y 1 mm
Coupling
output
Near Field
4coil 967 MHz 28 mW <1% 10 mW 361 mm2 Y 30 mm
Coupling
250 mm2
[13] Harvesting 150 kHz N/A <1% 29 µW Y N/A
(solar cell)
[17] Farfield 30 GHz 10W <1% 1 µW 8 mm2 N 68 cm
Resonant
[26] 50 kHz 20 mW <1% 3 µW 41 mm2 Y 85 mm
Coupling
the demonstrated RF near field coupling system is advantageous over other forms of WPT.
The efficiencies shown are referenced to the source power, instead of the power received
by the receiver (popular with rectenna metrics). The demonstrated system has larger load
power than harvesting based WPT systems such as [13]. In addition, compared to farfield
power transfer, the source power is much smaller, as well as much smaller in area com-
pared to rectenna based systems such as [17]. The demonstrated RF near field coupling
system is not strictly superior to all IoT based WPT systems. A harvesting WPT system
can operate with unknown power source, and a farfield power transfer system has far su-
perior transmission distance. Different applications will prefer different solutions. But for
IoT applications needing milliwatt-scale power, small area, and high efficiency, especially
wearables and battery charging for compact IoT devices, the demonstrated RF near field
coupling architecture has value.
6.5 Discussion and Summary
Based on the measurements of the complete systems (and the analysis in the preceding
chapters), it is clear that designing a near field coupling receiver to utilize an RF source
has clear advantages for low power applications but likely not much utility otherwise. First
and foremost, this dissertation has demonstrated that a RF near field coupling system with
154
regulated output, embedded passives, and greater than 50% efficiency is possible. This had
never before been demonstrated in prior academic literature. Furthermore, it is clear that by
using a RF source, the coil size may be much smaller than many previous, low frequency
demonstrations.
The mW load application space is very important for this dissertation. Achieving high
efficiency with such small coil area has never been demonstrated before, and low applica-
tions are more likely to need an integrated solution with small receiver area. The coil area is
the biggest detriment to circuit area for other high efficiency systems, thus this dissertation
has asserted and proven that RF operation can attain minimal coil area with greater than
50% efficiency. When designing a WPT charging solution for mW load power and max-
imizing efficiency and not transmission distance, designing the system for RF operation
should be one of the (if not the) primary options.
Above mW load power, it is harder to justify RF design for NFC systems. First and
foremost, there is an upper limit to the amount of input power this system can utilize before
destroying the copper traces, even if the active components are updated for higher power
architecture. Small coils integrated on organic substrate are not meant for high power use.
Second, higher power applications (say 100W for a laptop charger) are fine with larger
coil size to maximize efficiency. RF near field coupling has a fundamentally lower maxi-
mum efficiency than lower frequency systems, when factoring in microstrip losses, diode
switching losses, and dynamic electromagnetic effects leading to difficulty designing the
matching networks. When maximum power efficiency is the primary design objective, or if
high efficiency at farther transmission distance is needed, RF operation will not be suitable
for these design goals. Also, as discussed, the source efficiency for RF near field coupling
is dependent on an adequately large value of Rin,P DU . If the load power is increased be-
yond 100 mW, without a very large increase in ouptut voltage, Rin,P DU will substantially
decrease such that high efficiency is no longer possible. In this way, low power applica-
tions and RFNFC systems are made for each other - low power applications need the small
155
coil area and efficiency afforded only through RFNFC, while RFNFC needs low power
operation for high efficiency to be possible.
The final consideration for RF near field coupling systems is complexity. Without a
doubt, there are modeling challenges and peculiarities in RFNFC systems not found in
lower frequency systems. While the traditional resonant inductive coupling system can
use the conventional equations to design a WPT link at lower frequency with little diffi-
cultly, the same cannot be said about RF. Various factors such as frequency detuning from
microstrip lines, switching frequency mismatch between the PDU and rectifier, revised ef-
ficiency analysis, etc. must be considered for RFNFC design, moreso than lower frequency
systems. Thankfully, these are the exact issues discussed and solved in the prior chapters
of this dissertation!
156
CHAPTER 7
CONCLUSION
7.1 Future Work
The preceding chapters discussed the design, analysis, and challenges for RF near field
coupling. While the demonstrated systems had the best combination of efficiency and coil
area previously demonstrated in WPT, there are several areas this thesis could be extended
to enhanced the application space of RF near field coupling. The following will discuss a
few of the most interesting areas.
7.1.1 Decreasing Source Resistance
The biggest weakness with RF near field coupling is the transmission distance is limited
compared to other WPT systems. The main culprit for this, as discussed earlier, is the
source efficiency via the source resistance. If the source resistance is decreased, can the
transmission distance be increased? Yes! This has already been demonstrated before in
lower frequency WPT with a similar coil area, in [33], showing an unregulated system
where the efficiency improved from 44.0% to 85.6% when using a source with 50Ω resis-
tance vs using a bipolar amplifier source with 3.3Ω resistance a 2mm transmission distance.
Figure 7.1 shows the effect of decreasing the source resistance on the system efficiency.
For the half4,4 coil link, the k that gives the same ηsource ∗ ηcoil greatly decreases as Rs
decreases. If 3.3Ω source resistance is used, the k yielding the same efficiency is 0.108,
which can lead to improved transmission distance. While that is still not improved over
other WPT systems (if it was, then RF near field coupling would actually be the unques-
tionably best system architecture), this is an increase in the distance just by changing a
parameter not controlled in this dissertation. Further transmission distance is possible at
157
Figure 7.1: Coupling coefficient necessary for the same system efficiency as the source
resistance changes. Efficiency calculated for half4,4 system with 1000Ω rectifier load and
14.5 dBm, 700 MHz source
even smaller Rs or by sacrificing a little efficiency to meet application needs.
7.1.2 Application of Machine Learning
The application of a Two-Stage Bayesian Optimization (TSBO) algorithm to the coils and
power inductor, using the simulation procedures developed as part of this dissertation, has
already been demonstrated [94]. The results of this showed that the coil area can be greatly
decreased with only small decrease in efficiency. However, this optimization was done
without the calculated efficiency analysis, specifically not considering the source efficiency.
In addition, relying on simulators such as ADS to determine what designs have optimal
efficiency is less accurate than using analytical methods such as those developed in this
dissertation, as was already demonstrated. Also, the optimization was done for RF near
field coupling system with bridge rectifier - while this dissertation has demonstrated a half-
wave rectifier is superior for efficiency.
The same algorithm can be reapplied to account for the transmit coil inductance (for
improved source efficiency) while maximizing k and Q to further push the system effi-
158
ciency higher while decreasing the area of the receiver coil. The coils in this dissertation
were designed with mainly two geometric parameters varied - the side length and the line
width. The TSBO algorithm can include several more geometric factors, such as rectangu-
lar shapes, the ground plane cutout shape, etc, to find a more optimal design than possible
using the ’hand-tuned’ process of this dissertation.
7.1.3 Flexible Hybrid Electronics
Flexible hybrid electronics (HBE) is a rapidly developing research area. Based on the
application space for low power, compact devices suitable for near field coupling, FHE is
a natural area to apply RF near field coupling [97], [98]. For low power wearbles, RF near
field coupling can help develop FHE charging systems with better efficiency and coil size
than any other WPT method may offer.
The microstrip line loss in this thesis is not negligible. Depending on the design, over
5% loss could be observed just from the contribution of the microstrip line loss. An obvious
improvement to the demonstrated system would be to design for high quality RF substrate
rather than use FR4. While this dissertation used off the shelf components for the rectifier
and regulator chip, Chapter 5 discussed the power inductor design for an integrated, 10
MHz buck converter. Specifically, smaller inductance was needed for this chip compared
to the LTC3564, and a fully integrated system on package RF near field coupling system
could integrate very high frequency buck converter, synchronous rectifier, and the designed
RF coils for a very compact receiver with minimal area. Such a demonstration could take
advantage of advanced substrates and multiple layers, the latter of particular interest to
further decreasing power inductor area.
7.1.4 Figure of Merit for Inductive WPT Systems
One challenge with comparing WPT systems is that different efficiencies are possible at
varying system parameters, making comparisons very difficult. For instance, refer back
159
to Table 6.2 to observe how the systems demonstrated in this dissertation are substan-
tially different in operating conditions from any RF near field coupling system previously
demonstrated. As such, comparisons are difficult when substantial difference in one sys-
tem parameter, such as load power, has huge implications on efficiency. In fact, the key
comparison in Table 6.4 is meant mainly to show that compared to the best inductive cou-
pling systems, this work offers a unique combination of high efficiency and small coil area
- not necessarily an improved system. These RFNFC systems operate at short transmission
distance, where higher efficiency is more easily achieved compared to the transmission
distances demonstrated in the other compared systems. However, this dissertation work
also operates at lower power and with much smaller coil area, making high efficiency more
challenging.
A figure of merit (FOM) to compare these systems would be of great utility. Vary-
ing system metrics, such as transmission distance, receiver coil area, load power, output
voltage, etc would be included to robustly compare inductive WPT systems of very differ-
ent operating conditions. The resultant FOM should show similar value/quality of work
between this dissertation and the best systems compared in Table 6.4, representing high
quality WPT implementations for a variety of application spaces. The development of this
FOM could draw from data in published literature and the efficiency relationships drawn
from the analysis in this dissertation.
7.1.5 Improved Efficiency Analysis
The demonstrated efficiency analysis has proven useful for guiding the design of RFNFC
systems and for capturing many of the peculiarities of RFNFC systems. However, two
major improvements would be useful for more consistent, precise analysis. First, under-
standing the complex interaction of the half wave rectifier with WPT systems, and any
resulting changes in the efficiency analysis, needs to be completed. While the introduction
of Lhalf as a modeling term is useful for predicting the shift in resonant frequency, how
160
this effects the calculation of the coil and source efficiency specifically is unknown.
Second, several of the measurements, specifically the measurement of the PDU input
voltage, point towards pecularities in the chosen PDU (LTC3564) that are not sufficiently
captured by the efficiency analysis. Understanding the exact relationship of Vin,P DU and
Rin,P DU under various loading conditions is needed for more accurate system efficiency
prediction, though the used modeling does provide a general approach that has good accu-
racy in the majority of cases, with sufficient accuracy for basing coil design on.
7.1.6 Multi-power Charging Platform
One area of interest, especially for the IoT, is how to charge devices with varying power
requirements. One of the largest problems is providing enough power to charge high power
devices, like a laptop, without overloading a lower power device being charged at the same
time. RF near field coupling can provide a simple solution for this. Higher power, larger
area, higher efficiency coils could be used to charge higher power devices at a frequency
such as 13.56 MHz (such as previously demonstrated). Meanwhile, the charging platform
can be configured to concurrently charge low power devices using RF near field coupling.
Setup this way, a low power, compact device could be concurrently charged with high
efficiency, without fear of being overloaded by the 13.56 MHz higher power source as the
RF receiver coil is configured for much, much higher frequency. And because of the very
different coil areas, integrating the different frequency charging coils in the same platform
would also pose little issue.
7.2 Key Accomplishments
The main objective for this dissertation was completed: demonstrate that RF near field
coupling offers a superior combination of coil area and efficiency for milliwatt-scale load
power over other methods of WPT, while also demonstrating an integrated solution with
embedded inductor and regulated output. In order to accomplish this, several research
161
contributions were accomplished, listed as follows with some key findings and conclusions
in this dissertation for each contribution in what serves as a summary of the preceding:
• Novel efficiency modeling approach specific to RF near field coupling that deter-
mines not only system efficiency, but distribution of losses in the system. The mod-
eling approach was validated with several measurements
– Power losses specific to low power, RF system were categorized
– The subsystem design tradeoffs were explored as a result of the analysis
– The analysis determines the input voltage of the PDU, for a controlled power
source system, by enforcing power matching at the input of the PDU and the
output of the rectifier
– Calculated efficiency analysis demonstrates improved accuracy over simulation

based techniques, though error occurs when assuming no matching loss over a
wide range of load resistance
• System architecture and design process for efficient RF near field coupling system,
specifically identifying how the design approach differs from conventional inductive
magnetic resonance coupling design
– System architecture developed for continuous/discontinuous power demand
– The design approach considers factors such as the transmit inductance, source
efficiency, and complex relationship of load resistance to system efficiency not
as significant in other WPT systems
– Half-wave rectifiers yield optimal efficiency in a RFNFC, low power system
• Demonstration of a reverse power distribution network with measurement validation,

as a key component for linking RF-DC conversion with a PDU.
– Established target impedance from both the PDU and rectifier perspective
162
– Identified phase as an important consideration in reverse PDN design
– Developed design rules for integrating large storage capacitance in RFNFC sys-
tem with the reverse PDN
• Identification and modeling of dynamic electromagnetic effects in RF near field cou-

pling systems to pick the right component values in the circuit, especially the sec-
ondary resonant capacitor.
– Half wave rectifiers interact with the RF coil resonant network differently than
bridge rectifiers, leading to a downshift in frequency
– Developed a process for selecting component values via the aid of simulators
such as ADS, rather than relying on conventional equations
• Demonstration of cheap, simple packaging technology for integrating an embedded

inductor with magnetic core into RFNFC receiver.
– Completed design and characterization of embedded inductor for an integrated

buck converter
– Developed a revised inductor loss analysis for DCM buck regulator
– Demonstrated integrated inductor with COTS buck regulator showing improved

PDU efficiency compared to similar SMT inductor
• Meeting main dissertation objective of achieving very high efficiency with very small
coil area in a RFNFC system in a reliable, integrated solution
– All full systems demonstrated superior efficiency to all other RFNFC systems
– Demonstrated systems demonstrate improved combination of efficiency and

coil area compared to resonant coupling system at any frequency, at the ex-
pense of transmission distance
163
– Discussion and identification of the application space the developed RFNFC
systems are advantageous compared to other low power WPT architectures
7.3 Conclusion and Summary
This dissertation discussed the advantages and limitations of RF near field coupling. This
dissertation identified low power applications as a particularly suitable area to apply RF
near field coupling. The body of this dissertation focused on the efficiency analysis, de-
sign process, integration and modeling challenges, packaging technology integration, and
measurement demonstration of RF near field coupling systems with the best combination of
system efficiency and coil area ever demonstrated in literature. Along the way, novel design
approaches, new analysis techniques and equations, and innovative solutions to integration
challenges were developed to meet the dissertation objectives.
When this research began, I had a very metric based validation of the work. If high
efficiency was achieved, then the research must be good. In fact, these metrics were met
months before the completion of this dissertation. But as this research matured, the contri-
butions of this dissertation became less about the numbers and the comparison to state of
art (while still important), and more about demonstrating the advantages and disadvantages
of RF near field coupling and presenting solutions to challenges no one else had solved
as no one else had previously demonstrated very high efficiency and very small coil area
for RF WPT. I will not state that RF near field coupling is the ’best’ WPT method, as the
transmission distance is very limited, there is a maximum power limitation, and the the-
oretical best efficiency cannot match that of lower frequency systems. Nor will I claim
that this dissertation represents the ’best’ WPT work, because again that is viewing this
dissertation incorrectly. What I can confidently state, and hopefully have demonstrated, is
that there is a real application space for the high efficiency RF near field coupling systems
demonstrated in this dissertation, and that this dissertation is a good resource for under-
standing the various challenges and design procedures specific to integrated solutions for
164
RF near field coupling. There is still more interesting work that can be done in the area
of integrated RF near field coupling to increase efficiency, decrease area, and integrate
more packaging technologies. Flexible hybrid electronics and system on package imple-
mentations can build on this work to make more practical systems for real applications. I
sincerely hope this dissertation helps others utilize RF near field coupling for innovative
and cutting edge applications. To move towards that end, I fully believe this dissertation
offers a guide for anyone looking to explore and learn about high efficiency RF near field
coupling, and ultimately this is the body of knowledge that I have added to the field of
electrical engineering.
7.4 Publications
• Journals
– C. Pardue, M. Bellaredj, A. K. Davis, M. Swaminathan, P. Kohl, T. Fujii, S.

Nakazawa, ”Design and Characterization of Inductors for Self-Powered IoT
Edge Devices” in IEEE Transactions on Components, Packaging and Manu-
facturing Technology, 2018.
– M.L.F. Bellaredj, C. Pardue, P. Kohl, M. Swaminathan, ”Fabrication of pack-

age embedded spiral inductors with two magnetic layers for flexible SIP point
of load converters in Internet of Everything devices,”in Microelectronic Engi-
neering, 189, 2017.
– C. Pardue, H. Torun, M. Bellaredj, M. Swaminathan, ”RF Near Field Coupling

System using Reverse PDN and Considering Electromagnetic Effects” in IEEE
Trans. on Electromagnetic Compatibility, accepted (April 2018).
– C. Pardue, A. K. Davis, M. Bellaredj, M. F. Amir, M. Swaminathan, S. Mukhopad-

hyay, ”Reverse Power Delivery Network for Wireless Power Transfer” in IEEE
Microwave and Wireless Components Letters, accepted (May 2018).
165
– C. Pardue, M. Bellaredj, H. Torun, M. Swaminathan, P. Kohl, A. K. Davis,
”RF Wireless Power Transfer using Integrated Inductor” in IEEE Transactions
on Components, Packaging and Manufacturing Technology, submitted (April
2018).
– C. Pardue, et al, ”System Level Modeling and Design for Regulated RF Near
Field Coupling for IoT Applications” in IEEE Internet of Things Journal, (in
progress).
• Conferences
– C. Pardue, K. Naishadham, X. Song and M. Swaminathan, ”Integration of car-

bon nanotube films with SRRs for air quality sensing applications,” WAMICON
2014, Tampa, FL, 2014, pp. 1-3.
– C. Pardue, M. Swaminathan and J. B. Balaguru, ”Lossy frequency selective

surfaces for gas sensing using ZnO films,” Proceedings of the 2015 IEEE/ACM
International Symposium on Nanoscale Architectures (NANOARCH15), Boston,
MA, 2015, pp. 19-20.
– C. Pardue, M. F. Bellaredj, A. K. Davis and M. Swaminathan, ”Miniaturization

of Planar Packaged Inductor Using NiZn and Low Cost Screen Printing Tech-
nique,” 2017 IEEE 67th Electronic Components and Technology Conference
(ECTC), Orlando, FL, 2017, pp. 2275-2281.
– C. Pardue, A. K. Davis, M. L. F. Bellaredj, and M. Swaminathan, ”Wireless

Power Transfer Integrated Board for Low Power IoT Applications”, 2017 IEEE
Conf. Technol. for Sustainable Technology (SusTech), Phoenix, AZ, 2017.
– H. M. Torun, C. Pardue, et al, ”Machine Learning Driven Advanced Packag-

ing and System Miniaturization of IoT for Wireless Power Transfer Solutions,”
2018 IEEE 68th Electronic Components and Technology Conference (ECTC),
2018 accepted.
166
– C. Pardue, A. K. Davis, M. Bellaredj, M. Swaminathan, ”Reverse Power Dis-
tribution Network and Phase Considerations for Low Power RF Near Field
Coupling in IoT Applications” at 2018 IEEE Symposium on Electromagnetic
Compatibility, Signal and Power Integrity (EMC+SIPI), Long Beach, CA, 2018
(accepted).
– C. Pardue, H. Torun, M. Bellaredj, M. Swaminathan, ”System Level Efficiency

Analysis for Regulated RF Near Field Coupling”, at 2018 Wireless Power Trans-
fer Conference (WPTC), Montreal, CA, 2018 (accepted).
167
Appendices
168
APPENDIX A
LITERATURE SURVEY COMPARISONS
A.1 Comparison of Inductive WPT Systems
A.2 Comparison of Frequency vs Coil Size
169
Table A.1: Complete Resonant Inductive Coupling Systems in Prior Literature
Transmission Transmission
Reference Load Power Receive Coil Area Efficiency Regulated Output
Frequency Distance
2
[23] 305 kHz 7.6 W 55 mm 122.7 cm 76% Y
[24] 22 kHz 0.753 W 30 mm 19.6 cm2 88.1% N
[25] 986 MHz 1 mW* 5 mm 2.25 mm2 7% Y
[26] 50 kHz 4.2 µW 85 mm 41 mm2 0.1% Y
[27] 13.56 MHz 40 W 150 mm 804.2 cm2 70% Y
[28] 137 kHz 534 W 20 mm 200 cm2 92% N
[29] 100 kHz 6W 200 mm 1576 cm2 96% Y
[30] 100 MHz 151 mW 140 µm 0.017 mm2 15.1% Y
[31] 13.56 MHz 24 mW 15 mm 1256.6 cm2 49% N
[32] 6.78 MHz 2W 30 mm 2400 mm2 72% Y
[33] 107 MHz 856 mW 3 mm 100 mm 2 44% N
[34] 100 kHz 10 W 100 mm 400 cm2 72% Y
[35] 13.56 MHz 60 mW 3 mm 70.9 mm2 50% Y
[36] 13.56 MHz 8W 30 mm 100 cm2 84% N
[37] 134 kHz 295 W 10 mm 169 cm2 76% N
[38] 6.78 MHz 600 mW 5 mm 201 mm2 42.1% Y
[39] 6.78 MHz 10 W 5 mm 14.5 cm2 80% N
[40] 6.78 MHz 5W 30 mm 1600 mm2 51% Y
[41] 90 kHz 3300 W 200 mm 3600 cm2 96.6% N
[42] 435 kHz 3500 W 150 mm 314 cm2 82.1% Y
[43] 5 MHz 5W 300 mm 707 cm2 65.9% N
[44] 1 MHz 4.5 W 100 mm 187 cm2 76.3% N
[45] 1 MHz 8W 50 mm 79 cm2 70% Y
[46] 22 kHz 6600 W 162 mm 3795 cm2 94.4% N
[47] 1 GHz 12 mW 30 µm 0.04 mm2 14% N
[48] 46.7 kHz 420 W 200 mm 177 cm2 90% N
[49] 1 MHz 2W 200 mm 707 cm2 73.6% Y
[50] 250 kHz 1500 W 80 mm 707 cm2 95.6% Y
[51] 500 kHz 100 W 10 mm 71 cm2 88% N
[52] 100 kHz 4.5 W 20 mm 573 mm2 65% Y
[53] 230 MHz 12 mW 50 µm 0.25 mm2 13% N
170
Table A.2: Resonant Inductive Coupling Coils in Literature
Transmission
Reference Frequency Load Power Coil Area Efficiency Rectifier
Distance
2
[23] 305 kHz 7.6 W 55 mm 122.7 cm 76% Y
[22] 85 kHz 560 W 100 mm 1600 cm2 90% Y
[24] 22 kHz 0.753 W 30 mm 19.6 cm2 88.1% Y
[25] 986 MHz 1 mW* 5 mm 2.25 mm2 7% Y
[26] 50 kHz 4.2 µW 85 mm 41 mm2 0.1% Y
[27] 13.56 MHz 40 W 150 mm 804.2 cm2 70% Y
[28] 137 kHz 534 W 20 mm 200 cm2 92% Y
[29] 100 kHz 6W 200 mm 1576 cm2 96% Y
[30] 100 MHz 151 mW 140 µm 0.017 mm2 15.1% Y
[55] 13.56 MHz 5W 50 mm 176 cm2 90% N
[31] 13.56 MHz 24 mW 15 mm 1256.6 mm2 49% Y
[32] 6.78 MHz 2W 30 mm 2400 mm2 72% Y
[33] 107 MHz 856 mW 3 mm 100 mm 2 44% Y
[34] 100 kHz 10 W 100 mm 400 cm2 72% Y
[56] 4.7 GHz 0.1 µW 1.2 mm 0.01 mm2 1% N
[57] 6.78 MHz 6W N/A 899 mm2 49% Y
[35] 13.56 MHz 60 mW 3 mm 70.9 mm2 50% Y
[36] 13.56 MHz 8W 30 mm 100 cm2 84% Y
[37] 134 kHz 295 W 10 mm 169 cm2 76% Y
[38] 6.78 MHz 600 mW 5 mm 201 mm2 42.1% Y
[39] 6.78 MHz 10 W 5 mm 14.5 cm2 80% Y
[53] 300 kHz 40 mW 500 mm 12.6 cm2 1.5% N
[59] 60 MHz 1.3 mW 16 mm 1.13 mm2 2.4% N
[40] 6.78 MHz 5W 30 mm 1600 mm2 51% Y
[41] 90 kHz 3300 W 200 mm 3600 cm2 96.6% Y
[42] 435 kHz 3500 W 150 mm 314 cm2 82.1% Y
[43] 5 MHz 5W 300 mm 707 cm2 65.9% Y
[44] 1 MHz 4.5 W 100 mm 187 cm2 76.3% Y
[45] 1 MHz 8W 50 mm 79 cm2 70% Y
[54] 5.8 GHz 10 µW 1 mm 0.01 mm2 1% N
[46] 22 kHz 6600 W 162 mm 3795 cm2 94.4% Y
[47] 1 GHz 12 mW 30 µm 0.04 mm2 14% Y
[60] 700 kHz 100 mW 20 mm 380 mm2 82% N
[48] 46.7 kHz 420 W 200 mm 177 cm2 90% Y
[49] 1 MHz 2W 200 mm 707 cm2 73.6% Y
[61] 100 MHz N/A 140 µm 2.25 mm2 34% Y
[50] 250 kHz 1500 W 80 mm 707 cm2 95.6% Y
[62] 20 kHz 5000 W 150 mm 1920 cm2 90% N
[63] 160 MHz 2 mW 10 mm 4.36 mm 2 1% N
[64] 460 MHz 10 µW* 200 mm 100 mm2 0.6% N
[51] 500 kHz 100 W 10 mm 71 cm2 88% Y
[52] 100 kHz 4.5 W 20 mm 573 mm2 65% Y
[53] 230 MHz 12 mW 50 µm 0.25 mm2 13% Y
171
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WIRELESS POWER TRANSFER USING INTEGRATED AND EMERGING

Georgia Institute of Technology

Dr. Madhavan Swaminathan

List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xiii

1.2 Survey of Wireless Power Transfer Techniques . . . . . . . . . . . . . . . . 2

1.3 Effect of Frequency on Resonant Inductive Coupling . . . . . . . . . . . . 8

1.4 Integrated Wireless Power Transfer Solutions . . . . . . . . . . . . . . . . 11

1.5 Dissertation Contributions . . . . . . . . . . . . . . . . . . . . . . . . . . 14

1.6 Dissertation Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Chapter 2: RF Near Field Coupling Architecture and Efficiency Analysis . . . . 17

2.2 RF WPT System Architecture . . . . . . . . . . . . . . . . . . . . . . . . . 17

2.3 Power Loss Modeling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

2.3.1 RFNFC and Coil and Source Efficiency . . . . . . . . . . . . . . . 23

2.3.2 RF-DC Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Chapter 3: Subsystem Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

3.2 Design Identification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

3.3 Coil Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

3.3.1 Selection of Coil Geometry . . . . . . . . . . . . . . . . . . . . . . 41

3.3.2 Coil Parameter Modeling . . . . . . . . . . . . . . . . . . . . . . . 42

3.3.3 Coil Design and Efficiency . . . . . . . . . . . . . . . . . . . . . . 46

3.3.4 Effect of Misalignment . . . . . . . . . . . . . . . . . . . . . . . . 53

3.4 Rectifier Topology and Diode Selection . . . . . . . . . . . . . . . . . . . 55

3.4.1 Diode Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

3.4.2 Rectifier Topology . . . . . . . . . . . . . . . . . . . . . . . . . . 57

3.5 Coil + Rectifier Experimental Work . . . . . . . . . . . . . . . . . . . . . 58

3.5.1 Bridge vs Half Wave Rectifier . . . . . . . . . . . . . . . . . . . . 59

3.5.2 Rectifier Efficiency with Increasing Input Power . . . . . . . . . . . 59

3.5.3 Rectifier Efficiency with Increasing Resistance . . . . . . . . . . . 60

3.5.4 Different Frequencies . . . . . . . . . . . . . . . . . . . . . . . . . 61

3.5.5 Different Transmission Distance . . . . . . . . . . . . . . . . . . . 62

3.6 4 Coil Circuit Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

3.7 PDU Selection and Circuit Design . . . . . . . . . . . . . . . . . . . . . . 65

4.2 Component Value Selection for RF Inductive WPT . . . . . . . . . . . . . 68

4.2.1 Purpose of External Components . . . . . . . . . . . . . . . . . . . 68

4.2.2 Parasitic Capacitance Adjustment . . . . . . . . . . . . . . . . . . 69

4.2.3 Significance of Microstrip Lines . . . . . . . . . . . . . . . . . . . 70

4.2.4 The Dynamic Behavior of Half Wave Rectifiers in RF Near Field

4.2.5 Component Selection Process . . . . . . . . . . . . . . . . . . . . 77

4.3 Reverse Power Distribution Network . . . . . . . . . . . . . . . . . . . . . 80

4.3.1 Reverse PDN for Continuous Power Demand . . . . . . . . . . . . 80

4.3.2 Reverse PDN for Discontinuous Power Demand . . . . . . . . . . . 92

Chapter 5: Integrated Inductor for Light Load Applications . . . . . . . . . . . 97

5.1 Package Embedded Inductor for 10 MHz Integrated Buck Converter . . . . 98

5.1.1 System Architecture and Loss Analysis . . . . . . . . . . . . . . . 98

5.1.2 Integrated Inductor Design . . . . . . . . . . . . . . . . . . . . . . 99

5.1.3 Spiral Inductor Design and Modeling . . . . . . . . . . . . . . . . 103

5.1.4 Package Embedded Inductor Fabrication . . . . . . . . . . . . . . . 106

5.1.5 Inductor Measurement and Discussion . . . . . . . . . . . . . . . . 108

5.1.6 Inductor Comparison . . . . . . . . . . . . . . . . . . . . . . . . . 112

5.2 Integrated Inductor for TPS62615 at Light Load Discontinuous Conduction

5.2.2 Harmonics of DCM Inductor Current . . . . . . . . . . . . . . . . 115

5.2.3 DCM Inductor Loss Analysis . . . . . . . . . . . . . . . . . . . . . 115

5.2.4 Integrated Inductor Design . . . . . . . . . . . . . . . . . . . . . . 118

5.2.5 Integrated Inductor and SMT Inductor Comparison . . . . . . . . . 120

5.2.6 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . 124

5.3 Inductor Comparison with State of the Art . . . . . . . . . . . . . . . . . . 126

5.4 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128

Chapter 6: Complete System Measurements . . . . . . . . . . . . . . . . . . . . 129