5 4 3 2 1

D
UP-CRST02 Rev.A0.2_0_0 TABLE OF CONTENTS D

SHEET NUMBER SHEET NAME

01 Index

02 System Block Diagram

03 EXHAT-100

04 USB TO UART

C 05 UART TO RS-232/422/485 C

06 MAX10

07 EEPROM & LED

08 DC IN TO 5V

09 3V/1.8V/1.2V Voltage Regulator

10 Mechanical Component
B
11 History B

A A

Title
Index
Size Document Number Rev:
B UP-CRST02 A0.2_0_0
Date: Monday, October 30, 2017 Sheet: 1 of 11
5 4 3 2 1
 5 4 3 2 1

UP-CRST02 Rev.A0.2_0_0
D D

EXHAT 100
USB 2.0
USB TO UART F81438G RS232/422/485
UART DB9 Port
CP2102-GM RS232/422/485
I2C
PCA9574

DIR
3xI2C,SPI
UART,GPIO 30 pin wafer
C C
MAX 10 FPGA box header
Ctrl/Progarm Lecel Shif t er

I2C
EEPROM
20 pin wafer
box header
5V

B
EXHAT 100 B

PCIe BUS
EHAT_USB 2.0
HSIC
I2C
12V~24V 5V 5V 3.3V
DC IN TPS53219ARGTR MOSFET MP8762GLE-Z 3xI2C,SPI
UART,GPIO
SWITCH
Ctrl/Progarm
EXHAT 5V 5V OUTPUT 5V
5V
A
5V A

Title
System Block Diagram
Size Document Number Rev:
Custom UP-CRST02 A0.2_0_0
Date: Monday, October 30, 2017 Sheet: 2 of 11
5 4 3 2 1
 5 4 3 2 1

+V5P0_HAT +V5P0_HAT +V5P0_HAT +V5P0_HAT

EXHAT1 CN1
1 2 1 2
3 4 3 4
5 6 5 6
7 8 7 8
9 10 9 10
PLTRST_BUF_3P3_N 11 12 PLTRST_BUF_3P3_N 11 12 UART1_RTS
D PMU_PWRBTN_3P3_N 13 14 UART1_RTS 6 PMU_PWRBTN_3P3_N 13 14 UART1_CTS D
UART1_CTS 6 PMU_SLP_S0IX_N_3P3 UART1_TXD
15 16 15 16
7 PMU_SLP_S0IX_N_3P3 PCIE_CLKREQ0 UART1_TXD 6 PCIE_CLKREQ0 UART1_RXD
17 18 17 18
PMC_SUSCLK0 19 20 UART1_RXD 6 PMC_SUSCLK0 19 20
21 22 DDI2_DDC_CLK 21 22 DDI2_DDC_CLK
23 24 DDI2_DDC_DAT TP1 SPI2_MOSI 23 24 DDI2_DDC_DAT
6 SPI2_MOSI HDMI_CEC_D TP2 SPI2_MISO HDMI_CEC_D
6 SPI2_MISO 25 26 25 26
HDMI_CEC_D 6 SPI2_CLK HDMI_CEC_R
6 SPI2_CLK 27 28 27 28
29 30 HDMI_CEC_R 6 SPI2_CS0 29 30
6 SPI2_CS0 TP4 SPI2_CS1 ISH_GPIO0
6 SPI2_CS1 31 32 31 32
33 34 ISH_GPIO0 6 33 34 CPLD CLEAR/ISH_GPIO1
CPLD CLEAR/ISH_GPIO1 6 ISH_GPIO2
35 36 35 36
ISH_GPIO2 6 ISH_GPIO3
37 38 37 38
39 40 ISH_GPIO3 6 39 40 ISH_GPIO4
ISH_GPIO4 6 CPLD DIN/ISH_GPIO7
41 42 41 42
43 44 CPLD DIN/ISH_GPIO7 6 43 44 ISH_GPIO9
ISH_GPIO9 6 LPE_I2S2_CLK SOC_PWM0
45 46 45 46
6 LPE_I2S2_CLK SOC_PWM0 6 LPE_I2S2_FRM SOC_PWM1
47 48 47 48
6 LPE_I2S2_FRM 49 50 SOC_PWM1 6 LPE_I2S2_RX 49 50
6 LPE_I2S2_RX USB_HSIC_1_DATA LPE_I2S2_TX USB_HSIC_1_DATA
51 52 51 52
6 LPE_I2S2_TX 53 54 USB_HSIC_1_STROBE 53 54 USB_HSIC_1_STROBE
PCIE_TX0_DP 55 56 PCIE_TX0_DP 55 56
PCIE_TX0_DN 57 58 USB_HSIC_2_DATA PCIE_TX0_DN 57 58 USB_HSIC_2_DATA
59 60 USB_HSIC_2_STROBE TP5 59 60 USB_HSIC_2_STROBE
C PCIE_RX0_DP TP6 PCIE_RX0_DP C
61 62 61 62
PCIE_RX0_DN 63 64 USB2_P0_DP PCIE_RX0_DN 63 64
USB2_P0_DN USB2_P0_DP 4
65 66 65 66
PCIE_REFCLK0_DP USB2_P0_DN 4 PCIE_REFCLK0_DP
67 68 67 68
PCIE_REFCLK0_DN 69 70 USB_OTG_R_ID PCIE_REFCLK0_DN 69 70 USB_OTG_R_ID
TP9
71 72 71 72
73 74 SD3_CD I2C0_SOC_SDA 73 74 SD3_CD
6,7 I2C0_SOC_SDA SD3_CMD TP10 I2C0_SOC_SCL SD3_CMD
75 76 75 76
6,7 I2C0_SOC_SCL SD3_1P8_EN SD3_1P8_EN
77 78 77 78
79 80 SD3_PWREN TP11 I2C1_SOC_SDA 79 80 SD3_PWREN
6 I2C1_SOC_SDA SD3_WP TP12 I2C1_SOC_SCL SD3_WP
81 82 81 82
6 I2C1_SOC_SCL 83 84 SD3_CLK TP13 83 84 SD3_CLK
85 86 SD3_SD0 ISH_I2C1_DATA 85 86 SD3_SD0
6 ISH_I2C1_DATA SD3_SD1 CPLD DOUT/ISH_I2C1_CLK SD3_SD1
6 CPLD DOUT/ISH_I2C1_CLK 87 88 87 88
89 90 SD3_SD2 89 90 SD3_SD2
91 92 SD3_SD3 91 92 SD3_SD3
93 94 93 94
95 96 R231 0-04 95 96 R232 0-04
CPLD_OE 3,6 CPLD_OE 3,6
97 98 R233 0-04 97 98 R234 0-04
99 100 CPLD_RST 3,6 99 100 CPLD_RST 3,6
R235 0-04 R236 0-04
CPLD_STROBE 3,6 CPLD_STROBE 3,6
100P AXK5S00347YG 100P AXK6S00647YG

B B

+V5P0_HAT

C3 C4 C5 C6
1uF/25VX-04 0.1uF/25VX-04 1uF/25VX-04 0.1uF/25VX-04

A A

Title
EXHAT-100
Size Document Number Rev:
B UP-CRST02 A0.2_0_0
Date: Monday, October 30, 2017 Sheet: 3 of 11
5 4 3 2 1
 5 4 3 2 1

UART_P5V

USB2_UR_DP_L R267 10K-04 M1-1 R268 X/0-04

USB TO UART USB2_UR_DN_L R269 10K-04 M2-1 R270 X/0-04
F81438G1_MODE1
F81438G1_MODE2
5
5

D D
+V5P0_HAT UART_P5V UART_P3V
FB7
220@100MHz 800mA C189 0.1uF/25VX-04 C190 0.1uF/25VX-04
0402 C191 1uF/10VX-04
R271 12K-1-04 R272 0-06

C192 C193
4.7uF/6.3VX-04 0.1uF/25VX-04

48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
U25

NC26
NC25
NC24
NC23
NC22
NC21
NC20
NC19
NC18
3.3VCC_2
DP

NC17
DM
AGND
AVCC
REXT
49
50 NC27 32
51 NC28 NC16 31
52 RI2# NC15 30
C C
53 CTS2# NC14 29
54 DTR2# NC13 28
55 RTS2# NC12 27 UART_XTAL1
56 DSR2# XTAL_IN 26 UART_XTAL2
57 DCD2# XTAL_OUT 25
58 5VCC GND 24 UR_1P8 C194 1uF/10VX-04 R273 1M-04
59 NC29 1.8VCC 23 C195 0.1uF/25VX-04
60 NC30 3.3VCC_1 22 Y1
61 MODE0_2 NC11 21 1 2
62 MODE1_2 NC10 20 UART_P3V 4 3
63 MODE2_2 NC9 19
SOU2 NC8
MODE0/SD_1

64 18
SIN2 NC7 17
MODE1-1

MODE2-1 NC6 C196 C197

SOUT1

DCD1#

DSR1#
DTR1#
RTS1#

CTS1#
10pF/50V-04 10pF/50V-04
SIN1

RI1#
NC1
NC2

NC3

NC4
NC5
B B
F81532U 12MHz.CL:18pF.20PPM 4P
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
M1-1
M2-1 UART_UDSR
UART_UCTS UART_UDSR 5
UART_UDTR UART_UCTS 5
UART_URI UART_UDTR 5
UART_URTS UART_URI 5
CH1
USB2_UR_DN_L
UART_UDCDN UART_URTS 5
UART_UDCDN 5
UART1
1 4
3 USB2_P0_DN USB2_UR_DP_L UART_UTXD
2 3
3 USB2_P0_DP UART_URXD UART_UTXD 5
UART_URXD 5
90ohm/MCZ1210AH900TA0G

A Title A

USB TO UART
Size Document Number Rev:
A UP-CRST02 A0.2_0_0
Date: Monday, October 30, 2017 Sheet: 4 of 11
5 4 3 2 1
 5 4 3 2 1

+V3P3A

R81 R82 R83

X/100K-1-04 X/100K-1-04 X/100K-1-04 +V5P0_HAT
UART_UDTR
UART_UTXD
D UART_URTS UART_URXD R84 X/4.7K-1-04 D

COM1
DCDA 1
+V5P0_HAT RXA 2
TXA 3
DTRA 4
5
DSRA 6
C60 C61 RTSA 7
1uF/10VX-04 0.1uF/25VX-04 CTSA 8
+V5P0_HAT +V5P0_HAT RIA 9 11
10 12

5
JP1(3-5)1 U7
27S1001-0PS35-01G-R X/10P 1204-700-10SMR

VCC
R85 R86 UART_UDCDN 22 3 DCDA
4 UART_UDCDN UART_URXD 21 R5_OUT R5_IN 4
10K-04 10K-04 RXA
4 UART_URXD UART_UTXD R4_OUT R4_IN
JP1 28 17 TXA
1 2 F81438G_MODE1 Selection 4 UART_UTXD UART_UDTR 27 T2_IN T2_OUT 18 DTRA CN6
F81438G1_MODE1 F81438G1_MODE2 4 UART_UDTR UART_URI T3_IN T3_OUT
3 4 26 6 RIA
5 6 1-3 1 4 UART_URI
UART1-DE 1 R1_OUT R1_IN 7 RTSA
R87 0-04
4 UART_URTS T1_IN T1_OUT
R0402 UART_UDSR 19 15 DSRA 5
C
3*2P 222-97-03GBE1
3-5 0 Default 4 UART_UDSR UART_UCTS 20 R2_OUT R2_IN 16 CTSA RIA 9
C
4 UART_UCTS R3_OUT R3_IN 4
R88 R89 DTRA
10K-04 10K-04 CTSA 8
F81438G1_SLEW
F81438G TXA 3
25 RTSA 7
JP1(2-4)1 SLEW RXA 2
F81438G1_MODE1 2 9 DSRA 6
F81438G1_SD F81438G1_MODE2 23 MODE_1 C1+ DCDA 1
F81438G1_SD 24 MODE_2 C62
SD 12 0.1uF/25VX-04
F81438G_MODE2 Selection C1-
R90 11
Default C2+
10K-04 2-4 1 9P DB6A-09-AMGN1-R

H1
H2
C63

GND
4-6 0 13 0.1uF/25VX-04

V+

V-
C2-
F81438G

10

14

8
C64 C65
4 F81438G1_MODE1
0.1uF/25VX-04 0.1uF/25VX-04
4 F81438G1_MODE2
+V5P0_HAT +V5P0_HAT
B B
VA0.2 Add
R91 R92
49.9K-1-06 49.9K-1-06

RXA TXA

R94 R95
X/120-08 X/120-08

DCDA DTRA
+V5P0_HAT

R93 4.7K-1-04 R97 R98

49.9K-1-06 49.9K-1-06
R96 X/4.7K-1-04 F81438G1_SLEW
+V3P3A

RS422/RS485 Terminator
Biasing Resistors Are Reserved
U8 C66
A 1 5 X/0.1uF/25VX-04 A
UART_UTXD 2 NC VCC
3 A 4 R274 X/0-04 R0402 UART1-DE
GND Y
Title
X/SN74AHC1G14DBVR
TO ALLOW POWER-UP IN LISTEN MODE. UART TO RS-232/422/485-1
Default Size Document Number Rev:
R100 X/0-04 R0402
B UP-CRST02 A0.2_0_0
Date: Monday, October 30, 2017 Sheet: 5 of 11
5 4 3 2 1
 5 4 3 2 1

+V1P8A
+V3P3A
U20B U20F U20G
R248 D1 F12 C10
IO_1A_D1/DIFFIO_RX_L1N 3 CPLD DIN/ISH_GPIO7 IO_6_F12/DIFFIO_RX_R14P IO_8_C10/DIFFIO_RX_T1P
C185 200K-1-04 C1 E12 A8
IO_1A_C1/DIFFIO_RX_L2N IO_6_E12/DIFFIO_RX_R14N 3 LPE_I2S2_TX VLS_en1 IO_8_A8/DIFFIO_RX_T2P
0.1uF/25VX-04 C2 C13 C9
IO_1A_C2/DIFFIO_RX_L1P 3 UART1_RXD IO_6_C13 IO_8_C9/DIFFIO_RX_T1N
U23 B1 F8 A9
IO_1A_B1/DIFFIO_RX_L2P 3 CPLD CLEAR/ISH_GPIO1 IO_6_F8/DIFFIO_RX_R17P 3,7 I2C0_SOC_SDA VLS_en0 IO_8_A9/DIFFIO_RX_T2N
1 8 E3 B12 B10
GND EN IO_1A_E3/DIFFIO_RX_L3N 3 SPI2_CLK IO_6_B12/DIFFIO_RX_R18P IO_8_B10/DIFFIO_RX_T3P
2 7 R249 X/200K-1-04 VLS_en0 F1 E9 A10
I2C0_SOC_SCL VREF1 VREF2 IO_1A_F1/DIFFIO_RX_L4N 3 ISH_GPIO3 IO_6_E9/DIFFIO_RX_R17N 3,7 I2C0_SOC_SCL IO_8_A10/DIFFIO_RX_T4P
3 6 R250 200K-1-04 I2C_VLS_OE0 E4 B11 A11
I2C0_SOC_SDA SCL1 SCL2 GPIO/I2C0_SCL 6,7 IO_1A_E4/DIFFIO_RX_L3P 3 UART1_CTS IO_6_B11/DIFFIO_RX_R18N 3 ISH_I2C1_DATA IO_8_A11/DIFFIO_RX_T4N
4 5 E1 C12 E8
SDA1 SDA2 GPIO/I2C0_SDA 6,7 IO_1A_E1/DIFFIO_RX_L4P 3 ISH_GPIO0 IO_6_C12/DIFFIO_RX_R19P IO_8_E8/DIFFIO_RX_T5N
C186 B13 A7
3 SPI2_MISO IO_6_B13/DIFFIO_RX_R20P 3 LPE_I2S2_RX IO_8_A7/DIFFIO_RX_T6P
PCA9306DCUR 0.1uF/25VX-04 F4 C11 R254 0-04 A6
IO_1B_F4/DIFFIO_RX_L10N 3 SPI2_MOSI IO_6_C11/DIFFIO_RX_R19N 3,6 SOC_PWM1 IO_8_A6/DIFFIO_RX_T6N
G4 A12 B6
D IO_1B_G4/DIFFIO_RX_L10P 3 UART1_RTS IO_6_A12/DIFFIO_RX_R20N IO_8_B6/DIFFIO_RX_T7P D
H2 E10 A4
IO_1B_H2/DIFFIO_RX_L12N IO_6_E10/DIFFIO_RX_R21P 3 LPE_I2S2_FRM IO_8_A4/DIFFIO_RX_T8P
H3 D9 B5
IO_1B_H3/DIFFIO_RX_L12P 3 ISH_GPIO2 IO_6_D9/DIFFIO_RX_R21N IO_8_B5/DIFFIO_RX_T7N
D12 A3
+V1P8A 3 UART1_TXD IO_6_D12/DIFFIO_RX_R23P 3 SOC_PWM0 IO_8_A3/DIFFIO_RX_T8N
D11 E6
3 SPI2_CS1 IO_6_D11/DIFFIO_RX_R23N IO_8_E6/DIFFIO_RX_T9P
B3
+V3P3A B4 IO_8_B3/DIFFIO_RX_T10P
I2C1_SOC_SDA A5 IO_8_B4/DIFFIO_RX_T10N
3 I2C1_SOC_SDA IO_8_A5
MAX10 10M02SC U169 R255 0-04 A2
R251 3,6 LPE_I2S2_CLK IO_8_A2/DIFFIO_RX_T13P
C187 VERSION : 1.1 B2
200K-1-04 IO_8_B2/DIFFIO_RX_T13N
0.1uF/25VX-04 PAGE : 2 of 11 10M04SCU169C8G MAX10 10M02SC U169
U24 DATE : JUN_ 2015 VERSION : 1.1
1 8 PAGE : 6 of 11
2 GND EN 7 R252 X/200K-1-04 VLS_en1
I2C1_SOC_SCL VREF1 VREF2 DATE : JUN_ 2015
3 6 R253 200K-1-04 I2C_VLS_OE1
I2C1_SOC_SDA SCL1 SCL2 GPIO/I2C1_SCL 6,7 CPU_prog_JTAG_TCK C145
4 5 10M04SCU169C8G 10pF/50V/04 MAX10 10M02SC U169
SDA1 SDA2 GPIO/I2C1_SDA 6,7 CPU_prog_JTAG_TDO C146
C188 10pF/50V/04 VERSION : 1.1
PCA9306DCUR CPU_prog_JTAG_TMS C147 10pF/50V/04 10M04SCU169C8G
0.1uF/25VX-04 CPU_prog_JTAG_TDI C148 PAGE : 7 of 11
10pF/50V/04 DATE : JUN_ 2015

U20D
L5 U20I
7 GPIO_3_L5 IO_3_L5/DIFFIO_TX_RX_B1N
U20E M4 enableJTAG E5
7 GPIO/I2S2_FRM IO_3_M4/DIFFIO_RX_B2N CPU_prog_JTAG_TMS IO_1B_E5/JTAGEN
K10 L4 G1
7 GPIO_5_K10 IO_5_K10/DIFFIO_RX_R1P 7 GPIO/PWM1_3_L4 IO_3_L4/DIFFIO_TX_RX_B1P CPU_prog_JTAG_TCK IO_1B_G1/TMS/DIFFIO_RX_L7N
K11 M5 G2
7 GPIO_5_K11 IO_5_K11/DIFFIO_RX_R2P 7 GPIO_3_M5 IO_3_M5/DIFFIO_RX_B2P CPU_prog_JTAG_TDI IO_1B_G2/TCK/DIFFIO_RX_L7P
J10 K5 F5
7 GPIO_5_J10 IO_5_J10/DIFFIO_RX_R1N 6,7 GPIO/I2C1_SDA IO_3_K5/DIFFIO_TX_RX_B3N CPU_prog_JTAG_TDO IO_1B_F5/TDI/DIFFIO_RX_L8N
L12 N4 F6
7 GPIO_5_L12 IO_5_L12/DIFFIO_RX_R2N 7 GPIO/UART1_TX IO_3_N4/DIFFIO_RX_B4N CPLD_RST IO_1B_F6/TDO/DIFFIO_RX_L8P
K12 J5 B9
7 GPIO_5_K12 IO_5_K12/DIFFIO_RX_R3P 6,7 GPIO/I2C1_SCL IO_3_J5/DIFFIO_TX_RX_B3P CPLD_OE IO_8_B9/DEV_CLRN/DIFFIO_RX_T3N
L13 N5 D8
7 GPIO_5_L13 IO_5_L13 7 GPIO/UART1_RX IO_3_N5/DIFFIO_RX_B4P CONFIG_SEL IO_8_D8/DEV_OE/DIFFIO_RX_T5P
J12 N6 D7
7 GPIO_5_J12 IO_5_J12/DIFFIO_RX_R3N 7 GPIO/I2S2_CLK I2C_VLS_OE0 IO_3_N6/DIFFIO_TX_RX_B5N FPGA_fw_reload IO_8_D7/CONFIG_SEL
J9 N7 E7
7 GPIO_5_J9 IO_5_J9/DIFFIO_RX_R4P IO_3_N7/DIFFIO_RX_B6N INPUT_ONLY_8_E7/NCONFIG
J13 M7 D6
7 GPIO_5_J13 IO_5_J13/DIFFIO_RX_R5P 7 GPIO/SPI2_CS0N I2C_VLS_OE1 IO_3_M7/DIFFIO_TX_RX_B5P IO_8_D6/CRC_ERROR/DIFFIO_RX_T9N
H10 N8 nSTATUS C4
7 GPIO_5_H10 IO_5_H10/DIFFIO_RX_R4N IO_3_N8/DIFFIO_RX_B6P CONF_DONE IO_8_C4/NSTATUS/DIFFIO_RX_T11P
H13 J6 C5
7 GPIO_5_H13 IO_5_H13/DIFFIO_RX_R5N 7 GPIO_3_J6 LED1_3V3 IO_3_J6/DIFFIO_TX_RX_B7N IO_8_C5/CONF_DONE/DIFFIO_RX_T11N
C H9 M8 C
7 GPIO_5_H9 IO_5_H9/DIFFIO_RX_R6P IO_3_M8/DIFFIO_RX_B8N
G13 K6
7 GPIO_5_G13 IO_5_G13/DIFFIO_RX_R7P 7 GPIO/SPI2_MOSI LED0_3V3 IO_3_K6/DIFFIO_TX_RX_B7P
H8 M9
7 GPIO_5_H8 IO_5_H8/DIFFIO_RX_R6N IO_3_M9/DIFFIO_RX_B8P
G12 J7
7 GPIO_5_G12 IO_5_G12/DIFFIO_RX_R7N 7 GPIO/SPI2_MISO IO_3_J7/DIFFIO_TX_RX_B9N
K7
7 GPIO/SPI2_CLK IO_3_K7/DIFFIO_TX_RX_B9P
N12 MAX10 10M02SC U169 10M04SCU169C8G
7 GPIO/PWM0 IO_3_N12
M13 VERSION : 1.1
7 GPIO/SPI2_CS1N IO_3_M13/DIFFIO_TX_RX_B10N
N10 PAGE : 9 of 11
M12 IO_3_N10/DIFFIO_RX_B11N
6,7 GPIO/I2C0_SCL LED2_3V3 IO_3_M12/DIFFIO_TX_RX_B10P DATE : JUN_ 2015
MAX10 10M02SC U169 N9
M11 IO_3_N9/DIFFIO_RX_B11P
VERSION : 1.1 3 HDMI_CEC_D
L11 IO_3_M11/DIFFIO_TX_RX_B12N U20C
PAGE : 5 of 11 7 GPIO/I2S2_DATAIN IO_3_L11/DIFFIO_TX_RX_B12P
DATE : JUN_ 2015 J8 M3
6,7 GPIO/I2C0_SDA IO_3_J8/DIFFIO_TX_RX_B14N IO_2_M3/PLL_L_CLKOUTN/DIFFIO_RX_L19N
K8 L3
7 GPIO_3_K8 IO_3_K8/DIFFIO_TX_RX_B14P IO_2_L3/PLL_L_CLKOUTP/DIFFIO_RX_L19P
10M04SCU169C8G M10
3 HDMI_CEC_R IO_3_M10/DIFFIO_TX_RX_B16N
L10 J1
7 GPIO/I2S2_DATAOUT IO_3_L10/DIFFIO_TX_RX_B16P IO_2_J1/DIFFIO_RX_L15N
J2
U20J M1 IO_2_J2/DIFFIO_RX_L15P
D2 M2 IO_2_M1/DIFFIO_RX_L17N
D3 NC__D2 L2 IO_2_M2/DIFFIO_RX_L17P
E2 NC__D3 K1 IO_2_L2
NC__E2 MAX10 10M02SC U169 K2 IO_2_K1/DIFFIO_RX_L20N
10M04SCU169C8G IO_2_K2/DIFFIO_RX_L20P
VERSION : 1.1
PAGE : 4 of 11
DATE : JUN_ 2015
MAX10 10M02SC U169
VERSION : 1.1
PAGE : 10 of 11 MAX10 10M02SC U169 10M04SCU169C8G
DATE : JUN_ 2015 10M04SCU169C8G +V1P8A VERSION : 1.1
PAGE : 3 of 11
DATE : JUN_ 2015
U20H
R256 X/0-04 G5
3,6 LPE_I2S2_CLK IO_2_G5/CLK0N/DIFFIO_RX_L14N +V1P8A
R257 X/0-04 H6 U20A U20K
3,6 SOC_PWM1 IO_2_H6/CLK0P/DIFFIO_RX_L14P
H5 +V1P8A
F2 N13
H4 IO_2_H5/CLK1N/DIFFIO_RX_L16N G3 VCCIO1__F2 N1 GND__N13 CONF_DONE R195 10K-04
N2 IO_2_H4/CLK1P/DIFFIO_RX_L16P R264 0-04 K3 VCCIO1__G3 M6 GND__N1
B
N3 IO_2_N2/DPCLK0/DIFFIO_RX_L18N R263 X/0-04 J3 VCCIO2__K3 L9 GND__M6 CONFIG_SEL R196 X/10K-04 B
G9 IO_2_N3/DPCLK1/DIFFIO_RX_L18P L8 VCCIO2__J3 J4 GND__L9 R197 10K-04
3 ISH_GPIO4 IO_6_G9/CLK2P/DIFFIO_RX_R10P VCCIO3__L8 GND__J4
G10 L7 H12
3 ISH_GPIO9 IO_6_G10/CLK2N/DIFFIO_RX_R10N VCCIO3__L7 GND__H12 FPGA_fw_reload
R258 X/0-04 F13 L6 G7 R198 10K-04
3,6 SOC_PWM1 IO_6_F13/CLK3P/DIFFIO_RX_R12P VCCIO3__L6 GND__G7
R259 X/0-04 E13 J11 F3
3,6 LPE_I2S2_CLK IO_6_E13/CLK3N/DIFFIO_RX_R12N VCCIO5__J11 GND__F3 CPLD_OE
F9 +V3P3A
H11 E11 R199 X/10K-04
3 CPLD DOUT/ISH_I2C1_CLK IO_6_F9/DPCLK3/DIFFIO_RX_R16P VCCIO5__H11 GND__E11 3 CPLD_OE
F10 G11 D5 R200 10K-04
3 CPLD_STROBE IO_6_F10/DPCLK2/DIFFIO_RX_R16N VCCIO6__G11 GND__D5
F11 C3
H1 C8 VCCIO6__F11 B8 GND__C3 CPLD_RST R201 X/10K-04
IO_1B_H1/VREFB1N0 VCCIO8__C8 GND__B8 3 CPLD_RST
L1 C7 A13 R202 10K-04
N11 IO_2_L1/VREFB2N0 C6 VCCIO8__C7 A1 GND__A13
7 GPIO_3_N11 IO_3_N11/VREFB3N0 +V1P8A VCCIO8__C6 GND__A1 BT_HOST_WAKE
K13 R203 X/10K-04
7 GPIO_5_K13 IO_5_K13/VREFB5N0
D13 K4 R204 10K-04
3 SPI2_CS0 IO_6_D13/VREFB6N0 +V3P3A VCCA1__K4
B7 D10
3 I2C1_SOC_SCL IO_8_B7/VREFB8N0 VCCA2__D10
D4 nSTATUS R205 10K-04
K9 VCCA3__D4
VCCA4__K9 CPU_prog_JTAG_TCK R206 1K-04
H7 MAX10 10M02SC U169
G8 VCC_ONE__H7 CPU_prog_JTAG_TDI
MAX10 10M02SC U169 VERSION : 1.1 R207 10K-04
G6 VCC_ONE__G8
VERSION : 1.1 VCC_ONE__G6 PAGE : 11 of 11 CPU_prog_JTAG_TMS R208
PAGE : 8 of 11 10M04SCU169C8G F7 DATE : JUN_ 2015 10K-04
VCC_ONE__F7
DATE : JUN_ 2015
10M04SCU169C8G enableJTAG R209 10K-04

MAX10 10M02SC U169 10M04SCU169C8G

VERSION : 1.1 +V3P3A
PAGE : 1 of 11
DATE : JUN_ 2015
C149
LED0_3V3 LED1_3V3 LED2_3V3 +V3P3A +V1P8A 0.1uF/16VX/04
CN3
CPU_prog_JTAG_TCK 1 2
CPU_prog_JTAG_TDO 3 4
CPU_prog_JTAG_TMS 5 6
A C150 C151 C152 C153 C154 C155 C156 C157 7 8 A
R260 R261 R262 1uF/16V/04 1uF/16V/04 1uF/16V/04 1uF/16V/04 1uF/16V/04 1uF/16V/04 1uF/16V/04 1uF/16V/04 CPU_prog_JTAG_TDI 9 10
2.2K-04 2.2K-04 2.2K-04 11 12
5% 5% 5%
0402 0402 0402 6*2P 27-4121-206-1G-R
1

+V3P3A +V1P8A
LED2 LED3 LED4
1.6*0.8*0.45mm Yellow 1.6*0.8*0.4mm Green 1.6*0.8*0.4mm Red

Title
C158 C159 C160 C161 C162 C163 C164 C165
2

0.1uF/16VX/04 0.1uF/16VX/04 0.1uF/16VX/04 0.1uF/16VX/04 0.1uF/16VX/04 0.1uF/16VX/04 0.1uF/16VX/04 0.1uF/16VX/04 MAX10

Size Document Number Rev:
C UP-CRST02 A0.2_0_0
Date: Monday, October 30, 2017 Sheet: 6 of 11
5 4 3 2 1
 5 4 3 2 1

DIO1
+V1P8A
1 H1
6 GPIO/I2C1_SDA
2 31
+V1P8A 6 GPIO/I2C1_SCL 3
6 GPIO_3_J6
4
6 GPIO/SPI2_MOSI
R227 R228 5
+V1P8A 6 GPIO/SPI2_MISO 6
10K-04 10K-04 6 GPIO/SPI2_CLK
7
D I2C1_SCL_1P8 6 GPIO/I2C0_SDA 8 D
I2C1_SDA_1P8 6 GPIO_3_K8
R237 R238 R239 9
6 GPIO_3_L5
10K-04 10K-04 10K-04 10
C184 6 GPIO/PWM1_3_L4 11
6 GPIO/I2S2_FRM
U22 0.1uF/16VX-04 12/23 modify 12
1 8 6 GPIO_3_M5 13
A0 VCC 6 GPIO/UART1_TX
2 7 R240 0-04 14
A1 WP I2C1_SCL_1P8 I2C0_SOC_SCL 6 GPIO/UART1_RX
3 6 15
4 A2 SCL 5 I2C1_SDA_1P8 I2C0_SOC_SDA I2C0_SOC_SCL 3,6 6 GPIO/I2S2_CLK 16
VSS SDA I2C0_SOC_SDA 3,6 6 GPIO/SPI2_CS0N
17
6 GPIO/SPI2_CS1N 18
24LC32AT-I/SN-G R241 0-04
6 GPIO/I2C0_SCL
19
6 GPIO/PWM0
20
6 GPIO_3_N11 21
JP2 JP3 JP4
6 GPIO/I2S2_DATAIN
1 1 1 REV0.2 22
JP4(1-2) 2 2 2 DESIGN NOTE 6 GPIO/I2S2_DATAOUT 23
+V3P3A
1133-040-02 3 3 3 24
I2C Address is 0x57 25
3*1P 220-96-03GB013*1P 220-96-03GB01 3*1P 220-96-03GB01 26
JP2(1-2) +V1P8A 27
1133-040-02 C166 28
+V5P0_HAT
0.1uF/25VX-04 29 32
30 H2
C
JP3(1-2) C
1133-040-02 C167 30P 712-94-30TWR8
R265 0.1uF/25VX-04
10K-04

R242 R243 R244 JP5

1K-04 1K-04 1K-04 1
2 EEPROM_WP R246 0-04
3
CN4
3*1P 220-96-03GB01 JP3(2-3)1
1133-040-02 1 H1
6 GPIO_5_H13 2 21
6 GPIO_5_J13
3
6 GPIO_5_K13
4
6 GPIO_5_L13 5
REV0.2 6 GPIO_5_G12
6
R266
6 GPIO_5_G13 7
10K-04 6 GPIO_5_H9
6 GPIO_5_H8 8
9
6 GPIO_5_H10 10
Power LED 6 GPIO_5_J9
11
6 GPIO_5_J10 12
6 GPIO_5_L12
13
+V3P3A 6 GPIO_5_J12
B 14 B
6 GPIO_5_K12 15
6 GPIO_5_K11
16
6 GPIO_5_K10 17
R4 +V3P3A
2.2K-04 18
19 22
+V5P0_HAT
20 H2
1

20P 712-94-20TWR8
LED1 C180
1.6*0.8*0.4mm Blue 0.1uF/25VX-04
C181
0.1uF/25VX-04
2

(D)
3

(G) Q1
1 2N7002LT1G R186
3 PMU_SLP_S0IX_N_3P3
X/0-04
(S)
2

A A

Title
EEPROM & LED
Size Document Number Rev:
B UP-CRST02 A0.1_0_0
Date: Monday, October 30, 2017 Sheet: 7 of 11
5 4 3 2 1
 5 4 3 2 1

+V6.2REG VCC_12V
Irms=6.5A
R210
100K-04 C169 C170 C171 C172
0.1uF/50VX-06 10uF/50VX-12 10uF/50VX-12 10uF/50VX-12

8
7
6
5
VREG5_PG R211 C168 Q4
0-06 0.1uF/25VX-06

D3
D2
D1
D
9 D4
R212
D D
100K-04
VREG5_DH

G1
S3
S2
S1
VCC_12V

4
3
2
1
U21 L3

16

15

14

13
R213 Rds(on)=5.2mohm X/2.2uH.Idc=8A.DCR=13.5mohm L15&L16 CO-LAY SXM56LF D5
100K-1-04 R214 10K-1-04 DCR=5.3mohm 2 1

PGOOD

NC

DH
BST
12 +V5P0_HAT
SW Idc=15Amp

8
7
6
5
1 VREG5_SW Q5 SXM56LF D4
1.8V<EN<6.5V R216 GND_VREG5_VR TRIP 11 VREG5_DL VREG5_SW R215 0-12 2 1

D3
D2
D1
D
VREG5_SW_EN 2 DL 9 D4 L4
EN 10 1.5uH.DCR=3.8mohm.Irms=16Amp C175 C176 TC1
1K-04 VREG5_VFB 3
VFB
VDRV R217 R218 + 5A
9 1.5uH 10x10R1 75K-1-06

G1
1-1-06

S3
S2
S1
VREG

0.1uF/16VX-04
R219 C173 4 +V6.2REG

MODE
RF VREG5_VFB

PGND

10uF/16VX-08

220uF/6.3VX-B2
56K-1-04 102pF/50VX-04 C174

GND
VDD

4
3
2
1
17 X/472pF/50VX-04
PAD C178
C177 222pF/50VX-04 R220

8
GND_VREG5_VR GND_VREG5_VR TPS53219ARGTR 1uF/25VX-06 R2 10.2K-1-06
R221
619K-1-04 REV0.2
C Reserve to adjust signal quality GND_VREG5_VR C
VREG5_PG
GND_VREG5_VR GND_VREG5_VR P17 Thermal Pad.Use 5 vias to connect to GND plane.
R222
X/100K-1-04 R1=((5-0.041-0.6)/0.6)*10.2K=74.103K
+V6.2REG R223 X/0-04 VREG5_MODE Close to PIN7 Io=13A,OCP=19.5A
VCC_12V R226 0-06
F=400Khz
Δ I =4. 9 A
R224 Δ V=4. 9* 25=125 mV
100K-04 R225 GND_VREG5_VR OCP=(Rtrip*10u)/(8*Rds) +0.5*Δ I
X/10K-04 C179 =(698/42)+2.5=19.3A
1uF/50VX-08

GND_VREG5_VR

R229

CN7 X/0-20
B B
VCC_12V
DC_PWR_IN Q3
2 FDMC4435BZ FB5
1
1 5 2
3 FB-50-6A-12
2

C182 FB6 C183

D1 0.1uF/50VX-08 D2 0.1uF/50VX-08
4

2P ME050-38102 90D(M)
SMAJ58A MMSZ5248B
FB-50-6A-12
1

REV0.2
2

D3
MMSZ5248B
1

R230
A 100K-04 A

Title
DC IN TO 5V
Size Document Number Rev:
B UP-CRST02 A0.2_0_0
Date: Monday, October 30, 2017 Sheet: 8 of 11
5 4 3 2 1
 5 4 3 2 1

+V5P0_HAT
U14
Irms=2.84A 9 8
14 IN1 BST
IN2
R142
4.7
C110 C111 C112 C113 R141
22uF/10V-06 22uF/10V-06 0.1uF/25VX-04 0.1uF/25VX-04 910K-1-04
D C114 D
V3P3_VR_FREQ 2 0.1uF/25VX-04 +V3P3A
FREQ L1
GND SW2
16
15
V3P3_VR_SW
6A
SW1 1.5uH.DCR=20mohm.Irms=6Amp
V3P3_VR_VCC 7 C115 C116 C117 C118
VCC MP8762GLE-Z R143 C119 220pF 22uF/10V-06 22uF/10V-06 0.1uF/25VX-04 0.1uF/25VX-04
50V
C120 R144 287K-1-04
1uF/10VX-04 100K-1-04 R145 R146
100-1-04 130K-104
6
3VSB_GND 1 PG 3 V3P3_VR_FB F=500KHz
EN FB Vout=0.611(1+R1/R2)
R147 499K-1-06

PGND1
PGND2
PGND3
PGND4
+V5P0_HAT

AGND
R148
20K-1-04

SS
R149
X/100K-1-04

10
11
12
13
1.5V<EN<6V
3VSB_GND
C121
0.22u
3VSB_GND
C 16V C

R150 0-04
R0402

3VSB_GND

B B

+V3P3A

C124 +V1P8A
10uF/10VX-04 L2
U16 2.2uH.DCR=52mohm.Idc=3Amp
12
11 PVIN1 SW1
1
2
SW_1V8_VR 3A
R154 0-04 +V_VR_1V8_AVIN 10 PVIN2 SW2 3
AVIN SW3 R155 R156 C125 C126
14 100K-1-04 196K-1-04 22uF/10V-06 0.1uF/25VX-04
C127 R157 0-04 VR_1V8_EN 13 VOS
0.1uF/25VX-04 EN 4 PG_1V8_VR
9 PG
SS/TR 5 FB_1V8_VR
FB
C128 6
470pF/50V-04 8 AGND 15 R158
DEF PGND1 Vout = 0.8*(1+R1/R2)
A 16 154K-1-04 A
7 PGND2 17
FWS THER_PAD
TPS62130RGT Title
R159
0-04 3V/1.8V/1.2V Voltage Regulator
Size Document Number Rev:
B UP-CRST02 A0.2_0_0
Date: Monday, October 30, 2017 Sheet: 9 of 11
5 4 3 2 1
 5 4 3 2 1

SCREW HOLE Buttom View

MH1 MH2 MH3 MH4

D MH197D107 MH197D107 MH197D107 MH197D107 D
MH1 MH2
1

MOUNT HOLE 1

C C

MH3 MH4

REAR CAM BOSS

B B

FRONT CAM BOSS

PCB1

PCB

1907UPRC01

A A

Title
Mechanical Component
Size Document Number Rev:
B UP-CRST02 A0.2_0_0
Date: Monday, October 30, 2017 Sheet: 10 of 11
5 4 3 2 1
 5 4 3 2 1

History
DATE Revision Description

D D
20171006 A0.2_0_0 P03 add pin header for W/P
P03 Change U22 Footprint

P08 Change DCIN Connector

C C

B B

A A

Title
History
Size Document Number Rev:
B UP-CRST02 A0.2_0_0
Date: Monday, October 30, 2017 Sheet: 11 of 11
5 4 3 2 1