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to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON
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Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
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FDP18N50 / FDPF18N50 / FDPF18N50T — N-Channel UniFETTM MOSFET
November 2013
FDP18N50 / FDPF18N50 / FDPF18N50T

N-Channel UniFETTM MOSFET
500 V, 18 A, 265 mΩ
Features Description
• RDS(on) = 220 mΩ (Typ.) @ VGS = 10 V, ID = 9 A UniFETTM MOSFET is Fairchild Semiconductor’s high voltage
MOSFET family based on planar stripe and DMOS technology.
• Low Gate Charge (Typ. 45 nC)
This MOSFET is tailored to reduce on-state resistance, and to
• Low Crss (Typ. 25 pF) provide better switching performance and higher avalanche
• 100% Avalanche Tested energy strength. This device family is suitable for switching
power converter applications such as power factor correction
Applications (PFC), flat panel display (FPD) TV power, ATX and electronic
lamp ballasts.
• LCD/LED/PDP TV
• Lighting
• Uninterruptible Power Supply
G G
D G
S TO-220 D
S TO-220F
S
Absolute Maximum Ratings TC = 25°C unless otherwise noted.
FDPF18N50 /
Symbol Parameter FDP18N50 Unit
FDPF18N50T
VDSS Drain-Source Voltage 500 V
ID Drain Current - Continuous (TC = 25°C) 18 18 * A
- Continuous (TC = 100°C) 10.8 10.8 * A
IDM Drain Current - Pulsed (Note 1) 72 72 * A
VGSS Gate-Source voltage ±30 V
EAS Single Pulsed Avalanche Energy (Note 2) 945 mJ
IAR Avalanche Current (Note 1) 18 A
EAR Repetitive Avalanche Energy (Note 1) 23.5 mJ
dv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 V/ns
PD Power Dissipation (TC = 25°C) 235 38.5 W
- Derate Above 25°C 1.88 0.3 W/°C
TJ, TSTG Operating and Storage Temperature Range -55 to +150 °C
TL Maximum Lead Temperature for Soldering,
300 °C
1/8” from Case for 5 Seconds
* Drain current limited by maximum junction temperature
Thermal Characteristics
FDPF18N50 /
Symbol Parameter FDP18N50 Unit
FDPF18N50T
RθJC Thermal Resistance, Junction-to-Case, Max. 0.53 3.3 °C/W
RθJA Thermal Resistance, Junction-to-Ambient, Max. 62.5 62.5 °C/W
©2012 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com

FDP18N50 / FDPF18N50 / FDPF18N50T Rev. C2
Package Marking and Ordering Information
Part Number Top Mark Package Packing Method Reel Size Tape Width Quantity
FDP18N50 FDP18N50 TO-220 Tube N/A N/A 50 units
FDPF18N50 FDPF18N50 TO-220F Tube N/A N/A 50 units
FDPF18N50T FDPF18N50T TO-220F Tube N/A N/A 50 units
Electrical Characteristics TC = 25°C unless otherwise noted.
Symbol Parameter Conditions Min. Typ. Max Unit

Off Characteristics
BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 μA 500 -- -- V
ΔBVDSS Breakdown Voltage Temperature
ID = 250 μA, Referenced to 25°C -- 0.5 -- V/°C
/ ΔTJ Coefficient
IDSS Zero Gate Voltage Drain Current VDS = 500 V, VGS = 0 V -- -- 1 μA
VDS = 400 V, TC = 125°C -- -- 10 μA
IGSSF Gate-Body Leakage Current, Forward VGS = 30 V, VDS = 0 V -- -- 100 nA
IGSSR Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0 V -- -- -100 nA
On Characteristics
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 μA 3.0 -- 5.0 V
RDS(on) Static Drain-Source
VGS = 10 V, ID = 9 A -- 0.220 0.265 Ω
On-Resistance
gFS Forward Transconductance VDS = 40 V, ID = 9 A -- 25 -- S
Dynamic Characteristics
Ciss Input Capacitance VDS = 25 V, VGS = 0 V, -- 2200 2860 pF
f = 1 MHz
Coss Output Capacitance -- 330 430 pF
Crss Reverse Transfer Capacitance -- 25 40 pF
Switching Characteristics
td(on) Turn-On Delay Time VDD = 250 V, ID = 18 A, -- 55 120 ns
VGS = 10 V, RG = 25 Ω
tr Turn-On Rise Time -- 165 340 ns
td(off) Turn-Off Delay Time -- 95 200 ns
(Note 4)
tf Turn-Off Fall Time -- 90 190 ns
Qg Total Gate Charge VDS = 400 V, ID = 18 A, -- 45 60 nC
Qgs Gate-Source Charge VGS = 10 V -- 12.5 -- nC
(Note 4)
Qgd Gate-Drain Charge -- 19 -- nC
Drain-Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain-Source Diode Forward Current -- -- 18 A
ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- 72 A
VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 18 A -- -- 1.4 V
trr Reverse Recovery Time VGS = 0 V, IS = 18 A, -- 500 -- ns
dIF/dt =100 A/μs
Qrr Reverse Recovery Charge -- 5.4 -- μC
Notes:
1. Repetitive rating: pulse-width limited by maximum junction temperature.
2. L = 5.2 mH, IAS = 18 A, VDD = 50 V, RG = 25 Ω, starting TJ = 25°C.
3. ISD ≤ 18 A, di/dt ≤ 200 A/μs, VDD ≤ BVDSS, starting TJ = 25°C.
4. Essentially independent of operating temperature typical characteristics.

Typical Performance Characteristics
Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics
2
10
VGS
2
10 Top : 15.0 V
10.0 V
8.0 V
7.0 V
6.5 V
ID, Drain Current [A]

1 6.0 V
10 Bottom : 5.5 V
o
10
1
150 C
0 o
10 25 C
o
-55 C
* Notes :
* Notes :
1. 250μs Pulse Test
-1 1. VDS = 40V
10 o
2. TC = 25 C 2. 250μs Pulse Test
0
-1 0 1
10
10 10 10 2 4 6 8 10 12
VDS, Drain-Source Voltage [V] VGS, Gate-Source Voltage [V]
Figure 3. On-Resistance Variation vs. Figure 4. Body Diode Forward Voltage

Drain Current and Gate Voltage Variation vs. Source Current
and Temperatue
2
RDS(ON) [Ω], Drain-Source On-Resistance
0.6 10
IDR, Reverse Drain Current [A]
0.5
VGS = 10V
0.4
1
10
0.3
VGS = 20V
150oC
0.2 o * Notes :
25 C
1. VGS = 0V
o
* Note : TJ = 25 C 2. 250μs Pulse Test
0
0.1 10
0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
ID, Drain Current [A] VSD, Source-Drain voltage [V]
Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics

5000
12
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
4000 10 VDS = 100V
Coss
VGS, Gate-Source Voltage [V]
VDS = 250V
Capacitances [pF]
8 VDS = 400V
3000 Ciss
6
2000
4
* Note :
1. VGS = 0 V
1000 Crss 2. f = 1 MHz
2
* Note : ID = 18A
0 0
-1 0 1
10 10 10 0 10 20 30 40 50
VDS, Drain-Source Voltage [V] QG, Total Gate Charge [nC]

Typical Performance Characteristics (Continued)
Figure 7. Breakdown Voltage Variation Figure 8. On-Resistance Variation

vs. Temperature vs. Temperature
1.2 3.0
Drain-Source Breakdown Voltage
2.5
Drain-Source On-Resistance
1.1
BVDSS, (Normalized)
RDS(ON), (Normalized)
2.0
1.0 1.5
1.0
0.9 * Notes :
1. VGS = 0 V
2. ID = 250μA * Notes :
0.5
1. VGS = 10 V
2. ID = 9 A
0.8
-100 -50 0 50 100 150 200 0.0
-100 -50 0 50 100 150 200
o
TJ, Junction Temperature [ C] o
TJ, Junction Temperature [ C]
Figure 9-1. Maximum Safe Operating Area Figure 9-2. Maximum Safe Operating Area
- FDP18N50 - FDPF18N50 / FDPF18N50T
2 2
10 10
10 μs
10 μs
100 μs
100 μs
1 1 ms 1
10 10 1 ms
10 ms
100 ms 10 ms
Operation in This Area DC Operation in This Area 100 ms
0 is Limited by R DS(on) 0 is Limited by R DS(on)
10 10 DC
-1 -1
10 * Notes : 10 * Notes :
o o
1. TC = 25 C 1. TC = 25 C
o o
2. TJ = 150 C 2. TJ = 150 C
3. Single Pulse 3. Single Pulse
-2 -2
10 10
0 1 2 0 1 2
10 10 10 10 10 10
VDS, Drain-Source Voltage [V] VDS, Drain-Source Voltage [V]
Figure 10. Maximum Drain Current vs. Case Temperature
20
15
10
0
25 50 75 100 125 150
o
TC, Case Temperature [ C]

Typical Performance Characteristics (Continued)
Figure 11-1. Transient Thermal Response Curve - FDP18N50
0
10
Response[ C/W]
Response o D = 0 .5
-1 0 .2
10
0 .1
Thermal
PDM
Thermal
0 .0 5
t1
0 .0 2 * N o te s :
t2
Z (t),(t),
o
0 .0 1 1 . Z θ J C ( t) = 0 .5 3 C /W M a x .
θJC
-2
10 2 . D u ty F a c to r , D = t 1 /t 2
ZθJC
s in g le p u ls e 3 . T J M - T C = P D M * Z θ J C ( t)
-5 -4 -3 -2 -1 0 1
10 10 10 10 10 10 10
t 1 , S q u a r e W a v e P u ls e D u r a tio n [s e c ]
Figure 11-2. Transient Thermal Response Curve - FDPF18N50 / FDPF18N50T

Thermal Response [oC/W]
D = 0 .5
Z (t), Thermal Response
0
10
0 .2
0 .1
0 .0 5
PDM
-1
10 0 .0 2 t1
0 .0 1
* N o te s :
t2
o
1 . Z θ J C ( t) = 3 .3 C /W M a x .
θJC
ZθJC(t),
2 . D u ty F a c to r , D = t 1 /t 2
-2 s in g le p u ls e 3 . T J M - T C = P D M * Z θ J C ( t)
10
-5 -4 -3 -2 -1 0 1
10 10 10 10 10 10 10
t 1 , S q u a r e W a v e P u ls e D u r a tio n [s e c ]

IG = const.
Figure 12. Gate Charge Test Circuit & Waveform
RL VDS
VDS 90%
VGS VDD
RG
10%
VGS
V
10V
GS
DUT
td(on) tr td(off)
tf
t on t off
Figure 13. Resistive Switching Test Circuit & Waveforms
VGS
Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms

DUT +
VDS
I SD
L
Driver
RG
Same Type
as DUT VDD
VGS • dv/dt controlled by RG

• ISD controlled by pulse period
Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )
IFM , Body Diode Forward Current

I SD
( DUT ) di/dt
IRM
Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt
VSD VDD
Body Diode
Forward Voltage Drop
Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

Mechanical Dimensions
Figure 16. TO220, Molded, 3-Lead, Jedec Variation AB

Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specif-
ically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/package/packageDetails.html?id=PN_TO220-003

Mechanical Dimensions
Figure 17. TO220, Molded, 3-Lead, Full Pack, EIAJ SC91, Straight Lead
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specif-
ically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/package/packageDetails.html?id=PN_TF220-003

TRADEMARKS
The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not
intended to be an exhaustive list of all such trademarks.
AccuPower™ F-PFS™ Sync-Lock™
AX-CAP®* FRFET® ® tm
®*
SM ®
BitSiC™ Global Power Resource PowerTrench
Build it Now™ GreenBridge™ PowerXS™
TinyBoost®
CorePLUS™ Green FPS™ Programmable Active Droop™
® TinyBuck®
CorePOWER™ Green FPS™ e-Series™ QFET
TinyCalc™
CROSSVOLT™ Gmax™ QS™
TinyLogic®
CTL™ GTO™ Quiet Series™
TINYOPTO™
Current Transfer Logic™ IntelliMAX™ RapidConfigure™
TinyPower™
DEUXPEED® ISOPLANAR™ ™ TinyPWM™
Dual Cool™ Marking Small Speakers Sound Louder
TinyWire™
EcoSPARK® and Better™ Saving our world, 1mW/W/kW at a time™
TranSiC™
EfficentMax™ MegaBuck™ SignalWise™
TriFault Detect™
ESBC™ MICROCOUPLER™ SmartMax™
TRUECURRENT®*
® MicroFET™ SMART START™
μSerDes™
MicroPak™ Solutions for Your Success™
Fairchild® MicroPak2™ SPM®
Fairchild Semiconductor® MillerDrive™ STEALTH™
MotionMax™ SuperFET® UHC®
FACT Quiet Series™
mWSaver ® SuperSOT™-3 Ultra FRFET™
FACT®
OptoHiT™ SuperSOT™-6 UniFET™
FAST®
OPTOLOGIC® SuperSOT™-8 VCX™
FastvCore™
OPTOPLANAR® SupreMOS® VisualMax™
FETBench™
SyncFET™ VoltagePlus™
FPS™
XS™
*Trademarks of System General Corporation, used under license by Fairchild Semiconductor.
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE
RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY
PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY
THEREIN, WHICH COVERS THESE PRODUCTS.
LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE
EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used here in:
1. Life support devices or systems are devices or systems which, (a) are 2. A critical component in any component of a life support, device, or
intended for surgical implant into the body or (b) support or sustain life, system whose failure to perform can be reasonably expected to cause
and (c) whose failure to perform when properly used in accordance with the failure of the life support device or system, or to affect its safety or
instructions for use provided in the labeling, can be reasonably effectiveness.
expected to result in a significant injury of the user.
ANTI-COUNTERFEITING POLICY
Fairchild Semiconductor Corporation’s Anti-Counterfeiting Policy. Fairchild’s Anti-Counterfeiting Policy is also stated on our external website,
www.Fairchildsemi.com, under Sales Support.
Counterfeiting of semiconductor parts is a growing problem in the industry. All manufactures of semiconductor products are experiencing counterfeiting of their
parts. Customers who inadvertently purchase counterfeit parts experience many problems such as loss of brand reputation, substandard performance, failed
application, and increased cost of production and manufacturing delays. Fairchild is taking strong measures to protect ourselves and our customers from the
proliferation of counterfeit parts. Fairchild strongly encourages customers to purchase Fairchild parts either directly from Fairchild or from Authorized Fairchild
Distributors who are listed by country on our web page cited above. Products customers buy either from Fairchild directly or from Authorized Fairchild
Distributors are genuine parts, have full traceability, meet Fairchild’s quality standards for handing and storage and provide access to Fairchild’s full range of
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warranty issues that may arise. Fairchild will not provide any warranty coverage or other assistance for parts bought from Unauthorized Sources. Fairchild is
committed to combat this global problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors.
PRODUCT STATUS DEFINITIONS

Definition of Terms
Datasheet Identification Product Status Definition
Datasheet contains the design specifications for product development. Specifications
Advance Information Formative / In Design
may change in any manner without notice.
Datasheet contains preliminary data; supplementary data will be published at a later

Preliminary First Production date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to

No Identification Needed Full Production
make changes at any time without notice to improve the design.
Datasheet contains specifications on a product that is discontinued by Fairchild

Obsolete Not In Production
Semiconductor. The datasheet is for reference information only.
Rev. I66

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
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regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
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FDP18N50 / FDPF18N50 / FDPF18N50T

©2012 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com

Electrical Characteristics TC = 25°C unless otherwise noted.

Symbol Parameter Conditions Min. Typ. Max Unit

©2012 Fairchild Semiconductor Corporation 2 www.fairchildsemi.com

Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics

ID, Drain Current [A]

VDS, Drain-Source Voltage [V] VGS, Gate-Source Voltage [V]

Figure 3. On-Resistance Variation vs. Figure 4. Body Diode Forward Voltage

ID, Drain Current [A] VSD, Source-Drain voltage [V]

Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics

VDS, Drain-Source Voltage [V] QG, Total Gate Charge [nC]

©2012 Fairchild Semiconductor Corporation 3 www.fairchildsemi.com

Figure 7. Breakdown Voltage Variation Figure 8. On-Resistance Variation

ID, Drain Current [A]

VDS, Drain-Source Voltage [V] VDS, Drain-Source Voltage [V]

Figure 10. Maximum Drain Current vs. Case Temperature

©2012 Fairchild Semiconductor Corporation 4 www.fairchildsemi.com

Figure 11-1. Transient Thermal Response Curve - FDP18N50

Figure 11-2. Transient Thermal Response Curve - FDPF18N50 / FDPF18N50T

©2012 Fairchild Semiconductor Corporation 5 www.fairchildsemi.com

Figure 12. Gate Charge Test Circuit & Waveform

Figure 13. Resistive Switching Test Circuit & Waveforms

Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms

©2012 Fairchild Semiconductor Corporation 6 www.fairchildsemi.com

VGS • dv/dt controlled by RG

Gate Pulse Width

IFM , Body Diode Forward Current

Body Diode Reverse Current

©2012 Fairchild Semiconductor Corporation 7 www.fairchildsemi.com

Figure 16. TO220, Molded, 3-Lead, Jedec Variation AB

©2012 Fairchild Semiconductor Corporation 8 www.fairchildsemi.com

©2012 Fairchild Semiconductor Corporation 9 www.fairchildsemi.com

*Trademarks of System General Corporation, used under license by Fairchild Semiconductor.

LIFE SUPPORT POLICY

PRODUCT STATUS DEFINITIONS

Datasheet contains preliminary data; supplementary data will be published at a later

Datasheet contains final specifications. Fairchild Semiconductor reserves the right to

Datasheet contains specifications on a product that is discontinued by Fairchild

©2012 Fairchild Semiconductor Corporation 10 www.fairchildsemi.com

PUBLICATION ORDERING INFORMATION

© Semiconductor Components Industries, LLC www.onsemi.com www.onsemi.com

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