BSI

Very Low Power/Voltage CMOS SRAM

64K X 16 bit
BS616LV1016
„ FEATURES „ DESCRIPTION
• Vcc operation voltage : 4.5V ~ 5.5V The BS616LV1016 is a high performance, very low power CMOS Static
• Very low power consumption : Random Access Memory organized as 65,536 words by 16 bits and
Vcc = 5.0V C-grade : 48mA (55ns) operating current operates from a range of 4.5V to 5.5V supply voltage.
I- grade : 50mA (55ns) operating current Advanced CMOS technology and circuit techniques provide both high
C-grade : 36mA (70ns) operating current speed and low power features with a typical CMOS standby current
I- grade : 38mA (70ns) operating current of 1.3uA at 5V/25oC and maximum access time of 55ns at 5V/85oC.
1.3uA (Typ.) CMOS standby current Easy memory expansion is provided by an active LOW chip
• High speed access time : enable(CE) and active LOW output enable(OE) and three-state output
-55 55ns drivers.
-70 70ns The BS616LV1016 has an automatic power down feature, reducing the
• Automatic power down when chip is deselected power consumption significantly when chip is deselected.
• Three state outputs and TTL compatible The BS616LV1016 is available in the JEDEC standard 44-pin TSOP
• Fully static operation Type II and 48-pin BGA package.
• Data retention supply voltage as low as 1.5V
• Easy expansion with CE and OE options
• I/O Configuration x8/x16 selectable by LB and UB pin
„ PRODUCT FAMILY
SPEED POWER DISSIPATION
PRODUCT OPERATING Vcc (ns) STANDBY Operating
(ICCSB1, Max) (ICC, Max) PKG TYPE
FAMILY TEMPERATURE RANGE
55ns:4.5~5.5V Vcc=5.0V Vcc=5.0V
70ns:4.5~5.5V Vcc=5.0V
55ns 70ns
BS616LV1016EC TSOP2-44
O O
+0 C to +70 C 4.5V ~ 5.5V 55/70 4uA 48mA 36mA
BS616LV1016AC BGA-48-0608
BS616LV1016EI O O
TSOP2-44
-40 C to +85 C 4.5V ~ 5.5V 55/70 8uA 50mA 38mA
BS616LV1016AI BGA-48-0608

„ PIN CONFIGURATIONS „ BLOCK DIAGRAM

A4 1 44 A5
A3 2 43 A6
A2 3 42 A7
A1 4 41 OE
A0 5 40 UB A8
CE 6 39 LB
7
A13
DQ0 38 DQ15
8 A15 Address
DQ1 37 DQ14
9 18 512
DQ2 36
DQ3 10 BS616LV1016EC 35
DQ13
DQ12
A14 Input Row
A12 Memory Array
VCC 11
12
BS616LV1016EI 34
33
GND
GND VCC Buffer
13 A7
DQ4 32 DQ11 Decoder 512 x 2048
DQ5 14 31 DQ10 A6
DQ6 15 30 DQ9
16
A5
DQ7 29 DQ8
WE 17 28 NC
A4
A15 18 27 A8 2048
A14 19 26 A9
A13 20 25 A10 Data
A12 21 24 16 Input 16 Column I/O
A11 DQ0
NC 22 23 NC Buffer
. . Write Driver
1 2 3 4 5 6
. . Sense Amp
. . 16
. Data 128
A LB OE A0 A1 A2 NC
. Output 16

DQ15
Buffer Column Decoder
B IO8 UB A3 A4 CE IO0

CE 14
C IO9 IO10 A5 A6 IO1 IO2
WE
OE Control Address Input Buffer
D VSS IO11 NC A7 IO3 VCC
UB
LB
A11 A9 A3 A2 A1 A0 A10
E VCC IO12 NC NC IO4 VSS

Vcc
F IO14 IO13 A14 A15 IO5 IO6 Gnd

G IO15 NC A12 A13 WE IO7

H NC A8 A9 A10 A11 NC

Brilliance Semiconductor, Inc. reserves the right to modify document contents without notice.
R0201-BS616LV1016 Revision 1.0
1 Apr. 2004
 BSI BS616LV1016
„ PIN DESCRIPTIONS

Name Function

A0-A15 Address Input These 16 address inputs select one of the 65,536 x 16-bit words in the RAM.

CE Chip Enable Input
WE Write Enable Input
OE Output Enable Input
LB and UB Data Byte Control Input
CE is active LOW. Chip enables must be active when data read from or write to the
device. if chip enable is not active, the device is deselected and is in a standby power
mode. The DQ pins will be in the high impedance state when the device is deselected.
The write enable input is active LOW and controls read and write operations. With the
chip selected, when WE is HIGH and OE is LOW, output data will be present on the
DQ pins; when WE is LOW, the data present on the DQ pins will be written into the
selected memory location.
The output enable input is active LOW. If the output enable is active while the chip is
selected and the write enable is inactive, data will be present on the DQ pins and they
will be enabled. The DQ pins will be in the high impedance state when OE is inactive.
Lower byte and upper byte data input/output control pins.

DQ0 - DQ15 Data Input/Output These 16 bi-directional ports are used to read data from or write data into the RAM.
Ports
Vcc Power Supply

Gnd Ground

„ TRUTH TABLE

MODE CE WE OE LB UB DQ0~DQ7 DQ8~DQ15 Vcc CURRENT

Not selected
H X X X X High Z High Z ICCSB, ICCSB1
(Power Down)
Output Disabled L H H X X High Z High Z ICC
L L Dout Dout ICC
Read L H L H L High Z Dout ICC
L H Dout High Z ICC
L L Din Din ICC
Write L L X H L X Din ICC
L H Din X ICC

R0201-BS616LV1016 Revision 1.0

2 Apr. 2004
 „ ABSOLUTE MAXIMUM
BSI RATINGS(1) „ OPERATING RANGE
BS616LV1016
SYMBOL PARAMETER RATING UNITS AMBIENT
RANGE Vcc
Terminal Voltage with -0.5 to TEMPERATURE
V TERM Respect to GND Vcc+0.5
V
Commercial 0 O C to +70 O C 4.5V ~ 5.5V
-0.5 to
V cc Power Supply Voltage
Vcc+0.5
V O O
Industrial -40 C to +85 C 4.5V ~ 5.5V
O
T BIAS Temperature Under Bias -40 to +85 C
O
T STG Storage Temperature -60 to +150 C

PT Power Dissipation 1.0 W „ CAPACITANCE (1) (TA = 25oC, f = 1.0 MHz)

SYMBOL PARAMETER CONDITIONS MAX. UNIT
I OUT DC Output Current 20 mA
Input
CIN Capacitance
VIN=0V 6 pF
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a Input/Output
CDQ Capacitance
VI/O=0V 8 pF
stress rating only and functional operation of the device at these
or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute 1. This parameter is guaranteed and not 100% tested.
maximum rating conditions for extended periods may affect
reliability.
„ DC ELECTRICAL CHARACTERISTICS ( TA = -40oC to + 85oC )
PARAMETER
PARAMETER TEST CONDITIONS MIN. TYP. (1) MAX. UNITS
NAME
Guaranteed Input Low
VIL (2) Vcc=5.0V -0.5 -- 0.8 V
Voltage
Guaranteed Input High
VIH Vcc=5.0V 2.2 -- Vcc+0.3 V
Voltage(3)
IIL Input Leakage Current Vcc = Max, VIN = 0V to Vcc -- -- 1 uA
Vcc = Max, CE = VIH, or OE = VIH,
ILO Output Leakage Current -- -- 1 uA
VI/O = 0V to Vcc

VOL Output Low Voltage Vcc = Max, IOL = 2mA Vcc=5.0V -- -- 0.4 V

VOH Output High Voltage Vcc = Min, IOH = -1mA Vcc=5.0V 2.4 -- -- V

(6) Operating Power Supply CE = VIL, IDQ = 0mA, 55ns 50

ICC Vcc=5.0V -- -- mA
Current F = Fmax(4) 70ns 38

ICCSB Standby Current-TTL CE = VIH, IDQ = 0mA Vcc=5.0V -- -- 2 mA

CE ≧ Vcc-0.2V,
ICCSB1(5) Standby Current-CMOS Vcc=5.0V -- 1.3 8 uA
VIN ≧ Vcc - 0.2V or VIN ≦ 0.2V

1. Typical characteristics are at TA = 25oC. 2. Undershoot : -1.5V in case of pulse width ≦20ns.
3. Overshoot : Vcc+1.5V in case of pulse width ≦20ns. 4. Fmax = 1/tRC .
5. IccsB1_Max. is 4uA at Vcc=5.0V and TA=70oC. 6. Icc_Max. is 48mA(@55ns) / 36mA(@70ns) at Vcc=5.0V and TA=0~70oC.

„ DATA RETENTION CHARACTERISTICS ( TA = -40oC to + 85oC )

SYMBOL PARAMETER TEST CONDITIONS MIN. TYP. (1) MAX. UNITS
CE ≧ Vcc - 0.2V
VDR Vcc for Data Retention 1.5 -- -- V
VIN ≧ Vcc - 0.2V or VIN ≦ 0.2V

(3) CE ≧ Vcc - 0.2V

ICCDR Data Retention Current -- 0.15 0.8 uA
VIN ≧ Vcc - 0.2V or VIN ≦ 0.2V
Chip Deselect to Data
tCDR 0 -- -- ns
Retention Time See Retention Waveform
(2)
tR Operation Recovery Time TRC -- -- ns
1. Vcc = 1.5V, TA = + 25OC2. tRC = Read Cycle Time
3. IccDR_MAX. is 0.45uA at TA=70OC.

R0201-BS616LV1016 Revision 1.0

3 Apr. 2004
 BSI BS616LV1016
„ LOW VCC DATA RETENTION WAVEFORM ( CE Controlled )

Data Retention Mode

VDR ≥ 1.5V
Vcc Vcc Vcc
t CDR tR

VIH CE ≥ Vcc - 0.2V VIH

CE

„ AC TEST CONDITIONS „ KEY TO SWITCHING WAVEFORMS

(Test Load and Input/Output Reference)

Input Pulse Levels Vcc/0V WAVEFORM INPUTS OUTPUTS

MUST BE MUST BE
Input Rise and Fall Times 1V/ns STEADY STEADY

MAY CHANGE WILL BE

Input and Output 0.5Vcc FROM H TO L CHANGE
FROM H TO L
Timing Reference Level
MAY CHANGE WILL BE
Output Load CL=30pF+1TTL FROM L TO H CHANGE
CL=100pF+1TTL FROM L TO H
,
DON T CARE: CHANGE :
ANY CHANGE STATE
PERMITTED UNKNOWN
DOES NOT CENTER
APPLY LINE IS HIGH
IMPEDANCE
”OFF ”STATE

„ AC ELECTRICAL CHARACTERISTICS ( TA = -40oC to + 85oC )

READ CYCLE
JEDEC CYCLE TIME : 55ns CYCLE TIME : 70ns
PARAMETER
PARAMETER DESCRIPTION (Vcc = 4.5~5.5V) (Vcc = 4.5~5.5V) UNIT
NAME MIN. TYP. MAX. MIN. TYP. MAX.
NAME
tAVAX tRC Read Cycle Time 55 -- -- 70 -- -- ns
tAVQV tAA Address Access Time -- -- 55 -- -- 70 ns
tELQV tACS Chip Select Access Time -- -- 55 -- -- 70 ns
tBA tBA (1) Data Byte Control Access Time (LB,UB) -- -- 25 -- -- 35 ns
tGLQV tOE Output Enable to Output Valid -- -- 25 -- -- 35 ns
t E1LQX tCLZ Chip Select to Output Low Z 10 -- -- 10 -- -- ns
tBE tBE Data Byte Control to Output Low Z (LB,UB) 10 -- -- 10 -- -- ns
tGLQX tOLZ Output Enable to Output in Low Z 5 -- -- 5 -- -- ns
tEHQZ tCHZ Chip Deselect to Output in High Z -- -- 20 -- -- 25 ns
tBDO tBDO Data Byte Control to Output High Z (LB,UB) -- -- 20 -- -- 25 ns
tGHQZ tOHZ Output Disable to Output in High Z -- -- 20 -- -- 25 ns
tAXOX tOH Data Hold from Address Change 10 -- -- 10 -- -- ns

NOTE :
1. tBA is 25ns/35ns (@speed=55ns/70ns) with address toggle. ; tBA is 55ns/70ns (@speed=55ns/70ns) without address toggle.

R0201-BS616LV1016 Revision 1.0

4 Apr. 2004
 BSI BS616LV1016
„ SWITCHING WAVEFORMS (READ CYCLE)
READ CYCLE1 (1,2,4)
t RC

ADDRESS

t AA t OH
t OH

D OUT

READ CYCLE2 (1,3,4)

CE

t ACS
t BA
LB,UB
(5)
t BE t CHZ
t BDO
(5)
t CLZ
D OUT

READ CYCLE3 (1,4)

t RC

ADDRESS

t AA

OE
t OH
t OE

CE
t OLZ

(5)
t ACS t OHZ(5)
t CLZ (1,5)
t CHZ
t BA
LB,UB
t BE t BDO
D OUT

NOTES:
1. WE is high for read Cycle.
2. Device is continuously selected when CE = VIL.
3. Address valid prior to or coincident with CE transition low.
4. OE = VIL .
5. The parameter is guaranteed but not 100% tested.

R0201-BS616LV1016 Revision 1.0

5 Apr. 2004
 BSI BS616LV1016
„ AC ELECTRICAL CHARACTERISTICS ( TA = -40oC to + 85oC )
WRITE CYCLE
JEDEC CYCLE TIME : 55ns CYCLE TIME : 70ns
PARAMETER (Vcc = 4.5~5.5V)
PARAMETER DESCRIPTION (Vcc = 4.5~5.5V) UNIT
NAME MIN. TYP. MAX. MIN. TYP. MAX.
NAME
tAVAX t WC Write Cycle Time 55 -- -- 70 -- -- ns
tE1LWH t CW Chip Select to End of Write 55 -- -- 70 -- -- ns
tAVWL t AS Address Setup Time 0 -- -- 0 -- -- ns
tAVWH t AW Address Valid to End of Write 55 -- -- 70 -- -- ns
tWLWH t WP Write Pulse Width 35 -- -- 45 -- -- ns
tWHAX t WR Write recovery Time (CE,WE) 0 -- -- 0 -- -- ns
tBW t BW (1) Date Byte Control to End of Write (LB,UB) 35 -- -- 45 -- -- ns
tWLQZ t WHZ Write to Output in High Z -- -- 25 -- -- 30 ns
tDVWH t DW Data to Write Time Overlap 35 -- -- 40 -- -- ns
tWHDX t DH Data Hold from Write Time 0 -- -- 0 -- -- ns
tGHQZ t OHZ Output Disable to Output in High Z -- -- 20 -- -- 25 ns
tWHOX t OW End of Write to Output Active 5 -- -- 5 -- -- ns

NOTE :
1. tBW is 35ns/45ns (@speed=55ns/70ns) with address toggle. ; tBW is 55ns/70ns (@speed=55ns/70ns) without address toggle.

„ SWITCHING WAVEFORMS (WRITE CYCLE)

WRITE CYCLE1 (1)
t WC

ADDRESS
(3)
t WR

OE

(10)
t CW
(5)
CE

t BW
LB,UB

t AW (3)
t WP
WE t AS (2)

(4,11)
t OHZ
D OUT
t DH

t DW

D IN

R0201-BS616LV1016 Revision 1.0

6 Apr. 2004
 BSI BS616LV1016
WRITE CYCLE2 (1,6)

t WC

ADDRESS

(10)
t CW
(5)
CE

t BW
LB,UB

t AW t WR
(3)
t WP
(2)
WE t AS
(4,11)

t WHZ (7) (8)

t OW

D OUT
t DW
t DH
(8,9)

D IN

NOTES:
1. WE must be high during address transitions.
2. The internal write time of the memory is defined by the overlap of CE and WE low. All signals
must be active to initiate a write and any one signal can terminate a write by going inactive.
The data input setup and hold timing should be referenced to the second transition edge of
the signal that terminates the write.
3. TWR is measured from the earlier of CE or WE going high at the end of write cycle.
4. During this period, DQ pins are in the output state so that the input signals of opposite phase
to the outputs must not be applied.
5. If the CE low transition occurs simultaneously with the WE low transitions or after the WE
transition, output remain in a high impedance state.
6. OE is continuously low (OE = VIL ).
7. DOUT is the same phase of write data of this write cycle.
8. DOUT is the read data of next address.
9. If CE goes low during this period, DQ pins are in the output state. Then the data input signals of
opposite phase to the outputs must not be applied to them.
10. TCW is measured from the later of CE going low to the end of write.
11. The parameter is guaranteed but not 100% tested.

R0201-BS616LV1016 Revision 1.0

7 Apr. 2004
 BSI BS616LV1016
„ ORDERING INFORMATION

BS616LV1016 X X Z YY
SPEED
55: 55ns
70: 70ns
PKG MATERIAL
-: Normal
G: Green
P: Pb free

GRADE
C: +0oC ~ +70oC
I: -40oC ~ +85oC

PACKAGE
E: TSOP2-44
A: BGA-48-0608

Note:
BSI (Brilliance Semiconductor Inc.) assumes no responsibility for the application or use of any product or circuit described herein. BSI does not authorize its products
for use as critical components in any application in which the failure of the BSI product may be expected to result in significant injury or death, including life-support
systems and critical medical instruments.

„ PACKAGE DIMENSIONS

TSOP2-44
R0201-BS616LV1016 Revision 1.0
8 Apr. 2004
 BSI BS616LV1016
„ PACKAGE DIMENSIONS (continued)

NOTES:
1: CONTROLLING DIMENSIONS ARE IN MILLIMETERS.
2: PIN#1 DOT MARKING BY LASER OR PAD PRINT.
3: SYMBOL "N" IS THE NUMBER OF SOLDER BALLS.
1.4 Max.

BALL PITCH e = 0.75

D E N D1 E1
8.0 6.0 48 5.25 3.75

D1
e

E1

VIEW A

48 mini-BGA (6 x 8)

R0201-BS616LV1016 Revision 1.0

9 Apr. 2004