Chapter 1

Introduction to The
Semiconductor Industry

2005 VLSI TECH.

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 The Semiconductor Industry

INFRASTRUCTURE PRODUCT
APPLICATIONS
Industry Standards
(SIA, SEMI, NIST, etc.)
Consumers:
Production Tools • Computers
• Automotive
Utilities • Aerospace
Materials & Chemicals Chip • Medical
Manufacturer • other industries
Metrology Tools Customer Service
Analytical Laboratories Original Equipment Manufacturers
Technical Work Force Printed Circuit Board Industry
Colleges & Universities

Worldwide sales of microchips : > $250 billion in 2005

2005 VLSI TECH. SIA: semiconductor industry association
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 From Devices to Integrated Circuits

•1950s: Transistor Technology

(1947) The First Solid-state Transistor
(1958) The First Integrated
Circuit (IC) Device - Oscillator
IC ( 5 components )
•1960s: Process Technology
•1970s: Competition
•1980s: Automation
•1990s: Volume Production
(1961) The First Planar
IC (Transistor+R+C)

Lucent Technologies, Bell Labs

Innovations, William Shockley, John
Bardeen, Walter Brattain (1956 Nobel
Prize in physics) Texas Instruments, Inc., Jack Kilby

2005 VLSI TECH. Fairchild Semiconductor, California

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(Silicon Valley), Robert Noyce
 Top View of Wafer with Chips

A single integrated
circuit, also known
as a die, chip, and
microchip

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 Snapshot- Profile of IC
8 metal layers – over the past 25 years

M6

Cu Via 5

M5

Via 4
M4
Via 3
M3
Via 2
M2
Via 1
M1
Contact(W)

Silicon

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 IC Fabrication
„ Silicon
„ Wafer

„ Wafer Sizes

„ Devices and Layers

„ Wafer Fab
„ Stages of IC Fabrication
„ Wafer preparation

„ Wafer fabrication

„ Wafer test/sort

„ Assembly and packaging

2005 VLSI TECH.
中山電機 黃義佑 „ Final test 6
 Evolution of Wafer Size

2000

1992

1987
1981
1975

1965

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 Devices and Layers from a Silicon Chip

Top protective layer Conductive layer

Metal layer

Insulation layers drain

Recessed conductive
layer
Silicon substrate

Silicon substrate
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 Stages of IC Fabrication

Single crystal silicon

1. Wafer Preparation 4. Assembly and Packaging:
includes crystal The wafer is cut Scribe line
growing, rounding, along scribe lines
slicing and polishing. to separate each die. A single die
Wafers sliced from ingot

Wafer Fabrication Assembly Packaging

2. Metal connections
includes cleaning, are made and the
layering, patterning, chip is encapsulated.
etching and doping.

3. Test/Sort includes Defective die 5. Final Test ensures IC

probing, testing and passes electrical and
sorting of each die on environmental
the wafer. testing.

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 Preparation of Silicon Wafers
Polysilicon Seed crystal
6. Edge Rounding
Crucible
1. Crystal Growth

Heater
7. Lapping

2. Single Crystal Ingot

8. Wafer Etching

3. Crystal Trimming and

Diameter Grind

Polishing
Slurry head

9. Polishong
4. Flat Grinding

Polishing table

5. Wafer Slicing 10. Wafer Inspection

2005 VLSI TECH.

中山電機 黃義佑 (Note: Terms in Figure 1.7 are explained in Chapter 4.) 10
 Wafer Fab

2005 VLSI TECH. Photo courtesy of Advanced Micro Devices-Dresden, © S. Doering

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 Career Paths in the
Semiconductor Industry
Fab Manager

Maintenance Manager Production Manager Engineering Manager MS

Maintenance Supervisor Production Supervisor Process Engineer BS

Equipment Engineer Associate Engineer BSET*

Equipment Technician Yield & Failure Analysis Technician AS+

Maintenance Technician Manufacturing Technician Process Technician Lab Technician AS

HS +
Wafer Fab Technician
* Bachelor of Science in
Electronics Technology
Production Operator HS

2005 VLSI TECH. Education

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 Circuit Integration of Semiconductors
- Integration Eras
Number of
Semiconductor
Circuit Integration Components per
Industry Time Period
Chip
No integration (discrete components) Prior to 1960 1
Small scale integration (SSI) Early 1960s 2 to 50
Medium scale integration (MSI) 1960s to Early 1970s 50 to 5,000
Early 1970s to Late
Large scale integration (LSI) 5,000 to 100,000
1970s
Late 1970s to Late
Very large scale integration (VLSI) 100,000 to 1,000,000
1980s
Ultra large scale integration (ULSI) 1990s to present > 1,000,000

•Increase in Chip Performance

–Components per Chip
Semiconductor Trends : –Power Consumption
2005 VLSI TECH. •Increase in Chip Reliability
中山電機 黃義佑 •Reduction in Chip Price 13
 Size Comparison of Early and
Modern Semiconductors

1990s Microchip
(5~25 million transistors)

1960s Transistor

U.S. coin, 10 cents

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2005 VLSI TECH.
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Past and Future Technology Nodes for
Device Critical Dimension (CD)

1988 1992 1995 1997 1999 2001 2002 2005

CD
1.0 0.5 0.35 0.25 0.18 0.15 0.13 0.10
(µ m)

Common IC Features
Line Width Space
Contact Hole

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 Feature Technology and Size

300 mm
12-Inch
200 mm 0.35 µm technology
8-Inch

150 mm 0.25 µm technology

6-Inch
Wafer

When compared to the 0.18-micron process, the 0.18 µm technology

new 0.13-micron process results in less than 60
percent the die size and nearly 70 percent 0.13 µm
improvement in performance technology
The 90-nm process will be manufactured on 0.09 µm
300mm wafers technology
0.065 µm
NEC devises low-k film for second-generation technology
65-nm process
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 Die Size

„ Wafer photo

Single die

Wafer

From http://www.amd.com
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 Price Decrease of Semiconductor Chips

104 Electron tubes Semiconductor devices

Standard tube
Device size =
102 Miniature tube Price =

Bipolar transistor
1 Integrated circuits
Relative value

MSI

10-2 LSI
VLSI

10-4

ULSI
1995 : CD=0.35 μm
10-6 1958 : $10 / 1 Transistor
increase 150~275
chips per wafer 2001 : $10 / 20 million Transistor
1997 : CD=0.25 μm 10-8
2002 : CD=0.13 μ m
10-101930
2005 VLSI TECH. 1940 1950 1960 1970 1980 1990 2000
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Redrawn from C. Chang & S. Sze, McGraw-Hill, ULSI Technology, (New York: McGraw-Hill, 1996), xxiii.
 Reliability Improvement of Chips &
Reduction in Chip Power Consumption per IC

700
10

Average Power in micro Watts (10-6 W)

600
Long-Term Failure Rate Goals

8
in parts per million (PPM)

500
6
400

300 4

200 2

100
0
0 1997 1999 2001 2003 2006 2009 2012
1972 1976 1980 1984 1988 1992 1996 2000 Year
Year
Redrawn from Semiconductor Industry Association (SIA)
National Technology Roadmap, 1997
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 ULSI Chip

► Gross world product (GWP) and sales

volumes of the electronics, automobile,
Intel Corporation, Pentium III semiconductor, and steel industries from
1980 to 2000 and projected to 2010.
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 IC Product #1:
Semiconductor Memory Devices

► (a) A schematic diagram of the first nonvolatile semiconductor ► Exponential increase of dynamic random access
memory (NVSM) with a floating gate. (b) A limiting case of the memory (DRAM) density versus year based on the
floating-gate NVSM—the single-electron memory cell. Semiconductor Industry Association (SIA) roadmap.

2005 VLSI TECH. NVSM : non-volatility; high device density; low-

中山電機 黃義佑 power consumption; electrical rewritability. 22
 IC Product #2 : Microprocessor Chips
Moore’s Law for Microprocessors
The number of transistors on a chip double every (12) 18 months.

100M

10M 500
Pentium Pro
Pentium
Transistors

Advanced Micro Devices 80486 25

1M

80386

100K 80286 1.0

8086

10K .1
8080

Intel Corporation
4004 .01
1975 1980 1985 1990 1995 2000
2005 VLSI TECH. Year
中山電機 黃義佑 Proceedings of the IEEE, January, 1998, © 1998 IEEE 23
 Moore’s Law
„ Intel co-founder Gordon Moore notices in 1964
„ Number of transistors doubled every 12 months
„ Slowed down in the 1980s to every 18 months
„ Amazingly still correct likely to keep until 2010

Gordon Moore
Intel Co-Founder and Chairmain
Emeritus

With Moore’s Law, IC

products can reach low
costs, improve performance,
and increase the functions.
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 Start-Up Cost of Wafer Fabs

$100,000,000,000
Actual Costs
Projected Costs

$10,000,000,000
Cost

$1,000,000,000

$100,000,000

$10,000,000
1970 1980 1990 2000 2010 2020
Year
2005 VLSI TECH. Used with permission from Proceedings of IEEE, January, 1998 © 1998 IEEE
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 Productivity Measurements in a Wafer Fab
Misprocessing

Photo Ion Implant Diffusion

Production Bay Production Bay Production Bay
12
Rework Scrap
9 3 Production
Equipment
6
Production Equipment Inspection Production Inspection Inspection
Cycle Time Equipment
per Operation
Time In Time Out

Wafer Starts
Wafer Moves
Wafer Outs
11 22 33 44
55 66 77 88 99 10 11
10 11
11
12 13 14 15 16 17 18 22 33 44 55 66 77 88
12 13 14 15 16 17 18
19 99 10
10 11
11 12
12 13
13 14
14 15
15
19 20
20 21
21 22
22 23
23 24
24 25
25
26 16 17 18 19 20 21 22
16 17 18 19 20 21 22
26 27
27 28
28 29
29 30
30 31
31
23
23 24
24 25
25 26
26 27
27 28
28 29
29
Production Inspection Production Inspection
Production Inspection 30
30 31
31
Equipment Equipment
Equipment

Etch Thin Films Metallization

Production Bay Production Bay Production Bay

Production Cycle Time = (Date and Time of Wafer Start) - (Date and Time of Wafer Out)
2005 VLSI TECH. Wafer Outs = Wafer Starts - Wafers Scrapped
中山電機 黃義佑 Operator Efficiency = Theoretical Cycle Time / Actual Cycle Time 26
 Equipment Technician in a Wafer Fab

2005 VLSI TECH.

中山電機 黃義佑 Photograph courtesy of Advanced Micro Devices 27
 Technician in Wafer Fab

2005 VLSI TECH. Photo courtesy of Advanced Micro Devices

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