Professional Documents
Culture Documents
Objective:: C E L Sig B C e Supply in L
Objective:: C E L Sig B C e Supply in L
Objective:: C E L Sig B C e Supply in L
Procedure:
1. Consider the circuit of BJT common emitter amplifier as shown in Figure 1. Use R1=10
KΩ, R2=1 KΩ, RC=1 KΩ, RE=470Ω, RL=10KΩ, Rsig= 50Ω, and Cb, Cc, Ce, Csupply=10µF,
Cin=22pF, CL=220pF.
-0
-20
-40
-60
1.0Hz 10Hz 100Hz 1.0KHz 10KHz 100KHz 1.0MHz 10MHz 100MHz 1.0GHz
DB(V(VL)/0.58)
Frequency
Frequency versus gain plot on semi log paper
Table 2
Conclusion:
Compare the simulated and calculated results & explain the reason for difference.
There are so many reasons that simulated and calculated results are not matched. Some of the
primary reasons are given below.
• In Theoretical Calculations sometimes we make approximation to simplify our
calculations so that we can calculated values of different parameters easily without any
complications.
Example: As we know that 𝐼𝐵 = (𝛽 + 1)𝐼𝑐 but often we approximate this result by 𝐼𝑐 = 𝛽𝐼𝐵 .
• Another reason is that there are some parasitic capacitances that are always present in the
circuit we often ignore that capacitances during simulations become another reason of
difference in theoretical and simulated result.
• Another important fact is that students are not very expert in using simulations software
they often make mistakes in settings of simulation and actually they did not how the
simulation software treat with different parameters of the circuit.
Another important factor needs to mention is human error often simulation circuit provides
accurate results but most of the student are not capable of reading different parameters of the
circuit accurately
Table 3
𝐈𝐧𝐩𝐮𝐭 𝐈𝐦𝐩𝐞𝐝𝐚𝐧𝐜𝐞
𝑍𝑖𝑛 = 𝑟𝑖 ∥ 𝑅𝐵
𝑍𝑖𝑛 = 𝛽(𝑟𝑒′ + 𝑟𝐿 ) ∥ 𝑅𝐵
𝑍𝑖𝑛 = 100(31.26 + 448.90) ∥ 909.09
𝑍𝑖𝑛 = 892.198Ω
𝐎𝐮𝐭𝐩𝐮𝐭 𝐈𝐦𝐩𝐞𝐝𝐚𝐧𝐜𝐞
𝑅𝐵′
𝑍𝑜𝑢𝑡 = 𝑅𝐸 ∥ (𝑟𝑒′ + )
𝛽+1
𝑅𝐵′ = 𝑅𝐵 ∥ 𝑟𝑠 = 909.09 ∥ 50
𝑅𝐵′ = 47.39Ω
47.39
𝑍𝑜𝑢𝑡 = 470 ∥ (31.25 + )
101
𝑍𝑜𝑢𝑡 = 29.722Ω
𝐕𝐨𝐥𝐭𝐚𝐠𝐞 𝐆𝐚𝐢𝐧
𝑟𝐿
𝐴𝑣 = ′
𝑟𝑒 + 𝑟𝐿
𝑅𝑐 ∥ 𝑅𝐿
𝐴𝑣 =
𝑟𝑒′ + 𝑟𝐿
1𝑘 ∥ 10𝑘
𝐴𝑣 =
31.2604 + 909.09
𝐴𝑣 = 0.9667Ω
𝐋𝐎𝐖𝐄𝐑 𝐂𝐔𝐓𝐎𝐅𝐅 𝐅𝐑𝐄𝐐𝐔𝐄𝐍𝐂𝐘
𝐂𝐮𝐭𝐨𝐟𝐟 𝐝𝐮𝐞 𝐭𝐨 𝐂𝐬:
1
𝑓𝐿𝑆 =
2𝜋𝑅𝑒𝑞1 𝐶𝑠
1
𝑓𝐿𝑆 =
2𝜋(942.3498 + 50)(10𝑢)
𝑓𝐿𝑆 = 16.8891𝐻𝑧
𝐂𝐮𝐭𝐨𝐟𝐟 𝐝𝐮𝐞 𝐭𝐨 𝐂𝐄 :
1
𝑓𝐿𝐸 =
2𝜋𝑅𝑒𝑞2 𝐶𝐸
1
𝑓𝐿𝐸 =
2𝜋(10.029𝑘)(10𝑢)
𝑓𝐿𝐸 = 1.58𝐻𝑧
As these frequencies are very close so lower cutoff frequency of amplifier will
be sum of 𝒇𝑳𝑬 𝒂𝒏𝒅 𝒇𝑳𝑺 :
𝑓𝐿 = 𝑓𝐿𝐸 + 𝑓𝐿𝑆
𝑓𝐿 = 1.58 + 16.891
𝑓𝐿 = 18.475𝐻𝑧
Higher Cutoff Frequency Calculations
𝑅𝑇ℎ𝑖 = 𝑅𝑠 ∥ 𝑟𝑖𝑛
𝑟𝑖𝑛 = 𝑅𝐵 ∥ 𝑟𝑖
𝑟𝑖 = 𝛽(𝑟𝑒′ + 𝑟𝐿 ) ∴ 𝑟𝐿 = 𝑅𝐿 ∥ 𝑅𝐶
𝑟𝑖 = 100(31.26 + 448.90)
𝑟𝑖 = 48.016𝑘Ω
𝑟𝑖𝑛 = 𝑅𝐵 ∥ 𝑟𝑖
𝑟𝑖𝑛 = 909.09 ∥ 48.016𝑘
𝑟𝑖𝑛 = 892.19Ω
𝑅𝑇ℎ𝑖 = 𝑅𝑠 ∥ 𝑟𝑖𝑛
𝑅𝑇ℎ𝑖 = 47.39Ω
𝐶𝑖 = 𝐶𝑤𝑖 + 𝐶𝑏𝑒
𝐶𝑖 = 𝐶𝑤𝑖 + 𝐶𝜋
𝐶𝑖 = 22𝑃 + 18𝑃
𝐶𝑖 = 40𝑃𝐹
1
𝑓𝐻𝑖 =
2𝜋(47.39)(40𝑃𝐹)
𝑓𝐻𝑖 = 83.960𝑀𝐻𝑧
𝑅𝑇𝐻𝑜 = 𝑟𝑜𝑢𝑡
𝑅𝐵′
𝑅𝑇𝐻𝑜 = 𝑅𝐸 ∥ (𝑟𝑒′ + )
𝛽+1
𝑅𝐵′ = 𝑅𝐵 ∥ 𝑟𝑠 = 909.09 ∥ 50
𝑅𝐵′ = 47.39Ω
47.39
𝑅𝑇𝐻𝑜 = 470 ∥ (31.260 + )
100 + 1
𝐶𝑜 = 𝐶𝑊𝑂 + 𝐶𝑏𝑐
𝐶𝑜 = 𝐶𝑊𝑂 + 𝐶𝑏𝑐
𝐶𝑜 = 220𝑃 + 4𝑃
𝐶𝑜 = 224𝑃𝐹
1
𝑓𝐻𝑂 =
2𝜋𝑅𝑇𝐻𝑜 𝐶𝑜
1
𝑓𝐻𝑂 =
2𝜋(29.7226)(224𝑃)
𝑓𝐻𝑂 = 24.229𝑀𝐻𝑧
The Higher Cutoff Frequency of the amplifier is the minimum of 𝒇𝑯𝒊 𝒂𝒏𝒅 𝒇𝑯𝑶 .In this case
it is equal to 𝒇𝑯𝑶 = 𝟕𝟕𝟖. 𝟓𝟔𝟒𝑲𝑯𝒛.
0
V2
12Vdc
R2 R1
10k 1k
C13
C15
R4 Q1 10u
C7 4PF
Vin C17
10uF 1PF
50 Q2N3904 C14
C16 v out VL
18PF 10u
V3 R3
20m 1k R6 C10
0Vdc C8 470 220PF R7 10uF
22PF 10k C12
0
Bode-Plot of Common Collector Amplifier:
-20
-40
1.0Hz 10Hz 100Hz 1.0KHz 10KHz 100KHz 1.0MHz 10MHz
DB(V(VL)/0.0193)
Frequency
-4.0
-8.0
1.0Hz 10Hz 100Hz 1.0KHz 10KHz 100KHz 1.0MHz 10MHz
DB(V(VL)/V(Vin))
Frequency
Summarize your results in the table given below.
Table 4
Conclusion
Compare the simulated and calculated results & explain the reason for difference.
There are so many reasons that simulated and calculated results are not matched. Some of the
primary reasons are given below.
• In Theoretical Calculations sometimes we make approximation to simplify our
calculations so that we can calculated values of different parameters easily without any
complications.
Example:
As we know that 𝐼𝐵 = (𝛽 + 1)𝐼𝑐 but often we approximate this result by 𝐼𝑐 = 𝛽𝐼𝐵 .
• Another reason is that there are some parasitic capacitances that are always present in the
circuit we often ignore that capacitances during simulations become another reason of
difference in theoretical and simulated result.
• Another important fact is that students are not very expert in using simulations software
they often make mistakes in settings of simulation and actually they did not how the
simulation software treat with different parameters of the circuit.
Another important factor needs to mention is human error often simulation circuit provides
accurate results but most of the student are not capable of reading different parameters of the
circuit accurately.