Objective:: C E L Sig B C e Supply in L

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University of Engineering and Technology, Lahore

Department of Electrical Engineering


EE 213: Analog and Digital Electronics Circuits
Experiment 8
Roll #:2018-EE-317 Name: Hafiz Muhammad Sameer Jameel
Objective:
To study the frequency response of BJT common emitter amplifier, common collector
amplifier/emitter follower, and common base amplifier.

Part: 1 Frequency response of BJT common emitter amplifier


Components Required:
2N3904 BJT, 2×1KΩ, 2×10 KΩ, 470 Ω, resistors, and 4×10µF capacitors

Procedure:
1. Consider the circuit of BJT common emitter amplifier as shown in Figure 1. Use R1=10
KΩ, R2=1 KΩ, RC=1 KΩ, RE=470Ω, RL=10KΩ, Rsig= 50Ω, and Cb, Cc, Ce, Csupply=10µF,
Cin=22pF, CL=220pF.

Figure 1: Common Emitter Amplifier


2. Apply 20 mVPP, 1KHz from the signal generator, Find the mid band gain, input resistance,
output resistance of your amplifier circuit and Note down the values in Table 1.
3. Vary the frequency of the input signal from 1Hz to 5MHz and note down the gain of your
amplifier circuit in the following table and plot on the semi log graph. You can use
MATLAB or Excel to plot the gain as a function of frequency.
4. Calculate mid band gain, input impedance, output impedance, low cutoff frequency, and
high cutoff frequency of the given amplifier.
5. write down calculations and mention simulated circuit and simulated results in the space
provided below.

Frequency Gain Frequency Gain Frequency Gain


(Hz) (Hz) (Hz)
1 -0.0580 300 -19.3227 50 K -28.9178
2 -2.4106 400 -20.2993 60 K -28.8993
3 -3.7867 500 -21.0539 70 K -28.8582
4 -5.7632 600 -21.6753 80 K -28.8206
5 -5.5178 700 -22.1636 90 K -28.7773
6 -6.1393 800 -22.6075 100 K -28.7294
7 -6.6276 900 -23.007 200 K -27.984
8 -7.0714 1000 -23.3621 300 K -26.8988
9 -7.4574 2K -25.7147 400 K -25.5123
10 -7.8260 3K -27.0908 500 K -24.0307
20 -10.1787 4K -28.0673 600 K -22.602
30 -11.5991 5K -28.7973 700 K -21.083
40 -12.5313 6K -28.8344 800 K -19.785
50 -13.2859 7K -28.8635 900 K -18.515
60 -13.9073 8K -28.8900 1000 K -17.349
70 -14.3956 9K -28.8927 2M -10.073
80 -14.8395 10 K -28.9351 3M -6.9159
90 -15.239 20 K -28.9632 4M -5.2212
100 -15.5941 30 K -28.9569 5M -4.2764
200 -17.9467 40 K -28.9405
-
Table 1
𝐈𝐧𝐩𝐮𝐭 𝐈𝐦𝐩𝐞𝐝𝐚𝐧𝐜𝐞
Zin = βre′ ∥ R B
Zin = (100)(31.2604) ∥ R1 ∥ R 2
Zin = 31.26k ∥ 10k ∥ 1k
Zin = 883.4002Ω
𝐎𝐮𝐭𝐩𝐮𝐭 𝐈𝐦𝐩𝐞𝐝𝐚𝐧𝐜𝐞
Zout = R c ∥ ro
Zout = 1k ∥ ∞
Zout = 1k
𝐕𝐨𝐥𝐭𝐚𝐠𝐞 𝐆𝐚𝐢𝐧
𝑟𝐿
𝐴𝑣 = −
𝑟𝑒′
𝑅𝑐 ∥ 𝑅𝐿
𝐴𝑣 = −
𝑟𝑒′
1𝑘 ∥ 10𝑘
𝐴𝑣 = −
31.2604
𝐴𝑣 = −29.0812Ω
𝐋𝐎𝐖𝐄𝐑 𝐂𝐔𝐓𝐎𝐅𝐅 𝐅𝐑𝐄𝐐𝐔𝐄𝐍𝐂𝐘
𝐂𝐮𝐭𝐨𝐟𝐟 𝐝𝐮𝐞 𝐭𝐨 𝐂𝐬:
R i = R1 ∥ R 2 ∥ βre′
R i = 10k ∥ 1k ∥ 31.26k
883.4002Ω
1
fLS =
2π(R i + R s )Cs
1
fLS =
2π(883.4002 + 50)(10u)
fLS = 17.058Hz
𝐂𝐮𝐭𝐨𝐟𝐟 𝐝𝐮𝐞 𝐭𝐨 𝐂𝐜:
1
𝑓𝐿𝐶 =
2𝜋(𝑅𝑐 +𝑅𝐿 )𝐶𝐸
1
𝑓𝐿𝐶 =
2𝜋(1𝑘 + 10𝑘)(10𝑢)
𝑓𝐿𝑆 = 1.4468𝐻𝑧
𝐂𝐮𝐭𝐨𝐟𝐟 𝐝𝐮𝐞 𝐭𝐨 𝐂𝐄 :
1
𝑓𝐿𝐸 =
2𝜋𝑅𝑒 𝐶𝐸
𝑅𝑠′ = 𝑅𝑠 ∥ 𝑅1 ∥ 𝑅2 = 50 ∥ 10𝑘 ∥ 1𝑘
𝑅𝑠′ = 47.39Ω
𝑅𝑠′
𝑅𝑒 = 𝑅𝐸 ∥ ( + 𝑟𝑒′ )
𝛽
47.39
𝑅𝑒 = 470 ∥ ( + 31.2612Ω)
100
𝑅𝑒 = 29.7180Ω
1
𝑓𝐿𝐸 =
2𝜋(29.7180)(10𝑢)
𝑓𝐿𝐸 = 535.55𝐻𝑧
The Lower Cutoff Frequency is the maximum of 𝑓𝐿𝐶 , 𝑓𝐿𝐸 , 𝑓𝐿𝑆 .In this case it is equal
to 𝑓𝐿𝐸 = 535.55𝐻𝑧.
Higher Cutoff Frequency Calculations
R Thi = R s ∥ R1 ∥ R 2 ∥ βre′
𝑅𝑇ℎ𝑖 = 50 ∥ 10𝑘 ∥ 1𝑘 ∥ 100(31.2612)
𝑅𝑇ℎ𝑖 = 47.32Ω
𝐶𝑖 = 𝐶𝑤𝑖 + 𝐶𝑏𝑐 + 𝐶𝑀𝑖
𝐶𝑖 = 𝐶𝑤𝑖 + 𝐶𝑏𝑐 + 𝐶𝑏𝑐 (1 − 𝐴𝑣 )
𝐶𝑖 = 22𝑃 + 18𝑃 + 4𝑃(1 − (−29.08))
𝐶𝑖 = 160.32𝑃𝐹
1
𝑓𝐻𝑖 =
2𝜋(47.321)(160.32𝑃𝐹)
𝑓𝐻𝑖 = 200.978𝑀𝐻𝑧
𝑅𝑇𝐻𝑜 = 𝑅𝐶 ∥ 𝑅𝐿 ∥ 𝑟𝑜
𝑅𝑇𝐻𝑜 = 1𝑘 ∥ 10𝑘 ∥ ∞
𝑅𝑇𝐻𝑜 = 909.0909Ω
𝐶𝑜 = 𝐶𝑊𝑂 + 𝐶𝑐𝑒 + 𝐶𝑀𝑂
𝐶𝑜 = 220𝑃 + 1𝑃 + 4𝑃
𝐶𝑜 = 225𝑃𝐹
1
𝑓𝐻𝑂 =
2𝜋𝑅𝑇𝐻𝑜 𝐶𝑜
1
𝑓𝐻𝑂 =
2𝜋(909.0909)(225𝑃)
𝑓𝐻𝑂 = 778.090𝐾𝐻𝑧
The Higher Cutoff Frequency is the minimum of 𝒇𝑯𝒊 𝒂𝒏𝒅 𝒇𝑯𝑶 .In this case it is equal to
𝒇𝑯𝑶 = 𝟕𝟕𝟖. 𝟓𝟔𝟒𝑲𝑯𝒛.
Proteus Circuit For the calculations of Input and Output Impedance:
Proteus Simulated Circuit of Common Base Amplifier:

Bode-Plot of Common Collector Amplifier:

-0

-20

-40

-60
1.0Hz 10Hz 100Hz 1.0KHz 10KHz 100KHz 1.0MHz 10MHz 100MHz 1.0GHz
DB(V(VL)/0.58)
Frequency
Frequency versus gain plot on semi log paper

Summarize your results in the table given below.


Results Mid-band Lower Cutoff Upper cutoff Input Output
Gain (Am) Frequency Frequency (FH) Resistance (RIN) Resistance
(FL) Hz Ω (RL)
Hz Ω
Calculated -29.0812 535 778kΩ 868Ω 1kΩ

Simulated -29.2 530 776kΩ 909.0909Ω 1kΩ

Table 2
Conclusion:
Compare the simulated and calculated results & explain the reason for difference.
There are so many reasons that simulated and calculated results are not matched. Some of the
primary reasons are given below.
• In Theoretical Calculations sometimes we make approximation to simplify our
calculations so that we can calculated values of different parameters easily without any
complications.

Example: As we know that 𝐼𝐵 = (𝛽 + 1)𝐼𝑐 but often we approximate this result by 𝐼𝑐 = 𝛽𝐼𝐵 .
• Another reason is that there are some parasitic capacitances that are always present in the
circuit we often ignore that capacitances during simulations become another reason of
difference in theoretical and simulated result.
• Another important fact is that students are not very expert in using simulations software
they often make mistakes in settings of simulation and actually they did not how the
simulation software treat with different parameters of the circuit.
Another important factor needs to mention is human error often simulation circuit provides
accurate results but most of the student are not capable of reading different parameters of the
circuit accurately

Part: 2 Frequency response of BJT common Collector/Emitter follower


amplifier
Procedure:
1. Consider the circuit of BJT common collector amplifier as shown in Figure 2. Use R1=10
KΩ, R2=1 KΩ, RC=1 KΩ, RE=470Ω, RL=10KΩ, Rsig= 50Ω, and Cb, Cc, Ce, Csupply=10µF,
Cin=22pF, CL=220pF.

Figure 2: Common Collector Amplifier/Emitter Follower


2. Apply 20 mVPP, 1KHz from the signal generator, Find the mid band gain, input resistance,
output resistance of your amplifier circuit and Note down the values in Table 3.
3. Vary the frequency of the input signal from 1Hz to 5MHz and note down the gain of your
amplifier circuit in the following table and plot on the semi log graph. You can use
MATLAB or Excel to plot the gain as a function of frequency.
4. Calculate mid band gain, input impedance, output impedance, low cutoff frequency, and
high cutoff frequency of the given amplifier.
5. write down calculations and mention simulated circuit and simulated results in the space
provided below.

Frequency Gain Frequency Gain Frequency Gain


(Hz) (Hz) (Hz)
1 0.027549 300 0.582614 50 K 0.873198
2 0.095826 400 0.610430 60 K 0.873197
3 0.135022 500 0.631924 70 K 0.873196
4 0.162838 600 0.649626 80 K 0.873194
5 0.184333 700 0.666063 90 K 0.873192
6 0.202034 800 0.677442 100 K 0.873190
7 0.217207 900 0.688822 200 K 0.873159
8 0.229850 1000 0.698937 300 K 0.873107
9 0.241230 2K 0.767214 400 K 0.873132
10 0.250080 3K 0.806410 500 K 0.872938
20 0.319622 4K 0.834226 600 K 0.872824
30 0.358818 5K 0.855720 700 K 0.872685
40 0.386634 6K 0.873197 800 K 0.872535
50 0.409393 7K 0.873198 900 K 0.872354
60 0.425830 8K 0.873199 1000 K 0.872164
70 0.441002 9K 0.873199 2M 0.868972
80 0.453646 10 K 0.873200 3M 0.863801
90 0.465026 20 K 0.873200 4M 0.856709
100 0.473876 30 K 0.873200 5M 0.847885
200 0.543418 40 K 0.873199

Table 3

𝐈𝐧𝐩𝐮𝐭 𝐈𝐦𝐩𝐞𝐝𝐚𝐧𝐜𝐞
𝑍𝑖𝑛 = 𝑟𝑖 ∥ 𝑅𝐵
𝑍𝑖𝑛 = 𝛽(𝑟𝑒′ + 𝑟𝐿 ) ∥ 𝑅𝐵
𝑍𝑖𝑛 = 100(31.26 + 448.90) ∥ 909.09
𝑍𝑖𝑛 = 892.198Ω
𝐎𝐮𝐭𝐩𝐮𝐭 𝐈𝐦𝐩𝐞𝐝𝐚𝐧𝐜𝐞
𝑅𝐵′
𝑍𝑜𝑢𝑡 = 𝑅𝐸 ∥ (𝑟𝑒′ + )
𝛽+1
𝑅𝐵′ = 𝑅𝐵 ∥ 𝑟𝑠 = 909.09 ∥ 50
𝑅𝐵′ = 47.39Ω
47.39
𝑍𝑜𝑢𝑡 = 470 ∥ (31.25 + )
101
𝑍𝑜𝑢𝑡 = 29.722Ω
𝐕𝐨𝐥𝐭𝐚𝐠𝐞 𝐆𝐚𝐢𝐧
𝑟𝐿
𝐴𝑣 = ′
𝑟𝑒 + 𝑟𝐿
𝑅𝑐 ∥ 𝑅𝐿
𝐴𝑣 =
𝑟𝑒′ + 𝑟𝐿
1𝑘 ∥ 10𝑘
𝐴𝑣 =
31.2604 + 909.09
𝐴𝑣 = 0.9667Ω
𝐋𝐎𝐖𝐄𝐑 𝐂𝐔𝐓𝐎𝐅𝐅 𝐅𝐑𝐄𝐐𝐔𝐄𝐍𝐂𝐘
𝐂𝐮𝐭𝐨𝐟𝐟 𝐝𝐮𝐞 𝐭𝐨 𝐂𝐬:
1
𝑓𝐿𝑆 =
2𝜋𝑅𝑒𝑞1 𝐶𝑠
1
𝑓𝐿𝑆 =
2𝜋(942.3498 + 50)(10𝑢)
𝑓𝐿𝑆 = 16.8891𝐻𝑧
𝐂𝐮𝐭𝐨𝐟𝐟 𝐝𝐮𝐞 𝐭𝐨 𝐂𝐄 :
1
𝑓𝐿𝐸 =
2𝜋𝑅𝑒𝑞2 𝐶𝐸
1
𝑓𝐿𝐸 =
2𝜋(10.029𝑘)(10𝑢)
𝑓𝐿𝐸 = 1.58𝐻𝑧
As these frequencies are very close so lower cutoff frequency of amplifier will
be sum of 𝒇𝑳𝑬 𝒂𝒏𝒅 𝒇𝑳𝑺 :
𝑓𝐿 = 𝑓𝐿𝐸 + 𝑓𝐿𝑆
𝑓𝐿 = 1.58 + 16.891
𝑓𝐿 = 18.475𝐻𝑧
Higher Cutoff Frequency Calculations
𝑅𝑇ℎ𝑖 = 𝑅𝑠 ∥ 𝑟𝑖𝑛
𝑟𝑖𝑛 = 𝑅𝐵 ∥ 𝑟𝑖
𝑟𝑖 = 𝛽(𝑟𝑒′ + 𝑟𝐿 ) ∴ 𝑟𝐿 = 𝑅𝐿 ∥ 𝑅𝐶
𝑟𝑖 = 100(31.26 + 448.90)
𝑟𝑖 = 48.016𝑘Ω
𝑟𝑖𝑛 = 𝑅𝐵 ∥ 𝑟𝑖
𝑟𝑖𝑛 = 909.09 ∥ 48.016𝑘
𝑟𝑖𝑛 = 892.19Ω
𝑅𝑇ℎ𝑖 = 𝑅𝑠 ∥ 𝑟𝑖𝑛
𝑅𝑇ℎ𝑖 = 47.39Ω
𝐶𝑖 = 𝐶𝑤𝑖 + 𝐶𝑏𝑒
𝐶𝑖 = 𝐶𝑤𝑖 + 𝐶𝜋
𝐶𝑖 = 22𝑃 + 18𝑃
𝐶𝑖 = 40𝑃𝐹
1
𝑓𝐻𝑖 =
2𝜋(47.39)(40𝑃𝐹)
𝑓𝐻𝑖 = 83.960𝑀𝐻𝑧
𝑅𝑇𝐻𝑜 = 𝑟𝑜𝑢𝑡
𝑅𝐵′
𝑅𝑇𝐻𝑜 = 𝑅𝐸 ∥ (𝑟𝑒′ + )
𝛽+1
𝑅𝐵′ = 𝑅𝐵 ∥ 𝑟𝑠 = 909.09 ∥ 50
𝑅𝐵′ = 47.39Ω
47.39
𝑅𝑇𝐻𝑜 = 470 ∥ (31.260 + )
100 + 1
𝐶𝑜 = 𝐶𝑊𝑂 + 𝐶𝑏𝑐
𝐶𝑜 = 𝐶𝑊𝑂 + 𝐶𝑏𝑐
𝐶𝑜 = 220𝑃 + 4𝑃
𝐶𝑜 = 224𝑃𝐹
1
𝑓𝐻𝑂 =
2𝜋𝑅𝑇𝐻𝑜 𝐶𝑜
1
𝑓𝐻𝑂 =
2𝜋(29.7226)(224𝑃)
𝑓𝐻𝑂 = 24.229𝑀𝐻𝑧
The Higher Cutoff Frequency of the amplifier is the minimum of 𝒇𝑯𝒊 𝒂𝒏𝒅 𝒇𝑯𝑶 .In this case
it is equal to 𝒇𝑯𝑶 = 𝟕𝟕𝟖. 𝟓𝟔𝟒𝑲𝑯𝒛.
0

V2
12Vdc

R2 R1
10k 1k
C13

C15
R4 Q1 10u
C7 4PF
Vin C17
10uF 1PF
50 Q2N3904 C14
C16 v out VL
18PF 10u
V3 R3
20m 1k R6 C10
0Vdc C8 470 220PF R7 10uF
22PF 10k C12

0
Bode-Plot of Common Collector Amplifier:

-20

-40
1.0Hz 10Hz 100Hz 1.0KHz 10KHz 100KHz 1.0MHz 10MHz
DB(V(VL)/0.0193)
Frequency

Frequency versus gain plot on semi log paper

-4.0

-8.0
1.0Hz 10Hz 100Hz 1.0KHz 10KHz 100KHz 1.0MHz 10MHz
DB(V(VL)/V(Vin))
Frequency
Summarize your results in the table given below.

Results Mid-band Lower Cutoff Upper cutoff Input Output


Gain (Am) Frequency Frequency (FH) Resistance (RIN) Resistance
(FL) Hz Ω (RL)
Hz Ω
Calculated 0.9667 16.889 24.3MHz 892.19888 29.7226

Simulated 0.939 16.827 24.9MHz 900 30

Table 4

Conclusion
Compare the simulated and calculated results & explain the reason for difference.
There are so many reasons that simulated and calculated results are not matched. Some of the
primary reasons are given below.
• In Theoretical Calculations sometimes we make approximation to simplify our
calculations so that we can calculated values of different parameters easily without any
complications.

Example:
As we know that 𝐼𝐵 = (𝛽 + 1)𝐼𝑐 but often we approximate this result by 𝐼𝑐 = 𝛽𝐼𝐵 .
• Another reason is that there are some parasitic capacitances that are always present in the
circuit we often ignore that capacitances during simulations become another reason of
difference in theoretical and simulated result.
• Another important fact is that students are not very expert in using simulations software
they often make mistakes in settings of simulation and actually they did not how the
simulation software treat with different parameters of the circuit.
Another important factor needs to mention is human error often simulation circuit provides
accurate results but most of the student are not capable of reading different parameters of the
circuit accurately.

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