Design and Control of a Three-phase Active Rectifier
Under Non-ideal Operating Conditions
Marco Liserre and Antonio Dell’Aquila
Department of Electrotechnical and Electronic
Polytechnic of Bari
Bari, Italy
liserre(dellaqui)@poliba.it
Abstract - Industrial engineers face many non-ideal operating
conditions in the design of the active rectifiers: too long
computation time, presence of acquisition filters, ac phases
unbalance, location of the grid voltage sensors after a dominant
reactance and passive damping if an LCL-filter is used. The
phenomena generated by these conditions are generally non-
linear. Hence the first step is to find out how much each of them
affects the system’s overall performance. Then new rules for the
tuning of the controllers can be developed on the basis of the
analysis of the transient behavior and of the steady state
harmonic content of the dc voltage and of the ac current. This
procedure is developed in this paper through simulations and
laboratory tests.
I. INTRODUCTION
The harmonic stress on the grid caused by power
electronic systems is limited by many design guidelines,
recommendations and standards. Thus the converters that
lower the effects on the grid are gaining more and more
attention. Among them is the boost active rectifier (Fig. 1). It
can absorb almost sinusoidal input current with a near unity
power factor, working in both rectifying and regenerative
mode, and it can control the dc voltage [1]. Thus the active
rectifier is the preferred solution in applications such as drives
that work frequently in regenerative mode like crane, elevator,
centrifuge, braking of large inertia or wind turbine. However
the field of applications of the active rectifier is limited by the
cost of the hardware and of the software i.e. by the number of
switches, by the switching frequency needed and by the
control complexity required.
The basic requirements of a good design can be fulfilled
with a PI-based cascade control structure for the active and the
reactive power. However, especially if moderate switching
frequencies and little values of the passive elements are
adopted, the performance of the system could considerable be
decreased due to phenomena such as too long computation
time, presence of acquisition filters, ac phase unbalance,
position of the grid voltage sensors after a dominant reactance
and presence of passive damping if an LCL-filter is used.
This work has been realized with the financial support of the Italian
Ministero della Istruzione, Università e Ricerca (CLUSTER 13).
0-7803-7420-7/02/$17.00 © 2002 IEEE
1181
Frede Blaabjerg
Institute of Energy Technology
Aalborg University
Aalborg, Denmark
fbl@iet.auc.dk
io iL
Sa Sb Sc
L, R iC
+
ea iag a
eb ibg b vo
n C
ec icg c
-
Sa Sb Sc
Fig. 1. Three-phase active rectifier with an L-filter.
Thus industrial engineers need precise criteria for the
design and control of the active rectifier valid under the
mentioned non-ideal conditions.
First of all a too long computation time or the use of filters
on the measured electrical quantities cause delays in the
voltage and current loops resulting in higher overshoots and
decrease of the tracking capability. These effects have never
been studied in details in the active rectifier field.
On the contrary it is well known that the grid unbalance
causes even harmonics at the dc output and odd harmonics in
the input current [2]. Some solutions have been studied such
as the use of negative sequence in the reference current [3]
that unfortunately leads to uncontrollability of the power
factor or the use of two current controllers for positive and
negative sequences [4] which also can create stability
problems.
The opposite situation in terms of harmonics (i.e. odd
harmonics at the dc output and even harmonics in the input
current) is caused by the placement of the grid voltage sensors
after a dominant reactance. This can be the case of an LCL-
filter based active rectifier. In fact the ac capacitor voltage is
sensed to perform an active damping and then used also for
the orientation of the dq-frame instead of the grid voltage in
order to avoid the use of too many sensors [5].
If instead of an active damping, resistors are inserted in
series with the capacitors to damp the LCL-filter. This can
cause harmonics in the dc voltage and in the ac current and the
change of the dynamics of the system.
All these non-linear phenomena are usually neglected in
the tuning process of the PI-controllers that is usually done
following the same criteria adopted for the electric drives [6].
Thus the current loop (inner loop) that is common for the two  di d (t ) 1 1 
applications is tuned following the "technical optimum" and  − ωi q (t ) = − Rid (t ) + e d (t ) − p d (t )v o (t )
 dt L 2 
the dc voltage loop (outer loop) is designed as the  di (t ) (3)
speed/torque loop, i.e. with the “symmetrical optimum”.  q + ωi d (t ) = 1 − Ri q (t ) + e q (t ) − 1 
p q (t )v o (t )
 dt L  2 
The design is based on the assumption that the inner and
the outer loops are decoupled. However, in the active rectifiers Eq. (3) shows how in the dq-frame the d and q differential
the non-ideal operating conditions, such as too long equations for the current are dependent due to the cross-
computation time, presence of acquisition filters, ac phase coupling terms ωiq(t) and ωid(t).
unbalance, position of the grid voltage sensors after a
dominant reactance and presence of passive damping if a Moreover (2) assumes the form of:
LCL-filter is used, lead to the generation of harmonics that d v o (t ) 1  3 
make the inner and outer loops coupled. Moreover both the dt C 4
[ ]
=  p d (t )i d (t ) + p q (t )i q (t ) − i L (t ) (4)

technical and symmetrical optimum are oriented to the
optimisation of the dynamic performances that are crucial for If instead an LCL-filter is used on the ac side the model
electric drives but not so much for active rectifiers. Instead the can be modified as reported in [7].
minimisation of the ripple in the dc voltage and of the low
frequency harmonics in the ac current are the main aims for III. CONTROL OF THE ACTIVE RECTIFIER
the active rectifier. Thus new tuning rules capable to minimise The Voltage Oriented Control (VOC) of the rectifier is
the effects of the non-ideal operating conditions are needed for based on the use of the dq-frame oriented such as the d-axis is
the active rectifier’s controllers. aligned on the grid voltage vector as shown in Fig. 2.
In this paper the non-linear phenomena and the tuning The reference current d-component i*d is used to perform
strategies for the controllers to reduce their negative influence the dc voltage control while the reference current q-
on the system’s performance are detailed studied using component i*q is controlled to obtain a unity power factor. The
computer simulations and laboratory tests. control structure is defined as “cascade” (Fig. 3). In the
following the sampling period will be indicated with Ts.
II. MODEL OF THE ACTIVE RECTIFIER
The state of the rectifier is modelled by means of a switching A. Current controller design
space-vector defined with the switching functions p j (t ) (j = The ac current controllers are designed on the basis of an
a, b, c): average model of the L-filter based active rectifier. If there is a
LCL-filter on the ac side the capacitor can be neglected [7] but
p(t ) = (2 3)( pa (t ) + α ⋅ pb (t ) + α 2 ⋅ pc (t ) ) the performances of the system with the LCL-filter and its
With these assumptions the mathematical model of the passive or active damping should be verified.
system, if an L-filter on the ac side is employed, is given by:
q β
d i (t ) 1  1 
= − Ri (t ) + e (t ) − p(t )v o (t ) (1)
dt L 2  i (t )
ω
d v o (t ) 1  3  
∨

=  Re  p(t ) i (t ) − i L (t ) (2)
dt C 4    iq id d
e (t )
where v (t ) , i (t ) and e (t ) are the space-vectors of the
α
rectifier input voltage, current and grid voltage; i o (t ) , i C (t )
and i L (t ) are the rectifier output current, the capacitor current Fig. 2. Voltage oriented control of the active rectifier in the dq frame.
∨
and the load current. The symbol “ ” indicates the complex id ed
_
conjugate. v*o i*d ud + + vd,av
_ PI PI
Eqs. (1)-(2) show that the system is non-linear and its + + +
behaviour depends on p (t ) . vo ωL

By considering a dq-frame that rotates at the angular speed ωL

ω, where ω = 2πf and f is the fundamental frequency of the uq _ vq,av
0 PI
power grid’s voltage waveform, (1) becomes: *
i q + _ + +
iq eq
Fig. 3. Basic scheme of a cascade controller for the active rectifier.

1182
 The continuous switching vector, which components are The voltage loop is the outer loop and the current loops are
the duty cycle of each converter leg −1 ≤ s j (t ) ≤ 1 (j = a, b, c), the inner loops. These internal loops are designed to achieve
is defined as: short settling times. On the other hand, the main goals of the
outer loop are optimum regulation and stability thus the
s (t ) = (2 3)(sa (t ) + α ⋅ sb (t ) + α 2 ⋅ sc (t ) ) voltage loop could be designed to be somewhat slower (5-20
times). Therefore, the internal and the external loops can be
Moreover (3) can be linearized considering vo(t)=Vo with considered decoupled, and thereby, the actual grid current
Vo constant, thus instead of the continuous switching vector components can be considered equal to their references when
the average converter voltage is used and (4) can be rewritten as: designing the outer dc controller. Thus on the basis of the
average version of (4) and considering the current equal to its
 R   1 
d id (t ) − L ω  id (t ) − L 0  v (t ) reference value id(t)=i*d(t), iq(t)=i*q(t)=0 and sd(t)=Sd,
d , av
 =  + 1   vq , av (t )
sq(t)=Sq:
dt iq (t )  − ω − R  iq (t )  0 − 
 L  L dvo (t ) 1  3 
(5) =  [Sd id* (t )] − iL (t ) (7)
 1  dt C 4 
 L 0  ed (t )
+ If a cascade controller is used the dc voltage control is
1  eq (t )
0  performed through the selection of the input current value
 L i*d(t).
Eq. (5) is linear. Once the compensation of the grid voltage In Fig. 5 the voltage control loop in the S-domain is
is done and the current loops are decoupled, both control loops reported, including the current loop transfer function and a PI-
of active and reactive power appear as in Fig. 4, where w is controller that can be tuned following the “optimum
the disturbance that takes into account all the neglected symmetrical” [8]. Indicating with ωc the crossover frequency
phenomena. The G(z) is the Zero Order Hold (ZOH) of the open loop transfer function and with ψ the phase
equivalent of the plant transfer function. This is justified by margin at that frequency is:
the fact that the Zero Order Hold is a suitable model of the
analogue to digital conversion. The ZOH introduces half a 1
ωc =
sampling period delay that is the value that should be 3aTs
considered to be taken into account of the modulator (8)
1 + cosψ
influence. a=
sinψ
To achieve the “technical optimum” (i.e. 5% overshoot)
[8], the PI integrator time constant TI should be chosen equal where a is the parameter responsible both of the cross-over
to the plant time constant T and the constant kp: frequency and of the phase margin. Thus the controller’s
parameters are:
L
kP = (6) 4C
3Ts kP =
9aSd Ts (9)
Consequently the current loop’s bandwidth fbi is:
TI = 3a Ts 2

1 1
f bi = ≈ (7) To have the two complex conjugate poles of the closed
6πTs 20Ts
loop transfer function critically damped (a = 2.4):
B. Voltage controller design C
k P = 0.19 ⋅
The dc voltage control is achieved through the control of S d Ts (10)
the power exchanged by the converter. The increase or TI = 17 ⋅ Ts
decrease of the dc voltage level is obtained taking more or less
power from the grid in respect to what is required by the dc Consequently the voltage loop’s bandwidth fbv is:
load, thus changing the value of the reference for the ac ωc 1 1
current control loops. f bv = = ≈ (11)
2π 6πaTs 50Ts

w PI current loop plant

Ts iL
i* (1 + )z − 1 _ i * vo
vo  1  1 _ 3S d 1
+_ z −1 − kP
TI + G(z) +_ k P 1 +  +
z −1  TIs 1 + 3Ts s 4 Cs

Fig. 4. Current control loop in Z-domain. Fig. 5. Voltage control loop in the S-domain.

1183
 IV. NON-IDEAL OPERATING CONDITIONS
The non-ideal operating conditions lead to the generation Let’s introduce the switching functions:
∞
of harmonics that influence both the active rectifier’s input p a (t ) = ∑ Ama cos[ m(ωt + ϕ a )]
and output thus both ac and dc controls. Generally, these low m =1
frequency harmonics become particularly dangerous because ∞
 2π 
the design of the loops is based on the hypothesis that they are pb (t ) = ∑ Amb cos[ mωt − + ϕ b ] (13)
decoupled, due to the difference in the time constants, and m =1  3 
thus it is possible to linearise them. ∞
 2π 
pc (t ) = ∑ Amc cos[ m ωt + + ϕ c ]
The current control loop is designed considering constant m =1  3 
dc voltage due to the slowness of the voltage loop. Moreover,
the load changes produce transients in the voltage loop If the VSC is driven in order to generate balanced
suffering only a little the consequent transient of the current voltages then:
loop that is faster. However, low order harmonics contradict Ama = Amb = Amc = Am (14)
both of these considerations. In fact if the dc voltage has a low
frequency ripple it can not be considered constant for the Moreover to have the maximum output dc voltage:
current loop design.
ϕ a = ϕb = ϕc = 0 (15)
In the following each of the considered phenomena will be
analyzed. Then the current fed by the VSC on the dc side is:

A. Delays 3  ∨

io (t ) = Re  p (t ) i (t )  = iop (t ) + ion (t ) (16)
The presence of delays in the control loops is quite 4  
common and can be caused by too long computation time or where:
the presence of filters on the feedback signals. Generally, if a
symmetrical PWM modulation is adopted the sampled 3  ∨

iop (t ) =Re p (t ) i p (t ) 
currents during zero vector on-time are ripple-free. Thus the 4   (17)
filters adopted on the currents are needed only to cut high 3  ∨

frequency spikes and they introduce only little delays. On the io (t ) = Re p (t ) in (t ) 
n

4  
contrary if the elaboration time of the algorithm takes more
than one sampling period the modulator input can not be then substituting (12) and (13) in (16) and considering the
refreshed at the end of the period. Thus, if the system has been effect of the interaction of the first harmonic of the switching
designed to refresh the duty cycle every sample period, one Ts function with the positive and negative sequences of the grid
more is introduced in the loop (Fig. 6). The effects are current:
decrease of stability margin and increase of the overshoot. io (t ) = I o + I o 2 cos( 2ωt + ϕ n ) (18)
B. Grid unbalance where:
The grid voltage unbalance can be modelled considering 3
an inverse sequence in the grid voltages that generate an Io = 2 A1 I p cos ϕ p
4
inverse sequence in the grid current. Balanced grid voltages
and unbalance phase impedances can also cause this effect. 3
Io2 = 2 A1 I n
Thus: 4
i (t ) = i p (t ) + in (t ) (12) The second part of (18) is one of the most dangerous low
frequency harmonics in io(t). This second harmonic comes
where the subscripts “p” and “n” address the positive and from the interaction of the fundamental component of the
negative sequences of the electrical quantities. switching vector p(t ) and the fundamental component of the
Starting from the positive and negative sequences in the inverse current. Assuming a linear dc load if the dc current
input ac currents one can demonstrate the presence of even io(t) has a second order harmonic also the dc voltage ripples at
harmonics in the dc current that create even harmonics in the the same frequency:
dc voltage.
vo (t ) = Vo + Vo2 cos(2ωt + ϕ 2 ) (19)
additional delay w
i* _ i However, the grid current is also a function of the dc
+_ z −1
z −1
D(z) + G(z) voltage. The interaction of the fundamental component of the
switching vector p(t ) with the second order harmonic of the
dc voltage creates a third order harmonic in the reflected input
voltage, which allows a third order (not zero sequence)
Fig. 6. Current control loop with one delay more due to too
long calculation time. harmonic current to flow into the grid.

1184
 In fact the converter ac side voltage due to the first
harmonic of the switching function:
1 L
v a (t ) p = vo (t ) A cos(ωt )
a1
2 5Ts
from (19) and (20):
1 1
v a (t ) p = Vo A cos(ωt ) + Vo 2 A cos(3ωt + ϕ 3 )
a1
2 4
The second part of (21) produces a third harmonic also in
the grid current.
C. Position of the grid sensors
If the grid voltage that is used for the dq-frame’s
orientation is measured after a not negligible reactance, the
grid current produces a voltage drop. Consequently, a
derivative action is inserted in the system leading to
oscillations characterised by even harmonic content in the
current and odd harmonic content in the dc voltage.
D. Passive damping of the LCL-filter
If an LCL-filter is used on the ac side, the use of a passive
damping in series with the capacitors leads the poles of the
current closed loop to be more damped thus the system suffers
a slow down. Moreover, also a low frequency oscillation both
in the ac current and in the dc voltage is produced.
For example if a sample period delay more is present in the
current loop, choosing:
(20) kP = (22)
then the poles are again critically damped as shown in Fig.
7 and Fig. 8. Thus, a decrease of the current controller PI’s
(21) proportional gain gives good results.
B. Effect of grid unbalance
Grid unbalance effects are particularly heavy if reduced
values of the dc side capacitor is used. Instead the ac side
inductors values have less influence. An increase of the
switching/sampling frequency can also decrease the effects of
the unbalance.
On the contrary once chosen the values of the passive
elements of the system (especially of the dc capacitor C) and
of the switching frequency, a good tuning procedure of the PI
voltage controller can decrease the effects of the unbalance.
With reference to the “symmetrical optimum” tuning
procedure reported in Section III, a change of the parameter a
and thus of the cross-over frequency and of the phase margin
as defined in (8) does not give good results. More in detail a
change of the parameter a results in a change of both the
proportional and the integral gains as shown in (9).

V. ANALYSIS AND SIMULATION OF THE NON-IDEAL 1 uncompensated

WORKING CONDITIONS
The simulation models have been built using the Matlab®
0.5
and the Simulink® Toolbox. The parameters of the system
under investigation are reported in Table I. Two types of filter
have been adopted on the ac side:
0
• L-filter, 8 mH value, the tests with this configuration
are indicated with “(L-system)”;
• LCL-filter, a grid side inductance of 5 mH a converter -0.5
side inductance of 3 mH and between them three
capacitors of 2.2 µF star connected. The tests with this
configuration are indicated with “(LCL-system)”. -1 compensated
In the reported tests the sampling and switching
frequencies are equal to 5 kHz and a double-edge modulation -1 -0.5 0 0.5 1
strategy is adopted. Tuning the controllers as reported in § III Fig. 7. Root locus of the current control loop (L-system) if there is one
the bandwidth of the current loop is 250 Hz and the bandwidth delay more. Uncompensated and compensated.
of the voltage loop is 100 Hz.
25 25
A. Effect of delays feedback
20 20 feedback
Some of the effects of delays can easily be compensated if
d current (A)

the proportional gain of the PI’s current controller is modified.

15
In fact the overshoot can be reduced at the price of a slower 15

system.
TABLE I. 10 10
ELECTRICAL PARAMETERS OF THE SYSTEM
Rated rms line to line voltage 380 [V] 5 5
Rated power 4.1 [kW] 0.08 0.1 0.12 0.14 0.08 0.1 0.12 0.14

Reference dc voltage 700 [V] time (s) time (s)

Rated dc current 5.5 [A] (a) (b)
Fig. 8. Simulated d-current step response (L-system) if there is one
DC Capacitor 500 [µF] sample delay more (a) uncompensated and (b) compensated.

1185
 Instead if only the proportional gain defined in (10) is

dc voltage (%)
0.4
increased to:
0.2

C
k P = 0.48 ⋅ (23) 0
0 1 2 3 4 5 6 7 8
Sd Ts
20
it is possible to achieve a 30 % reduction of the dc voltage
low frequency ripple at the price of an increase of the 15

grid current (%)

harmonic content of the ac current of 10-30 % (depending on
10
the load level) as it is proven by the harmonic spectra of Fig.
9. In fact increasing the bandwidth of the voltage controller, 5

the compensation of the dc oscillation is more effective but the

0
voltage controller produces a d-reference current for the inner 0 1 2 3 4 5 6 7 8
loop, affected by higher values of harmonics. Consequently, H armonic order
the active rectifier generates on its ac side three phase Fig. 10. Harmonic spectra of the dc voltage and of the grid current if there is a
voltages, defined in (13), characterised by harmonics that 3% reactance before the grid voltage’s measurement (black bars) and adding a
interact with dc voltage’s ones producing other low order filter on the measurement (white bars) (L-system).
harmonics in the ac current such as the 5th. In conclusion if the
aim is to reduce the voltage ripple, the voltage controller PI’s 1

proportional gain should be increased. On the contrary if the 0.8

aim is to reduce the low frequency harmonic distortion in the 0.6

ac current, the voltage controller PI’s proportional gain should 0.4
be decreased. 0.2
0
C. Effect of the position of the grid sensors -0.2
The main effect is the creation of even harmonics in the -0.4
grid current. A compensation is possible using a filter that -0.6
introduces a time constant comparable with that of the -0.8
reactance upstream the point of measure of the grid voltage
-1
such as to obtain a zero-pole cancellation. Fig. 10 shows the
-1 -0.5 0 0.5 1
2nd and 4th harmonics of the current due to the measurement of
the grid voltage after a dominant reactance (in black) and the Fig. 11. Root locus of the current closed loop for the LCL-filter system
same harmonics if there is a filter on the grid voltage varying the damping from zero to the characteristic impedance of the
measurement. To reduce further the low frequency harmonic capacitor at the resonance frequency (arrow direction).
distortion in the ac current, the voltage controller PI’s E. Design example
proportional gain should be reduced. As an example of a system affected by some non-ideal
D. Effect of passive damping of LCL-filter conditions, an experimental set-up will be considered and
described in the following session. This active rectifier adopts
Fig. 11 shows the root locus of the LCL-filter based
an LCL-filter on the ac side with a passive damping.
system increasing the passive damping. A decrease of the
Moreover, the grid voltage is measured after a 3 % reactance
voltage controller PI’s proportional gain reduces the low
and in the system there is a 1 % unbalance. The decrement of
frequency harmonic distortion in the ac current.
the overall system’s performance due to all the studied
dc voltage (%)

phenomena is shown in Fig. 12: starting from the ideal

0.4
conditions that allow almost constant dc voltage and
sinusoidal input current and adding one by one all the non-
0
0 1 2 3 4 5 6 7 8 ideal phenomena, the system suffers a progressive increase of
20
the dc voltage’s low frequency ripple and a non-sinusoidal
input current.
grid current (%)

15 It is possible to see how the measurement of the grid

voltage after a 3 % reactance, creates a q-current different
10 from 0 because the dq-frame is not correctly oriented. In Fig.
13 are reported two possible solutions to the low frequency
5
harmonic distortion in the ac current: to double the dc link
0
capacitor or to reduce the dc voltage gain to one half. All the
0 1 2 3 4 5 6 7 8 quantities reported in Fig. 12 and Fig. 13 are free by the
Harmonic order switching ripple because they are sampled in the center at
Fig. 9. Harmonic spectra of the dc voltage and of the grid current if there is a
10% unbalance in the grid voltages (black bars) and increasing the
every switching period.
proportional gain of the dc voltage controller (white bars) (L-system).

1186
 20
14
VI. EXPERIMENTAL RESULTS

q-current (A) d-current (A)

12
The laboratory set-up, which is shown in Fig. 14, consists
grid currents (A)

10
10
8 of a commercial Danfoss inverter VLT® 3008 where the
0
6
0.26
2
0.265 0.27 0.275 0.28 control card has been removed, a Siemens microcontroller
-10 SAB80C167 and an Analog Devices ADSP-21062 SHARC
0
floating-point Digital Signal Processor.
-20
0.26 0.265 0.27 0.275 0.28
time (s)
-2
0.26 0.265 0.27 0.275 0.28 In Fig. 15 are shown the measured grid voltage, grid
time (s)
ideal conditions current and the grid current’s harmonic spectrum: the 3rd (not
zero sequence) and 5th are due to a 2 % grid voltage
unbalance; the 2nd and 4th are due to the measurement of the
20 14
q-current (A) d-current (A)
12
grid voltage after a 3 % reactance through a filter that partially
grid currents (A)

10 10

0
8
6
compensates the effects as it was shown in Fig. 10. Moreover,
0.26
2
0.265 0.27 0.275 0.28
these results have been obtained with a reduced dc voltage
-10
0
controller proportional gain as it was shown in Fig. 13.
-20
0.26 0.265 0.27 0.275 0.28 -2 Moreover, in Fig. 16 it is reported the positive effect of the
0.26 0.265 0.27 0.275 0.28
time (s) time (s) increase of the switching/sampling frequency on the overall
+ damping effects system performance. The dc voltage has a reduced oscillation.
20
Then Fig. 17 shows that at a reduced load the non-ideal
14
conditions influence more the shape of the current waveform.
q-current (A) d-current (A)

12
grid currents (A)

10 10
8 In Fig. 18 the dynamic responses of the dc voltage and ac
0
6
0.26
2
0.265 0.27 0.275 0.28 currents due to a load change from 33 % to 100 % rated load,
-10
are shown. It is clear as all the non-ideal conditions have been
0
clearly individuated because there is a perfect agreement
-20
0.26 0.265 0.27 0.275 0.28
-2
0.26 0.265 0.27 0.275 0.28
between the shapes of the electrical quantities that have been
time (s) time (s) simulated and those which have been measured.
+ voltage measure after 3% reactance
a
20 14
d
q-current (A) d-current (A)

12
d
grid currents (A)

10 10
8
6 c
0 0.26
2
0.265 0.27 0.275 0.28 b
-10
0

-20 -2
0.26 0.265 0.27 0.275 0.28 0.26 0.265 0.27 0.275 0.28
time (s) time (s) b
+ 1% voltage unbalance

Fig. 12. Effects of non-ideal conditions for LCL-system. e

20 14
q-current (A) d-current (A)

12
grid currents (A)

10 10
8
GRID filter VLT 3008
0
6
a b e
0.26 0.265 0.27 0.275 0.28
c
2
e i driving signal
-10
0
& enable
-20 -2 vo
0.26 0.265 0.27 0.275 0.28 0.26 0.265 0.27 0.275 0.28
A/D s/h µc
time (s) time (s)
double dc capacitance CONVERTER SAB80C167
20 14
IRQ
q-current (A) d-current (A)

12
grid currents (A)

10 10
8
6 DSP
0 0.26 0.265 0.27 0.275 0.28
2 ADSP 21062
-10
0
d CONTROLLER
-20 -2
0.26 0.265 0.27 0.275 0.28 0.26 0.265 0.27 0.275 0.28
time (s) time (s) Fig. 14. Controller set-up for active rectifier.
half proportional gain of the PI-based dc controller
Fig. 13. Possible solutions to mitigate the non-ideal conditions.

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 20 20
VII. CONCLUSION
ea
10

grid current (%)

Many phenomena such as too long computation time,
grid current (A)

20 15
ia
0 10 presence of acquisition filters, ac phase unbalance, position of
-10 5
the grid voltage sensors after a dominant reactance and
presence of passive damping if an LCL-filter is used, have
-20
0 0.005 0.01 0.015 0.02
0
0 1 2 3 4 5 been proved, to cause bad dynamic behavior and high
time (s)
harmonic order harmonic pollution of the input ac current and of the output dc
Fig. 15. Measured grid voltage, grid current and its harmonic spectrum. voltage both in L-filter based and LCL-filter based active
rectifiers. Hence, new tuning rules for the controllers have
been proposed to optimize the system.
In short the effect of delays due to filters or too long
computational time lead to dangerous current overshoot that
can be limited by a proper reduction of the current controller
proportional gain; the effects of unbalance are an increasing
ripple in the dc voltage that can be reduced by increasing the
voltage controller’s proportional gain; the effect of the
measurement of the grid voltage after a dominant reactance is
(5 kHz) (6 kHz) low frequency harmonics in the grid current that can be
compensated adding a proper filter on the grid voltage’s
measurement. Generally, the reduction of the dc voltage’s
proportional gain has the same positive effect of the increase
of the dc voltage’s capacitor value on the ac currents.
Thus different phenomena need different tuning solutions
which sometimes contradicts each other. On the basis of the
desired harmonic content of the grid current and of the
maximum allowable ripple of the dc voltage it is possible to
find an optimum trade-off.
(7 kHz) (8 kHz)
Fig. 16. Measured grid currents (5 A/div) and dc voltage (14 V/div only ac
REFERENCES
component) at rated conditions varying the switchning frequency. [1] R. Wu, S. B. Dewan and G. R. Slemon: “Analysis of an ac-to-dc voltage
source converter using PWM with phase and amplitude control”, IEEE
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[2] L. Moran, P. D. Ziogas and G. Joos: “Design Aspects of Synchronous
PWM Rectifier-Inverter System Under Unbalanced Input Voltage
Conditions”, IEEE Trans. on Ind. Applications, Vol. 28, No. 6,
Nov./Dec. 1992, pp. 1286-1293.
[3] A. V. Stankovic and T. A. Lipo: “A Novel Control Method for Input
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Unbalanced Operating Conditions ”, IEEE Trans. on Power Electronics,
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[4] H-S. Song and K. Nam: “Dual Current Control Scheme for PWM
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33% rated load 100 % rated load Trans. on Ind. Electronics, Vol. 46, No. 5, Oct. 1999, pp. 953-959.
Fig. 17. Measured grid voltage (86 V/div), grid, converter [5] V. Blasko, V. Kaura, “A novel control to actively damp resonance in
and input filter capacitor currents (5 A/div). input LC filter of a three-phase voltage source converter”, IEEE Trans.
on Ind. Applications, Vol. 33, No. 2, 1997, pp. 542-550.
20
[6] M. Liserre, “Innovative control techniques of power converters for
15
industrial automation”, PhD Thesis, politecnico di Bari, Bari, Italy,
10 December 2001, http://www-dee.poliba.it/dee-web/Ricerca/lab-
5
converter/staff/Liserre_files/PhD_thesis_Liserre.pdf.
0
[7] M. Liserre, F. Blaabjerg, S. Hansen: “Design and Control of an LCL-
filter Based Active Rectifier”, Conf. Rec. 36th IAS Ann. Meeting,
-5
Chicago (USA), Sept./Oct. 30-4, 2001.
-10
[8] W. Leonhard, “Control of electrical drives” Springer 1997 ISBN
-15
3540593802.
-20
0.1 0.12 0.14 0.16 0.18 0.2 0.22 0.24 0.26 0.28 0.3 [9] P. Enjeti , S. A. Choudhury, “A new control strategy to improve the
performance of a PWM ac to dc converter under unbalanced operated
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Fig. 18. Grid currents (5 A/div) and dc voltage (14 V/div,
only ac component) for a load step change.

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