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COURSE OUTLINE
1 Faculty Faculty of Science and Engineering (FSE)
2 Department Computer Science and Engineering
3 Programme B.Sc. in CSE
4 Name of Computer Architecture
Course
5 Course Code CSE 211
6 Trimester Summer 2020
7 Pre-requisites CSE 203
8 Status Core Course
9 Credit Hours 3
10 Section 191 DD
11 Class Hours Section Class Day Class Hours Venue
191 DD Monday 03:00 pm - 04:30 pm Room No: B-801
Wednesday 03:00 pm - 04:30 pm Room No: B-801
12 Class City Campus: B - 801
Location
13 Course https://classroom.google.com/
website Google classroom code: g4zvlin
Zoom Link: https://bdren.zoom.us/j/68435595147
14 Instructor Safial Islam Ayon
15 Contact ayon@cse.green.edu.bd
16 Office Room No: B-407 Desk: 1
17 Counselling Day Counseling Hours Venue
Hours Tuesday 11:30 pm - 1:00 pm && 03:00 pm - 04:30 pm Room No B 407/Zoom
Thursday 11:30 pm - 1:00 pm && 03:00 pm - 04:30 pm Room No B 407/Zoom

18 Text Book 1. M. Morris Mano – Computer System Architecture, 3rd Edition, Prentice Hall, 2010

19 Reference 1. David, A., & John, H. (2005). Computer organization and design: the
hardware/software interface, 3rd Edition. Morgan Kaufmann Publishers
20 Equipment & Bring your own materials (calculator, pen, paper, etc.) to participate effectively in
Aids classroom activities. You are not allowed to borrow from others inside the
classroom during class activities.
Besides class note, please keep at least one blank A4 size paper per class with you.
CSE 211 Course Syllabus Summer 2020

21 Course
Rationale Computer Architecture is one of the fundamental course for CSE students. It is
concerned with all aspects of the design and organization of the CPU and integration
of the CPU into the computer system itself. It aims to give students theoretical idea
about Computer Architecture and Design and familiar with digital logic and
functional design of arithmetic and logic unit that is capable of performing arithmetic
operations.
22 Course Information representation; measuring performance; instructions and data access
Description methods: operations and operands of computer hardware, representing instruction,
addressing styles; Arithmetic Logic Unit (ALU) operations: floating point operations,
designing ALU; processor design: datapaths single cycle and multicycle
implementations, control unit design - hardwared and microprogrammed, hazards,
exceptions; pipeline: pipelined datapath and control, superscalar and dynamic
pipelining; memory organization: cache, virtual memory, channels; DMA and
interrupts; buses; multiprocessors: types of multiprocessors, performance, single bus
multiprocessors, multiprocessors connected by network, clusters.
23 Course Upon successful completion of this course, students will be able to -
Outcomes
(CO) CO1: Compute simple arithmetic operations like addition, subtraction, multiplication
and division.
CO2: Construct an instruction set capable of performing a specified set of operations
and a memory system for a given set of specifications.
CO3: Analyze Pipelining concepts, multiprocessors and the different ways of
communicating with I/O devices.
24 Maximum topics will be covered from the textbook. For the rest of the topics,
Teaching
reference books will be followed. Some class notes will be uploaded on the web.
Methods
White board will be used for most of the time. For some cases, multimedia projector
will be used for the convenience of the students. Students must participate in
classroom discussions for case studies, assignments, presentations and small group
works.
25 Topic Outline
All topics and problems are from the main text if not specified otherwise.
Lecture Selected Topics Article Suggested Outcome
(Text) Problems (Text)

(1) Computer Abstractions and Technology. 1.1 – 1.6 1.1 – 1.10 CO1
Basic structure of Computers: Functional Units, (Ref.) (Ref.)
Operational Concepts

(2-3) Registers, Shift Registers, Binary Counters, 2.4 – 2.7 2.6, 2.7, 2.12, CO1
Memory Unit 2.19 – 2.21

(4-5) Register Transfer and Micro-operations, 4.2 – 4.7 4.1, 4.2, CO1
Arithmetic Logic Unit (ALU) 4.5 – 4.21

(6-7) Instruction Codes, Computer Instructions, Timing 5.1 – 5.7 5.1 – 5.8 CO2
and Control, Instruction Cycle , Memory-
Reference Instructions, Input-Output Interrupt

(8-9) Computer Arithmetic: Addition and Subtraction of 10.1, 10.2 10.3 – 10.8, CO1
Signed Numbers 10.11
CSE 211 Course Syllabus Summer 2020

(10-12) Multiplication: Unsigned and Signed (Booth’s) 10.3 - 10.4, 10.12 – 10.15 CO1
multiplication, Array Multiplier, 3.2-3.5 (R)
Division: Restoring and non-restoring division

(13-14) Microprogrammed Control: Microprogram 7.3, 7.4 7.22 – 7.24 CO2

Example, Design of Control Unit

(15-16) Central Processing Unit: Stack Organization, 8.3 – 8.5, 8.2, 8.9, 8.11, CO1
Instruction Formats, Addressing Modes, Program 8.7, 8.8 8.20, 8.21,
Control, RISC, CISC 8.25, 8.28

(17-18) Pipeline: Parallel Processing, Pipelining, 9.1 – 9.4 9.1 – 9.5, 9.7 CO3
Arithmetic Pipeline, Instruction Pipeline.

(19-20) Input-Output Interface, Asynchronous Data 11.2 - 11.6 11.2, 11.9, CO3
Transfer, Modes of Transfer, Priority Interrupt, (T) 11.10, 11.12,
Direct Memory Access (DMA). 8.4, 8.5 (R) 11.14, 11.22

(21-22) Memory organization: Memory Hierarchy, Main 12.1, 12.2, 12.1 – 12.3, CO2
Memory, Cache Memory, Virtual Memory. 12.5, 12.6 12.21

(23-24) Multiprocessors: Characteristics, Interconnection 13.1 - 13.2 13.1, 13.3, CO3

Structures, Multiprocessors connected by a Single (T) 13.4, 13.5,
Bus, Multiprocessors connected by a Network, 9.3 - 9.5 13.6, 13.8.
Clusters. (R.)

26 Assessment Students will be assessed on the basis of their overall performance in all the exams,
and Marks quizzes, and class participation. Final numeric reward will be the compilation of
Distribution: (tentative):
❖ Class Test (15%) (Assignment or Viva or Mixed)
❖ Presentation (5%)
❖ Assignment (5%)
❖ Class Attendance (5%)
❖ Mid Term (30%) (Viva 50% + Assignment 50%)
❖ Final Exam (40%) (Viva 50% + Assignment 50%)

27 Assessment Assessment methods of COs are given below:

Methods of Assessment
COs
COs CT1 CT2 CT3 MT FE Assignment
CO1 √ √ √
CO2 √ √ √ √
CO3 √ √ √ √

28 Mapping of Mapping of COs with program outcomes (POs) are given below:
COs with POs Program Outcomes (POs)
COs PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12
CO1 √
CO2
CO3 √
CSE 211 Course Syllabus Summer 2020

29 Grading
The following chart will be followed for grading. This has been customized from the
Policy
guideline provided by the Faculty of Science and Engineering.

A+ A A- B+ B B- C+ C D F
80 and
75-<80 70-<75 65-<70 60-<65 55-<60 50-<55 45-<50 40-<45 <40
above

29 Additional Capstone No late submission will be accepted. Zero tolerance will be shown in
Course Project: this regard.
Policies
Class There will be three CTs, best of two will be counted. A CT can be
Test: taken with an announcement in prior. CT will be taken using Google
forms or viva or mixed of Google forms and viva.

Exams: Mid-term and final exam will be taken with the help of assignment
(50%) and viva (50%). In assignment a fixed date of submission will
be given. If anyone submitted his/her assignment late he/she will be
got zero. If any student does any type of copy, he/she will also got
zero. Viva will be taken in Zoom online platform.

Test If you are absent from a test, and you have not spoken to the teacher
Policy: personally beforehand, your grade for the test will be zero. No make-
up for class test will be taken because it has alternative (three out of
four). No make-up for mid will be entertained without presence and
recommendation of guardian and written permission of the
department. Make-up test of mid will be much harder than the
regular test.
30 Additional If any problem email at any time and call between 09:00 AM to 06:00 PM.
Information