Lab#9 Steady State Error Analysis and Design

In Lab Tasks
Task 1:

PART 1

PART 2
PART 3
Lab Task 2:

PART 1:
PART 2

We can say that the value of ‘k’ should be bigger than 189. As we increase the value of ‘k’, the overshoot
decreases.
 POST LAB

PART 1

PART 2
PART 3

PART 4
Critical Analysis / Conclusion

In this lab we have to find steady state errors and static error constants and verify the results
using MATLAB and to design controller system gain for obtaining specified characteristics.
Steady-state error is defined as the difference between the input and output of a system in the
limit as time goes to infinity, we learnt to find the system type manually and by observing the
graph. If the system is giving finite error on application of step at input, then it is a type 0
system. If a system is giving finite error for ramp input, then it is type 1system and type 1system
will show zero error for step input. If a system is giving finite error for parabolic input, then it is
a type 2 system and a type 2system will show zero error for step and ramp input. In short,
current type system will show zero error for all the lower types systems w.r.t that type. Error is,
basically, the difference between input and output. Furthermore, to improve error, relation
between an unknown variable and its effect on error was observed as well.