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Copyrigh t © IFAC Control Science and Tech nology

(8th Trien nial World Congress) Kyoto, J a pan, 198 1

MICROPROCESSOR-BASED GENERAL-PURPOSE
PID CONTROLLER

A. Sumi and K. Kataoka


Systems Engineering Division, Yokogawa Electric Works, Musashino-shi, Tokyo 180,
japan

Abstract. A new microprocessor-based PID controller, which combines the simplicity of


analog controllers with the flexibility of DDC controllers, has been developed. The
hardware includes an 8-bit Digital-to-Analog Converter used in a 14-bit resolution
Analog-to-Digital Converter.
Positional PID software algorithms are built in, and the user can produce many controller
variations and options by simple program changes. A serial communications line option is
available to connect the controller to a supervisory CPU.

This paper covers the new controllers hardware and software design.

Keywords. Analog--<ligital conversion; controllers; direct digital control; micro-


processors; PID control.

INTRODUCTION (3) The microprocessor should incorporate PID


control algorithms.
There are two approaches to general-purpose PID (4) A wide variety of controller variations should
control systems: the analog approach and the be possible.
digital approach. (5) New controllers should resemble conventional
analog controllers and be at least as easy to
Conventional analog controllers use primarily RC use.
circuits, transistors and operational amplifiers as (6) The controllers should be easy to interface to
computing elements. The hardware is simple, in- supervisory computer systems.
expensive and reliable; it is easy to operate and
easy to service. However, the applications of such
controllers are limited to the control of relatively HARDWARE
simple loops. Analog controllers are not so suitable
for systems with complicated loops or for large AID, D/A Conversion Principles and
syste ms - it is easier to use a supervisory com- Characteristics.
puter and CRT overview display than a large con-
trol panel. With analog controllers, flexibility and Typical microprocessor-based systems scan analog
expandabilityare also lacking. inputs, convert them to digital signals using one or
more dedicated or multiplexed A/D converters,
DDC systems - using a large computer to super- process the digital signals in the microprocessor,
vise many loops - have progressed to distributed and finally output the results via one or more ded-
systems using microprocessor-based controllers icated or multiplexed D/A converters. Inputs and
which each handle eight or sixteen loops: such outputs are not simultaneous or continuous, but the
systems allow sophisticated analog control algo- input scan rate is fast enough for the input to
rithms to be combined with sequential control. appear continuous, and the output is held constant
However, since each microprocessor handles sev- between updates - for example, by using sample-
eralloops, to protect against microprocessor fail- and-hold networks. Disadvantages of systems with
ure the reliability has to be high - and backup ana- conventional A/D, D/A converters are that
log controllers are required in some applications. (a) Using both AID and D/ A converters with high
accuracy and high speed is quite expensive (such
The advent of one-chip microprocessors has made conversion is not needed in conventional con-
single loop controllers possible. This paper de- trollers) and (b) Unless an A/D, D/ A converter
scribes the design and applications of one such is multiplexed, if more inputs and outputs are
series of PID controllers, based on the following required, more microprocessor I/O ports and
guidelines: converters must be added.

(1) If possible, a combined A/ D, D/ A converter As explained below, our multiplexed A/D, D/ A


rather than separate (costly) preCision AID, conversion system "ADA" (Sumi and Kataoka,
D/ A converters should be used. 1976a) does not have these disadvantages.
(2) The converter needs high resolution and
moderate speed.

2 111
2 J J2 A. Sumi a nd K. Ka t ao ka

Figure 1 explains the basic converter principles. so transfers between auto and manual modes are
A single D/ A coriverter is used for both A/D and bumpless. When the manual lever is operated, the
D/ A conversion. (Using separate A/D and D/ A con- micro-processor opens FET switch SW. The manual
verters would cause span errors). A comparator lever is then used to adjust the output (voltage on
compares the output from the D/ A converter with the output capacitor) directly. The microprocessor
an input from the field. The microprocessor ad- then reads this value and periodically refreshes it
justs the converter output to equal the input Ei, via the D/ A converter - the output in manual
thus eliminating A/D, D/ A converter span errors. mode is drift free.
The D/ A converter output is updated periodically;
sample and hold circuitry is used so that the output When the controller is switched from manual mode
appears (stepwise) continuous. to auto, the PID controller is initialized so that the
preceeding manual output is its initial output.
Figure 2 shows the circuit of Fig. 1 extended using Thus, even if there is a deviation between process
a multiplexer to provide for multiple inputs - variable and set point when the controller is
e.g. measured variable, set point and parameter transferred from manual to auto mode, transfer
settings. If standard voltages are applied to two of is bumpless and balanceless.
the multiplexer inputs, the microprocessor can
automatically perform periodic calibration of this Backup Against Power Failure. The setpoint SV
converter - and update span and offset constants and PID parameters are set by potentiometers, so
stored in RAM. the settings are retained even if power fails. The
output MV is held by a sample and hold circuit, so
For multiple analog outputs, identical sample and if power to the circuit is lost, the output is held -
hold networks can be added. As shown by the an output drift in this case of 1% or less per ten
dotted line in Fig. 2, the output from the first minutes can be achieved. When power is reapplied,
sample-and-hold network is fed back to the the voltage across the sample and hold circuit out-
multiplexer input, so the microprocessor can put capacitor is read and the controller is ini-
automatically adjust the converter constants to tialized so that the initial output equals the
compensate for sample-and-hold network charac- previous output.
teristics. Because all inputs and outputs use the
same D/ A converter, and because this auto- Self-diagnostic features. To check the A/D con-
calibration method is used, zero offset and span verter, one method is to convert a standard volt-
errors are virtually eliminated. age, another is to apply the PV value to a potentio-
meter divider of known ratio and compare the
Application of this "ADA" Technology to a Basic two voltages. To check the D/ A converter, two
PID Controller. standard voltages are used. Reading in a standard
voltage via the A/D converter to RAM, outputting
This is explained in a separate reference (Sumi and this voltage via the D/ A converter to the sample
Kataoka, 1976b) and summarized below. Figure 3 and hold network capacitor, and comparing this
illustrates the basic principles. As well as the output with the standard input, checks A/D, D/ A
measurement value PV, inputs to the controller and sample and hold circuits.
include the setpoint SV and the PID controller pa-
rameters. The setpoint and parameters could be A watchdog timer is used for microprocessor
set digitally, but in this controller they are set diagnostics. If the normal strobe signals from the
using potentiometers as in conventional analog microprocessor to the watchdog timer are missing
controllers. The controller outputs include the during a given time interval, the microprocessor is
manipulated variable MV. A transfer circuit is reset and restarted.
required so that the controller can be used in
manual mode. High resolution A/D converter.

One input is provided for output tracking. The This is explained in a separate reference (Sumi,
controller reads the process variable and the Kataoka and Asaka, 1977) and summarized below.
setpoint/parameter settings and performs PID When microprocessors are incorporated in an ana-
control. PV and SV must be read accurately. log system, A/D converters are required at the
The output signal (D/ A converter) update period is interface, and so their characteristics affect the
0.1 second, and the sample and hold circuit holds whole system.
the output signal.
Where moderate speed is required, successive
PID computation. The PID computation is per- approximation type A/D converters are common;
formed by microprocessor software. There is no for high resolution, linear-slope dual-slope type
interference between P, I and D settings. A/D converters are common. A new converter
Conventional analog controllers require special which combines successive approximation and dual
low-leakage high-precision capacitors, high-value slope converters - in order to realize the advan-
potentiometers (and semiconductor circuitry) with tages of both - is described below. Its dual-slope
accurate non-linear characteristics. In this con- converter performs interpolation to improve the
troller, non-linear para meter-setting potentiometer resolution of the successive approximation
characteristics and derivative action ahead of PI converter.
action can be easily realized using software.
Princi les. Figure 4 explains the basic principles.
Auto/Manual transfer. When the controller is Suppose that the analog input is between output
switched from auto to manual mode, the previous steps n and n+ 1 of the D/ A converter). First, the
output (charge on output capacitor) is maintained, micro-processor turns the FET ON and operates the
Microprocessor- Based Gene r al- Purpose PIn Control l er 2 11 3

successive approximation A/D converter (D/ A con- seconds. If we write Rn and Dn for the integral and
verter plus comparator) to measure the input with derivative parts of expression (1), and write Bn for
8-bit resolution. With the output stable at step n the sum of Rn and Dn :
(the voltage step just below the analog input), the
microprocessor then turns the FET OFF and applies Yn = Kpen+Rn + Dn = Kpen+Bn (2)
a D/ A converter output corresponding to step n+2 .
A timer interpolates between steps nand n+1- Bumpless and balance less control when transfering
while the RC circuit charges until the voltage between manual and auto modes depends on Bn
across the capacitor equals the analog input volt- being set to a suitable value on transfer.
age - measuring time interval ta. The D/ A con-
verter output is then set to correspond to step n+1, Bumpless and Balanceless Transfer.
and the FET is turned ON to charge the capac-
itor. The FET is turned OFF and the D/ A con- Auto/ Manual transfer. When transferring from
verter output set to correspond to step n-l. The manual to auto mode, it is required that - even if
timer measures the time interval tb for the voltage there is an input deviation - the output should not
across the capacitor to decay to equal the analog change. This is satisfied by - in auto mode -
input. setting Bn = Yn Kp en , M";, - J = Mn . Thus, when
we switch to auto mode we have YA = YM • When
When (as shown in Fig. 5) a voltage differential transferring from auto mode to manual, we must
corresponding to two steps is used to charge and initialize YM to YA and change the velocity action
discharge the RC time constant over an interval of manual mode to the positional action of auto
corresponding to one voltage step, the charge/ mode. For other types of control - when there is
discharge characteristic is relatively linear (non- external feedback, feedforward, changes in pro-
linearity 0.01 % of full span). portional gain Kp , or when there is autoselector
control with external reset signal, this can be han-
Experimental Results. Figure 6 shows the exper- dled in the same way as auto/manual transfer.
imental results. A ramp analog input was applied For P/PD control, manual reset can be handled by
to our A/ D converter, the result was digitally setting Rn = YM Kpe" MR, and slewing R n at a
multiplied by 64 and applied to a separate high- constant rate towards O.
resolution D/ A converter. The 14-bit resolution of
our A/D converter is seen to give a characteristic Some problems with output saturation.
that is very close to linear. An 8085A micro-
processor was used, and the A/D conversion time The outputs of conventional controllers are
was 4 ms. normally restricted to the range 4 to 20 mA.
Hence, the output may saturate at the high or low
limit. The effects of reset windup and output
SOFTWARE saturation are not taken into account in equation
(1) above, so it is important to consider how to
Most analog PID controllers give positional-type prevent such effects and the following one.
outputs, however many DDC systems have
velocity-type outputs. Velocity type outputs are Precession. If the output contains enough noise to
used because the output is unchanged if the system cause output saturation, noise pulses into the pro-
CPU fails. With velocity-type outputs it is easier portional or derivative term in the velocity type
to achieve bumpless transfer. However , from a controller may cause the output to fluctuate widely.
control accuracy point of view, positional control We call this "precession"; this phenomena is the
- as used in this system - is preferable. most serious defect of the velocity-action con-
troller, but does not occur in positional-action
Positional PID algorithm. controllers.

This algorithm meets the requirements that: Prevention of Reset Windup. For batch processes
(1) There is no interference between the integral - where a large deviation may continue for some
time setting TI and the derivative time time - the integral part Rn may grow very large,
setting TD . resulting in reset windup. When the deviation
(2) For noise reduction, derivative gain m is finite. decreases, the output does not change - even after
(3) Derivative ahead of PI characteristic the sign of the deviation changes in sign, it takes a
(derivative of process variable, not deviation) long time for the reset part to decrease enough for
is possible. the output to decrease below the limit value.
t;.r In this controller, output limiting is achieved by
Yn=Kp[ en+-y:;'i:. en +m(Mn Mn - J)) (1) limiting the integral part - resetting it to zero
when the output reaches an output limit, so that
Where -
Mn - r = -t;.r- t;.r -
Mn - J + (1 - - -) Mn - 2 immediately the deviation decreases the output
TD / m TD / m will also change. See Fig. 7.
Mn : Input
en : Deviation The equations become:
Kp : Proportional gain
m Derivative gain When the output is not in saturation: L<Yn < H
t;. r : Sampling period t;.r
Rn= Rn- J +Kp - e n (3)
T[
For this expression to be true, it is required that
TD / m·t;.r> 1 • In this controller, TD = 0.04 When the output is saturated: Yn ~ H . Y,,';; L
to 10 min., m = 10 and sampling period t;.r = 0.1 t;.r t;.r
Rn= - ( H or L-Kpen)+(l- - ) Rn- J (4)
TJ T[
2114 A. Sumi and K. Kataoka

Reset bias. Reset windup is a particular problem Available firm ware modules include the following
with batch controllers. With reset bias, a constant functions :
is added to the output saturation value of Rn (batch
shutdown). If the reset bias value is RE, the Rn at Alarm module. There are many demands for - in
output saturation is calculated as follows: addition to providing controller action - moni-
/:;t /:;t
toring the measurement input (PV). This alarm
Rn= - (Horl. - Kven ± RB)+(l- - )Rn - i (5) module indicates the preset alarm setpoint and
T/ T/
outputs a contact signal to an external device.
If RE = H or L (high or low limits, corresponding to
+ signs in the equation above), the output remains Expanded PID module. This module contains
saturated until the sign of the deviation reverses. various PID controller options, as follows, so the
If RE = 0 , the output saturation is released and the user can select the functions he requires:
output decreases with the deviation.
External A/M and Cascade/Local transfer
Software configuration. External feedback
Non-linear gain characteristic
The positional type of controller can be more P/PD control
versatile and efficient than the velocity type. PI/PID control with reset bias setpoint
The software of the positiona} type is also simpler, and so on.
because PID and P/PD algorithms can use the same
data base. Communications module. A serial communication
Figure 8 illustrates a general-purpose type PID line is used to communicate with external com-
computation incorporating A/M transfer, external puters and the like, and provide SPC, DDC and
feedback and reset bias. overview functions. This makes it easy to con-
figure or reconfigure an instrumentation system.

EXPANDABILITY OF SINGLE LOOP Firmware and User-Programmable Functions.


CONTROLLERS
There are two categories of firmware:
Conventional analog PID controllers can be en- manufacturer-provided firmware and user-
hanced by adding hardware features and adding provided firmware.
separate instruments to perform arithmetic compu-
tations and so on, however further enhancements The manufacturer can provide programs in ac-
are no longer practicable. cordance with the user's specifications. However,
if changes are required, the manufacturer must
Microprocessor-based single loop DDC controllers revise the programs, which can be costly. Hence,
- with their functions performed not by hardware it is useful if manufacturers can supply controllers
but by software stored in semiconductor memory - which use field-programmable ROMs for program
have been introduced to meet the present and fu- storage and can be programmed by the user using a
ture needs of advanced systems. By adding com- simple dedicated or general-purpose language.
munication functions to such controllers, it is
possible to reduce instrument cabling between
controllers and supervisory computers. This sec- ANALOG VS. DIGITAL
tion describes the expandability of these Single
Loop DDC Controllers and their design philosophy. Electronic process control owes its progress to
semiconductor devices - and the trend is towards
Simple PID controllers and their expandability. the use of microp~essors. These single loop con-
trollers incorporate a synthesis of both analog and
It is possible to design "universal controllers" - digital technologies. The table below compares con-
with functions, including data communication ventional analog and DDC controllers with our
functions, to meet every need - if there is no need single loop controllers.
to minimize system cost. On the other hand, the
majority of users today require only simple P I D
controllers. It is thus important for manufacturers CONCLUSIONS
to continue to supply controllers which will com-
pete in such a cost-sensitive market . The following technologies are incorporated in
these microprocessor-based PID controllers.
It is convenient and economical to expand con- (1) "ADA technology" - multiplexing a D/ A
troller functions not with speCial hardware (as in converter.
conventional analog controllers) but with special- (2) High-speed and high-resolution A/D conversion
purpose modular firmware - software modules in is achieved using a combination of successive
semiconductor memory and associated I/O ex- approximation and dual slope conversion
pansion hardware. techniques.
(3) A positional type PID algorithm is
Based on the market demand and economic con- implemented using software.
siderations, certain often-used function modules (4) Controller variations are implemented by
can be equipped as standard - selectable using adding/changing ROMs.
switches on the unit - and other functions for (5) For ease of operation, analog setting and
system expansion and upgrading can be offered as analog indicator are used.
plug-in (retrofit) options. (6) The controller uses serial communications for
computer compatibility.
Mi cr opro c essor-Based General-Purp ose PID Controll e r 2 115

A general-purpose PlO controller should be appli- REFERENCES


cable to both small and large scale processes, and
should offer optimum cost performance. To realize Sumi, A. and Kataoka, K. (1976a). Analog Signal
this ideal, a simple basic controller was designed; Processing System. U.S. Patent 4,149,256 •
it can be easily expanded using add-in modules and Sumi, A. and Kataoka, K. (1976b). Electric Con-
it is computer compatible for upwards expanda- troller System with Bumpless Transfer.
bility. U.S. Patent No. 4,141,065.
Sumi, A., Kataoka, K. and Asaka, T. (1977).
High Resolution Analog-to-Digital
ACKNOWLEDGEMENT Converter*. 16th SICE Conference.
The writers wish to thank Dr. Isamu Ohno for his *In Japanese
advice.
For Discussion see page 211 0

TABLE 1 Typical Analog and DDC Controller Characteristics

Conventional Our single loop Conventional


analog con- controller DDC*
troller
InEut/outEut
AID, D/A - "ADA" AID, D/A
A/D resolution Continuous High resolution Med. resolution
(14 bits) (e.g. 10 bits)
Output Analog Sample & Hold D/A
Update period Continuous 0.1 s period 1 to 5 s period
Manual output Drift prone Drift free Drift free

ComEutation
PlO algorithm Using RC Software Software
circuit (positional action) (velocity action)
Computational High R, log. General-purpose, Digital
potentiometers taper linear (taper is soft-
ware, so variable)
Integrator Low-leakage (Digitally (Digitally
capacitor type simulated) simulated)
Auto/Manual Hardware Simple switch Simple switch
transfer switching plus software plus software
Effect of Failu Capacitor hold Non-volatile
power failure ~ ,. memory
Self diagnostics No Yes Yes
External signal Servomechanism Software Software
tracking

Ease of 0Eeration
SV, PlO setting Potentiometer Potentiometer Digital
Indicator Analog Analog Digital

Expandabilit:i
Variations Extra hardware ROM firm ware Software

ComEatibilit:i with SUEervisor:i CPU


Communications Analog wiring Serial data Par./serial data

*Note: Other single-loop DDC controllers on the market are similar to conventional
DDC control computers, except that output update period is 0.2 to 0.5 s, software is
in ROM, and serial data communications capability is provided.
2116 A. Sumi and K. Kataoka
r----------------------l
I I
I I
L I

Ei _---..~
Eo
M Com-
parator
P Il P
X

Fig. 1. "AOA" Converter Principles.


Fig. 2. Multiplexed "AOA" Converter.

>-~-o MV
PV 0-------.,
Com-
parator
M
"p
x

Es

Manual Inc / Dee

SV P D
Fig. 3. PlO Controller Schematic Oiagram.

Analog
Input
Il P
Com·
parator
11 . '~:j0 · 1 ' I! I; •.,.,.'. , V,; ..1 "
r"';~! ·. JI; ·f I -I -Y - 1-'·· I

Fig. 4. A/O Converter Configuration.

' ,' "11/ I: I~ "I , I',, ' , i ,


=--'-- '.~'"--. --.­ 2 times :/1'1 I l l ' ,· '·1
"- LSB magnitude . y. 1 i :/11:, 1' I, ~ I I , ", . i , I·
'"" ~ _ _11 i' I ' ' .• , I 1,1 "I"
"- I : ~; I : I . I' I r I ; , ,
""
"-
In-11 ______________________ ~-~- ___ L
Input
Fig. 5. Converter Waveforms. Fig.6

Manual
Inc/Oec

Mn
H

Yn Mn
~J"l
Sn

AUT
+ when Output
Lim ited M

+ o-------~O
TRK Aux.
Feedback
Signal
Fig. 7. Positional·Action PlO Controller. Fig. 8. PlO Controller Software Configuration.
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