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DFTAdvisor™ Reference Manual

Software Version 8.2007_2


May 2007

© 1991-2007 Mentor Graphics Corporation


All rights reserved.

This document contains information that is proprietary to Mentor Graphics Corporation. The original recipient of this
document may duplicate this document in whole or in part for internal business purposes only, provided that this entire
notice appears in all copies. In duplicating any part of this document, the recipient agrees to make every reasonable
effort to prevent the unauthorized use and distribution of the proprietary information.
This document is for information and instruction purposes. Mentor Graphics reserves the right to make
changes in specifications and other information contained in this publication without prior notice, and the
reader should, in all cases, consult Mentor Graphics to determine whether any changes have been
made.

The terms and conditions governing the sale and licensing of Mentor Graphics products are set forth in
written agreements between Mentor Graphics and its customers. No representation or other affirmation
of fact contained in this publication shall be deemed to be a warranty or give rise to any liability of Mentor
Graphics whatsoever.

MENTOR GRAPHICS MAKES NO WARRANTY OF ANY KIND WITH REGARD TO THIS MATERIAL
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND
FITNESS FOR A PARTICULAR PURPOSE.

MENTOR GRAPHICS SHALL NOT BE LIABLE FOR ANY INCIDENTAL, INDIRECT, SPECIAL, OR
CONSEQUENTIAL DAMAGES WHATSOEVER (INCLUDING BUT NOT LIMITED TO LOST PROFITS)
ARISING OUT OF OR RELATED TO THIS PUBLICATION OR THE INFORMATION CONTAINED IN IT,
EVEN IF MENTOR GRAPHICS CORPORATION HAS BEEN ADVISED OF THE POSSIBILITY OF
SUCH DAMAGES.

RESTRICTED RIGHTS LEGEND 03/97

U.S. Government Restricted Rights. The SOFTWARE and documentation have been developed entirely
at private expense and are commercial computer software provided with restricted rights. Use,
duplication or disclosure by the U.S. Government or a U.S. Government subcontractor is subject to the
restrictions set forth in the license agreement provided with the software pursuant to DFARS 227.7202-
3(a) or as set forth in subparagraph (c)(1) and (2) of the Commercial Computer Software - Restricted
Rights clause at FAR 52.227-19, as applicable.

Contractor/manufacturer is:
Mentor Graphics Corporation
8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777.
Telephone: 503.685.7000
Toll-Free Telephone: 800.592.2210
Website: www.mentor.com
SupportNet: www.mentor.com/supportnet
Send Feedback on Documentation: www.mentor.com/supportnet/documentation/reply_form.cfm

TRADEMARKS: The trademarks, logos and service marks ("Marks") used herein are the property of
Mentor Graphics Corporation or other third parties. No one is permitted to use these Marks without the
prior written consent of Mentor Graphics or the respective third-party owner. The use herein of a third-
party Mark is not an attempt to indicate Mentor Graphics as a source of a product, but is intended to
indicate a product from, or associated with, a particular third party. A current list of Mentor Graphics’
trademarks may be viewed at: www.mentor.com/terms_conditions/trademarks.cfm.
Table of Contents

Chapter 1
Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Inputs and Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
File Redirection Operators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Chapter 2
Command Dictionary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Command Line Syntax Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Command Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Command Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Add Black Box . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Add Buffer Insertion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Add Cell Library . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Add Cell Models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Add Clock Groups . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Add Clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Add Mapping Definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Add Nofaults. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Add Nonscan Instances. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Add Nonscan Models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Add Notest Points . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Add Output Masks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Add Pin Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Add Pin Equivalences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Add Primary Inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Add Primary Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Add Read Controls . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Add Scan Chains. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Add Scan Groups . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Add Scan Instances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Add Scan Models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Add Scan Partition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Add Scan Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Add Seq_transparent Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Add Sub Chains . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Add Subchain Group. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Add Test Points. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Add Tied Signals. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
Add Write Controls. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
Alias . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
Analyze Control Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94

DFTAdvisor Reference Manual, V8.2007_2 3


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Analyze Input Control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96


Analyze Output Observe. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
Analyze Testability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Delete Black Box . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
Delete Buffer Insertion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
Delete Cell Models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
Delete Clock Groups. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
Delete Clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
Delete Mapping Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
Delete Nofaults . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
Delete Nonscan Instances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
Delete Nonscan Models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
Delete Notest Points . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
Delete Output Masks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
Delete Pin Constraints. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
Delete Pin Equivalences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
Delete Primary Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
Delete Primary Outputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
Delete Read Controls . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
Delete Scan Chains . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128
Delete Scan Groups. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
Delete Scan Instances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130
Delete Scan Models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132
Delete Scan Partitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
Delete Scan Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
Delete Seq_transparent Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135
Delete Sub Chains. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136
Delete Subchain Groups . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137
Delete Test Points . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138
Delete Tied Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140
Delete Write Controls . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142
Dofile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143
Echo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144
Exit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146
Find Design Names. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147
Help. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152
History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153
Insert Test Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 155
Printenv . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162
Read Procfile. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163
Read Scan Order . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164
Report Black Box . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165
Report Buffer Insertion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167
Report Cell Models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 168
Report Circuit Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170
Report Clock Groups . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174
Report Clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175
Report Control Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 176
Report Dft Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 178

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Report Drc Rules. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 181


Report Environment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 187
Report Feedback Paths . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 189
Report Flatten Rules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 191
Report Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 194
Report Loops. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200
Report Mapping Definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 202
Report Nofaults. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 205
Report Nonscan Models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 207
Report Notest Points . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 208
Report Output Masks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 209
Report Partition Cells . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 210
Report Pin Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 212
Report Pin Equivalences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 214
Report Primary Inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 215
Report Primary Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 216
Report Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 217
Report Read Controls . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 218
Report Scan Cells . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 219
Report Scan Chains. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 222
Report Scan Groups . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 223
Report Scan Models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 224
Report Scan Partitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 225
Report Scan Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 227
Report Seq_transparent Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 228
Report Sequential Instances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 229
Report Statistics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 234
Report Sub Chains . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 236
Report Subchain Groups . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 237
Report Test Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 238
Report Test Points. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 240
Report Testability Analysis. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 242
Report Tied Signals. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 245
Report Timeplate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 246
Report Variables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 247
Report Write Controls. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 249
Reset State. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250
Ripup Scan Chains . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 251
Run . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 253
Save History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 254
Set Capture Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 255
Set Command Editing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 256
Set Contention Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 257
Set Control Threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 259
Set Display . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260
Set Dofile Abort . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 261
Set Drc Handling. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 262
Setup EDT. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 268
Set Fault Sampling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 269

DFTAdvisor Reference Manual, V8.2007_2 5


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Table of Contents

Set File Compression . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 270


Set Flatten Handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 272
Set Gate Level. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 275
Set Gate Report . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 276
Set Gzip Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 279
Set Identification Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 281
Set Internal Fault. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 283
Set Io Insertion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 284
Set Latch Handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 286
Set Lockup Latch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 287
Set Logfile Handling. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 290
Set Multiple Scan_enables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 292
Set Net Resolution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 296
Set Nonscan Handling. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 297
Set Observe Threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 298
Set Scan Type . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 299
Set Screen Display . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300
Set Sensitization Checking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 301
Set Shadow Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 302
Set Stability Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 303
Set System Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 304
Set Test Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 305
Set Trace Report . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 308
Set Transient Detection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 309
Setup Naming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 310
Setup Output Masks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 313
Setup Partition Scan . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 315
Setup Pin Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 321
Setup Registered IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 323
Setup Scan Identification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 330
Setup Scan Insertion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 337
Setup Scan Pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 343
Setup Test_point Identification. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 345
Setup Test_point Insertion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 348
Setup Tied Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 355
System. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 356
Verify Scan . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 357
Write Atpg Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 359
Write Formal_verification Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 361
Write Loops . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 363
Write Netlist . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 364
Write Primary Inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 366
Write Primary Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 367
Write Procfile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 368
Write Scan Identification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 369
Write Scan Order . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 371
Write Subchain Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 375

6 DFTAdvisor Reference Manual, V8.2007_2


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Table of Contents

Chapter 3
Shell Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 377
Shell Command Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 377
Command Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 377
dftadvisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 378
stil2mgc. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 383

Appendix A
Using DFTVisualizer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 385

Appendix B
Getting Help . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 387
Documentation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 387
Online Command Help . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 387
Mentor Graphics Support. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 387
Examples and Solutions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 388
Index
Third-Party Information
End-User License Agreement

DFTAdvisor Reference Manual, V8.2007_2 7


May 2007
List of Examples

Example 1-1. File Redirection Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13


Example 2-1. Add Buffer Insertion Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Example 2-2. Generated ATPG dofile with -Top Option . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Example 2-3. Generated ATPG Dofile with No -Top Option . . . . . . . . . . . . . . . . . . . . . . . . 74
Example 2-4. Add Seq_transparent Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

8 DFTAdvisor Reference Manual, V8.2007_2


May 2007
List of Figures

Figure 2-1. Control Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85


Figure 2-2. Observe Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Figure 2-3. I/O Identification Default Tracing Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 316
Figure 2-4. All Input Logic Tracing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 316
Figure 2-5. Control and Observe Point Insertion. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 317
Figure 2-6. Control Point Example for -None and -Model . . . . . . . . . . . . . . . . . . . . . . . . . . 349
Figure 2-7. Control Point Example for -New_scan_cell . . . . . . . . . . . . . . . . . . . . . . . . . . . . 350
Figure 2-8. Observe Point Example for -None and -Model. . . . . . . . . . . . . . . . . . . . . . . . . . 350
Figure 2-9. Observe Point Example with -New_scan_cell . . . . . . . . . . . . . . . . . . . . . . . . . . 351
Figure 2-10. Observe Point Example with -Existing_scan_cell . . . . . . . . . . . . . . . . . . . . . . 352

9 DFTAdvisor Reference Manual, V8.2007_2


May 2007
List of Tables

Table 1-1. DFTAdvisor Commands Supporting File Redirection Operators . . . . . . . . . . . . 12


Table 2-1. Conventions for Command Line Syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 2-2. Command Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 2-3. Sub-chain Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Table 2-4. Available Information Displays and Arguments . . . . . . . . . . . . . . . . . . . . . . . . . 181
Table 2-5. Report Gate Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 196
Table 2-6. Output Formatting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 231
Table 2-7. Latch Use for Different Clock/Edge Domains . . . . . . . . . . . . . . . . . . . . . . . . . . 288
Table 2-8. Multiple Scan Enables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 293
Table 2-9. Instance Type Prefix Defaults . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 310
Table 2-10. Scan Insertion Invocation Default Pin Names . . . . . . . . . . . . . . . . . . . . . . . . . . 337
Table 2-11. Isolation Gating Based on Scan and Test Enable Active States . . . . . . . . . . . . 339
Table 3-1. Command Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 377
Table 3-2. Format Suffixes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 378
Table A-1. DFTVisualizer-Related Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 385

DFTAdvisor Reference Manual, V8.2007_2 10


May 2007
Chapter 1
Introduction

Use DFTAdvisor to identify and insert scan and test circuitry to your design. For more
information, see the “Inserting Internal Scan and Test Circuitry” section in the Scan and ATPG
Process Guide.

Features
DFTAdvisor contains many features, including the following:

• Supports both full- and partial-scan identification and insertion


• Supports common scan methodologies, including Mux-scan, Clocked-scan, and LSSD
• Provides both automatic and manual scan identification capabilities allowing for an
optimal partial scan solution
• Reads most standard gate-level netlists—consequently, you can strategically use
DFTAdvisor as a point tool in your overall DFT flow
• Contains a powerful design rules checker
• Automatically generates the scan setup dofile and the test procedure files for use
downstream in your flow with the FastScan™ and FlexTest™ ATPG tools
• Displays a variety of information—from design and debugging information to statistical
reports for the test set you generate

Inputs and Outputs


DFTAdvisor requires a gate-level netlist as input. DFTAdvisor reads and writes Verilog,
VHDL, GENIE, EDIF (2.0.0), and TDL formats. Before you add internal scan or test circuitry
to your design, you can analyze your design to ensure it does not contain problems that may
impact test coverage. DFTAdvisor can then identify sequential elements for conversion to scan
cells and then stitch those scan cells into scan chains.

DFTAdvisor supports insertion of mux-DFF, clocked-scan, and LSSD scan types. It performs
design rules checking to ensure scan setup and operation are correct, before scan is actually
inserted. It does not alter the original netlist when it inserts test logic. The tool creates an
internal copy of the original netlist, and then makes all required modifications to this copy.
When finished, the tool writes out the modified copy as a new scan-inserted gate-level netlist.

DFTAdvisor Reference Manual, V8.2007_2 11


May 2007
Introduction
Inputs and Outputs

Inputs
• Design Netlist — can be in Verilog, VHDL, TDL, EDIF 2.0.0, or Genie format.
• Test Procedure File — required if you have existing scan circuity in your design. The
test procedure file defines the operation of existing scan circuitry. See also “Specifying
Existing Scan Information”.
• DFT Library — contains the model descriptions for all library cells used in your
design, along with the model descriptions for all the scan replacement cells.
• Command Dofile File — a set of commands that gives DFTAdvisor information on
how the tool inserts scan chains. Alternatively, you can enter these commands
interactively. See “Command Dictionary” for a listing and descriptions of the
commands available for your use with DFTAdvisor.

Outputs
• Design Netlist — a scan version of your design netlist; can be in Verilog, VHDL, TDL,
EDIF 2.0.0, or Genie format.
• ATPG Setup Files — the test procedure file defining the operation of the scan circuitry
in your design, and a dofile for setting up the design and scan circuitry information for
ATPG.

File Redirection Operators


You can redirect the output of selected Report commands to a file, or append an existing file.
Table 1-1 lists the DFTAdvisor commands supporting redirection operators:

Table 1-1. DFTAdvisor Commands Supporting File Redirection Operators


Echo Report Procedure
History Report Scan Cells
Report Black Box Report Scan Chains
Report Circuit Components Report Scan Groups
Report Dft Check Report Scan Pins
Report Drc Rules Report Sequential Instances
Report Environment Report Statistics
Report Flatten Rules Report Sub Chains
Report Nofaults Report Test Points
Report Primary Inputs Report Tied Signals
Report Primary Outputs Report Timeplate

12 DFTAdvisor Reference Manual, V8.2007_2


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Introduction
Inputs and Outputs

DFTAdvisor uses the following mechanisms for redirecting the output of these:

• > file_pathname
Creates or replaces an existing file_pathname.
• >> file_pathname
Appends the contents of file_pathname.
You add the create and append semantics (“>”, “>>”) at the end of a command’s argument list.

The Example 1-1 command sequence redirects the output from the Report Scan Cells and
Report Scan Chains commands into a single output file, my_scan_report.

Example 1-1. File Redirection Example


echo "----------- scan cells ------------" > my_scan_report //creates the my_scan_report file
report scan cells >> my_scan_report //appends my_scan_report
echo "----------- scan chains ----------" >> my_scan_report //appends my_scan_report
report scan chains >> my_scan_report //appends my_scan_report

DFTAdvisor Reference Manual, V8.2007_2 13


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Introduction
Inputs and Outputs

14 DFTAdvisor Reference Manual, V8.2007_2


May 2007
Chapter 2
Command Dictionary

This chapter contains descriptions of the DFTAdvisor commands in alphabetical order.

Command Line Syntax Conventions


This manual uses the following command usage line syntax conventions.

Table 2-1. Conventions for Command Line Syntax


Convention Example Usage
UPPercase REPort ENvironment Required command letters are in uppercase; in
(substitute product-specific most cases, you may omit lowercase letters when
examples throughout) entering commands or literal arguments and you
need not enter in uppercase. Command names
and options are normally case insensitive.
Commands usually follow the 3-2-1 rule: the first
three letters of the first word, the first two letters
of the second word, and the first letter of the
third, fourth, etc. words.
Boldface SET COmmand Editing A boldface font indicates a required argument.
-Off | -Vi | -Emacs | -Gmacs
[ ] EXIt [-Discard] Square brackets enclose optional arguments. Do
not enter the brackets.
Italic DOFile filename An italic font indicates a user-supplied argument.
{ } ADD CEll Library library Braces enclose arguments to show grouping. Do
{{-Model name} | -All} not enter the braces.
| ADD CEll Library library The vertical bar indicates an either/or choice
{{-Model name} | -All} between items. Do not include the bar in the
command.
Underline SET DOfile Abort ON | OFf An underlined item indicates either the default
argument or the default value of an argument.
… ADD CLocks off_state An ellipsis follows an argument that may appear
primary_input_pin… more than once. Do not include the ellipsis when
[-Internal] entering commands.

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Command Dictionary
Command Summary

Command Summary
Table 2-2 contains a summary of the commands described in this manual.

Table 2-2. Command Summary


Command Description
Add Black Box Defines black boxes, and sets the constrained value on
output or bidirectional black box pins.
Add Buffer Insertion Specifies for DFTAdvisor to place buffer cells between the
primary input of the specific test pin and the gates driving
the test pin.
Add Cell Library Specifies the EDIF library in which to place all or specified
library models, models DFTAdvisor adds explicitly during
the scan and test logic insertion process.
Add Cell Models Specifies the name of a DFT library cell DFTAdvisor can
use with user-defined test points, system-generated test
points, and system-generated test logic.
Add Clock Groups Specifies the grouping of scan cells controlled by different
clocks onto one chain.
Add Clocks Specifies the names and inactive states of the primary input
pins controlling the clocks in the design.
Add Mapping Definition Overrides the non-scan to scan model mapping defined by
DFTAdvisor.
Add Nofaults Places nofault settings either on a pin or on all pins of a
specified instance or module.
Add Nonscan Instances Specifies for DFTAdvisor to ignore the specified instances,
all instances controlled by the specified control pin, or all
instances within the specified module, when identifying
and inserting the required scan elements and test logic.
Add Nonscan Models Instructs DFTAdvisor to ignore all instances of the
specified sequential DFT library model when identifying
and inserting the required scan elements and test logic into
the design.
Add Notest Points Adds circuit points to list for exclusion from testability
insertion.
Add Output Masks Instructs DFTAdvisor to mask, and optionally maintain a
constant logic level on, the specified primary output pins
during the scan identification analysis.

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Command Dictionary
Command Summary

Table 2-2. Command Summary (cont.)


Command Description
Add Pin Constraints Specifies that DFTAdvisor hold the input pin at a constant
state during the rules checking and loop cutting processes.
Add Pin Equivalences Specifies to hold the specified primary input pins at a state
either equal to or inverted in relationship to the state of
another primary input pin during rules checking.
Add Primary Inputs Adds a primary input to the net.
Add Primary Outputs Adds a primary output to the net.
Add Read Controls Adds an off-state value to specified RAM read control
lines.
Add Scan Chains Specifies a name for a preexisting scan chain within the
design.
Add Scan Groups Adds one scan chain group to the system.
Add Scan Instances Specifies that DFTAdvisor add the specified instance, all
instances controlled by the specified control pin, or all
instances within the specified module, to the scannable
instance list.
Add Scan Models Specifies that DFTAdvisor is to flag every instance of the
named DFT library model for inclusion into the identified
scan list.
Add Scan Partition Specifies a grouping of scan cells (a partition) in which
scan chains are inserted separately from the remaining scan
cells in the design.
Add Scan Pins Declares the name of a scan chain at the top-level module
and assigns the corresponding scan input pin, scan output
pin, and optionally, the scan clock pin you associate with
the chain.
Add Seq_transparent Specifies the enable value of a clock enable that internally
Constraints gates the clock input of a non-scan cell for sequential
transparent scan identification.
Add Sub Chains Specifies the name of a preexisting scan chain that exists
entirely within a module, library model, or instance within
a hierarchical design.
Add Subchain Group Adds one sub-chain group to the system.

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Command Dictionary
Command Summary

Table 2-2. Command Summary (cont.)


Command Description
Add Test Points Specifies explicitly where DFTAdvisor places a user-
defined test point to improve the design’s testability either
through better controllability or observability.
Add Tied Signals Specifies for DFTAdvisor to hold the named floating
objects (nets or pins) at the given state value.
Add Write Controls Specifies the off-state value of the write control lines for
RAMs.
Alias Specifies the shorthand name for a DFTAdvisor command,
UNIX command, or existing command alias, or any
combination of the three.
Analyze Control Signals Identifies and optionally defines the primary inputs of
control signals.
Analyze Input Control Specifies for DFTAdvisor to calculate and display the
effects of constraining primary input pins to an unknown
value on those pins’ control capability.
Analyze Output Observe Specifies for DFTAdvisor to calculate and display the
effects on the observability of masked primary output pins.
Analyze Testability Reports general scannability and testability information,
along with calculating the controllability and observability
values for gates.
Delete Black Box Undoes the effect of the Add Black Box command.
Delete Buffer Insertion Specifies the type of scan test pins on which you want to
remove the fanout limit.
Delete Cell Models Specifies the name of the DFT library cell that
DFTAdvisor is to remove from the active list of cells that
the user can access when adding test points or that
DFTAdvisor can access when inserting test logic.
Delete Clock Groups Specifies the name of the group that you want to remove
from the clock groups list.
Delete Clocks Removes primary input pins from the clock list.
Delete Mapping Returns the non-scan to scan model mapping to the
Definition mapping defined by DFTAdvisor.
Delete Nofaults Removes the no-fault settings from either the specified pin
or instance pathnames.

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Command Dictionary
Command Summary

Table 2-2. Command Summary (cont.)


Command Description
Delete Nonscan Removes the specified sequential instances from the non-
Instances scan instance list.
Delete Nonscan Models Removes from the non-scan model list the specified
sequential DFT library models.
Delete Notest Points Removes the specified pins from the list of notest points
which the tool cannot use for testability insertion.
Delete Output Masks Removes the masking of the specified primary output pins.
Delete Pin Constraints Removes the pin constraints from the specified primary
input pins.
Delete Pin Equivalences Removes the pin equivalence specifications for the
designated primary input pins.
Delete Primary Inputs Removes the specified primary inputs from the current
netlist.
Delete Primary Outputs Removes the specified primary outputs from the current
netlist.
Delete Read Controls Removes the read control line off-state definitions from the
specified primary input pins.
Delete Scan Chains Removes the specified scan chain definitions from the scan
chain list.
Delete Scan Groups Removes the specified scan chain group definitions from
the scan chain group list.
Delete Scan Instances Removes the specified, sequential instances from the user-
identified scan instance list.
Delete Scan Models Removes the specified sequential models from the scan
model list.
Delete Scan Partitions Removes the user specified scan partitions.
Delete Scan Pins Removes any previously-assigned scan input, output, and
clock names from the specified scan chains.
Delete Seq_transparent Removes the pin constraints from the specified DFT
Constraints library model input pins.
Delete Sub Chains Removes the definition of a preexisting scan sub-chain.
Delete Subchain Groups Removes a scan sub-chain group.

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Command Dictionary
Command Summary

Table 2-2. Command Summary (cont.)


Command Description
Delete Test Points Remove the test point definitions at the specified locations.
Delete Tied Signals Removes the assigned (tied) value from the specified
floating nets or pins.
Delete Write Controls Removes the RAM write control line off-state definitions
from the specified primary input pins.
Dofile Executes the commands contained within the specified file.
Echo Issues a user-defined string to the transcript.
Exit Terminates the current DFTAdvisor session.
Find Design Names Displays design object hierarchical names matched by an
input regular expression.
Help Displays the usage syntax and system mode for the
specified command.
History Displays a list of previously-executed commands.
Insert Test Logic Inserts the test structures that you define into the netlist to
increase the design’s testability.
Printenv Prints out the values of the UNIX variables in the
environment.
Read Procfile Reads the specified test procedure file.
Read Scan Order Reads the specified DEF or fixed-order file.
Report Black Box Displays information on blackboxes and undefined
models.
Report Buffer Insertion Displays a list of all the different scan test pins and the
corresponding fanout limit.
Report Cell Models Displays a list of either all cell models or the DFT library
models associated with the specified cell type.
Report Circuit Displays information about the components of the circuit
Components as either modules or instances.
Report Clock Groups Displays a list of all clock group definitions.
Report Clocks Displays a list of all clock definitions.
Report Control Signals Displays the rules checking results for the specified control
signals.

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Command Dictionary
Command Summary

Table 2-2. Command Summary (cont.)


Command Description
Report Dft Check Generates the scannability check results for non-scan
instances.
Report Drc Rules Displays either a summary of DRC violations (fails) or
violation occurrence message(s).
Report Environment Displays the current values of all the “set” commands and
the default names of the scan type pins.
Report Feedback Paths Displays a textual report of the currently identified
feedback paths.
Report Flatten Rules Displays either a summary of all the flattening rule
violations or the data for a specific violation.
Report Gates Displays the netlist information for the specified gates.
Report Loops Displays information about circuit loops.
Report Mapping Reports the non-scan to scan model mapping defined in the
Definition design.
Report Nofaults Displays the no-fault settings for the specified pin or
instance pathnames.
Report Nonscan Models Displays the sequential non-scan model list.
Report Notest Points Displays all the circuit points for which you do not want
DFTAdvisor to insert controllability and observability.
Report Output Masks Displays a list of the currently masked primary output pins.
Report Partition Cells Reports the identified partition cells for each I/O pin that is
traced for identification.
Report Pin Constraints Displays the pin constraints of the primary inputs.
Report Pin Equivalences Displays the pin equivalences of the primary inputs.
Report Primary Inputs Displays the specified primary inputs.
Report Primary Outputs Displays the specified primary outputs.
Report Procedure Displays the specified procedure.
Report Read Controls Displays all of the currently defined read control lines.
Report Scan Cells Displays a report or writes a file on the scan cells that
reside in the specified scan chains.
Report Scan Chains Displays a report on all the current scan chains.

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Command Dictionary
Command Summary

Table 2-2. Command Summary (cont.)


Command Description
Report Scan Groups Displays a report on all the current scan chain groups.
Report Scan Models Displays the sequential scan models currently in the scan
model list.
Report Scan Partitions Displays scan partitions.
Report Scan Pins Displays all previously assigned scan input, output, and
clock names.
Report Seq_transparent Displays the seq_transparent constraints.
Constraints
Report Sequential Displays information and testability data for sequential
Instances instances.
Report Statistics Displays a detailed report of the design’s statistics.
Report Sub Chains Displays a report on the scan sub-chains.
Report Subchain Groups Displays a report on the sub-chain groups.
Report Test Logic Displays the test logic that DFTAdvisor added during the
scan insertion process.
Report Test Points Displays the test point specifications you created with the
Add Test Points command and any test points that you
enabled DFTAdvisor to automatically identify.
Report Testability Displays the results of the Analyze Testability command.
Analysis
Report Tied Signals Displays a list of the tied floating signals and pins.
Report Timeplate Displays the specified timeplate.
Report Variables Displays user-defined variables and values.
Report Write Controls Displays the currently defined write control lines and their
off-states.
Reset State Removes all instances from both the scan identification
and test point identification lists that DFTAdvisor
identified during a run.
Ripup Scan Chains Removes the specified scan chains from the design.
Run Runs the scan or test point identification process.
Save History Saves the command line history file to the specified file.

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Command Dictionary
Command Summary

Table 2-2. Command Summary (cont.)


Command Description
Set Capture Clock Specifies the capture clock name for random pattern
simulation.
Set Command Editing Sets the command line editing mode.
Set Contention Check Specifies whether DFTAdvisor checks the gate types that
you determine for contention.
Set Control Threshold Specifies the controllability value for simulation-based
pseudorandom pattern test point identification.
Set Display Sets the DISPLAY environment variable from the tool’s
command line.
Set Dofile Abort Lets you specify that the tool complete processing of all
commands in a dofile regardless of an error detection.
Set Drc Handling Specifies how DFTAdvisor globally handles design rule
violations.
Set Fault Sampling Specifies the fault sampling percentage for scan
identification.
Set File Compression Controls whether the tools read and write files with .Z or
.gz extensions as compressed files (the default).
Set Flatten Handling Specifies how DFTAdvisor globally handles flattening
violations.
Set Gate Level Specifies the hierarchical level of gate reporting and
displaying.
Set Gate Report Specifies the additional display information for the Report
Gates command.
Set Gzip Options Specifies GNU gzip options to use with the GNU gzip
command.
Set Identification Model Specifies the simulation model that DFTAdvisor uses to
imitate the scan operation during the scan identification
process.
Set Internal Fault Specifies whether the tool allows faults within or on the
boundary of library models.
Set Io Insertion Specifies whether to insert I/O buffers.
Set Latch Handling Specifies whether the tool considers non-transparent
latches for scan insertion while test logic is turned on.

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Command Dictionary
Command Summary

Table 2-2. Command Summary (cont.)


Command Description
Set Lockup Latch Specifies for DFTAdvisor to automatically insert latches
between different clock/edge domains to synchronize the
clocks within a scan chain.
Set Logfile Handling Specifies for DFTAdvisor to direct the transcript
information to a file.
Set Multiple Specifies whether to include duplicate gates in feedback
Scan_enables paths which are generated during the circuit flattening
process.
Set Multiple Specifies to create multiple scan_enables.
Scan_enables
Set Net Resolution Specifies the behavior of multi-driver nets.
Set Nonscan Handling Specifies whether to check the non-scan instances for
scannability.
Set Observe Threshold Specifies the observability value for simulation-based test
point identification.
Set Scan Type Specifies the scan style design.
Set Screen Display Specifies whether DFTAdvisor writes the transcript to the
session window.
Set Sensitization Specifies whether DRC checking attempts to verify a
Checking suspected C3 rules violation.
Set Shadow Check Specifies whether DFTAdvisor will identify sequential
elements as “shadow” elements when tracing existing scan
chains.
Set Stability Check Specifies how the tool checks the effect of applying the
shift procedure on non-scan cells.
Set System Mode Specifies the next system mode for the tool to enter.
Set Test Logic Specifies which types of control lines DFTAdvisor makes
controllable during the DFT rules checking.
Set Trace Report Specifies whether the tool displays gates in the scan chain
trace.
Set Transient Detection Specifies whether the tool detects all zero width events on
the clock lines of state elements.
Setup Naming Explicitly defines the default names for nets and instances,
and reports current or modified settings.

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Command Dictionary
Command Summary

Table 2-2. Command Summary (cont.)


Command Description
Setup Output Masks Sets the default mask for all output and bidirectional pins.
Setup Partition Scan Specifies a partition scan run.
Setup Pin Constraints Sets the default pin constraint value for all input and
bidirectional pins.
Setup Registered IO Registers the primary inputs and outputs of a core design.
Setup Scan Identification Specifies the scan identification methodology and amount
of scan that DFTAdvisor is to consider during the
identification run.
Setup Scan Insertion Sets up the parameters for the Insert Test Logic command.
Setup Scan Pins Changes the scan-in or scan-out pin naming parameters to
index or bus format.
Setup Test_point Specifies the number of control and observe test points that
Identification DFTAdvisor flags during the identification run.
Setup Test_point Specifies how DFTAdvisor configures the inputs for the
Insertion control test points and the outputs for the observe test
points.
Setup Tied Signals Changes the default value for floating pins and floating
nets that do not have assigned values.
System Passes the specified command to the operating system for
execution.
Verify Scan Verifies that newly inserted scan can pass DRC.
Write Atpg Setup Writes the test procedure and the dofile for inserted scan
chains to the specified files.
Write Writes a constraints driver file for the formal verification
Formal_verification tool, FormalPro.
Setup
Write Loops Writes a list of all loops to the specified file.
Write Netlist Writes the current design in the specified netlist format to
the specified file.
Write Primary Inputs Writes primary inputs to the specified file.
Write Primary Outputs Writes primary outputs to the specified file.

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Command Dictionary
Command Summary

Table 2-2. Command Summary (cont.)


Command Description
Write Procfile Writes existing procedure and timing data to the named
test procedure file.
Write Scan Identification Writes a list of the scan instances that DFTAdvisor has
identified or you have defined as scan cells.
Write Scan Order Creates specified DEF file.
Write Subchain Setup Writes the appropriate Add Sub Chains commands to a file
so that DFTAdvisor can understand the preexisting scan
sub-chains at the top-level of this module.

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Command Dictionary
Command Descriptions

Command Descriptions
The remaining pages in this chapter describe, in alphabetical order, the DFTAdvisor commands.
Each command description begins on a new page.

The notational conventions in use here are the same as those in use in other parts of the manual.
Do not enter any of the special notational characters (such as, {}, [], or |) when typing the
command. You can use the line continuation character “\” when application commands extend
beyond the end of a line. The line continuation character improves the readability of dofiles and
helps with the command line entry of multiple-argument commands.

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Command Dictionary
Add Black Box

Add Black Box


Scope: Setup mode
Usage
ADD BLack Box {{{-Instance ins_pathname | -Module module_name} [0 | 1 | X | Z]} [-Pin
pinname {0 | 1 | X | Z}]…} | {-Auto [0 | 1 | X | Z]} [-FAUlt_boundary |
-NOFAUlt_boundary | -NO_Boundary]
Description
Defines black boxes, and sets the constrained value on output or bidirectional black box pins.
By default, DFTAdvisor does not automatically blackbox any instantiated module or
component not defined in either the ATPG library or the design netlist. When detecting an
instance of an undefined model, the VHDL, Verilog, and EDIF readers issue a warning.
Additionally, the flatten model command verifies you have blackboxed all undefined models
before flattening.
Instance-Based Black Boxes: If you use Add Black Box with the -Auto switch, DFTAdvisor
automatically blackboxes all instances of models the tool considers undefined. By default,
instances the tool automatically blackboxes drive Xs on their outputs—faults propagating to the
black box inputs are classified at ATPG_untestable (AU). You can also change the output
values using the Add Black Box command.
Module-Based Black Boxes: By default, modules the tool automatically blackboxes drive X on
the outputs while the inputs are fault sinks. You can change the output values by issuing the
Add Black Box command. You can also blackbox modules you have defined, but you do not
want to include in the next run.
If you issue two Add Black Box commands in tandem, where one is module-based and the other
is instance-based, then you can globally blackbox all instances of a particular module while
selectively blackboxing a particular instance of the same module with slightly different values.
Arguments
• -Instance ins_pathname
A switch and string pair specifying the full instance pathname (ins_pathname) for the tool to
blackbox. Instance-based blackboxing always overrides module-based blackboxing.
• -Module module_name
A switch and string pair specifying the name of the module (module_name) for which every
instantiation the tool blackboxes.
• -Auto
A switch specifying blackboxing of all referenced models without a defining netlist module
or library model. The modules contain default output values.
• 0|1|X|Z
An optional literal specifying pin tie values for use with the following switches:

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Command Dictionary
Add Black Box

o -Instance or -Module — specifies the tie value for any undefined pin.
o -Pin — specifies the tie value for the pin.
o -Auto — specifies the tie value for every pin.
If you specify no value for this option, then the application defaults to the Setup Tied
Signals command’s value. If you want a different value, then use the -Pin switch and specify
the value.
• -Pin pinname
An optional repeatable switch and string pair specifying the tie value of the particular pin.
Valid values are 0, 1, X, and Z, where X is the default. Unspecified pins assume the default
tie value in effect for the specified instance or module. May be used with -Instance or
-Module switches.
• -FAUlt_boundary
A switch specifying to keep pin pathnames at the boundaries of all blackboxed instances and
allow boundary pins to become fault sites. This is the default behavior.
• -NOFAUlt_boundary
A switch specifying to keep pin pathnames at the boundaries of all blackboxed instances,
but not allow boundary pins to become fault sites.
Note
You must include this switch when you use the Add Black Box command to blackbox
macros for MacroTest.

• -NO_Boundary
A switch specifying to not keep pin pathnames at the boundaries of all blackboxed instances
and to not allow boundary pins to become fault sites.
Examples
The following example creates a black box for module core with a tie value of 0, then core1.
add black box -module core 0
add black box -instance core1 -pin pin1 1

The following example creates a black box for all undefined models.

add black box -auto

The following example keeps the pin pathnames at the boundary of all instances of the
blackboxed module named “macro1”, but nofaults the pins.

add black box -module macro1 -nofault_boundary

Related Commands
Delete Black Box Report Black Box

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Command Dictionary
Add Buffer Insertion

Add Buffer Insertion


Scope: All modes
Usage
ADD BUffer Insertion max_fanout test_pin… [-Model modelname]
Description
Specifies for DFTAdvisor to place buffer cells between the primary input of the specific test pin
and the gates driving the test pin.
When DFTAdvisor inserts the scan circuitry into the design, the scan-related pins (enables and
clocks) can fanout to drive multiple gates. When a pin has a large fanout, the pin’s increased
load factor affects the quality of the pin’s output signal.
If you want to avoid signal degradation of a primary input scan pin, you can use the Add Buffer
Insertion command. This sets the fanout limit on all buffers used to buffer the specified signal.
The fanout limit propagates down the buffer tree the tool inserts.
Arguments
• max_fanout
A required integer specifying the maximum number of gates the test_pin can drive before
DFTAdvisor inserts buffers. The value must be greater than 1. By default, the tool assumes
the test_pin can drive an infinite number of gates. This value overrides the default value set
by the Add Cell Models command.
• test_pin
A required repeatable literal specifying the type of the primary input scan pin on which you
want DFTAdvisor to monitor the maximum fanout. The following lists the default pin
names for each type of scan pin. You can use the Setup Scan Insertion command to change
the default names of the scan pins.
SEN (scan enable; default name scan_en) — a literal specifying the primary input pin
enabling the scan chain.
SCLK (scan clock; default name scan_clk) — a literal specifying the primary input pin
clocking the scan data through the scan chain when using the clocked-scan type.
TEN (test logic enable; default name test_en) — a literal specifying the primary input
pin enabling the operation of the test logic circuitry.
TCLK (test logic clock; default name test_clk) — a literal specifying the primary input
pin clocking the values DFTAdvisor requires for proper test logic functionality.
SMCLK (master scan clock; default name scan_mclk) — a literal specifying the
primary input pin clocking the scan data into the master scan elements of the scan
chain when using the LSSD scan type.
SSCLK (slave scan clock; default name scan_sclk) — a literal specifying the primary
input pin for clocking the scan data into the slave scan elements of the scan chain
when using the LSSD scan type.

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Command Dictionary
Add Buffer Insertion

SET (scan set; default name scan_set) — a literal specifying the new scan set for the
scan cells.
RESET (scan reset; default name scan_reset) — a literal specifying the new scan reset
for the scan cells.
• -Model modelname
An optional switch and string pair specifying the name of a buffer in the library
DFTAdvisor inserts when the scan pin reaches the maximum fanout. You must first identify
the buffer with either the Add Cell Models command or with the cell_type library attribute.
If you do not use the -Model switch, by default, the tool uses the first buffer model in the
buffer cell model list, which you obtain with the Report Cell Models command.
Examples
Example 2-1 explicitly specifies the buffer model to use and sets the maximum fanout for the
scan enable pin for a mux-DFF cell.

Example 2-1. Add Buffer Insertion Example


add cell models buf2a -type buf -max_fanout 10
report cell models
BUF : buf1a<infinity> buf2a<10>

add buffer insertion 5 sen -model buf2a

In this example, you must initially define the buf1a buffer model in the library using the
cell_type library attribute with the value of “BUF”. The first command explicitly adds the buf2a
cell to the buffer model list and defines its fanout to be 10. Next, the report shows the two
buffers currently in the buffer model list. The last command specifies the maximum fanout of
the scan enable pin and all buffers inserted to buffer the scan enable signal.
This example uses the -Model switch to specify the buf2a model. Without this switch, the tool
would use the buf1a model, because it is the first in the buffer model list.
Related Commands
Add Cell Models Report Buffer Insertion
Delete Buffer Insertion Setup Scan Insertion

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Command Dictionary
Add Cell Library

Add Cell Library


Scope: All modes
Prerequisites: This command is only useful when writing out an EDIF netlist.
Usage
ADD CEll Library library_name {{-Model model_name} | -All}
Description
Specifies the EDIF library in which to place all or specified library models, models
DFTAdvisor adds explicitly during the scan and test logic insertion process.
The Add Cell Library command specifies into which EDIF library to place the library models
for inserted test logic. You can also specify an individual model of inserted test logic to place
into the library.
Arguments
• library_name
A required string specifying the name of the EDIF library to create.
• {-Model model_name} | -All
A required switch and string naming the specific inserted test logic model or the entire
library to place in the specified EDIF library.
Example
The following example specifies all test logic inserted by DFTAdvisor is to be placed in the
EDIF library “pad_lib”:
add cell library pad_lib -all

In the following example, DFTAdvisor places the test logic MUX21 model type’s model cell
definition in the EDIF “mux_lib”.
add cell library mux_lib -model MUX21

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Command Dictionary
Add Cell Models

Add Cell Models


Scope: All modes
Usage
ADD CEll Models dftlib_model {-Type {INV | And | {Buf -Max_fanout integer} | OR | NAnd
| NOr | Xor | INBuf | OUtbuf | {Mux selector data0 data1} | {Scancell clk data [-Active
{High | Low}]} | {DFf clk data} | {DLat enable data [-Active {High | Low}]} | {Wrapcell
clk data}} [{-Noinvert | -Invert} output_pin]
Description
Specifies the name of a DFT library cell DFTAdvisor can use with user-defined test points,
system-generated test points, and system-generated test logic.
When adding test logic circuitry, DFTAdvisor uses a number a gates from the library. The
cell_type attribute in the library model descriptions tells DFTAdvisor the available components
available for use as test logic. The Add Cell Models command is an alternative to the cell_type
attribute for identifying these components.
For more information on the design library attribute, refer to “Cell Type” in the Design-for-Test
Common Resources Manual.
Arguments
• dftlib_model
A required string specifying the name of a cell model in the DFT library DFTAdvisor uses
for test logic, buffer tree, lockup latch, or test point insertion.
• -Type INV | And | {Buf -Max_fanout integer} | OR | NAnd | NOr | Xor | INBuf | OUtbuf
| {Mux selector data0 data1} | {Scancell clk data [-Active {High | Low}]} | {DFf clk data}
| {DLat enable data [-Active {High | Low}]} | {Wrapcell clk data}
A required switch and argument pair specifying the named dftlib_model’s type from the
following choices:
INV — a literal specifying a 1-input inverter gate.
And — a literal specifying a 2-input AND gate.
Buf -Max_fanout integer — a literal with a switch and integer pair specifying a 1-input
buffer gate with an optional buffer fanout limit.
OR — a literal specifying a 2-input OR gate.
NAnd — a literal specifying a 2-input NAND gate.
NOr — a literal specifying a 2-input NOR gate.
Xor — a literal specifying an exclusive OR gate.
INBuf — a literal specifying a primary input buffer gate DFTAdvisor inserts whenever
the tool adds new input pins (for example, the scan input or scan enable pins).
DFTAdvisor places the buffer between the primary input and the new pin.

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Command Dictionary
Add Cell Models

OUtbuf — a literal specifying a primary output buffer gate DFTAdvisor inserts


whenever the tool adds new output pins (such as the scan output pin). It places the
buffer between the new pin and the primary output.
Mux selector data0 data1 — a literal and three strings specifying a 2-1 multiplexer and
the names of the selector pin and both data pins.
Scancell clk data [-Active {High | Low}] — a literal and two strings specifying one of
the following scan cells:
o a mux-DFF scan cell with the following four input pins: clock, data, scan in, and
scan enable
o a clocked-scan cell with the following four inputs: clock, data, scan clock, and
scan enable
o a LSSD scan cell with the following five inputs: clock, data, scan in, master
clock, and slave clock
You must specify the name of the clock and data pins of the DFT library cell model.
You may also include an optional switch with a literal to specify the inversion on the
clock pin. By default, DFTAdvisor uses an active-high polarity clock pin unless you
specify otherwise. This option works in conjunction with the Add Test Points and the
Setup Registered IO commands.
DFf clk data — a literal and two strings specifying a D flip-flop with two input pins,
specifically, clock and data. You must specify the names of the clock and data pins of
the DFT library cell model. This option works in combination with the Add Test
Points command.
DLat enable data [-Active {High | Low}] — a literal and two strings specifying a D
latch with two input pins, specifically enable and data. You must specify the names of
the enable line and the data pin of the DFT library cell model. If you are defining this
model for use with lockup latches, you may also include an optional switch with a
literal. This switch specifies whether the enable input is active high or active low.
This option is used with the Set Lockup Latch command. DFTAdvisor always
assumes an active-high polarity enable pin unless otherwise specified.
Wrapcell clk data — literal and two strings specifying a mux-scan cell with five input
pins (clock, data, scan in, scan enable, and test enable). You must specify the names
of the clock and data pins of the DFT library cell model. This option is meant to work
in combination with the Setup Registered IO command.
• {-Noinvert | -Invert} output_pin
An optional switch and string pair you can use with values of the cell model type that are
sequential elements. This switch specifies whether the output_pin has an inversion
relationship with the data input of the given sequential element. By default, DFTAdvisor
assumes no inversion relationship between the output_pin and the data input. If you do not
explicitly specify an inversion switch, by default, DFTAdvisor uses the first output_pin
value it identifies on a DFF, ScanCell, or DLAT model.

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Command Dictionary
Add Cell Models

Examples
The following example shows a typical use of test logic involving the set, reset, and clock pins
on sequential elements (flip-flops). DFTAdvisor can usually ensure controllability of sequential
elements with model types of And, Or, and, Mux.
add clocks 0 clk
set test logic -set on -reset on -clock on
set system mode dft
report dft check

add cell models and2 -type and
add cell models or2 -type or
add cell models mux21h -type mux si a b

The following mux-DFF example adds the buf2a cell to the buffer model list, and then
explicitly specifies the buffer model to use and sets the maximum fanout for the scan enable:
add cell models buf2a -type buf
report cell models
BUF : buf1a buf2a

add buffer insertion 5 sen -model buf2a

Related Commands
Add Buffer Insertion Set Lockup Latch
Delete Cell Models Set Test Logic
Report Cell Models Setup Registered IO
Set Io Insertion Setup Scan Identification

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Command Dictionary
Add Clock Groups

Add Clock Groups


Scope: Dft mode
Prerequisites: You must first define all the clocks with the Add Clocks command.
Usage
ADD CLock Groups group_name clk_pin… [-Tclk]
Description
Specifies the grouping of scan cells controlled by different clocks onto one chain.
If you are merging scan cells controlled by multiple shift clocks into one scan chain, you can
place together scan cells sharing the same shift clock by using the Add Clock Groups command.
DFTAdvisor groups scan cells controlled by the same clock in the chain. If you want to insert
lockup latches between the different clock domains of the groups, you can use the Set Lockup
Latch command. These latches synchronize the pulses to all the clock inputs of the scan cells
within the same scan chain.
As you define clock groups, the clocks in these groups are removed from the default clock
group, all_clocks. Every clock is contained in either a user-defined clock group or the default
clock group.
Arguments
• group_name
A required string naming the list of clock pins you provide with the clk_pin argument.
• clk_pin
A required repeatable string identifying the names of all the clocks controlling the cells you
group together.
• -Tclk
An optional switch specifying the inclusion of the test clock in the clock group. Because
DFTAdvisor adds the clock signal during test structure insertion, you cannot specify the
actual clock name here.
Examples
The following example lists the clocks in the current clock list, splits those clocks into two
different groups, and defines the latch DFTAdvisor uses for synchronizing the different clocks:

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Command Dictionary
Add Clock Groups

add clock 1 clk1 clk2


add clock 0 clk3 clk4 clk5 clk6
set system mode dft

add clock groups group1 clk1 clk3 clk4
add clock groups group2 clk2 clk5 clk6
add cell models dlat1a -type dlat enable data
add cell models inv -type inv
set lockup latch on
run
synthesize

This example also enables automatic lockup latch insertion, and subsequently performs the scan
and latch placement.
Note
This example creates two scan chains and corresponding to the two clock groups.

Related Commands
Add Cell Models Report Clock Groups
Add Clocks Set Lockup Latch
Delete Clock Groups

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Command Dictionary
Add Clocks

Add Clocks
Scope: Setup mode
Usage
ADD CLocks off_state primary_input_pin…
Description
Specifies the names and inactive states of the primary input pins controlling the clocks in the
design.
You must declare control signals (for example, clocks, sets, and resets) and the signal’s
corresponding off-state with the Add Clocks command before entering the Dft mode.
Otherwise, instances outside of the design rules checker’s control fail the scannability check. If
an instance fails the scannability check, then DFTAdvisor does not recognize it as a scannable
instance, and cannot replace it with the corresponding scan cell.
As you declare clocks, DFTAdvisor inserts the clocks into a default clock group, all_clocks.
Arguments
• off_state
A required literal specifying the pin value that cannot affect the output pin activity of the
instance. For example, the off-state of an active low reset pin is 1 (high). For an edge-
triggered control signal, the off–state is the value on the pin that results in the clock inputs
being placed at the initial value of a capturing transition.
The off-state choices are as follows:
0 — A literal specifying the off-state value is 0.
1 — A literal specifying the off-state value is 1.
• primary_input_pin
A required repeatable string that lists the primary input pins that you want controlling the
output pins of an instance. The list of primary input pins must all have the same off_state.
If you declare a control pin with the Add Clocks command, DFTAdvisor also automatically
declares all pins that are equal to that pin as control pins, by looking at the arguments of any
Add Pin Equivalences commands.
Examples
The following example first lists the primary inputs of the design, a D flip-flop. The next two
commands declare the preset, clear, and clock pins to be clocks, which means they have the
ability to control the states on the output pins of that instance.
report primary inputs
SYSTEM: /CLK_INPUT
SYSTEM: /D_INPUT
SYSTEM: /PRE_INPUT
SYSTEM: /CLR_INPUT

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Command Dictionary
Add Clocks

add clock 1 /pre_input /clr_input


add clock 0 /clk_input

Related Commands
Add Clock Groups Delete Clocks
Analyze Control Signals Report Clocks

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Command Dictionary
Add Mapping Definition

Add Mapping Definition


Scope: Setup and DFT modes
Prerequisites: You can only override the mapping for scan models of the same scan type. For
example, a mux-DFF scan model can only be replaced by another mux-DFF scan model.
Usage
ADD MApping Definition object_name [-Instance | -Module] [-Nonscan_model
nonscan_model_name] [-Scan_model scan_model_name] [-Output scan_ouput_pin_name]
Description
Overrides the non-scan to scan model mapping defined by DFTAdvisor.
The Add Mapping Definition command defines the mapping of non-scan models to scan
models. You can change the scan model for an individual instance, all instances under a
hierarchical instance, all instances in all occurrences of a module in the design, or all
occurrences of the model in the entire design. Additionally, you can change the scan output pin
of the scan model in the same manner.
Note
Use this command for changing the existing non-scan to scan model mapping, as defined
in the library, and not to define the mapping.

Refer to “Defining Scan Cell and Scan Output Mapping” in the Scan and ATPG Process Guide
for conceptual information on this topic.
Arguments
• object_name
A required string that specifies the name of the non-scan model you want to map to a
different scan model. If, instead of a non-scan model, you specify an instance, hierarchical
instance, module, or scan model, then this is that object’s name.
o If this argument is the name of an instance or hierarchical instance, the -Instance
switch is required and the model must be specified with the -Nonscan_model switch
or -Scan_model switch.
o If this argument is the name of a module, then the -Module switch is required and the
model must be specified with the -Nonscan_model or -Scan_model switch.
o If this argument is a scan model, then the -Output switch is required. Because you
specified a scan model, you can only define the scan output pin mapping.
• -Instance | -Module
An optional switch that specifies the type of the object_name argument. If neither switch is
specified, the object_name is a model (the default).

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Command Dictionary
Add Mapping Definition

o If you specify -Instance and the instance is primitive, then only the named instance
has its mapping changed.
o If you specify -Instance and the instance is hierarchical, then all instances under that
instance matching the -Nonscan_model or (for output mapping) matching the
-Scan_model have their mapping changed.
o If you specify -Module, then for all occurrences of that module, all instances within
that module that match the -Nonscan_model or (for output mapping) matching the
-Scan_model have their mapping changed.
• -Nonscan_model nonscan_model_name
A switch and string pair that specifies the name of the non-scan model for which you want
to change the mapping. This argument is required if you specify -Instance or -Module
switch. Otherwise, specify the name of the non-scan model in the object_name argument.
• -Scan_model scan_model_name
A switch and string pair that specifies the name of the scan model that you want to use for
the specified non-scan model. This argument is required except when you are changing the
mapping of the scan output pin, and specify the scan model in the object_name argument.
• -Output scan_ouput_pin_name
An optional switch and string pair that specifies the name of the scan output pin to use
instead of the DFTAdvisor defined scan output pin. The port must have been declared as a
scan-out port in the scan_definition section of the scan cell.
Examples
The following example maps the fd1 non-scan model to the fd1s scan model for all occurrences
of the model in the design:
add mapping definition fd1 -scan_model fd1s

The following example maps the fd1 non-scan model to the fd1s scan model and changes the
scan output pin to “qn” for all occurrences of the model in the design:
add mapping definition fd1 -scan_model fd1s -output qn

The first command in the following example maps the fd1 non-scan model to the fd1s scan
model for all matching instances in the “counter” module and for all occurrences of that module
in the design. The second command maps the fd1 non-scan model to the fd1s2 scan model and
changes the scan output pin to “qn” for all matching instances under the hierarchical instance
“/top/counter1”. Note that counter1 is an instance of the module counter changed in the first
command.
add mapping definition counter -module -nonscan_model fd1
-scan_model fd1s
add mapping definition /top/counter1 -instance -nonscan_model fd1
-scan_model fd1s2 -output qn

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Command Dictionary
Add Mapping Definition

The following example changes the scan output pin to “qn” for all occurrences of the fd1s scan
model in the design:
add mapping definition fd1s -output qn

Related Commands
Delete Mapping Definition Report Mapping Definition

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Command Dictionary
Add Nofaults

Add Nofaults
Scope: Setup mode
Usage
ADD NOfaults {{{modulename -Module} | {object_expression… [-PIN | -Instance]}}
[-Stuck_at {01 | 0 | 1}] [-Keep_boundary]}
Description
Places nofault settings either on a pin or on all pins of a specified instance or module.
The Add Nofaults command places a nofault setting on either a single specified pin, or on all
pins of a specified instance or module.
• If the pathname is a pin, then DFTAdvisor ignores only the fault on that pin.
• If the pathname is an instance, then the tool ignores all pin faults on the top-level of that
instance, along with all the pin faults underneath that instance (if it is a hierarchical
instance).
• If the pathname is a module, then the tool ignores all pin faults on the top-level of the
module, along with all the pin faults on all instances and pins underneath that module for
every occurrence of that module in the design.

Note
The nofaults that you create with the Add Nofaults command only exist for the current
DFTAdvisor session.

DFTAdvisor recognizes the nofault setting on pins and instances through the following two
mutually exclusive tagging processes:
• Interactively using the Add Nofaults command for pins and instances
• Using the nofault DFT library attribute for pins
Arguments
• modulename
A repeatable string that specifies the name of a module to which you want to assign nofault
settings. You must include the -Module switch when you specify a module name.
• -Module
A switch that specifies to interpret the modulename argument as a module pathname. All
instances of the module are affected.
• object_expression
A string representing a list of pathnames of instances or pins for which you want to assign
nofault settings. The string may include any number of embedded asterisk (*) or question

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Command Dictionary
Add Nofaults

mark (?) wildcard characters. The asterisk matches any sequence of characters (including
none) in a name, and the question mark matches any single character.
Pin pathnames must be ATPG library cell instance pins, also referred to as design level pins.
If the object expression specifies a pin within an instance of an ATPG library model, the
tool ignores it. By default, pin pathnames are matched first. If a pin pathname match is not
found, the tool next tries to match instance pathnames. You can force the tool to match only
pin pathnames or only instance pathnames by including the -Pin or -Instance switch after the
object_expression.
• -PIN
An optional switch that specifies to use the preceding object expression to match only pin
pathnames; the tool will then assign nofault settings to all the pins matched.
• -Instance
An optional switch that specifies to use the preceding object expression to match only
instance pathnames; the tool will then assign nofault settings to all boundary and internal
pins of the instances matched (unless you use the -Keep_boundary switch).
• -Stuck_at 01 | 0 | 1
An optional switch and literal pair identifying the stuck-at values receiving the nofault
setting. Choose from one of the following:
01 — specifies the placement of a nofault setting on both the “stuck-at-0” and “stuck-at-
1” faults. This is the default.
0 — specifies the placement of a nofault setting on the “stuck-at-0” faults.
1 — specifies the placement of a nofault setting on the “stuck-at-1” faults.
• -Keep_boundary
An optional switch that specifies that nofaults are applied to the pins inside of the specified
instance or module, but faults are still allowed at the boundary pins of the specified
instances or modules. This option does not apply to nofaults on pin pathnames.
Examples
The following example first tags all the pin faults on and below an instance, and then tags the
fault on a specific pin.
add clocks 0 clock
add nofaults i_1006 -instance
add nofaults i_1_16/df0/q
set system mode dft
run

Related Commands
Delete Nofaults Report Nofaults

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Command Dictionary
Add Nonscan Instances

Add Nonscan Instances


Scope: All modes, except only Dft mode for the -Control_signal option.
Usage
ADD NONscan Instances pathname... | instance_expression [-INStance | -Control_signal |
-Module]
Description
Specifies for DFTAdvisor to ignore the specified instances, all instances controlled by the
specified control pin, or all instances within the specified module, when identifying and
inserting the required scan elements and test logic.
The Add Nonscan Instances command causes DFTAdvisor to ignore the specified instances,
instances controlled by the specified control signals, or all instances within the specified module
when you execute both the scan identification process with the Run command and the scan
insertion process with the Insert Test Logic command.
Also, DFTAdvisor will not perform the scannability rule checks on non-scan instances unless
you execute the Set Nonscan Handling command.
If you want to flag all instances of a certain library model as non-scan, you can use the Add
Nonscan Models command as a shortcut.
When adding non-scan instances with control signals, DFTAdvisor adds all scannable instances
controlled by the control signals to the non-scan instance list. Control pins can be any clock, set,
or reset signal (primary input) that controls the contents of sequential instances. You can use the
Report Control Signals command to see the pins that control the sequential instances in the
design.
If TIE0 and TIE1 non-scan cells are scannable, they are considered for scan. However, if these
cells are used to hold off sets and resets of other cells so that another cell can be scannable, you
must use this command to make them non-scan.
Arguments
• pathname
A required repeatable string that specifies the pathnames of the sequential instance or
control signals (that control instances) which you want DFTAdvisor to ignore. If the
instance is hierarchical, then all instances beneath it are also flagged as non-scan.
• instance_expression
A string representing a list of instances within the design. The string instance_expression is
defined as:
{ string | string * } ...

The asterisk (*) is a wildcard that allows you to match many instances in a design. Any
expression that does not contain an asterisk (*) will match exactly zero or one instance.

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Command Dictionary
Add Nonscan Instances

This argument does not support pathnames to objects below the instance level of an ATPG
library model. You can use a pathname expression to select several instances and the tool
will then add nonscan instances for all the pins on those instances; but if the expression
specifies a location below the instance level of an ATPG library model, the tool will issue an
error message.
• -INStance | -Control_signal | -Module
An optional switch that specifies whether the pathnames are instances, pins (control
signals), or modules. An example Verilog module is “module clkgen (clk, clk_out, …)”
where clkgen is the module name. You can only use the -Control_signal option in Dft mode.
The default is instances.
Examples
The following example specifies that DFTAdvisor ignore the sequential i_1006 instance when
identifying and inserting the required scan circuitry:
add nonscan instances i_1006

Related Commands
Delete Nonscan Instances Report Sequential Instances
Insert Test Logic Run
Set Nonscan Handling

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Command Dictionary
Add Nonscan Models

Add Nonscan Models


Scope: All modes
Usage
ADD NONscan Models model_name…
Description
Instructs DFTAdvisor to ignore all instances of the specified sequential DFT library model
when identifying and inserting the required scan elements and test logic into the design.
The Add Nonscan Models command causes DFTAdvisor to ignore the instances of the specified
models, when you execute both the scan identification process with the Run command, and the
scan insertion process with the Insert Test Logic command.
DFTAdvisor does not check the scannability on the instances instantiated from the added non-
scan models, unless you specify checking using the Set Nonscan Handling command.
If you want to flag individual instances as non-scan, you can use the Add Nonscan Instances
command.
Arguments
• model_name
A required repeatable string that specifies the model names that you want DFTAdvisor to
ignore. You must enter the model names as they appear in the DFT library.
Examples
The following example specifies that DFTAdvisor should not substitute any of the instances of
the DFT library model named d_flip_flop with the equivalent scan replacement DFT library
model.
add nonscan models d_flip_flop

Related Commands
Delete Nonscan Models Run
Insert Test Logic Report Nonscan Models
Set Nonscan Handling

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Command Dictionary
Add Notest Points

Add Notest Points


Scope: DFT mode
Usage
ADD NOtest Points {pin_pathname… | instance_pathname… | instance_expression
[-Observe_scan_cell]} | -Path filename
Description
Adds circuit points to list for exclusion from testability insertion.
The Add Notest Points command excludes the specified cell output pins, excludes specified D
input scan cells, excludes all output pins on the specified instance, or excludes delay paths from
use as controllability and observability insertion points. If the selected pin is already a control or
observe point, an error occurs when you issue this command.
If you specify a path file that contains delay paths, DFTAdvisor marks each gate in the path;
consequently, DFTAdvisor adds no test points to the output of that gate. This prevents control
and observation points from being added to a critical path and thus prevents increasing the load
on any of these gates in that path. The format of the file is the same as the file loaded into
FastScan with the Load Paths command. For more information on the format, refer to “The Path
Definition File” in the Scan and ATPG Process Guide.
The Report Notest Points command displays all the pins in this list or can list the defined critical
paths.
Arguments
• pin_pathname
A repeatable string that lists the output pins that you do not want to use for controllability
and observability insertion.
• instance_pathname
A repeatable string that lists the instances whose output pins you do not want to use for
controllability and observability insertion. All output pins within that (hierarchical) instance
are added to the list of pins that should be excluded from consideration.
• instance_expression
A string representing a list of instances within the design. The string instance_expression is
defined as:
{ string | string * } ...

The asterisk (*) is a wildcard that allows you to match many instances in a design. Any
expression that does not contain an asterisk (*) will match exactly zero or one instance.
This argument does not support pathnames to objects below the instance level of an ATPG
library model. You can use a pathname expression to select several instances and the tool
will then add notest points for all the pins on those instances; but if the expression specifies

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Command Dictionary
Add Notest Points

a location below the instance level of an ATPG library model, the tool will issue an error
message.
• -Observe_scan_cell
An optional switch that excludes the instance named in the instance_pathname argument for
use as an observation scan cell.
• -Path filename
A switch and filename pair that specifies the pathname to a file that contains critical path
information. For more information on the format of the file, refer to “The Path Definition
File” in the Scan and ATPG Process Guide.
Examples
The following example first sets up the test point identification parameters, then specifies
output pins tr_io and ts_i that DFTAdvisor cannot use for testability insertion:
set control threshold 4
set observe threshold 4
setup test_point identification -control 9 -obs 20 -patterns 32000
-base simulation
setup test_point insertion -cshare 16 -oshare 16
set system mode dft
setup scan identification none
add notest points tr_io ts_i
run

Related Commands
Delete Notest Points Report Notest Points
Setup Test_point Insertion

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Command Dictionary
Add Output Masks

Add Output Masks


Scope: Setup mode
Usage
ADD OUtput Masks {primary_output… | -All} [-Nohold | -Hold {0 | 1}]
Description
Instructs DFTAdvisor to mask, and optionally maintain a constant logic level on, the specified
primary output pins during the scan identification analysis.
DFTAdvisor uses primary output pins as the observe points during the scan identification
process. When you mask a primary output pin, you inform DFTAdvisor to mark that pin as an
invalid observation point during the identification process.
There are specific design practices that mask specific primary output pins in order to group the
sequential elements associated with those primary outputs (for example, if you are using
partition scan). For more information on partition scan, refer to “Understanding Partition Scan”
in the Scan and ATPG Process Guide.
You can set a default mask for all output and bidirectional pins using the Setup Output Masks
command. You can add a hold value to a default mask with the Add Output Masks command, or
remove a hold value using the Delete Output Masks command. To turn off the default masks for
all output pins, you must use the Setup Output Masks command with the Off literal.
Arguments
• primary_output
A repeatable string that specifies the names of the primary output pins you want to mask.
When you enter the primary_output argument without the -Hold switch, DFTAdvisor marks
the specified pins as invalid observation points during the identification process.
If you specify the -Hold switch, then, in addition to masking the specified pins, DFTAdvisor
also applies and maintains the specified (-Hold) state value on the pins.
• -All
A switch that specifies to mask all the primary output pins.
• -Nohold
An optional switch specifying that you want DFTAdvisor to allow any state value on the
primary output pin. This is the default.
• -Hold 0 | 1
An optional switch and literal pair that specifies the particular state that you want
DFTAdvisor to maintain on the primary output pin. If you use this switch, you can explicitly
specify that the output pin is driving the inactive value. The choices for the hold literal value
are as follows:
0 — A literal that specifies to maintain a low logic state on the primary output pin.

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Command Dictionary
Add Output Masks

1 — A literal that specifies to maintain a high logic state on the primary output pin.
Examples
The following example first sets up DFTAdvisor to recognize only the partition cells during the
scan identification run. The invocation default identification type is sequential scan. Next, the
example specifies the primary output pins that the Add Output Masks command associates with
the partition scan cells.
setup scan identification partition_scan
add output masks out1 out2 out3

When you issue the Run command later in the session, DFTAdvisor identifies all the sequential
elements that are observable only through the primary output pin that you masked. Then, when
you issue the Insert Test Logic command, DFTAdvisor stitches all those scan cells it previously
identified as being in the partition into one partition scan chain.

Related Commands
Analyze Output Observe Setup Output Masks
Delete Output Masks Setup Scan Identification
Report Output Masks

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Command Dictionary
Add Pin Constraints

Add Pin Constraints


Scope: Setup mode
Usage
ADD PIn Constraints primary_input_pin {C0 | C1 | CZ | CX}
Description
Specifies that DFTAdvisor hold the input pin at a constant state during the rules checking and
loop cutting processes.
DFTAdvisor performs the rules checking and loop cutting processes when you issue the Set
System Mode Dft command. During the rules checking process there are times that you want to
hold a pin at a constant state. For example, you may want to hold a test enable pin at the active
state to keep the chip in test mode.
Note
This command has effects on other commands that relate to fault simulation, such as
simulation-based test point selection.

If you are using the partition scan type, DFTAdvisor also uses pin constraints that are set to
unknown as a way to flag partition primary inputs that are uncontrollable from the higher chip-
level primary inputs. When DFTAdvisor performs the scan identification process during the
Run command, it adds to the scan candidate list the sequential cells that are controllable through
the primary input pin; those that you constrained to an unknown value. For more information on
partition scan, refer to “Understanding Partition Scan” in the Scan and ATPG Process Guide.
You can set a default pin constraint value for all input and bidirectional pins using the Setup Pin
Constraints command. The pin constraints set by the Setup Pin Constraints command can be
overridden by the values set with the Add Pin Constraints command. You can remove an
override of a default pin constraint using the Delete Pin Constraints command. To remove the
default pin constraint for all input pins, you should use the Setup Pin Constraints command with
the None literal.
Arguments
• primary_input_pin
A required string that specifies the primary input pin that you want DFTAdvisor to hold at
the constant_value.
• C0 | C1 | CZ | CX
A literal that specifies the application of the constant value with which you want to constrain
the primary_input pin. The constraint choices are as follows:
C0 — A literal that specifies application of the constant 0 to the chosen primary input
pins.
C1 — A literal that specifies application of the constant 1 to the chosen primary input
pins.

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Command Dictionary
Add Pin Constraints

CZ — A literal that specifies application of the constant Z (high-impedance) to the


chosen primary input pins.
CX — A literal that specifies application of the constant X (unknown) to the chosen
primary input pins.
Examples
The following example illustrates how to hold two primary input pins to constant values:
add pin constraints kgmt c1
add pin constraints dsint c0

Related Commands
Add Seq_transparent Constraints Report Pin Constraints
Analyze Input Control Setup Pin Constraints
Delete Pin Constraints

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Command Dictionary
Add Pin Equivalences

Add Pin Equivalences


Scope: Setup mode
Usage
ADD PIn Equivalences primary_input_pin… [-Invert] primary_input_pin_ref
Description
Specifies to hold the specified primary input pins at a state either equal to or inverted in
relationship to the state of another primary input pin during rules checking.
Rules checking occurs when you use the Set System Mode Dft command. During these rule
checks, there are times when a pin needs to be held at the same (or opposite) state in reference to
another pin.
Note
This command has effects on other commands that relate to fault simulation, such as
simulation-based test point selection.

Arguments
• primary_input_pin
A required, repeatable string that specifies a list of primary input pins whose values you
want to either equal or invert with respect to primary_input_pin_ref.
• -Invert
An optional switch that specifies for DFTAdvisor to hold the primary_input_pin value to
the opposite state of the primary_input_pin_ref value. If you use this switch, you must enter
it immediately prior to the primary_input_pin_ref value.
• primary_input_pin_ref
A required string that specifies the name of the primary input pin whose value you want
DFTAdvisor to use when determining the state value of primary_input_pin. You can
immediately precede this string with the -Invert switch to cause DFTAdvisor to hold the
primary_input_pin value to the opposite state of the primary_input_pin_ref value.
Examples
The following example restricts the first primary input (indata2) to have an inverted value with
respect to the second primary input (indata4):
add pin equivalences indata2 -Invert indata4

Related Commands
Delete Pin Equivalences Report Pin Equivalences

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Command Dictionary
Add Primary Inputs

Add Primary Inputs


Scope: Setup mode
Usage
ADD PRimary Inputs net_pathname… [-Cut] [-Module]
Description
Adds a primary input to the net.
The Add Primary Inputs command adds an additional primary input to each specified net path.
Once added, the tool designates them as user-class primary inputs, as opposed to the primary
inputs described in the original netlist, which it designates as system-class primary inputs. Use
the -Cut option to disconnect the original drivers of the net, so that the added primary input
becomes the only driver of the net. Otherwise, if there are other drivers besides the newly added
primary input, the tool treats this net as a wired net. You can display the user class, system class,
or full classes of primary inputs using the Report Primary Inputs command.
Arguments
• net_pathname
A required, repeatable string that specifies the pathname of the pins to which you want to
add primary inputs.
• -Cut
An optional switch that specifies disconnection of the original drivers of the net, making the
added primary input the only driver of the net.
• -Module
An optional switch that specifies addition of the primary input to the specified nets in all
modules. Only one primary input is added to the design for that net when many occurrences
of that net occurs in the modules.

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Add Primary Inputs

Examples
The following example adds two new primary inputs to the circuit and places it in the user class
of primary inputs:
add primary inputs indata2 indata4

Related Commands
Delete Primary Inputs Report Primary Inputs

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Command Dictionary
Add Primary Outputs

Add Primary Outputs


Scope: Setup mode
Usage
ADD PRimary Outputs net_pathname…
Description
Adds a primary output to the net.
The Add Primary Outputs command adds an additional primary output to each specified net.
Once added, the tool defines them as user class primary outputs. The tool defines the primary
outputs described in the original netlist as system class primary outputs. You can display the
user class, system class, or full classes of primary outputs using the Report Primary Outputs
command.
Arguments
• net_pathname
A required, repeatable string that specifies the nets to which you want to add primary
outputs.
Examples
The following example adds a new primary output to the circuit and places it in the user class of
primary outputs:
add primary outputs outdata1

Related Commands
Delete Primary Outputs Report Primary Outputs

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Command Dictionary
Add Read Controls

Add Read Controls


Scope: Setup mode
Usage
ADD REad Controls {0 | 1} primary_input_pin…
Description
Adds an off-state value to specified RAM read control lines.
The Add Read Controls command defines the circuit read control lines and assigns their off-
state values. The off-state value of the pins that you specify must be sufficient to keep the RAM
outputs stable. You cannot use clocks, constrained pins, or equivalent pins as read control lines.
Arguments
• 0
A literal that specifies 0 as the off-state value for the RAM read control lines.
• 1
A literal that specifies 1 as the off-state value for the RAM read control lines.
• primary_input_pin
A required, repeatable string that lists the primary input pins you want to designate as RAM
read control lines, and to which you are assigning the given off-state value.
Examples
The following example assigns an off-state value of 0 to two read control lines, r1 and r2:
add clocks 0 clk
add read controls 0 r1 r2
set system mode dft
run

Related Commands
Analyze Control Signals Report Read Controls
Delete Read Controls

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Command Dictionary
Add Scan Chains

Add Scan Chains


Scope: Setup mode
Prerequisites: Prior to using this command, you must define the scan chain group with the Add
Scan Groups command. If multiple scan chains are in the same scan group, you must load
the chains in parallel.
Usage
ADD SCan Chains chain_name group_name primary_input_pin primary_output_pin
Description
Specifies a name for a preexisting scan chain within the design.
The Add Scan Chains command defines a scan chain that exists in the design. A scan chain
references the name of a scan chain group, which you must define prior to issuing this
command.
A preexisting scan chain is a serially connected set of scan cells, that have been stitched
together in a previous scan insertion operation, or that you created manually. In order for
DFTAdvisor to be able to correctly insert scan elements in the remainder of the design or to run
rules checking on existing scan circuitry, you need to notify DFTAdvisor of this circuitry, so it
can treat those elements in the chain differently than the elements in the rest of the design.
When you use this command to notify DFTAdvisor of a preexisting scan chain, DFTAdvisor
removes the scan cells in the scan chain from the eligible scan elements list. Because the tool
removes the scan cells in the scan chain from the scan candidate list, the rules checker does not
perform the usual scannability checks on those scan cells. However, the rules checker does
perform additional rules checking based on the declaration of preexisting scan elements that
pertain to the checking of the validity and the operation of that scan chain.
If the design does have a preexisting scan chain that you declare with the Add Scan Chains
command, you need to provide information on the operation of that scan chain in a test
procedure file.
Arguments
• chain_name
A required string that specifies the name of the preexisting scan chain you want added to the
scan group.
• group_name
A required string that specifies the name of the scan chain group to which you are adding the
scan chain.
• primary_input_pin
A required string that specifies the primary input pin of the scan chain.
• primary_output_pin
A required string that specifies the primary output pin of the scan chain.

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Command Dictionary
Add Scan Chains

Examples
The following example defines two scan chains (chain1 and chain2) that belong to the same
scan group (group1):
add scan groups group1 scanfile
add scan chains chain1 group1 indata2 testout2
add scan chains chain2 group1 indata4 testout4

Related Commands
Add Scan Groups Report Scan Chains
Delete Scan Chains Ripup Scan Chains

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Command Dictionary
Add Scan Groups

Add Scan Groups


Scope: Setup mode
Usage
ADD SCan Groups group_name test_procedure_filename
Description
Adds one scan chain group to the system.
The Add Scan Groups command has two different uses. This commands primary use if for
specifying a group name for a set of preexisting scan chains within the design. You can only add
one scan chain group within a DFTAdvisor session. Additionally, use this command in
DFTAdvisor to provide necessary initialization values to non-scan memory elements.
If the design has preexisting scan chains, those scan chains must belong to a scan group. The
Add Scan Groups command also specifies the corresponding test procedure file for that scan
group. A sequence of procedures in the test procedure file defines the operation of the scan
chains within a scan group. The scan group must have a corresponding test procedure file.
If the design does not have preexisting scan chains, but you need to initialize some non-scan
memory elements specifically for scannability checking, you can specify “dummy” as the
group_name along with a test_procedure_filename. Then, within the test procedure file, you
can use the optional test_setup procedure to initialize the non-scan memory elements. As a
result, DFTAdvisor will model the non-scan memory elements as a TIE1 or TIE0.
Note
You must also define these same elements as non-scan using the Add Nonscan Instances
command.

Arguments
• group_name
A required string that specifies the name of the scan chain group that you want to add to the
system.
• test_procedure_filename
A required string that specifies the name of the test procedure file that contains the
information for controlling the scan chains in the specified scan chain group.
Examples
The following example defines a scan chain group, group1, which loads and unloads a set of
scan chains, chain1 and chain2, by using the procedures in the file, scanfile:
add scan groups group1 scanfile
add scan chains chain1 group1 indata2 testout2
add scan chains chain2 group1 indata4 testout4

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Command Dictionary
Add Scan Groups

Related Commands
Add Scan Chains Read Procfile
Delete Scan Groups Write Procfile
Report Scan Groups

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Command Dictionary
Add Scan Instances

Add Scan Instances


Scope: All modes
Usage
ADD SCan Instances pathname… | instance_expression [-INStance | -Control_signal |
-Module] [-INPut | -Output | {-Hold {0 | 1}}]
Description
Specifies that DFTAdvisor add the specified instance, all instances controlled by the specified
control pin, or all instances within the specified module, to the scannable instance list.
If DFTAdvisor is only inserting partial scan, the Add Scan Instances command allows a way of
ensuring that DFTAdvisor includes specific sequential instances in the scan list. DFTAdvisor
generates the scan list during the scan identification process (which you execute with the Run
command in the Dft mode). If, however, the instance you specify does not pass the rules
checking process, then DFTAdvisor cannot include it in the identified scan list.
If you do not issue the Add Scan Instances command with partial scan, DFTAdvisor chooses the
sequential instances it includes in the identified scan list based on the settings you specified with
the Setup Scan Identification command (or uses the default argument values for that command).
If DFTAdvisor is in the Dft mode, the Add Scan Instances command can accept scannable
instance pathnames, control signal pins, or module names as arguments. Scannable instances
are those sequential instances that passed all the scannability checks run by the Design Rule
Checker when you entered the Dft mode.
When adding scan instances with control signals, DFTAdvisor adds all scannable instances
controlled by the control signals to the identified scannable instance list. Control pins can be
any clock, set, or reset signal (primary input or output) that controls the contents of sequential
instances. You can use the Report Control Signals command to see the pins that control the
sequential instances in the design.
Arguments
• pathname
A required repeatable string that specifies the pathnames of the sequential instances or
control signals (that control instances) which you want to add to the scan instance list. If the
instance is hierarchical, then the tool also adds all sequential instances beneath it to the scan
list.
• instance_expression
A string representing a list of instances within the design. The string instance_expression is
defined as:
{ string | string * } ...

The asterisk (*) is a wildcard that allows you to match many instances in a design. Any
expression that does not contain an asterisk (*) will match exactly zero or one instance.

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Add Scan Instances

This argument does not support pathnames to objects below the instance level of an ATPG
library model. You can use a pathname expression to select several instances and the tool
will then add scan instances for all the pins on those instances; but if the expression specifies
a location below the instance level of an ATPG library model, the tool will issue an error
message.
• -INStance | -Control_signal | -Module
An optional switch that specifies whether the pathnames are instances, pins (control
signals), or modules. An example Verilog module is “module clkgen (clk, clk_out, …)”
where clkgen is the module name. You can only use the -Control_signal option in Dft mode.
The default is -INStance.
• -INPut | -Output | {-Hold {0 | 1}}
An optional switch that the scan instances are added as input or output partition scan cells. If
you specify the -Hold option, then you must also supply a high (1) or low (0) literal to define
hold 0 or hold 1 output partition scan cells. If none of these options are specified, the added
scan instances are considered as regular scan cells.
Examples
The following example first specifies two sequential instances that the you wants to ensure are
in the identified scan list (assuming they pass rules checking). In the remainder of the example,
you enter Set System Mode Dft, specify that DFTAdvisor is to choose the 50 percent of the
eligible scan elements that maximizes the fault coverage, and then run the scan identification
process.
add scan instances i_1006 i_1007
set system mode dft
setup scan identification sequential atpg -percent 50
run

Because of the previous setup in this example, when DFTAdvisor runs the scan identification
process it chooses the optimal 50 percent of eligible scan instances, but always includes i_1006
and i_1007 within that fifty percent.
Related Commands
Delete Scan Instances Report Sequential Instances
Setup Scan Identification

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Command Dictionary
Add Scan Models

Add Scan Models


Scope: All modes
Usage
ADD SCan Models model_name…
Description
Specifies that DFTAdvisor is to flag every instance of the named DFT library model for
inclusion into the identified scan list.
If DFTAdvisor is inserting partial scan, then the Add Scan Models command ensures
DFTAdvisor includes all instances of a specific sequential DFT library model in the scan list.
DFTAdvisor generates the scan list during the scan identification process, which you initiate
with the Run command in the Dft mode. DFTAdvisor subsequently replaces all instances in the
scan list with the equivalent DFT library scan model during scan synthesis, which you initiate
with the Insert Test Logic command while you are in Dft mode (Set System Mode).
If you do not issue the Add Scan Models command with partial scan, DFTAdvisor chooses the
sequential instances it includes in the scan list using the settings you specified with the Setup
Scan Identification command, or, alternatively, the default argument values for the command.
If DFTAdvisor is in the Dft mode, then the Add Scan Models command only flags the
scannable instances of the specified library model for inclusion into the scan list. Scannable
instances are those sequential instances previously passing all the scannability checks run by the
Design Rule Checker when you placed DFTAdvisor into the Dft mode. DFTAdvisor omits
library model instances from the scan list if the instance fails the design rule checks.
The Add Scan Models command flags all instances of the specified sequential DFT library
model, where the Add Scan Instances command only individually flags sequential design
instance(s).
Arguments
• model_name
A required, repeatable string specifying the model names that you want to add to the scan
model list. Enter the model names as they appear in the DFT library.
Examples
The following example flags all instances of the specified DFT library model for inclusion into
the scan list.
add scan models dff1a
set system mode dft
setup scan identification sequential atpg -percent 50
run

Because of the previous setup in this example, when DFTAdvisor runs the scan identification
process, it chooses the optimal 50 percent of eligible scan instances, ensuring that it includes all
eligible instances of the dff1a model in that 50 percent of identified scan instances.

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Command Dictionary
Add Scan Models

Related Commands
Delete Scan Models Report Scan Models

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Command Dictionary
Add Scan Partition

Add Scan Partition


Scope: DFT mode
Usage
ADD SCan PArtition object_name -INstance {pathname... | instance_expression...} -MOdule
module_name... -LIbrary_model library_model_name... [-NUmber integer |
-MAx_length integer] [-EDT] [-VErbose]
Description
Specifies a grouping of scan cells (a partition) in which scan chains are inserted separately from
the remaining scan cells in the design.
The remaining cells are placed into a default scan partition called default_scan_partition. If a
module instance name is supplied in the list of instances, all sequential instances hierarchically
under this given module instance are added to the scan partition. If a module name is supplied,
all instances of that module and the sequential instances hierarchically under these instances are
added to the scan partition. If a library model name is supplied, all instances of this library
model are added to the scan partition if this library model is defined for a sequential instance. At
least one of the -INstance, -MOdule, and -LIbrary_model switches should be supplied. They
can also be supplied together in the same command line.
The specified group of cells are placed in scan chains based on the number of chains or the
maximum chain length option specified with this command, along with the -clock/-edge merge
options with the Insert Test Logic command, and the clock groups with the Add Clock Groups
command. The -number and -max_length options of the Insert Test Logic command apply only
to the default scan partition, not to the user specified scan partitions. If the number of chains or
the maximum chain length is not specified, a single chain is inserted for the partition, by default.
The tool generates a single dofile and testprocedure file even if there are multiple scan partitions
defined. However, in the dofile, the scan chain declarations of the same scan partition are
separated from the other groups of scan chain declarations by a comment line which indicates
the scan partition name. Also, the groups of scan chain declarations are in the same order as the
defined scan partitions. If the -Edt switch is used, DFTAdvisor writes out the TestKompress®
command, “Add Edt Block name”, before every group of scan chain declarations, where name
is the name of the scan partition specified by object_name.
Default scan pin naming for each partition cannot be specified by means of the Setup Scan Pins
command. However, individual scan pin naming per chain can be specified by means of the
Add Scan Pins command. This gives the control over scan pin naming for each scan partition
since scan chains are created in the order the scan partitions are defined and the number of scan
chains for each scan partition is known.

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Add Scan Partition

Note
The scan cells of sub-chains cannot be included in scan partitions. This is because a sub-
chain container can be a blackbox instance, the sequential cells of which do not exist in
the netlist. Therefore, sub-chains can be included in scan partitions by specifying the
pathname of their container module instances, or the module name of the container
modules.

Arguments
• object_name
A required string that specifies the name you want to assign to the scan partition.
• -INstance {pathname... | instance_expression...}
A required switch and a repeatable string that specify the pathname(s) of the sequential
instances that you want to place into the scan partition. If a module instance pathname is
specified, all sequential instances hierarchically under that instance are added to the
partition. This switch can be used along with the -Module and -Library_model switches
(and their arguments) in the same command line. However, all three cannot be omitted.
The repeatable string can be in the form of an absolute instance pathname or a pathname in
regular expression form. This argument does not support pathnames to objects below the
instance level of an ATPG library model. If the instance pathname/expression cannot be
mapped to any sequential element in the design, the tool generates an error message. The
string instance_expression is defined as:
{string | string *} ...
The asterisk (*) is a wildcard that allows you to match many instances in a design. Any
expression that does not contain an asterisk (*) will match exactly zero or one instance.
• -MOdule module_name...
A required switch and a repeatable string that specify the module name(s) of the instances
that are the containers of the sequential instances that you want to place into the scan
partition. All sequential instances hierarchically under these container instances are added to
the partition. This switch can be used along with the -Instance and -Library_model switches
(and their arguments) in the same command line. However, all three cannot be omitted.
• -LIbrary_model library_model_name...
A required switch and a repeatable string that specify the library model name(s) of the
sequential instances that you want to place into the scan partition. This switch can be used
along with the -Instance and -Module switches (and their arguments) in the same command
line. However, all three cannot be omitted.
• -NUmber integer
An optional switch and integer pair that specify the exact number of scan chains that you
want DFTAdvisor to insert for the scan partition specified. Final results depend upon the
number of scan candidates. The default number of chains is 1. The -number and

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Command Dictionary
Add Scan Partition

-max_length options of the Insert Test Logic command are ignored for the user added scan
partitions.
• -MAx_length integer
An optional switch and integer pair that specify the maximum number of scan cells that
DFTAdvisor can stitch into a scan chain of the scan partition specified. DFTAdvisor evenly
divides the scan cells into scan chains that are smaller than the max_length integer. Final
results depend upon the number of scan candidates. The -number and -max_length options
of the Insert Test Logic command are ignored for the user added scan partitions.
• -EDT
An optional switch that specifies DFTAdvisor to write out the TestKompress command
“Add Edt Block name” before each group of scan chain declarations in the dofile written out
by the tool. In the dofile, the scan chain declarations of the same scan partition are grouped
together and separated from the other groups of scan chain declarations by a comment line.
The name string in the TestKompress command is the same as the scan partition name
specified by object_name.
• -VErbose
An optional switch that turns on verbose transcript printing. When specified, the pathnames
of the sequential cells included in the scan partition are printed in the session transcript.
Examples
In the following example, two scan partitions are defined. The first partition, partA, is defined
using exact pathnames of the sequential instances, and the second partition, partB, is defined by
the container module instance of the sequential instances. A single scan chain is inserted by
default for partA, whereas two scan chains are inserted for partB. Two scan chains are inserted
for the remaining cells in the default scan partition, as specified by the -number argument of the
Insert Test Logic command. The -Edt switch is used for partA, allowing the tool to write out the
TestKompress command, Add Edt Block, in the dofile, in addition to the scan chain
declarations. Also, Individual scan I/O pins per chain and default scan I/O pin naming are
specified by means of the Add Scan Pins and Setup Scan Pins commands, respectively.
add clocks 0 clk1
set system mode dft
add scan partition partA -instance udff1 umodA/udff32 umodB/udff5 -edt // 1 chain
add scan partition partB -instance umodC -number 2 -edt // 2 chains
run
add scan pins chain1 partA_chain1_si partA_chain1_so
add scan pins chain1 partB_chain1_si partB_chain1_so
setup scan pins input -indexed -prefix mysi -initial 1
setup scan pins output -indexed -prefix myso -initial 1
insert test logic -number 2 // 2 chains inserted for the default scan partition
write atpg setup fscan

So, a total of five scan chains are inserted. After mapping the individual scan I/O pins per chain,
new scan I/O pin names are generated for the remaining chains based on the specified default
pin naming. The dofile generated by the tool looks similar to the one below. Note that the scan
chain declarations of each scan partition are denoted by a comment line. The order of the groups

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Command Dictionary
Add Scan Partition

of declarations is the same as the order of the scan partition declarations. The default scan
partition chains are printed as the last group. Also note that the TestKompress “Add Edt Block”
commands are written out since the -Edt switch is used. For the default scan partition, the tool
generates the name “edt_top_block” to use it as the edt block identifier string in the Add Edt
Block command.
//
// Generated by DFTAdvisor at Wed Jul 12 14:09:58 2006
//
add scan groups grp1 fscan.testproc

// The scan chains of scan partition “partA”


add edt block partA
add scan chains chain1 grp1 partA_chain1_si partA_chain1_so
// The scan chains of scan partition “partB”
add edt block partB
add scan chains chain2 grp1 partB_chain1_si partB_chain1_so
add scan chains chain3 grp1 mysi1 myso1
// The scan chains of scan partition “default_scan_partition”
add edt block edt_top_block
add scan chains chain4 grp1 mysi2 myso2
add scan chains chain5 grp1 mysi3 myso3

add clocks 0 clk1

Related Commands
Delete Scan Partitions Report Scan Partitions
Insert Test Logic Add Clock Groups

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Command Dictionary
Add Scan Pins

Add Scan Pins


Scope: All modes
Usage
ADD SCan PIns chain_name scan_input_pin scan_output_pin [-CLock pin_name] [-CUt]
[-Registered] [-Top primary_input_pin primary_out_pin]
Description
Declares the name of a scan chain at the top-level module and assigns the corresponding scan
input pin, scan output pin, and optionally, the scan clock pin you associate with the chain.

Tip: For information on assigning scan pins to scan chains and the fixed-order file, refer
to “Naming Scan Input and Output Ports” in the Scan and ATPG Process Guide.

If you specify nonexistent signal names for the scan input or scan output pins, DFTAdvisor
generates a warning, and adds the appropriate pins when you perform the scan synthesis process
with the Insert Test Logic command.
For explicitly defining the scan input and scan output primary pins at the design’s top-level and
specify internal pin pathnames for the scan_input_pin and scan_output_pin arguments, you
must use the -Top option when you execute the Write Atpg Setup command.
If you do not issue either this command, or the Setup Scan Pins command, DFTAdvisor uses the
default names when generating the scan chain. The default name of the scan chain is chain1,
with the corresponding scan input pin named scan_in1, and the corresponding scan output pin
named scan_out1. If DFTAdvisor inserts multiple scan chains, the default naming increments
the suffix number of each argument by one for each chain (such as, chain2, scan_in2, and
scan_out2).
Each use of the Add Scan Pins command specifies the naming for a single scan chain. You can
optionally use the Setup Scan Pins command to globally set the default naming conventions for
scan chains that do not use existing design pins.
Arguments
• chain_name
A required string that specifies the name of the scan chain with which you want
DFTAdvisor to associate the scan_input_pin and scan_output_pin names.
• scan_input_pin
A required string that specifies the scan input pin name of the scan chain. This pin can be a
top-level input pin, top-level bidirectional pin, or an internal signal.
In addition to a primary input pin name (for example, scan_in), you can also specify an
internal instance pin pathname as the scan_input_pin value. If you do so, that pin pathname
must be an output pin of an instance. For example, you could use an internal instance pin

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Command Dictionary
Add Scan Pins

pathname “/I116/d”, where “I116” is the instance name of the I/O cell and “d” is the pin
name.
If you specify an internal pin pathname and DFTAdvisor cannot trace through a simple path
(only inverters or buffers) back to a primary input of the design, unless you supply the -Top
option, when you issue the Write Atpg Setup command DFTAdvisor will generate the test
procedure file and dofile, but comment out the Add Scan Chains command—see
“Examples”.
If the pin is a top-level bidirectional pin, DFTAdvisor assumes that you configured the pin
to be in input mode during the scan test and does not check for correct configuration.
If -Registered is specified, the scan_input_pin is the output of the DFF head register.
• scan_output_pin
A required string that specifies the scan output pin name of the scan chain. This pin can any
of the following:
o a top-level output pin
o a top-level bidirectional pin (single driver)
o an internal signal

Note
If the scan-out pin you specify is driven by multiple instances, DFTAdvisor adds a mux
gate to multiplex the original functional driver with the driver from the last scan cell of
the scan chain.

In addition to a primary output pin name (for example, scan_out), you can also specify an
internal instance pin pathname (for example, /I116/q) for the scan_output_pin value
providing this pin pathname is an input pin of an instance.
If you specify an internal pin pathname and DFTAdvisor cannot trace through a simple path
(only inverters or buffers) forward to a primary output of the design, unless you supply the
-Top option, when you issue the Write Atpg Setup command DFTAdvisor will generate the
test procedure file and dofile, but comment out the Add Scan Chains command—see
“Examples”.
If the pin is a top-level bidirectional pin, DFTAdvisor assumes that you configured the pin
to be in output mode during the scan test and does not check for correct configuration.
If -Registered is specified, the scan_output_pin is the input of the DFF tail register.
• -CLock pin_name
An optional switch and string pair that specifies the pin name of the clock that you want
DFTAdvisor to assign to the scan chain. You must have predefined this pin as a scan clock
by using the Add Clocks command.

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Command Dictionary
Add Scan Pins

• -CUt
An optional switch that specifies to remove the existing driver attached to the specified scan
out and the last scan cell is then connected to the scan out.
• -Registered
An optional switch that specifies to identify head and tail DFF registers for the scan chain.
DFTAdvisor does not insert new scan cells as head and tail registers if it cannot find them in
the circuit. For additional information, refer to “Attaching Head and Tail Registers to the
Scan Chain” in the Scan and ATPG Process Guide.
• -Top primary_input_pin primary_out_pin
An optional switch and two strings that defines the corresponding top-level primary
input/output pins for the scan in and scan out ports. DFTAdvisor uses these names when
generating the ATPG dofile. Refer to the second example for clarification of how the
contents of the ATPG dofile are created. Both pin names must be supplied. This option does
not add pins to the top-level of the design.
Examples
The following example assigns a scan input and scan output name to the scan chain:
add clocks 0 clk
set system mode dft
// run scan identification
run
add scan pins chain1 si so -clock clk
// scan insertion
synthesize

The following example assigns a scan input and scan output name to the scan chain, along with
assigning the top-level primary input and output pins when they have different names than the
specified internal scan_input_pin and scan_output_pin:
add clocks 0 clk
set system mode dft
// run scan identification
run
add scan pins chain1 u125/u121/Qi u126/u224/TI -top scan_in1 scan_out1
// scan insertion
synthesize
write atpg setup atpg

Example 2-2 shows the resulting ATPG dofile from the Write Atpg Setup command. Notice
that the specified top-level primary pin names (scan_in1 and scan_out1) are used in place of the

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Command Dictionary
Add Scan Pins

internal scan in and scan out pin pathnames shown in Example 2-3. Also notice that the Add
Scan Chains is commented out in the second figure.

Example 2-2. Generated ATPG dofile with -Top Option


//
// Generated by DFTAdvisor
//
add scan groups grp1 atpg.testproc
add scan chains grp1 scan_in1 scan_out1
add clocks o ck1
...

Example 2-3. Generated ATPG Dofile with No -Top Option


//
// Generated by DFTAdvisor
//
// Command lines containing “//DFTA” have been commented
// out by DFTAdvisor because internal pins were specified.
// The lines may require editing to ensure a functional
// dofile.
add scan groups grp1 atpg.testproc
// DFTA add scan chains grp1 u125/u121/Q u126/u224/TI
add clocks o ck1
...

Related Commands
Delete Scan Pins Setup Scan Pins
Report Scan Pins Write Atpg Setup

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Command Dictionary
Add Seq_transparent Constraints

Add Seq_transparent Constraints


Scope: Setup mode
Usage
ADD SEq_transparent Constraints {C0 | C1} model_name pin_name…
Description
Specifies the enable value of a clock enable that internally gates the clock input of a non-scan
cell for sequential transparent scan identification.
Designs sometimes contain circuitry where the clock enable signal internally gates the clock
input of a non-scan cell. In these cases, the clock enable must hold at a certain value in order for
the cells to behave as sequentially transparent. The clock enable input of a cell may come from
primary inputs or other memory elements. If the sources of a clock enable input come from the
output of other memory elements, DFTAdvisor identifies those memory elements for scan
during the scan_sequential identification run.
Arguments
• C0 | C1
A required literal that specifies the application of the constant 0 or 1 to the pin_name.
• model_name
A required string that specifies the DFT library model to whose pin_name you want to apply
the specified C0 or C1 constant.
• pin_name
A required, repeatable string that specifies the clock enable pin name for the model_name
specified and that to which DFTAdvisor will apply the specified constant.
Example
Example 2-4 shows an example usage of this command.

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Command Dictionary
Add Seq_transparent Constraints

Example 2-4. Add Seq_transparent Constraints

Related Commands
Add Pin Constraints Report Pin Constraints
Delete Seq_transparent Constraints

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Command Dictionary
Add Sub Chains

Add Sub Chains


Scope: Setup mode
Usage
ADD SUb Chains object_name subchain_name scan_input_pin scan_output_pin length
scan_type [-Module | -Library_model | -Instance] [-TEN test_enable_pin {0 | 1}] [-TCLK
test_clock_pin {0 | 1}] [-SET set_pin {0 | 1}] [-RESET reset_pin {0 | 1}]
Description
Specifies the name of a preexisting scan chain that exists entirely within a module, library
model, or instance within a hierarchical design.
If you create the design’s scan on a block-by-block basis, then each module or instance has its
own preexisting scan chain(s). At the higher-design level, DFTAdvisor does not automatically
consider the chains it inserts at the lower level as scan sub-chains. The Add Sub Chains
command allows you to incorporate those scan sub-chains into the top-level scan chain(s)
during the stitching process. DFTAdvisor, however, does not run the rules checker on the
preexisting scan sub-chain(s).
If you perform block-by-block test synthesis at lower design levels, DFTAdvisor can write the
sub-chain setup information to a file with the Write Subchain Setup command. You can then
read in this setup file that contains the Add Sub Chains command as part of the setup and avoid
having to manually define the preexisting scan sub-chains at the higher design level.
You can define subchains with their inputs (scan input and scan enable pins on their subchain
container) tied to 0 or 1. You can also define subchains with their scan inputs connected to their
scan output either directly or via buffers. DFTAdvisor removes such connections from the scan
input pin and reuses the connection wire to connect the scan output port to the next scan cell.
Any buffers lying along such feedback are then retained in scan output connection.
Arguments
• object_name
A required string that specifies either the pathname of an instance, the name of a module, or
the name of a library model. The object_name is the container of the sub-chain, where the
sub-chain resides.
• subchain_name
A required string that specifies the name that you want to assign a preexisting scan sub-
chain. A unique sub-chain name should be used for each Add Sub Chains command.
• scan_input_pin
A required string that specifies the scan input pin of the preexisting scan sub-chain.
• scan_output_pin
A required string that specifies the scan output pin of the preexisting scan sub-chain.

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Command Dictionary
Add Sub Chains

• length
A required integer that specifies the number of scan cells in the preexisting scan sub-chain.
• scan_type
A required, multiple entry argument that specifies the scan type and control of the
preexisting scan sub-chain. The valid scan types, from which you can choose only one, are
as follows:
Mux_scan {{-SEN_Core | -SEN_In | -SEN_Out} scan_enable [INVerted]} [-CLock
pin_name1 pin_name2] [-SUbclock pin_name1 pin_name2] [-EDge edge1 edge2] —
A literal and a set of switches that specify a mux_scan type sub-chain.
{-SEN_Core | -SEN_In | -SEN_Out} scan_enable [INVerted] — A required switch,
a required string, and an optional string triplet that specifies the type, name, and
internal inversion of the scan enable pin on the sub-chain container (module or
library_model). The optional parameter, Inverted, indicates the inversion on the
scan enable pin inside the container. DFTAdvisor normally inserts one type of
scan enable signal, referred to as Sen_core. In a partition scan insertion flow,
however, DFTAdvisor can also insert two more types of scan enable signals if
partitioning by I/O type is specified. The scan enable signals inserted for separate
input and output partition cells are referred to as Sen_in and Sen_out. For more
details on partitioning by I/O type, refer to the section that describes the Setup
Partition Scan command. At least one of these three types of scan enables must be
specified in the sub-chain declaration. A sub-chain may contain all three types of
scan enables, in which case you should repeat the triplet for each type of scan
enable.
-Clock pin_name1 pin_name2 — An optional switch and two strings that specify the
names of the clock pins on the top module which clocks the defined sub-chain.
The strings pin_name1 and pin_name2 are used to specify the clocks for the first
cell (closer to the scan input) and the last cell (closer to the scan output) of the
subchain, respectively. DFTAdvisor does not perform DRC on the sequential
elements of the defined sub-chain (as the sub-chain container instance can be a
blackbox), and therefore it simply records the information given with this switch
as the clock domains of the sub-chain. Specifying the first and the last cell clock
domains allows determining the transition of clock domains (from the last
subchain cell to another cell or, from another cell to the first subchain cell) when
the subchain is placed in a top-level scan chain. As such, lockup latches are
inserted correctly at these transitions. On the other hand, during scan cell
partitioning, DFTAdvisor uses only the first cell clock pin information to
determine which top-level scan chain the sub-chain cell will be placed in. If this
switch is not specified, DFTAdvisor tries to find the top-level clock pins using the
sub-clock pins via structural tracing, as described below. If DFTAdvisor cannot
determine the top module clock pins, it places the defined sub-chain in separate
scan chains in the top module, along with other sub-chains with undetermined top
module clock pins. It is therefore recommended that you specify top-level clock
pins where sub-clock pins are not connected to top-level clocks via straight
connections.

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Command Dictionary
Add Sub Chains

-Subclock pin_name1 pin_name2 — An optional switch and two strings that specify
the names of the clock pins on the sub-chain container. DFTAdvisor uses this
information for two purposes: to determine the top-level clock pins when not
specified with the -Clock switch, and to use it as clock source for possible lockup
latches to be inserted before or after the subchain cell at the top-level. To
determine the top-level clocks, DFTAdvisor performs a simple tracing (allowing
only single wire connection along the path) from the sub-chain clock pins to the
primary inputs. The tracing succeeds if there are no other components in the path.
DFTAdvisor records the clock domain for the sub-chain as undetermined if
tracing does not reach a top module primary input. If this switch is not specified
and a lockup is to be inserted before or after the subchain cell, DFTAdvisor tries
to determine the sub-clock pins by simulating the defined top-level clock pins. It
is therefore recommended that you specify the sub-clock pins where possible.
-EDge edge1 edge2 — An optional switch and two literals that specify the overall
stable state (triggering clock edge) of the first and the last cell of the sub-chain.
Each literal can either be leading or trailing and it includes the off-state value of
the top-level clock pin (specified with the Add Clocks command) as well as all
the inversions along the path from the corresponding top-level clock pin to the
sub-chain cell residing inside the sub-chain container. Note that sub-chain
container can be a blackbox instance in the design, which does not allow
determining such inverters inside the sub-chain container. Therefore, using this
switch is recommended where possible. The information specified with this
switch is used to determine the correct edge domain of the first sub-chain cell to
be used during scan cell partitioning along with the clock domain specified with
the -Clock/-Subclock switches. The edges specified with this switch is also used
during lockup latch insertion along with clock domains specified for the first and
the last cell via the -Clock/-Subclock switches. The Report Scan Cells command
prints the edge information only for the first sub-chain cell as it is used for scan
cell partitioning. If this switch is not used, a leading edge value is assumed for
both the first and the last cell.
DFTAdvisor does not make connections of the sub-chain container clock pins to
the top module clock pins. Such connections should exist in the original netlist for
the correct operation of the sub-chain in the top module.
Clocked_scan scan_clock — A literal and string pair that specifies the clocked-scan
style of scan cells and the name of the scan clock for the preexisting scan sub-chain.
Lssd master_clock slave_clock — A literal and two-string triplet that specifies Level-
Sensitive Scan Design and the names of the master and slave clocks, respectively, for
the preexisting scan sub-chain.
• -Module | -Library_model | -Instance
An optional switch that specifies the type of the sub-chain container specified by the
object_name argument. The container can then be a module (-Module), a library model
(-Library_model), or an instance of a module/model (-Instance). The default type is
-Module.

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Add Sub Chains

• -TEN test_enable_pin {0 | 1}
An optional switch, string, and literal pair that specifies the test enable pin added in the sub-
module that you want connected to the corresponding pin in the top module. The active
value can be 0 or 1.
• -TCLK test_clock_pin {0 | 1}
An optional switch, string, and literal pair that specifies the test clock pin added in the sub-
module that you want connected to the corresponding pin in the top module. The off-state
value can be 0 or 1.
• -SET set_pin {0 | 1}
An optional switch, string, and literal pair that specifies the set pin added in the sub-module
that you want connected to the corresponding pin in the top module. The offstate value can
be 0 or 1.
• -RESET reset_pin {0 | 1}
An optional switch, string, and literal pair that specifies the reset pin added in the sub-
module that you want connected to the corresponding pin in the top module. The offstate
value can be 0 or 1.
Examples
The following example defines a sub-chain on a sub-module:
add sub chains addr subc1 /scan_in1 /scan_out1 8 mux_scan -sen_core /scan_en inverted
-clock /topclk1 /topclk2 -subclock subclk1 subclk2 -edge leading trailing -module
report sub chains
mux_scan: addr subc1 8 scan_in1 scan_out1 scan_en (inverted)

This next example defines three sub-chains on an instance. Note that each sub-chain has its
designated scan enable pin:
add sub chains /mytop/u1 subc1 si1 so1 150 mux_scan -sen_in senin
-subclock sclk1 sclk2 -edge trailing trailing -instance
add sub chains /mytop/u1 subc2 si2 so2 138 mux_scan -sen_out senout
-subclock sclk1 sclk2 -edge trailing leading -instance
add sub chains /mytop/u1 subc3 si3 so3 1600 mux_scan -sen_core sen
-subclock sclk2 sclk2 -edge leading leading -instance
report sub chains
mux_scan: /mytop subc1 150 si1 so1 senin
mux_scan: /mytop subc2 138 si2 so2 seout
mux_scan: /mytop subc3 1600 si3 so3 sen

Related Commands
Add Clocks Report Sub Chains
Delete Sub Chains Setup Partition Scan
Report Scan Cells Write Subchain Setup

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Command Dictionary
Add Subchain Group

Add Subchain Group


Scope: Setup mode
Usage
ADD Subchain Group object_name subchain_name … [-FLexible | -FIxed]
Description
Adds one sub-chain group to the system.
The Add Subchain Group command specifies a group of sub-chains in a design so DFTAdvisor
can stitch these sub-chains together. If you omit a sub-chain group, the Insert Test Logic
command chooses which sub-chains DFTAdvisor stitches together. You must have added the
sub-chains (using Add Sub Chains) before you specify them in the sub-chains in the argument
list.
When adding the sub-chain groups, you choose one option from following:
• -Flexible Option (default) — DFTAdvisor permits unassigned single flip-flops and
sub-chains in the scan chain for better balancing of the top-level scan chains. Using this
option also permits breaking up the sub-chain group into multiple scan chains when
necessary. DFTAdvisor partitions the sub-chains of flexible sub-chain groups along
with the scannable flip-flops of the design according to your Insert Test Logic
command’s -Clock/Edge merge and -Number/Max_length options, along with any clock
groups you identified with Add Clock Groups.
• -Fixed Option — In contrast, the -Fixed option disallows either other flip-flops and
sub-chains in the sub-chain group, or the breaking up the sub-chain group. When using
this option, DFTAdvisor adds a new scan chain to the design and includes the sub-
chains of a fixed sub-chain group. Consequently, your Insert Test Logic command’s
-Clock/Edge merge and -Number/Max_length options have no effect on the sub-chains
of fixed sub-chain groups.
Table 2-3 summarizes the types of sub-chains that can exist in a design.
Table 2-3. Sub-chain Types
Sub-chain Multiple Stitching Partitioning
Group Chain
Support
no sub-chain Yes Can be stitched with: Insert Test Logic -
• single cells Clock/Edge merge -
• sub-chains that are not assigned Number/Max_length
to any sub-chain groups
• sub-chains that are assigned to Add Clock Groups
flexible sub-chain groups

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Command Dictionary
Add Subchain Group

Table 2-3. Sub-chain Types


Sub-chain Multiple Stitching Partitioning
Group Chain
Support
Flexible Yes Can be stitched with: Insert Test Logic -
• single cells Clock/Edge merge -
• sub-chains that are not assigned Number/Max_length
to any sub-chain groups
Add Clock Groups
Fixed No Can be stitched with: A new scan chain is added
• no other cells or sub-chains per Add Subchain Group
command

Arguments
• object_name
A required string specifying the sub-chain group name.
• subchain_name
A required repeatable string identifying the sub-chain name for inclusion into the sub-chain
group. Before identifying the sub-chain, you must add it with Add Sub Chains. You can also
report sub-chain information using Report Sub Chains.
If you added a sub-chain to a sub-chain group on a module-based basis, and the module is
instantiated multiple times, DFTAdvisor includes the sub-chains on all instances of the
module in the sub-chain group when this sub-chain is specified in the list of sub-chains of
the Add Subchain Group command. If the sub-chains on different instances of the module
are to be put into different sub-chain groups, these sub-chains need to be added instance-
based instead of module-based in order to be assigned a unique sub-chain name.
• -FLexible | -Fixed
An optional switch that specifies the type of the sub-chain group. The default type,
-Flexible, allows in its chain other flops and sub-chains that are not a member of a sub-chain
group. Also, the sub-chains of flexible sub-chain groups are partitioned along with the other
flops in the design according to the options specified with the Insert Test Logic command.
The sub-chains of a fixed type sub-chain group are placed in a single chain and are not
partitioned according to Insert Test Logic command options. Also, no other flops or sub-
chains are allowed in the scan chain of this group.
Examples
The following example defines a preexisting scan sub-chain:
add sub chain subblockA subchain1 /scan_in1 /scan_out1 250 \
mux_scan /scan_en -module
add sub chain subblockC subchain2 /scan_in1 /scan_out1 120 \
mux_scan /scan_en -instance ...
report sub chains

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Command Dictionary
Add Subchain Group

mux_scan: subblockA subchain1 scan_in1 scan_out1 scan_en


mux_scan: subblockC subchain2 scan_in1 scan_out1 scan_en

add subchain group subchaingroup1 subchain1 subchain2 -fixed

Related Commands
Add Clock Groups Delete Subchain Groups
Add Sub Chains Insert Test Logic
Add Subchain Group Report Subchain Groups
Delete Sub Chains Report Sub Chains

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Command Dictionary
Add Test Points

Add Test Points


Scope: Setup and DFT mode
Prerequisites: You must define the model_name with either the Add Cell Models command or
the cell_type attribute within the DFT library.
Usage
ADD TEst Points tp_pin_pathname {{Control model_name [input_pin_pathname]
[mux_sel_input_pin] [-New_scan_cell scancell_model_name]} | {Observe
[output_pin_pathname] [-New_scan_cell scancell_model_name2]} | {Lockup
lockup_latch_model_name clkpin [-INVert | -NOInvert]}}
Description
Specifies explicitly where DFTAdvisor places a user-defined test point to improve the design’s
testability either through better controllability or observability.
Using the Add Test Points command, you can manually specify the location of a test point and
whether that point is for control or observation. Additionally, you can specify whether to insert
a scan cell for control or observe purposes at the test point location; this is in addition to the
control logic. You can also control timing problems on merged scan chains by manually specify
the location of lockup latches.
Note
The Add Test Points command operates independently of the Set Test Logic command.

The Add Test Points command also works independently of the automatically system-defined
test points—refer to “Understanding Test Points” in the Scan and ATPG Process Guide.
Arguments
• tp_pin_pathname
A required string that specifies the location where you want DFTAdvisor to insert the
control or observe test point.
• Control model_name [input_pin_pathname] [mux_sel_input_pin] [-New_scan_cell
scancell_model_name]
The Control test point argument specifies the test point is for control purposes.
model_name — A required string specifying the DFT library model you want
DFTAdvisor to place an instance of at the location specified by tp_pin_pathname.
Before you can use the Add Test Points command, you must use either the Add Cell
Models command or the cell_type DFT library attribute to define the DFT library
model that corresponds to the model type you want DFTAdvisor to insert. The valid
cell model types include AND, OR, INV, BUF, NAND, NOR, XOR, and MUX.
input_pin_pathname — An optional string that specifies the pathname of the pin to
which you want to connect the other input of the gate specified by the model_name

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Command Dictionary
Add Test Points

argument. The pathname can be either to an existing primary input pin, an internal
driver pin, or a currently nonexistent pin. If the pin does not currently exist in the
design and -New_scan_cell option is not specified, DFTAdvisor transcripts a
message when you issue this command, and then creates a new primary input pin with
the specified name during the insertion of the scan chain(s). If -New_scan_cell option
is specified, this string is used to specify an existing clock pin to be connected to the
clock input of the new control point scan cell. If -New_scan_cell option is specified
and this string is not provided, DFTAdvisor determines which clock to use for the
new scan cell automatically.
mux_sel_input_pin — An optional string that is needed only when the model_name
argument type is a MUX. This argument specifies where DFTAdvisor is to connect
the selector input of the multiplexer.
-New_scan_cell scancell_model_name — An optional switch and string pair that
specifies whether DFTAdvisor places a scan cell at the control test point and the DFT
library SCANCELL type model that you want inserted. If you use this option, you
must first define the scancell_model_name with the Add Cell Models command or
the cell_type DFT library attribute. Figure 2-1 shows how DFTAdvisor automatically
connects the new scan cell to the same clock as the scan cell it feeds in the chain.

Figure 2-1. Control Example

Note that these are new scan cells, not scan replacements for existing sequential elements.
They are connected into chain(s) during insertion of test logic along with the existing
sequential elements in the design. If the design contains no scan, the test point scan cells are
connected into one or more scan chains, depending on their clock pins.
• Observe [output_pin_pathname] [-New_scan_cell scancell_model_name2]
The Observe test point argument specifies for DFTAdvisor to place an observe point at the
location specified by the value of the tp_pin_pathname argument.

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Command Dictionary
Add Test Points

output_pin_pathname — An optional string that specifies the pathname of the primary


output pin that you want DFTAdvisor to connect to the observe point. If the primary
output pin does not currently exist in the design and -New_scan_cell option is not
specified, DFTAdvisor creates a new primary output pin with the specified name
during the insertion of the scan chain(s). If -New_scan_cell option is specified, this
string is used to specify an existing clock pin to be connected to the clock input of the
new observe point scan cell. If -New_scan_cell option is specified and this string is
not provided, DFTAdvisor determines which clock to use for the new scan cell
automatically.
-New_scan_cell scancell_model_name2 — An optional switch and string pair that
specifies whether DFTAdvisor places a scan cell at the observe test point and the
DFT library SCANCELL type model that you want inserted. If you use this option,
you must first define the scancell_model_name2 with the Add Cell Models command
or the cell_type DFT library attribute. Figure 2-2 illustrates how DFTAdvisor
automatically connects the new scan cell to the same clock as the scan cell it feeds in
the chain.

Figure 2-2. Observe Example

Note that these are new scan cells, not scan replacements for existing sequential elements.
They are connected into chain(s) during insertion of test logic along with the existing
sequential elements in the design. If the design contains no scan, the test point scan cells are
connected into one or more scan chains, depending on their clock pins.
• Lockup lockup_latch_model_name clkpin [-INVert | -NOInvert]
If you enable Set Lockup Latch on, then DFTAdvisor normally inserts lockup latches where
necessary to control timing problems between cells in merged scan chains. This Lockup
argument lets you specify for DFTAdvisor to add a lockup latch at any specified location.

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Command Dictionary
Add Test Points

If the location (tp_pin_pathname) is a primary output or an instance input pin, the latch is
inserted in front of the pin. If the location is a primary input or an instance output pin, the
latch is inserted after the pin, and will drive all fanouts that were originally driven by the
pin.
lockup_latch_model_name — A string that specifies the library latch model name. If
you use this option, you must first define the model with the Add Cell Models
command.
clkpin — A string that specifies the pathname of the clock pin to which the clock pin of
the latch is connected.
-INVert | -NOInvert — A switch that specifies whether to insert an inverter between the
specified clkpin and the clock input to the latch. The default is -NOInvert.
Examples
The following example first defines a DFT library model (and2a) of type AND, and then
defines a control test point, which DFTAdvisor then generates as part of the Insert Test Logic
command:
add cell models and2a -type and
add test point /I_6_16/cp control and2a control1
set system mode dft
run
insert test logic

Related Commands
Add Cell Models Report Test Points
Delete Test Points Set Lockup Latch
Insert Test Logic Set Test Logic

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Command Dictionary
Add Tied Signals

Add Tied Signals


Scope: Setup mode
Usage
ADD TIed Signals {0 | 1 | X | Z} floating_object_name… [-Pin]
Description
Specifies for DFTAdvisor to hold the named floating objects (nets or pins) at the given state
value.
DFTAdvisor creates a tied simulation gate (depending on the tied value) for each tied signal
during the design flattening process. If you do not assign a specific value to a floating object,
DFTAdvisor ties the object to the default value for all tied objects.

Tip: Use the Setup Tied Signals command for changing the value of a tied object from
the default value of unknown (X).

When you add tied signals or pins, the tool places them into the user class. This includes
instance-based blackbox tied signals. When the netlist ties signals or pins to a value, the tool
places them into the system class.
Note
The tool does not tie a signal connected to I/O pins. This causes a problem if you are
considering VDD as an I/O pin.

Arguments
• 0
A literal that specifies to tie the floating nets or pins to logic 0 (low to ground).
• 1
A literal that specifies to tie the floating nets or pins to logic 1 (high to voltage source).
• X
A literal that specifies to tie the floating nets or pins to unknown.
• Z
A literal that specifies to tie the floating nets or pins to high-impedance
• floating_object_name
A required, repeatable string that specifies the floating nets or pins to which you want to
assign a specific value. The tool assigns the tied value to all floating nets or pins in all
modules that have the specified names.

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Command Dictionary
Add Tied Signals

If you do not specify the -Pin option, the tool assumes the name is a net name. If you do
specify the -Pin option, the tool assumes the name is a pin name. If you specify a net
pathname, you cannot use the -Pin option.
• -Pin
An optional switch specifying that the floating_object_name argument that you provide is a
floating pin name.
Examples
The following example ties all floating signals in the circuit that have the net names vcc and
vdd, to logic 1 (tied to high):
add tied signals 1 vcc vdd

Related Commands
Add Black Box Report Tied Signals
Delete Tied Signals Setup Tied Signals

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Command Dictionary
Add Write Controls

Add Write Controls


Scope: Setup mode
Usage
ADD WRite Controls {0 | 1} primary_input_pin…
Description
Specifies the off-state value of the write control lines for RAMs.
The Add Write Controls command defines the circuit write control lines and assigns their off-
state values. The off-state value of the pins you specify must be sufficient to keep the RAM
contents stable. You may not use clocks, constrained pins, or equivalent pins as write control
lines.
Arguments
• 0
A literal specifying 0 is the off-state value for the RAM primary_input_pin.
• 1
A literal specifying 1 is the off-state value for the RAM primary_input_pin.
• primary_input_pin
A required, repeatable string specifying the primary input pins that are write control lines
for the RAM and to which you want to assign an off-state value.
Examples
The following example assigns an off-state to two write control lines, w1 and w2:
add write controls 0 w1 w2
set system mode dft
run

Related Commands
Analyze Control Signals Report Write Controls
Delete Write Controls

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Command Dictionary
Alias

Alias
Scope: All modes
Usage
ALIas [synonym {!unix_command; | tool_command; | alias_synonym;}…]
Description
Specifies the shorthand name for a DFTAdvisor command, UNIX command, or existing
command alias, or any combination of the three.
Issuing the Alias command with no parameters will list the current aliased commands, using the
same format that the Korn-shell alias commands use:
<alias_cmd1>=<alias_definition1>
<alias_cmd2>=<alias_definition2>
...
<alias_cmdN>=<alias_definitionN>

If you specify a shorthand name (synonym) and one of the command types, that shorthand name
can substitute for the command and any arguments you specify. You utilize the full power of the
Alias command when you take advantage of the repeatable nature of the second string,
intermixing any number of command types, and separating them with semicolons.
In addition, the command strings can be parameterized by using the formal parameters, $1
thorough $9, inserted in the command string in any order. When you issue the synonym as a
command, you must supply the actual arguments, which are substituted into the command prior
to its execution.
You can also include an optional file, .dftadvisor_startup, that contains commands to be
executed prior to any other batch or interactive commands. The primary purpose of this file is to
execute Alias commands that tailor the tool’s command language to your needs. Upon
invocation, the tool searches for the startup file in the following locations and in order of
precedence:
1. The local invocation directory
2. Your home directory
The first startup file encountered will be the only one executed if you have startup files in both
locations.
Using the Alias command with a single argument will, if the argument is an aliased command
name, report the name and definition of that command, using Korn-shell syntax:
<alias_cmd>=<alias_definition>

Issuing the command “Help <aliased_cmd>” will report the name of the command and the
definition which you specified via the Alias command when <aliased_cmd> was created. Using

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Command Dictionary
Alias

the help command with an aliased command name will generate an Alias report of the following
format:
// alias: <alias_cmd>=<alias_definition>

Arguments
• synonym {!unix_command; | tool_command; | alias_synonym;}
An optional string with a repeatable string that specifies a shorthand name, synonym, for the
specified UNIX or tool command or for a previously-defined alias synonym (which has the
effect of a command). You must separate repeated commands with semicolons.
!unix_command — An optional, repeatable string that consists of any well-formed
UNIX command, with its arguments, or script. You must precede this string with an
exclamation point to differentiate it from a tool-specific command.
tool_command — An optional, repeatable string that consists of any well-formed
DFTAdvisor command and its arguments.
alias_synonym — An optional, repeatable string that consists of any synonym previously
defined with the Alias command.
Examples
The following example defines an aliased command, watch, which uses a formal parameter.
The next line invokes it and supplies the actual parameter:
alias watch !ps -e | egrep $1;
watch netscape

The result of issuing this alias is to list all the process IDs associated with Netscape processes on
the host machine.
The next example defines the new command, findlockup, which searches the current directory
for Verilog files and invokes egrep on each one in turn, looking for and displaying any “lckup”
names:
alias findlockup !find . -name \*.v -print -exec egrep lckup {} \;

You could then use that new command within another Alias command that writes out the
current design:
alias findit write netlist -verilog temp.v -replace; findlockup

This final example defines two aliased commands, invokes them, and requests help on them:
alias wibble !echo arg1 arg2 $1 $2 $3 $4
alias wobble report black box -undefined
wibble one_1 two_2 three_3 four_4
arg1 arg2 one_1 two_2 three_3 four_4

wobble
// Undefined Modules:
// foo

alias wobble

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Command Dictionary
Alias

// alias: wobble=report black box -undefined

alias
// List of aliased commands:
// wobble=report black box -undefined
// wibble=!echo arg1 arg2 $1 $2 $3 $4

help wobble
// alias: wobble=report black box -undefined

help wibble
// alias: wibble=!echo arg1 arg2 $1 $2 $3 $4

Related Commands
Dofile History
Help System

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Command Dictionary
Analyze Control Signals

Analyze Control Signals


Scope: All modes
Usage
ANAlyze COntrol Signals [-Report_only | -Auto_fix] [-Verbose]
Description
Identifies and optionally defines the primary inputs of control signals.
The Analyze Control Signals command analyzes each control signal (clocks, set, reset, write-
control, and read-control) of every sequential element (DFF, latch, RAM, ROM, and so on) and
optionally defines its primary input as a control signal. The purpose of analyzing the control
signals is to identify the primary input that needs to be defined as a clock, read-control, or write-
control for DFTAdvisor. This analysis also considers pin constraints, but only traces through
simple, combinational gates.

If the -Verbose option is specified, the tool issues messages indicating why certain control
signals are not reported as controllable. At the end of the analysis, statistical information
displays, listing the number of primary inputs identified as control signals, their types, and
additional information.

If the -Auto_fix option is specified, all identified primary inputs of control signals are
automatically defined. For example, when a clock is identified, an implicit Add Clocks
command is performed to define the primary input. The default for control signals is report
only.

Note
This command performs the flattening process automatically, if executed prior to
performing flattening.

Caution
This command does not support gated clocks. If a netlist has a gated clock going to two
flip-flops, the tool does not recognize the gated clock when using the command the
-Auto_fix option.

Arguments
• -Report_only
An optional literal that specifies to only identify control signals (does not define the primary
inputs as control signals). This is the invocation default.

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Command Dictionary
Analyze Control Signals

• -Auto_fix
An optional literal that specifies to define the primary inputs of all identified control signals
as control signals. For example, when a clock is identified, an implicit Add Clocks
command is performed to define that primary input.
• -Verbose
An optional literal that specifies to display information on control signals (whether they are
identified or not, and why) while the analysis is performed.
Examples
The following example analyzes the control signals, then only provides a verbose report on the
control signals in the design. After examining the transcript, you can then perform another
analysis of the control signals to add them.
analyze control signals -verbose
// command: analyze control signals -reports_only -verbose
//
------------------------------------------------------------------------
// Begin control signals identification analysis.
//
------------------------------------------------------------------------
// Warning: Clock line of ‘/cc01/tim_cc1/add1/post_latch_29/WRITEB_reg/r/
(7352)’ is uncontrolled at ‘/IT12 (4)’.
.
.
.
// Identified 2 clock control primary inputs.
// /IT23 (5) with off-state = 0.
// /IT12 (4) with off-state = 0.
// Identified 0 set control primary inputs.
// Identified 1 reset control primary inputs.
// /IRST (1) with off-state = 0.
// Identified 0 read control primary inputs.
// Identified 0 write control primary inputs.
-----------------------------------------------------------------------
// Total number of internal lines is 105 (35 clocks, 35 sets , 35 resets,
0 reads, 0 writes).
// Total number of controlled internal lines is 25 (17 clocks, 0 sets ,
8 resets, 0 reads, 0 writes).
// Total number of uncontrolled internal lines is 80 (18 clocks, 35 sets,
27 resets, 0 reads, 0 writes).
// Total number of added primary input controls 0 (0 clocks, 0 sets ,
0 resets, 0 reads, 0 writes).
-----------------------------------------------------------------------
analyze control signals -auto_fix -verbose

Related Commands
Add Clocks Report Clocks
Add Read Controls Report Read Controls
Add Write Controls Report Write Controls

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Command Dictionary
Analyze Input Control

Analyze Input Control


Scope: Dft mode
Usage
ANAlyze INput Control
Description
Specifies for DFTAdvisor to calculate and display the effects of constraining primary input pins
to an unknown value on those pins’ control capability.
If you are using partition scan, within any partition, you must constrain to an unknown level
those primary inputs of the partition that are uncontrollable at the higher chip-level by using the
Add Pin Constraints command. DFTAdvisor then uses those constrained inputs when
identifying the non-scan cells that should be in the partition scan chain for that particular
partition.
However, because sometimes there is combinational logic between the constrained pin and the
sequential element that gets converted to an input partition scan cell, constraining the partition
pin can impact the fault detection of this combinational logic.
The Analyze Input Control command determines the controllability factor of a partition pin by
removing the X constraint, and calculating the controllability improvement on the affected
combinational gates. If a partition pin has a significant impact on the fault coverage within that
combinational logic, you can consider making that pin a test point or adding a new scan cell
either inside or outside of that design partition to effect a higher fault coverage.
DFTAdvisor displays the results of the calculations, with the primary input having the largest
controllability gain listed first.
For more information on partition scan, refer to “Understanding Partition Scan” in the Scan and
ATPG Process Guide.
Examples
The following example causes DFTAdvisor to perform the calculations and display the results:
add pin constraints data1 cx
add pin constraints addr4 cx
add pin constraints addr7 cx
analyze input control
addr4
addr7
data1

Related Commands
Add Pin Constraints Report Testability Analysis
Analyze Output Observe Setup Scan Identification

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Command Dictionary
Analyze Output Observe

Analyze Output Observe


Scope: Dft mode
Usage
ANAlyze OUtput Observe
Description
Specifies for DFTAdvisor to calculate and display the effects on the observability of masked
primary output pins.
If you are using partition scan, within each partition you must mask those primary outputs of the
partition that are unobservable at the higher chip-level by using the Add Output Masks
command. DFTAdvisor then uses those masked outputs when identifying the non-scan cells
that should be in the partition scan chain for that partition.
However, there may be combinational logic between the sequential element (which
DFTAdvisor converts to an output partition cell) and the primary output, and masking the
partition pin may impact the fault detection of this combinational logic.
The Analyze Output Observe command determines the observability factor of a partition pin by
removing the mask and calculating the observability improvement on the affected
combinational gates. If a partition pin has a significant impact on the fault coverage within that
combinational logic, you can consider making that pin a test point or adding a new scan cell
either inside or outside of that design partition to enable the higher chip-level fault coverage.
DFTAdvisor displays the results of the calculations, with the primary output that has the largest
observability gain listed first.
For more information on partition scan, refer to “Understanding Partition Scan” in the Scan and
ATPG Process Guide.
Examples
The following example causes DFTAdvisor to perform the calculations and display the results:
add output masks qout1 -hold 1
add output masks addr_res<1> -hold 0
add output masks addr_res<4> -hold 1
analyze output observe
addr_res<1>
qout1
addr_res<4>

Related Commands
Add Output Masks Report Testability Analysis
Analyze Input Control Setup Scan Identification

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Command Dictionary
Analyze Testability

Analyze Testability
Scope: Dft mode
Usage
ANAlyze TEstability [-Scoap_only]
Description
Reports general scannability and testability information, along with calculating the
controllability and observability values for gates.
The Analyze Testability command reports general scannability and testability information
which can help you determine how much partial scan the design may need to achieve high test
coverage.
The scannability and testability information reported includes:
• Statistics about the total number of sequential elements, number of scannable sequential
elements, number of non-scannable sequential elements, and so on
• Number of scannable sequential elements that need to be scanned to break all global
sequential loops
• Number of scannable sequential elements with self loops
• Number of scannable sequential elements required to scan RAM boundaries (if the
design contains RAMs)
• Number of scannable sequential elements required to limit sequential depth and
consecutive self loops

Note
If the design contains sequential loops, the reported sequential depth is estimated.

• Number of uncontrollable and unobservable scannable sequential elements


The information reported is mainly related to the structure of the circuit. If you are using
structure-based scan selection, you can use the report to correlate structural criteria with the
amount of scan required. For example, you will see a report on how much scan is required to
break all sequential loops or to limit sequential depth to a given number. This can help you in
determining what parameters to provide to structure-based scan selection.
If you want to use partial scan, it is recommended that you use the more automated, automatic
scan-selection method. The information provided by this report can also give you a measure of
how testable the circuit is at any given time, which can help you in determining whether more
scan needs to be selected. For example, if all global loops are broken and the sequential depth is
small, this indicates that the circuit is likely to achieve high test coverage and that the scan
selected thus far may be sufficient.

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Command Dictionary
Analyze Testability

In addition, this command uses SCOAP testability measures to calculate the controllability and
observability of individual gates which can be reported using the Report Testability Analysis
command. If you use the -Scoap_only switch, this command only calculates the controllability
and observability values.
Arguments
• -Scoap_only
An optional switch that specifies to only compute SCOAP controllability and observability
numbers for use with the Report Testability Analysis command. If this switch is not
specified, these numbers are still calculated, but in addition, scannability and testability
information is calculated and reported.
Examples
The following example shows the default output from the Analyze Testability command. The
controllability and observability numbers are also calculated, but must be reported using the
Report Testability Analysis command (as shown in the next example).
DFT> analyze testability
// Number of sequential instances:
// Total = 751
// Scannable = 319 ( 42.48%)
// Identified = 0 ( 0.00%)

// Targets = 319 ( 42.48%)


// Uncontrollable = 319 ( 42.48%)
// Unobservable = 319 ( 42.48%)
// Maximum sequential depth = 115
// Scannable instances with self loops = 165 ( 21.97%)
// Scan to break global loops = 98 ( 13.05%)
// Scan RAM boundaries = 74 ( 9.85%)
// Scan to limit consecutive self loops:
// To 32 = 28 ( 3.73%)
// To 16 = 52 ( 6.92%)
// To 8 = 56 ( 7.46%)
// To 4 = 78 ( 10.39%)
// To 2 = 104 ( 13.85%)
// Scan to limit sequential depth:
// To 64 = 80 ( 10.65%)
// To 32 = 122 ( 16.25%)
// To 16 = 150 ( 19.97%)
// To 8 = 150 ( 19.97%)
// To 4 = 165 ( 21.97%)
// To 2 = 248 ( 33.02%)

The following example shows the flow of displaying only the controllability values. The report
displays the controllability value for the low logic state (where NC means non-controllable), the
controllability value for the high logic state, the primitive gate type, the gate identification
number, and the pathname to the gate.

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Command Dictionary
Analyze Testability

set system mode dft


.
.
analyze testability -scoap_only
report testability analysis -control -percent 5
0 NC TIE0 32 /addr/U15
NC 0 TIE1 53 /addr/U35
1 7001 INV 95 /cntr/U45
5672 1 BUF 382 /blk1/U85

Related Commands
Add Test Points Setup Scan Identification
Report Testability Analysis

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Command Dictionary
Delete Black Box

Delete Black Box


Scope: Setup mode
Usage
DELete BLack Box -Instance [ins_pathname] | -Module [module_name] | -All
Description
Undoes the effect of the Add Black Box command.
For a module that was originally modeled, removing the effect of the Add Black Box command
reinstates the original model. Specified tied values are no longer set on the output pins. For a
module that was empty or undefined in the input netlist, the output pins revert to the default tied
value of X.
Note
The tool releases the flattened model if one exists at the time you issue this command.

Arguments
• -Instance [ins_pathname]
A switch that specifies for the tool to undo the effect of the Add Black Box command on all
instance-based blackboxes. This is the default if no ins_pathname is given. You can
optionally specify an instance pathname to undo a single instance-based blackbox.
• -Module [module_name]
A switch that specifies for the tool to undo the effect of the Add Black Box command on all
module-based blackboxes. This is the default if no module_name is given. You can
optionally specify a module name to undo a single module-based blackbox.
• -All
A switch that specifies for the tool to undo the effect of the Add Black Box command on all
blackboxes.
Example
The following example adds the black box for module core then undoes all blackboxes that
were defined.
add black box -module core 1
delete black box -all

Related Commands
Add Black Box Report Black Box
Delete Tied Signals

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Command Dictionary
Delete Buffer Insertion

Delete Buffer Insertion


Scope: All modes
Usage
DELete BUffer Insertion test_pin… | -ALL
Description
Specifies the type of scan test pins on which you want to remove the fanout limit.
The default fanout limit on all types of scan test pins is infinity. You can limit the fanout with
the Add Buffer Insertion command, and you can remove that limit with the Delete Buffer
Insertion command. If you remove the limit, DFTAdvisor resets the limit to the default of
infinity.
Arguments
• test_pin
A repeatable literal that specifies the type of the primary input scan pin from which you
want DFTAdvisor to remove the fanout limit. The following shows the default pin names
for each type of scan pin, but you can change the default names using the Setup Scan
Insertion command.
SEN (scan enable; default name scan_en) — A literal that specifies the primary input
pin that enables the scan chain.
SCLK (scan clock; default name scan_clk) — A literal that specifies the primary input
pin that clocks the scan data through the scan chain; the clocked scan type uses this pin.
TEN (test logic enable; default name test_en) — A literal that specifies the primary
input that enables the operation of the test logic circuitry.
TCLK (test logic clock; default name test_clk) — A literal that specifies the primary
input pin that clocks the values DFTAdvisor requires for proper functionality of the test
logic.
SMCLK (master scan clock; default name scan_mclk) — A literal that specifies the
primary input that clocks the scan data into the master scan elements of the scan chain
when using the LSSD scan type.
SSCLK (slave scan clock; default name scan_sclk) — A literal that specifies the
primary input that clocks the scan data into the slave scan elements of the scan chain
when using the LSSD scan type.
• -ALL
A switch that removes the fanout limits from all the primary input scan pins and returns each
to its default setting of infinity.

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Command Dictionary
Delete Buffer Insertion

Examples
The following example changes the default settings for test logic and then removes those
settings. The following two reports show the results of each command.
add buffer insertion 5 ten tclk -model buf1a
report buffer insertion
scan_enable <infinity>
scan_clock <infinity>
test_enable 5 buf1a
test_clock 5 buf1a
scan_master_clock <infinity>
scan_slave_clock <infinity>
hold_enable <infinity>

delele buffer insertion -all


report buffer insertion
scan_enable <infinity>
scan_clock <infinity>
test_enable <infinity>
test_clock <infinity>
scan_master_clock <infinity>
scan_slave_clock <infinity>
hold_enable <infinity>

Related Commands
Add Buffer Insertion Report Buffer Insertion

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Command Dictionary
Delete Cell Models

Delete Cell Models


Scope: All modes
Usage
DELete CEll Models dftlib_model… | {-Type {INV | And | Buf | OR | NAnd | NOr | Xor |
INBuf | OUtbuf | Mux | Scancell | DFf | DLat}} | -All
Description
Specifies the name of the DFT library cell that DFTAdvisor is to remove from the active list of
cells that the user can access when adding test points or that DFTAdvisor can access when
inserting test logic.
You originally added the cells to the active list with either the Add Cell Models command or
with the cell_type library attribute. If you remove a cell model from the active list, you only
remove the cell from that list and do not change the DFT library.
If you accidently delete a DFT library cell from the active list with the Delete Cell Models
command, you can add the specified cell back into the active list with the Add Cell Models
command.
Arguments
• dftlib_model
A repeatable string that specifies the names of the particular DFT library models that you
want DFTAdvisor to remove from the active list.
• -Type INV | And | Buf | OR | NAnd | NOr | Xor | INBuf | OUtbuf | Mux | Scancell | DFf |
DLat
A switch and argument pair that specifies the cell model type of all DFT library models that
you want DFTAdvisor to remove from the active list. The valid cell model types are as
follows:
INV — A literal that specifies a one-input inverter gate.
And — A literal that specifies a two-input AND gate.
Buf — A literal that specifies a one-input buffer gate.
OR — A literal that specifies a two-input OR gate.
NAnd — A literal that specifies a two-input NAND gate.
NOr — A literal that specifies a two-input NOR gate.
Xor — A literal that specifies a exclusive OR gate.
INBuf — A literal that specifies a primary input buffer gate.
OUtbuf — A literal that specifies a primary output buffer gate.
Mux — A literal that specifies a 2-1 multiplexer.
Scancell — A literal that specifies a mux-scan D flip-flop.

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Command Dictionary
Delete Cell Models

DFf — A literal that specifies a D flip-flop.


DLat — A literal that specifies a D latch.
• -All
A switch that removes all cell models from the active list, including those tagged in the DFT
library with the cell_type attribute. This switch does not change the contents of the DFT
library, only the active list within DFTAdvisor.
Examples
The following example removes a DFT library model from the active list:
add clocks 0 clk
set test logic -set on -reset on
set system mode dft
add cell models and2 -type and
add cell models or2 -type or
add cell models mux21h -type mux s a b
add cell models nor2 -type nor
delete cell models or2
insert test logic

Related Commands
Add Cell Models Set Test Logic
Report Cell Models

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Command Dictionary
Delete Clock Groups

Delete Clock Groups


Scope: Dft mode
Usage
DELete CLock Groups group_name… | -All
Description
Specifies the name of the group that you want to remove from the clock groups list.
If you are going to merge multiple shift clocks together to form one scan chain, you can use the
Add Clock Groups command to place the shift clocks in the same clock group. If you make a
mistake when defining the clocks within a clock group, you can use the Delete Clock Groups
command. As you delete clock groups, the specified clocks are returned to the default clock
group, all_clocks.
Arguments
• group_name
A repeatable string that specifies the names of the clock groups that you want to remove.
The value of the group_name argument is the same as that which you specified with the
Add Clock Groups command.
• -All
A switch that specifies to remove all the clock groups.
Examples
The following example defines the current clocks, splits those clocks incorrectly into two
different groups, removes the clock group that was incorrectly defined, and then continues
defining the clock groups:
add clock 1 clk1 clk2
add clock 0 pre1 clr1 pre2 clr2
set system mode dft
.
.
add clock groups group1 clk1 pre2 clr1
delete clock groups group1
add clock groups group1 clk1 pre1 clr1
add clock groups group2 clk2 pre2 clr2

Related Commands
Add Clock Groups Report Clock Groups
Add Clocks Report Clocks

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Command Dictionary
Delete Clocks

Delete Clocks
Scope: Setup mode
Usage
DELete CLocks primary_input_pin… | -All
Description
Removes primary input pins from the clock list.
The Delete Clocks command removes the specified primary input pins from the clock list.
Deleted clocks are also removed from the default clock group, all_clocks. If you remove an
equivalence pin from the clock list, DFTAdvisor automatically removes all of the equivalent
pins from the clock list.
Arguments
• primary_input_pin
A repeatable string that specifies the list of primary input pins that you want to delete from
the clock list.
• -All
A switch that deletes all pins from the clock list.
Examples
The following example deletes an incorrect clock from the clock list:
add clocks 1 clock1
add clocks 1 clock2
delete clocks clock1

Related Commands
Add Clocks Report Clocks

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Command Dictionary
Delete Mapping Definition

Delete Mapping Definition


Scope: Setup and DFT modes
Usage
DELete MApping Definition -All | {object_name [-Instance | -Module] [-Nonscan_model
nonscan_model_name] [-Scan_model scan_model_name] [-Output
[scan_ouput_pin_name]]}
Description
Returns the non-scan to scan model mapping to the mapping defined by DFTAdvisor.
The Delete Mapping Definition command deletes the mapping of non-scan models to scan
models. Using this command, you can perform the following:
• Remove the scan model mapping for an individual instance.
• Remove all instances under a hierarchical instance.
• Remove all instances in all occurrences of a module in the design.
• Remove all occurrences of the model in the entire design.
• Remove the mapping the scan output pin of the scan models.
To return the scan mapping back to the library default, you can specify the non-scan model;
DFTAdvisor removes the scan mapping and output mapping from the model. When specifying
both the non-scan and scan model, DFTAdvisor removes the scan and output mapping for those
instances matching the non-scan and scan model.
When only removing the scan output pin mapping, you specify the scan model. If you also
specify the output scan pin, then only scan candidates matching the scan model and output pin
have their output pin mapping removed.
Arguments
• -All
A switch that specifies to remove all scan and output mapping in the entire design.
• object_name
A string that specifies the name of the non-scan model you want to remove the mapping.
You can also specify an instance, hierarchical instance, module, or scan model.
o If this argument is the name of an instance or hierarchical instance, the -Instance
switch is required and the model must be specified with the -Nonscan_model switch
or -Scan_model switch.
o If this argument is the name of a module, then the -Module switch is required, and
the model must be specified with the -Nonscan_model or -Scan_model switch.

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Command Dictionary
Delete Mapping Definition

o If this argument is a scan model, then the -Output switch is required. Because you
specified a scan model, you can only remove the scan output pin mapping.
• -Instance | -Module
An optional switch that specifies the type of the object_name argument. If neither switch is
specified, the object_name is a model (the default).
o If you specify -Instance and the instance is primitive, then only the named instance
has its mapping changed.
o If you specify -Instance and the instance is hierarchical, then all instances under that
instance matching the -Nonscan_model or (for output mapping) matching the
-Scan_model have their mapping changed.
o If you specify -Module, then for all occurrences of that module, all instances within
that module that match the -Nonscan_model or (for output mapping) matching the
-Scan_model have their mapping changed.
• -Nonscan_model nonscan_model_name
An optional switch and string pair that specifies the name of the non-scan model that you
want to remove the scan and pin mapping. This argument is required only if you specify
-Instance or -Module switch; otherwise, you can specify the non-scan model in the
object_name argument.
• -Scan_model scan_model_name
An optional switch and string pair that specifies the name of the scan model that is mapped
to the specified non-scan model. This argument is required only if you want to constrain the
removing of the scan mapping or are just removing the scan output pin mapping based on
-Instance or -Module.
• -Output [scan_ouput_pin_name]
An optional switch and optional string pair that specifies to remove the scan output pin.
Specifying just the -Output switch removes all changed scan output pins for the specified
scan model, while specifying the switch with a pin name removes the mapping for only scan
models that use that pin for the scan output.
Examples
The following example removes the scan and output mapping for all occurrences of the fd1 non-
scan model in the design:
delete mapping definition fd1

The following example removes the scan and output mapping for each occurrence of the fd1
non-scan model that is mapped to the fd1s scan model and has the scan output pin mapped to
“qn”:
delete mapping definition fd1 -scan_model fd1s -output qn

The following example removes the scan and output mapping for each occurrence of the fd1
non-scan model under the hierarchical instance “/top/counter1”:

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Command Dictionary
Delete Mapping Definition

delete mapping definition /top/counter1 -instance -nonscan_model fd1

The following example removes the scan and output mapping for each occurrence the fd1 non-
scan model that is mapped to the fd1s2 scan model in the “counter” module and for all
occurrences of that module in the design:
delete mapping definition counter -module -nonscan_model fd1 -scan_model fd1s2

The following example removes the scan output pin mapping and returns it to the library default
for all occurrences of the fd1s scan model in the design:
delete mapping definition fd1s -output

The following example removes the scan output pin mapping and returns it to the library default
for all occurrences of the fd1s scan model in the design with the scan output pin set to “qn”:
delete mapping definition fd1s -output qn

Related Commands
Add Mapping Definition Report Mapping Definition

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Command Dictionary
Delete Nofaults

Delete Nofaults
Scope: Setup mode
Usage
DELete NOfaults {-All | {modulename -Module} | {object_expression… [-PIN | -Instance]}}
[-Stuck_at {01 | 0 | 1}]
Description
Removes the no-fault settings from either the specified pin or instance pathnames.
The Delete Nofaults command deletes the nofault settings which were previously specified with
the Add Nofaults command. You can optionally specify nofault settings that have a specific
stuck-at value. If you do not specify a stuck-at value when deleting a nofault setting, the
command deletes both the “stuck-at-0” and “stuck-at-1” nofault settings.
If the pathname is a pin, then DFTAdvisor removes the nofault on only that pin. If the pathname
is an instance, then the tool removes all pin nofaults on the top-level of that instance, along with
all the pin faults underneath that instance (if it is a hierarchical instance). If the pathname is a
module, then the tool removes all pin nofaults on the top-level of the module, along with all the
pin nofaults on all instances and pins underneath that module for every occurrence of that
module in the design.
You can use the Report Nofaults command to display all the current nofault settings.
Arguments
• -All
A switch that deletes all nofault settings.
• modulename
A string that specifies the name of a module from which you want to delete nofault settings.
You must include the -Module switch when you specify a module name.
• -Module
A switch that specifies interpretation of the modulename argument as a module pathname.
All instances of these modules are affected.
• object_expression
A string representing a list of pathnames of instances or pins from which you want to delete
nofault settings. The string may include any number of embedded asterisk (*) or question
mark (?) wildcard characters. The asterisk matches any sequence of characters (including
none) in a name, and the question mark matches any single character.
Pin pathnames must be ATPG library cell instance pins, also referred to as design level pins.
If the object expression specifies a pin within an instance of an ATPG library model, the
tool ignores it. By default, pin pathnames are matched first. If a pin pathname match is not
found, the tool next tries to match instance pathnames. You can force the tool to match only

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Command Dictionary
Delete Nofaults

pin pathnames or only instance pathnames by including the -Pin or -Instance switch after the
object_expression.
• -Pin
An optional switch that specifies to use the preceding object expression to match only pin
pathnames; the tool will then delete nofault settings from all the pins matched.
• -Instance
An optional switch that specifies to use the preceding object expression to match only
instance pathnames; the tool will then delete nofault settings from all boundary and internal
pins of the instances matched.
• -Stuck_at 01 | 0 | 1
An optional switch and literal pair that specifies the stuck-at values that you want to delete.
The valid stuck-at literals are as follows:
01 — A literal that specifies to delete both the “stuck-at-0” and “stuck-at-1” nofault
settings. This is the default.
0 — A literal that specifies to only delete the “stuck-at-0” nofault settings.
1 — A literal that specifies to only delete the “stuck-at-1” nofault settings.
Examples
The following example will delete an extra added no fault instance.
add nofaults i_1006 i_1007 i_1008 -instance
report nofaults
USER : 01 i_1006/IN
USER : 01 i_1006/OUT
USER : 01 i_1007/IN
USER : 01 i_1007/OUT
USER : 01 i_1008/IN
USER : 01 i_1008/OUT

delete nofaults i_1007 -instance


report nofaults
USER : 01 i_1006/IN
USER : 01 i_1006/OUT
USER : 01 i_1008/IN
USER : 01 i_1008/OUT

Related Commands
Add Nofaults Report Nofaults

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Command Dictionary
Delete Nonscan Instances

Delete Nonscan Instances


Scope: All modes
Usage
DELete NONscan Instances {{pathname… | instance_expression [-INStance | -Control_signal
| -Module]} | -All} [-Class {User | System | Full}]
Description
Removes the specified sequential instances from the non-scan instance list.
The Delete Nonscan Instances command deletes sequential instances, instances specified by
control signals, or all instances within the specified module that were previously added to the
non-scan instance list by using either the Add Nonscan Instances command or the Dont_touch
property in a Genie netlist. You can delete either a specific list of instance names or all
instances.
Note
If these non-scan instances are ignored for scannability checks and then the Delete
Nonscan Instances command is entered in Dft mode, these specified instances will not be
eligible for scan. You must go back to the Setup mode and then re-enter Dft mode to have
scannability checks performed on these instances, which can make them eligible for scan.

To display the current non-scan instance list, use the Report Sequential Instances command.
Arguments
• pathname
A repeatable string that specifies either the pathnames of the instances or signals that control
instances that you want DFTAdvisor to delete from the non-scan instance list.
• instance_expression
A string representing a list of instances within the design. The string instance_expression is
defined as:
{ string | string * } ...

The asterisk (*) is a wildcard that allows you to match many instances in a design. Any
expression that does not contain an asterisk (*) will match exactly zero or one instance.
This argument does not support pathnames to objects below the instance level of an ATPG
library model. You can use a pathname expression to select several instances and the tool
will then delete nonscan instances for all the pins on those instances; but if the expression
specifies a location below the instance level of an ATPG library model, the tool will issue an
error message.
• -INStance | -Control_signal | -Module
A switch that specifies whether the pathnames are instances, pins (control signals), or
modules. An example Verilog module is “module clkgen (clk, clk_out, …)” where clkgen is

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Command Dictionary
Delete Nonscan Instances

the module name. You can only use the -Control_signal option in Dft mode. The default is
-Instance.
• -All
A switch that specifies to delete all instances from the non-scan instance list.
• -Class User | System | Full
An optional switch and literal pair that specifies the source (or class) of the non-scan
instance that you want to delete. The valid literals are as follows:
User — A literal that specifies to only delete the non-scan instances entered by the user
using the Add Nonscan Instances command. This is the default.
System — A literal that specifies to only delete the non-scan instances described in the
Genie netlist with the Dont_touch property.
Full — A literal that specifies to delete all the non-scan instances in the user and system
class.
Examples
The following example deletes an extra sequential non-scan instance called i_1007, then
performs a full scan identification run thereby allowing DFTAdvisor to treat the non-scan
instance i_1007 as a scan cell during the identification process:
set system mode dft
add nonscan instances i_1006 i_1007 i_1008
delete nonscan instances i_1007
setup scan identification full_scan
run

Related Commands
Add Nonscan Instances Setup Scan Identification
Report Sequential Instances Set Nonscan Handling

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Command Dictionary
Delete Nonscan Models

Delete Nonscan Models


Scope: All modes
Usage
DELete NONscan Models model_name… | -All [-Class {User | System | Full}]
Description
Removes from the non-scan model list the specified sequential DFT library models.
When you issue the Add Nonscan Models command on a DFT library model, DFTAdvisor
places all instances of that DFT library model into the user-specified, non-scan instance list.
Once you remove a model from the non-scan model list with the Delete Nonscan Models
command, DFTAdvisor then has the freedom to decide whether to place those instances of that
model in the scan instance list.
Note
If these non-scan instances (models) are ignored for scannability checks and then the
Delete Nonscan Models command is entered in Dft mode, these specified instances
(models) will not be eligible for scan. You must go back to the Setup mode and then re-
enter Dft mode to have scannability checks performed on these instances (models) which
can make them eligible for scan.

DFTAdvisor decides whether to place individual instances in the scan instance list based on
many parameters including the scan setup settings. For example, if the scan setup has been
changed to All with the
command, then DFTAdvisor is forced to place all available sequential instances into the scan
instance list.
Arguments
• model_name
A repeatable string that specifies the model names that you want to delete from the non-scan
model list. Enter the model names as they appear in the DFT library.
• -All
A switch that specifies to delete all models from the non-scan model list.
• -Class User | System | Full
An optional switch and literal pair that specifies the class code of the non-scan model that
you specify. The valid literal names are as follows:
User — A literal that specifies that the list of non-scan models were previously added by
using the Add Nonscan Models command. This is the default class.
System — A literal that specifies that the list of non-scan models were added by
DFTAdvisor.

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Command Dictionary
Delete Nonscan Models

Full — A literal that specifies that the list of non-scan models consist of both the user
and system class.
Examples
The following example deletes an extra sequential non-scan model called d_flip_flop2, then
performs a full scan identification run thereby allowing DFTAdvisor to treat the non-scan
model d_flip_flop2 as a scan cell during the identification process:
set system mode dft
add nonscan models d_flip_flop1 d_flip_flop2
delete nonscan models d_flip_flop2
setup scan identification full_scan
run

Related Commands
Add Nonscan Instances Report Nonscan Models
Add Nonscan Models Set Nonscan Handling

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Command Dictionary
Delete Notest Points

Delete Notest Points


Scope: DFT mode
Prerequisites: You must add circuit points with the Add Notest Points command before you can
delete them.
Usage
DELete NOtest Points {pin_pathname… | instance_pathname… | instance_expression
[-Observe_scan_cell]} | -ALL | {-Path critical_pathname} | -ALL_Paths
Description
Removes the specified pins from the list of notest points which the tool cannot use for testability
insertion.
The Delete Notest Points command deletes the definition of pins, all pins within an instance,
scan cell, or paths that you have previously added using the Add Notest Points command. These
notest circuit points identify output pins of cells or paths within the circuit that DFTAdvisor is
not to use for insertion of controllability and observability circuitry. You can display a list of
these current circuit points and their associated pins by using the Report Notest Points
command.
When you delete a critical path, the critical path is removed from the list of active paths (paths
read in using Add Notest Points). For each gate in a removed path, which is in no other
remaining active paths, the no test point restriction is removed.
Arguments
• pin_pathname
A repeatable string that specifies a list of pins for which you want to delete the circuit points
that DFTAdvisor cannot use for testability insertion.
• instance_pathname
A required repeatable string that lists the instances whose output pins you want to delete the
circuit points that DFTAdvisor cannot use for testability insertion. All output pins within
that (hierarchical) instance are removed from the list of pins that should be excluded from
consideration.
• instance_expression
A string representing a list of instances within the design. The string instance_expression is
defined as:
{ string | string * } ...

The asterisk (*) is a wildcard that allows you to match many instances in a design. Any
expression that does not contain an asterisk (*) will match exactly zero or one instance.
This argument does not support pathnames to objects below the instance level of an ATPG
library model. You can use a pathname expression to select several instances and the tool
will then delete notest points for all the pins on those instances; but if the expression

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Command Dictionary
Delete Notest Points

specifies a location below the instance level of an ATPG library model, the tool will issue an
error message.
• -Observe_scan_cell
An optional switch that specifies the scan cell instance named in the instance_pathname
argument is to be removed from the no test point list.
• -ALL
A switch that deletes all previously-added circuit points and critical paths.
• -Path critical_pathname
A required switch and name pair that specifies to delete the named critical path. You can list
the names of the critical paths using the Report Notest Points command with the -Paths
switch. For more information on the format of the file, refer to “The Path Definition File” in
the Scan and ATPG Process Guide.
• -ALL_Paths
A required switch that specifies to delete all critical paths.
Examples
The following example deletes an incorrect notest circuit point and corrects it with a new circuit
point before performing testability analysis:
set system mode dft
add notest points tr_i ts_i
delete notest points tr_i
add notest points tr_io

Related Commands
Add Notest Points Report Notest Points

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Command Dictionary
Delete Output Masks

Delete Output Masks


Scope: Setup mode
Usage
DELete OUtput Masks primary_output… | -All
Description
Removes the masking of the specified primary output pins.
DFTAdvisor uses primary output pins as the observe points during the scan identification
process. When you mask a primary output pin with the Add Output Masks command,
DFTAdvisor marks that pin as an unobservable primary output during the identification
process.
You can set a default mask for all output and bidirectional pins using the Setup Output Masks
command. You can add a hold value to a default mask with the Add Output Masks command, or
remove a hold value using the Delete Output Masks command. To turn off the default masks for
all output pins, you must use the Setup Output Masks command with the Off literal.
Arguments
• primary_output
A repeatable string that specifies the names of the primary output pins that you want to
unmask.
• -All
A switch that specifies to unmask all primary outputs that you previously masked by using
the Add Output Masks command.
Examples
The following example first incorrectly chooses two of the design’s primary output pins to
mask. Then, the example unmasks the one primary output that was inappropriate, masks the
correct primary output, and then displays the complete list of primary output pins that are
currently masked from being used as observation points.
add output masks q1 qb3 -hold 1
delete output masks qb3
add output masks qb1 -hold 0
report output masks
q1 hold1
qb1 hold0

Related Commands
Add Output Masks Report Output Masks
Analyze Output Observe Setup Output Masks

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Command Dictionary
Delete Pin Constraints

Delete Pin Constraints


Scope: Setup mode
Usage
DELete PIn Constraints primary_input_pin… | -All
Description
Removes the pin constraints from the specified primary input pins.
The Delete Pin Constraints command deletes pin constraints that were previously added to the
primary inputs with the Add Pin Constraints command. You can delete the pin constraints for
specific pins or for all pins.
Note
This command has effects on other commands that relate to fault simulation, such as
simulation-based test point selection.

You can set a default pin constraint for all input and bidirectional pins using the Setup Pin
Constraints command. The pin constraints set by the Setup Output Masks command can have
their values overridden with the Add Pin Constraints command. You can remove an override of
a default pin constraint using the Delete Pin Constraints command. To remove the default pin
constraint for all input pins, you should use the Setup Pin Constraints command with the None
literal.
Arguments
• primary_input_pin
A repeatable string that specifies a list of primary input pins whose pin constraints you want
to delete.
• -All
A switch that specifies to delete the pin constraints of all primary input pins.

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Command Dictionary
Delete Pin Constraints

Examples
The following example adds two pin constraints and then deletes one of them:
add pin constraints ph1 c0
add pin constraints ph2 c0
delete pin constraints ph1

Related Commands
Add Pin Constraints Setup Pin Constraints
Report Pin Constraints

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Command Dictionary
Delete Pin Equivalences

Delete Pin Equivalences


Scope: Setup mode
Usage
DELete PIn Equivalences primary_input_pin… | -All
Description
Removes the pin equivalence specifications for the designated primary input pins.
The Delete Pin Equivalences command deletes the equivalence specifications that were
previously added to the primary inputs with the Add Pin Equivalences command. You can
delete pin equivalences for specific pins or for all pins.
Note
This command has effects on other commands that relate to fault simulation, such as
simulation-based test point selection.

Arguments
• primary_input_pin
A repeatable string that specifies a list of primary input pins whose equivalence
specifications you want to delete.
• -All
A switch that specifies to delete all pin equivalence effects.
Examples
The following example deletes an incorrect pin equivalence specification and adds the correct
one:
add pin equivalences indata2 -invert indata4
delete pin equivalences indata2
add pin equivalences indata3 -invert indata4

Related Commands
Add Pin Equivalences Report Pin Equivalences

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Command Dictionary
Delete Primary Inputs

Delete Primary Inputs


Scope: Setup mode
Usage
DELete PRimary Inputs net_pathname… | primary_input_pin… | -All [-Class {User | System |
Full}]
Description
Removes the specified primary inputs from the current netlist.
The Delete Primary Inputs command deletes the primary inputs that you specify from the
circuit. You can delete either the user class, system class, or full classes of primary inputs. If
you do not specify a class, the tool deletes the primary inputs from the user class.
You can display a list of any class of primary inputs by using the Report Primary Inputs
command.
Arguments
• net_pathname
A repeatable string that specifies the circuit connections that you want to delete. You can
specify the class of primary inputs to delete with the -Class switch.
• primary_input_pin
A repeatable string that specifies a list of primary input pins that you want to delete. You
can specify the class of primary inputs to delete with the -Class switch.
• -All
A switch that deletes all primary inputs. You can specify the class of primary inputs to
delete with the -Class switch.

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Command Dictionary
Delete Primary Inputs

• -Class User | System | Full


An optional switch and literal pair that specifies the class code of the designated primary
input pins. The valid class code literal names are as follows:
User — A literal specifying that the primary inputs were added using the Add Primary
Inputs command. This is the default class.
System — A literal specifying that the primary inputs derive from the netlist.
Full — A literal specifying that the primary inputs consist of both user and system
classes.
Examples
The following example deletes an extra added primary input from the user class of primary
inputs:
add primary inputs indata2 indata4 indata6
delete primary inputs indata4 -class user

Related Commands
Add Primary Inputs Write Primary Inputs
Report Primary Inputs

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Command Dictionary
Delete Primary Outputs

Delete Primary Outputs


Scope: Setup mode
Usage
DELete PRimary Outputs net_pathname… | primary_output_pin… | -All [-Class {User |
System | Full}]
Description
Removes the specified primary outputs from the current netlist.
The Delete Primary Outputs command deletes the primary outputs that you specify from the
circuit. You can delete either the user class, system class, or full classes of primary outputs. If
you do not specify a class, the tool deletes the primary outputs from the user class.
You can display a list of any class of primary outputs by using the Report Primary Outputs
command.
Arguments
• net_pathname
A repeatable string that specifies the circuit connections that you want to delete. You can
specify the class of primary outputs to delete with the -Class switch.
• primary_output_pin
A repeatable string that specifies a list of primary output pins that you want to delete. You
can specify the class of primary outputs to delete with the -Class switch.
• -All
A switch that deletes all primary outputs. You can specify the class of primary outputs to
delete with the -Class switch.

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Command Dictionary
Delete Primary Outputs

• -Class User | System | Full


An optional switch and literal pair that specifies the class code of the primary output pins
that you specify. The valid literal names are as follows:
User — A literal specifying that the list of primary outputs were added using the Add
Primary Outputs command. This is the default class.
System — A literal specifying that the list of primary outputs derive from the netlist.
Full — A literal specifying that the list of primary outputs consists of both the user and
system class.
Examples
The following example deletes a primary output from the system class of primary outputs:
delete primary outputs outdata1 -class system

Related Commands
Add Primary Outputs Write Primary Outputs
Report Primary Outputs

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Command Dictionary
Delete Read Controls

Delete Read Controls


Scope: Setup mode
Usage
DELete REad Controls primary_input_pin… | -All
Description
Removes the read control line off-state definitions from the specified primary input pins.
The Delete Read Controls command deletes the off-state definition of the read control lines
previously defined with the Add Read Controls command. You can delete the read control line
definitions for specific pins or for all pins.
Arguments
• primary_input_pin
A repeatable string that specifies a list of primary input pins from which you want to delete
any read control line off-state definitions.
• -All
A switch that specifies to delete the read control line off-state definitions for all primary
input pins.
Examples
The following example removes an incorrect read control line off-state definition, and then
creates the correct off-state for that read control line:
add clocks 0 clk
add read controls 0 r1 r2
delete read controls r1
add read controls 1 r1
set system mode dft

Related Commands
Add Read Controls Report Read Controls

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Command Dictionary
Delete Scan Chains

Delete Scan Chains


Scope: Setup
Usage
DELete SCan Chains chain_name… | -All
Description
Removes the specified scan chain definitions from the scan chain list.
The Delete Scan Chains command deletes scan chains previously defined with the Add Scan
Chains command. You can delete the definitions of specific scan chains or of all scan chains.
When you remove a scan chain definition, it is only the definition you are removing, not the
scan chain itself. If you need to remove the scan chain itself, you can use the Ripup Scan Chains
command.
Arguments
• chain_name
A repeatable string that specifies the names of the scan chain definitions that you want to
delete.
• -All
A switch that specifies to delete all scan chain definitions.
Examples
The following example defines several scan chains, adding them to the scan chain list, then
deletes one of the scan chains:
add scan chains chain1 group1 indata2 outdata4
add scan chains chain2 group1 indata3 outdata5
add scan chains chain3 group1 indata4 outdata6
delete scan chains chain2

Related Commands
Add Scan Chains Ripup Scan Chains
Report Scan Chains

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Command Dictionary
Delete Scan Groups

Delete Scan Groups


Scope: Setup mode
Usage
DELete SCan Groups group_name… | -All
Description
Removes the specified scan chain group definitions from the scan chain group list.
The Delete Scan Groups command deletes scan chain groups previously defined with the Add
Scan Groups command. You can delete the definitions of specific scan chain groups or of all
scan chain groups.
When you delete a scan chain group, the tool also deletes all scan chains within the group.
Arguments
• group_name
A repeatable string that specifies the names of the scan chain group definitions that you
want to delete.
• -All
A switch that specifies to delete all the scan chain group definitions, which also
automatically causes DFTAdvisor to remove all scan chain definitions.
Examples
The following example defines two scan chain groups, adding them to the scan chain group list,
then deletes one of the scan chain groups:
add scan groups group1 scanfile1
add scan groups group2 scanfile2
delete scan groups group1

Related Commands
Add Scan Groups Report Scan Groups

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Command Dictionary
Delete Scan Instances

Delete Scan Instances


Scope: All modes
Usage
DELete SCan Instances {pathname… | instance_expression [-INStance | -Control_signal |
-Module]} | -All
Description
Removes the specified, sequential instances from the user-identified scan instance list.
The Delete Scan Instances command deletes sequential instances, instances specified by control
signals, or all instances within the specified module that were previously added to the scan
instance list by using the Add Scan Instances command. You can delete either a specific list of
instance names or all instances.
User-identified scan instances result from using the Add Scan Instances or Add Scan Models
commands. DFTAdvisor also selects the sequential instances by using the identification type
you specify with the Setup Scan Identification command (system-identified).
If you issue a Run command after removing an instance from the user-identified scan list with
the Delete Scan Instances command, DFTAdvisor then has the option of including it in the
system-identified scan instance list.
Arguments
• pathname
A repeatable string that specifies the pathnames of the instances or control signals (that
control instances) that you want DFTAdvisor to delete from the user-identified scan
instance list. The pathnames must be user-identified scan instances or control signals (that
control instances), which you previously selected with the Add Scan Instances command.
• instance_expression
A string representing a list of instances within the design. The string instance_expression is
defined as:
{ string | string * } ...

The asterisk (*) is a wildcard that allows you to match many instances in a design. Any
expression that does not contain an asterisk (*) will match exactly zero or one instance.
This argument does not support pathnames to objects below the instance level of an ATPG
library model. You can use a pathname expression to select several instances and the tool
will then delete scan instances for all the pins on those instances; but if the expression
specifies a location below the instance level of an ATPG library model, the tool will issue an
error message.
• -INStance | -Control_signal | -Module
A switch that specifies whether the pathnames are instances, pins (control signals), or
modules. An example Verilog module is “module clkgen (clk, clk_out, …)” where clkgen is

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Command Dictionary
Delete Scan Instances

the module name. You can only use the -Control_signal option in Dft mode. The default is
-Instance.
• -All
A switch that specifies to delete all instances from the user-identified scan instance list. This
switch does not affect the instances in the system-identified scan instance list.
Examples
The following example deletes an extra sequential scan instance that was defined to be treated
as a scan cell; thus, the deleted instance is no longer included in the user-identified scan instance
list:
set system mode dft
add scan instances i_1006 i_1007 i_1008
delete scan instances i_1007

Related Commands
Add Scan Instances Report Sequential Instances

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Command Dictionary
Delete Scan Models

Delete Scan Models


Scope: All modes
Usage
DELete SCan Models model_name… | -All
Description
Removes the specified sequential models from the scan model list.
The Delete Scan Models command deletes all instances of the sequential models that you
specify. This includes removing all instances of the model_name from the user-identified scan
instance list. You can delete a specific list of sequential models or all the models.
There are two ways that sequential instances can be identified for scan: system and user. You
can explicitly identify scan instances with either the Add Scan Instances or the Add Scan
Models commands (user-identified). DFTAdvisor also selects the sequential instances by using
the identification type you specify with the Setup Scan Identification command. The Delete
Scan Models command does not remove instances from the system-identified scan instance list.
If you issue a Run command after removing a model from the user-identified scan list with the
Delete Scan Models command, DFTAdvisor then has the option of including any of the
instances of that model in the system-identified scan instance list.
To display the current scan model list, use the Report Scan Models command.
Arguments
• model_name
A repeatable string that specifies the model names that you want to delete from the scan
model list and user-identified scan instance list. Enter the model names as they appear in the
DFT library.
• -All
A switch that specifies to delete all models from the scan model list and all instances from
the user-identified scan instance list.
Examples
The following example deletes an extra added sequential scan model; thus, the deleted model is
no longer included in the scan model list:
set system mode dft
add scan models d_flip_flop1 d_flip_flop2
delete scan models d_flip_flop2

Related Commands
Add Scan Instances Report Scan Models
Add Scan Models

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Command Dictionary
Delete Scan Partitions

Delete Scan Partitions


Scope: All modes
Usage
DELete SCan PArtitions {object_name... | -All}
Description
Deletes the user specified scan partitions.
It does not delete the default scan partition, default_scan_partition. The sequential cells whose
scan partitions are deleted are placed back into the default scan partition.
Arguments
• object_name
A required repeatable string that specifies the names of the scan partitions to remove.
• -All
A required switch that specifies to remove all the user specified scan partitions. This option
does not remove the default scan partition that the tool creates, default_scan_partition.
Examples
The following example adds three scan partitions. The scan partitions are then deleted, first
partially, then completely.
add scan partition part_1 -instance umodA
add scan partition part_2 -instance umodB umodC
add scan partition part_3 -instance umodD
delete scan partitions part_2
report scan partitions
-----------------------------------------------------------------------
ScanPartitionName TotalNumCells/ScannableCells Members
-----------------------------------------------------------------------
part_1 150/150 umodA [instance]
part_3 330/250 umodD [instance]
default_scan_partition 15000/0 <all_remaining_cells>
-----------------------------------------------------------------------

delete scan partitions -all


report scan partitions
-----------------------------------------------------------------------
ScanPartitionName TotalNumCells/ScannableCells Members
-----------------------------------------------------------------------
default_scan_partition 15480/400 <all_remaining_cells>
-----------------------------------------------------------------------

Related Commands
Add Scan Partition Report Scan Partitions

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May 2007
Command Dictionary
Delete Scan Pins

Delete Scan Pins


Scope: All modes
Usage
DELete SCan PIns chain_name… | -All
Description
Removes any previously-assigned scan input, output, and clock names from the specified scan
chains.
The Delete Scan Pins command removes user-specified names of the scan input and scan output
pins of the scan chains that you previously assigned with the Add Scan Pins command. You can
use the Report Scan Pins command to display all added scan input and output pin names for
each scan chain.
Arguments
• chain_name
A repeatable string that specifies the names of the scan chains from which you want
DFTAdvisor to remove the associated pins.
• -All
A switch that removes all added scan pin names from all scan chains.
Examples
The following example removes previously-assigned scan chain input and output names for
chain1:
add clocks 0 clk
set system mode dft
run
add scan pins chain1 si so
add scan pins chain2 si1 so1
delete scan pins chain1
insert test logic

Related Commands
Add Scan Pins Report Scan Pins

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May 2007
Command Dictionary
Delete Seq_transparent Constraints

Delete Seq_transparent Constraints


Scope: Setup mode
Usage
DELete SEq_transparent Constraints {model_name pin_name…} | -All
Description
Removes the pin constraints from the specified DFT library model input pins.
The Delete Seq_transparent Constraints command deletes constraints that were added to clock
enable pins with the Add Seq_transparent Constraints command. You can delete the constraints
for all DFT library models or for specific pins of a model.
Arguments
• model_name
A string that specifies the DFT library model from whose pin_name you want to delete the
constraints.
• pin_name
A repeatable string that specifies the clock enable pin names of the model_name specified
whose constraints you want to delete.
• -All
A switch that specifies to delete the constraints of all DFT library model pins.
Examples
The following example adds two seq_transparent constraints and deletes one of them:
set system mode setup
add seq_transparent constraints c1 gdff enable
delete seq_transparent constraints gdff enable
add seq_transparent constraints c1 gdff en
set system mode dft
setup scan identification seq_transparent

Related Commands
Add Seq_transparent Constraints Report Seq_transparent Constraints

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Command Dictionary
Delete Sub Chains

Delete Sub Chains


Scope: Setup mode
Usage
DELete SUb Chains -All | {object_name [subchain_name] [-Module | -Instance]}
Description
Removes the definition of a preexisting scan sub-chain.
The Delete Sub Chains command removes scan sub-chains previously defined with the Add
Sub Chains command. The Add Sub Chains command could have been entered either directly
by you, or indirectly in the scan sub-chains setup file that you might have read into
DFTAdvisor. To determine whether there are any current scan sub-chain definitions, use the
Report Sub Chains command.
Arguments
• -All
A switch that removes all scan sub-chains.
• object_name
A string that specifies either the pathname of an instance or the name of a module. If you
provide a pathname of an instance, you must also use the -Instance switch.
• subchain_name
An optional string that specifies the name of a pre-existing scan sub-chain that you want to
remove. If you do not specify a subchain_name, DFTAdvisor removes all the sub-chains in
the object_name.
• -Module
An optional switch that specifies for DFTAdvisor to interpret the value of the object_name
argument as a module name. This is the default.
• -Instance
An optional switch that specifies for DFTAdvisor to interpret the value of the object_name
argument as a pathname to an instance.
Examples
The following example removes a scan sub-chain:
add sub chains blkA subc1 si1 so1 10 mux_scan -sen_core sen1 -subclock sclk -module
add sub chains blkA subc2 si2 so2 30 mux_scan -sen_core sen2 -subclock mclk -module
delete sub chains blkA subc1 -module

Related Commands
Add Sub Chains Report Sub Chains

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Command Dictionary
Delete Subchain Groups

Delete Subchain Groups


Scope: All modes
Usage
DELete Subchain Groups subchain_group_name … | -All
Description
Removes a scan sub-chain group.
The Delete Subchain Groups command removes sub-chain groups added by means of the Add
Subchain Group command. To determine whether there are any current scan sub-chain groups,
use the Report Subchain Groups command.
Arguments
• subchain_group_name
A repeatable string that specifies the names of the sub-chain group definitions to be deleted.
• -All
A switch that removes all sub-chain group definitions.
Examples
The following example removes a sub-chain group definition:
add subchain group subchaingroup1 subchain1 subchain2 -fixed
add subchain group subchaingroup2 subchain3 subchain4 -flexible
report subchain groups
-----------------------------------------------
SubchainGroupName Type ListOfSubchains ----------------------------
-------------------
subchaingroup1 fixed subchain1
subchain2
subchaingroup2 flexible subchain3
subchain4

delete subchain group subchaingroup1

Related Commands
Add Subchain Group Report Sub Chains
Add Sub Chains Report Subchain Groups
Delete Sub Chains

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May 2007
Command Dictionary
Delete Test Points

Delete Test Points


Scope: Setup mode
Usage
DELete TEst Points {-All | testpoint_pin_name…} [-Full | -Control | -Observe | -Lockup]
[-Partition_scan_identified]
Description
Remove the test point definitions at the specified locations.
If you do not specify -Control, -Observe, or -Lockup with either the testpoint_pin_name or the
-All option, DFTAdvisor uses the default -Full value. The -Full means that DFTAdvisor
removes all the control and observe test points, and lockup latches at the location(s) you specify.
This command removes both user-defined and system-defined test points. You can create user-
defined test points with the Add Test Points command. You can enable DFTAdvisor to
automatically identify test points by using a combination of the Setup Scan Identification, Setup
Test_point Identification, Setup Test_point Insertion, and Run commands.
Arguments
• -All
A switch that specifies to remove the control and/or observe test points from all locations.
• testpoint_pin_name
A repeatable string that specifies the locations where you want DFTAdvisor to remove the
control and/or observe test points.
• -Full
An optional switch that specifies to remove both the control and observe test points from the
locations that you specify. This is the default.
• -Control
An optional switch that specifies to remove the control test points from the locations that
you specify.
• -Observe
An optional switch that specifies to remove the observe test points from the locations that
you specify.
• -Lockup
An optional switch that specifies to remove the added lockup latch.
• -Partition_scan_identified
An optional switch that specifies to remove the test points that have been added
automatically by DFTAdvisor during the partition scan identification process. Such test
points may be added only if the -Test_points switch is specified with the Setup Partition

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Command Dictionary
Delete Test Points

Scan command. The -Control and -Observe switches can be used along with this switch to
remove either control or observe test points of this type. Otherwise, the -Full switch is
assumed.
Examples
The following example creates the definition for three test points (one observe and two control),
and then removes two of the definitions:
add cell models and2a -type and
add test point /I_6_16/cp control and2a in2
add test point /I_7_16/q observe out1
add test point /I_8_16/cp control and2a in3
delete test points /I_6_16/cp /I_7_16/q

Note
The Delete Test Point command only specifies the testpoint_pin_names of the test points,
not the type. With this example, there are two types (control and observe), which are
automatically covered by the default of -Full.

Related Commands
Add Test Points Setup Scan Identification
Report Test Logic Setup Test_point Identification
Report Test Points Setup Test_point Insertion
Setup Partition Scan

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Command Dictionary
Delete Tied Signals

Delete Tied Signals


Scope: Setup mode
Usage
DELete TIed Signals {floating_object_name… | -All} [-Class {User | System | Full}] [-Pin]
Description
Removes the assigned (tied) value from the specified floating nets or pins.
The Delete Tied Signals command deletes the tied values that were previously assigned with the
Add Tied Signals command. You can delete tied values from either user class, system class, or
full classes of floating nets or pins. If you do not specify a class, the tool deletes the tied values
from the user class of floating nets or pins. To display a list of any class of tied floating nets or
pins, use the Report Tied Signals command.
When you remove the effects of a tied signal, DFTAdvisor reassigns the default tied signal
value to that object. The invocation default for tied objects is the unknown state (X), and you
can change that default with the Setup Tied Signals command.
Arguments
• floating_object_name
A repeatable string that specifies the names of the tied floating nets or pins whose tied
values you want to delete. The tool deletes all of the tied values associated with the floating
nets or pins in the class of tied floating nets or pins which you specify with the -Class
switch.
If you do not specify the -Pin option, the floating_object_name is assumed to be a net name.
If you specify a full net pathname, the tool deletes only the specified instance-based
blackbox tied signal. If you do specify the -Pin option, the floating_object_name is assumed
to be a pin name.
• -All
A switch that deletes the tied values from all tied floating nets or pins in the class of tied
floating nets or pins, which you specify with the -Class switch. This also includes all
instance-based blackbox tied signals.
• -Class User | System | Full
An optional switch and literal pair that specifies the class code of the tied floating nets or
pins that you specify. The valid literal names are as follows:
User — A literal that specifies that the list of tied floating nets or pins were previously
added by using the Add Tied Signals command. This is the default class.
System — A literal that specifies that the list of tied floating nets or pins are described in
the netlist.
Full — A literal that specifies that the list of tied floating nets or pins consist of both the
user and system class.

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Command Dictionary
Delete Tied Signals

• -Pin
An optional switch that specifies that the floating_object_name argument that you provide is
a floating pin name.
Examples
The following example deletes the tied value from the user-class tied net “vcc”; thereby leaving
“vcc” as a floating net:
add tied signals 1 vcc vdd
delete tied signals vcc -class user

Related Commands
Add Tied Signals Report Tied Signals
Delete Black Box Setup Tied Signals

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May 2007
Command Dictionary
Delete Write Controls

Delete Write Controls


Scope: Setup mode
Usage
DELete WRite Controls primary_input_pin… | -All
Description
Removes the RAM write control line off-state definitions from the specified primary input pins.
The Delete Write Controls command deletes write control line off-state definitions previously
defined with the Add Write Controls command. You can delete the write control line definitions
for specific pins or for all pins.
Arguments
• primary_input_pin
A repeatable string that specifies a list of primary input pins from which you want to delete
any write control line off-state definitions.
• -All
A switch that specifies to delete the write control line off-state definitions for all primary
input pins.
Examples
The following example deletes an incorrect write control line, and adds the correct off-state to
that write control line:
add write controls 0 w1 w2
delete write controls w1
add write controls 1 w1
set system mode dft

Related Commands
Add Write Controls Report Write Controls

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Command Dictionary
Dofile

Dofile
Scope: All modes
Usage
DOFile filename [-History]
Description
Executes the commands contained within the specified file.
The Dofile command sequentially executes the commands that are contained in a file that you
specify. This command is especially useful when you must issue a series of commands. Rather
than executing each command separately, you can place them into a file in their desired order,
and then execute them by using the Dofile command. You can also place comment lines in the
file by starting the line with a double slash (//); DFTAdvisor handles these lines as comments
and ignores them.
The Dofile command sends each command expression, in order, to the tool which in turn
displays each command from the file before executing it. If DFTAdvisor encounters an error
due to any command, the Dofile command stops and displays an error message. You can enable
the Dofile command to continue regardless of errors by setting the Set Dofile Abort command
to Off.
Arguments
• filename
A required string that specifies the name of the file that contains the commands you want
DFTAdvisor to execute.
• -History
An optional switch that specifies for the tool to add the commands from a dofile to the
command line history list. By default, the commands in a dofile are not inserted into the
history list, but the Dofile command itself is added to the list.
Examples
The following example executes all the commands from the command_file file:
dofile command_file

The command_file may contain any application command available. An example of a


command_file is as follows:
add clocks 0 clock
set system mode dft
run

Related Commands
History Set Command Editing
Save History Set Dofile Abort

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Command Dictionary
Echo

Echo
Scope: All modes
Usage
ECHo “string” [{> | >>} file_pathname]
Description
Issues a user-defined string to the transcript.
The Echo command issues a user-defined string to the transcript or to a pathname, if you use
one of the file redirection operators.
Note
Commands that use either the > or >> file redirection operator are first checked for
correctness. Syntax errors are reported to the display prior to the command’s execution.
The redirection operator does not hide these errors.

Arguments
• string
A required string. The string that you want echoed to the transcript. Double quotes are
required if the string contains spaces or special characters.
• > file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
creating or replacing the contents of file_pathname.
• >> file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
appending to the contents of file_pathname.

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Command Dictionary
Echo

Examples
The following example redirects output from several commands into a single output file,
my_scan_report. The first command creates or replaces the my_scan_report file. The second
and following commands append to the same file.
echo "----------- scan cells ------------" > my_scan_report
report scan cells >> my_scan_report
echo "----------- scan chains ----------" >> my_scan_report
report scan chains >> my_scan_report

Related Commands
History Report Scan Chains
Report Circuit Components Report Scan Groups
Report Dft Check Report Scan Pins
Report Drc Rules Report Sequential Instances
Report Environment Report Statistics
Report Primary Inputs Report Sub Chains
Report Primary Outputs Report Test Logic
Report Scan Cells Report Test Points

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May 2007
Command Dictionary
Exit

Exit
Scope: All modes
Usage
EXIt [-Discard]
Description
Terminates the current DFTAdvisor session.
The Exit command terminates DFTAdvisor and returns to the operating system. You should
either save the current netlist design before exiting DFTAdvisor or specify the -Discard switch
to not save the netlist.
If you are operating in interactive mode (not running a dofile) and you neither saved the current
netlist or used the -Discard option, DFTAdvisor displays a warning message, and you can
continue the session and save the netlist before exiting.
If you plan to load the scan design into FastScan or FlexTest, you may also want to save the
ATPG setup to identify the scan chains before exiting.
Arguments
• -Discard
An optional switch that explicitly specifies to not save the current netlist and terminate the
DFTAdvisor session.
Examples
The following example exits DFTAdvisor after performing scan chain insertion, and saving the
test procedure, dofile, and new netlist for the inserted scan chains:
add clocks 1 clk1
add clocks 0 clk0
set system mode dft
run
insert test logic
write atpg setup scan -replace
write netlist scan.edif -edif
exit

Related Commands
Write Atpg Setup Write Scan Identification
Write Netlist

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Command Dictionary
Find Design Names

Find Design Names


Scope: All modes
Usage
FINd DEsign Names regular_expression [-LOcal | -Hier] [-Design | -Netlist | -LIbrary | -All]
[-INStance | -Pin [INPut | OUtput | INOut | ALLIn | ALLOut] | -Net] [{> | >>}
file_pathname]
Description
Displays design object hierarchical names matched by an input regular expression.
This command returns all design names for an input regular expression, which may include any
number of ‘*’ or ‘?’ wildcard characters embedded in the pathname string. The ‘*’ character
matches any sequence of characters (including none) in a name, and the ‘?’ character matches
any single character.
Arguments
• regular_expression
A required regular expression which may include any number of embedded ‘*’ or ‘?’
wildcard characters.
• -LOcal
An optional switch that specifies wildcard characters only match within the current
hierarchy level.
• -Hier
An optional switch that specifies it is acceptable to match across hierarchy boundaries (i.e.,
a* matches a1/b/c). This is the default.
• -Design
An optional switch that specifies command will match only pathnames to objects at the
topmost library cell level.
• -Netlist
An optional switch that specifies command will match objects from the top of the design
down to the topmost library cell.
• -LIbrary
An optional switch that specifies command will match objects within any level of library
cells.
• -All
An optional switch that specifies command will match objects at all levels of the design.
This is the default.

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Command Dictionary
Find Design Names

• -INStance
An optional switch that specifies command will match only instance pathnames. This is the
default.
• -Pin
An optional switch that specifies command will match only pin pathnames (any pin
direction). The following optional pin filters restrict which pins are matched:
INPut — Match only input pin pathnames.
OUtput — Match only output pin pathnames.
INOut — Match only bidirectional pin pathnames.
ALLIn — Match both input and inout pin pathnames.
ALLOut — Match both output and inout pin pathnames.
• -Net
An optional switch that specifies command will match only net pathnames.
• > file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
creating or replacing the contents of file_pathname.
• >> file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
appending to the contents of file_pathname.
Examples
The following examples display object pathnames for various input wildcard expressions, given
a netlist with the following instance hierarchy:
/
tiny_i
U5
ret_i
intreg1_reg_0 ... intreg1_reg_31
add_20
U1_0 ... U1_3
add_30
U5 ... U12
mul_18
U5 ... U868
FS
U5 ... U33
mul_19
FS
U5 ... U278
U5 ... U181
mul_22
U5 ... U735
FS
U15 ...

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Command Dictionary
Find Design Names

and assuming the U5 instances all reference the following library cell:
model LSR2BUFA(Q, QN, S, R, G, SD, RD) (
input(S, R, G, SD, RD) ()
output(Q) (primitive = _buf UP1 (QT, Q);)
output(QN) (primitive = _buf UP2 (QNT, QN);)
intern(QT_int) (instance = LSI_LSR2 UD1 (QT_int, S, R, G, SD, RD);)
intern(QNT_int) (instance = LSI_LSR2N UD2 (QNT_int, S, R, G, SD, RD);)
intern(QT) (instance = LSI_NOTI UD3 (QT, QT_int);)
intern(QNT) (instance = LSI_NOTI UD4 (QNT, QNT_int);)
)

Example 1:
SETUP> find design names /ret_i/add_2* -instance -design -hier
// Note: Matched 4 names
/ret_i/add_20/U1_0
/ret_i/add_20/U1_1
/ret_i/add_20/U1_2
/ret_i/add_20/U1_3

Example 2:
SETUP> find design names /ret_i/add_2* -instance -netlist -hier
// Note: Matched 5 names
/ret_i/add_20
/ret_i/add_20/U1_0
/ret_i/add_20/U1_1
/ret_i/add_20/U1_2
/ret_i/add_20/U1_3

Finds instance add_20 under /ret_i/, and also descends the hierarchy to find all netlist instances
under /ret_i/add_20/.

Example 3:

SETUP> find design names /ret_i/add_2* -inst -netlist -local


// Note: Matched 1 names
/ret_i/add_20

This example shows that -Local doesn’t descend the hierarchy to find more matches as the
previous example does.

Example 4:

SETUP> find design names /ret_i/add_2* -ins -design -local


// Note: Matched 0 names

There are no instances of a library cell under /ret_i/ with instance name starting with add_2.

Example 5:

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Command Dictionary
Find Design Names

SETUP> find design names /ret_i/*_2? -ins -netlist -local


// Note: Matched 2 names
/ret_i/add_20
/ret_i/mul_22

Found 2 instances under /ret_i/.

Note
/ret_i/gt_68_2 did not match because the ‘?’ in the wildcard expression requires another
character after the ‘_2’.

Example 6:

SETUP> find design names */U5 -inst -design -hier


// Note: Matched 7 names
/tiny_i/U5
/ret_i/add_20/U5
/ret_i/mul_18/U5
/ret_i/mul_18/FS/U5
/ret_i/mul_19/U5
/ret_i/mul_19/FS/U5
/ret_i/mul_22/U5

Example 7:

SETUP> find design names ret_i/mul*/U5 -ins -des -local


// Note: Matched 3 names
/ret_i/mul_18/U5
/ret_i/mul_19/U5
/ret_i/mul_22/U5

Example 8:

SETUP> find design names ret_i/mul*/U5 -ins -design -hier


// Note: Matched 5 names
/ret_i/mul_18/U5
/ret_i/mul_18/FS/U5
/ret_i/mul_19/U5
/ret_i/mul_19/FS/U5
/ret_i/mul_22/U5

Example 9:

SETUP> find design names ret_i/mul_18/U5* -ins -library -hier


// Note: Matched 5 names
/ret_i/mul_18/U5
/ret_i/mul_18/U5/UD1
/ret_i/mul_18/U5/UD2
/ret_i/mul_18/U5/UD3
/ret_i/mul_18/U5/UD4

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Command Dictionary
Find Design Names

Example 10:

SETUP> find design names ret_i/mul*/U5/* -pin output -design -local


// Note: Matched 6 names
/ret_i/mul_18/U5/Q
/ret_i/mul_18/U5/QN
/ret_i/mul_19/U5/Q
/ret_i/mul_19/U5/QN
/ret_i/mul_22/U5/Q
/ret_i/mul_22/U5/QN

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Command Dictionary
Help

Help
Scope: All modes
Usage
HELp [command_name] [-MANual]
Description
Displays the usage syntax and system mode for the specified command.
The Help command displays useful information for a selected command. You can display the
usage and syntax of a command by typing Help and the command name. You can display a list
of certain groups of commands by entering Help and a keyword such as Add, Delete, Save, and
so on.
Arguments
• command_name
An optional string that consists of any keyword or command. You can use minimum typing
for the command name. If you do not supply a command_name, the default display is a list
of all the valid command names.
• -MANual
An optional string that specifies to also display the reference manual description for the
specified command. The effect is the same as if you executed the menu item, Help > On
Commands > Open Reference Page, from the GUI.
If you type HELp and include only the -MANual switch, the tool opens the product
bookcase, giving access to all the manuals for that product group.
Examples
The following example displays the usage and system mode for the Report Primary Inputs
command:
help report primary inputs
// Report primary inputs
// usage: REPort PRimary Inputs [-Class <User|System|Full>]
[-All | pin_pathname...]
// legal system modes: ALL

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Command Dictionary
History

History
Scope: All modes
Usage
HIStory [list_count] [-Nonumbers] [-Reverse] [{> | >>} file_pathname]
Description
Displays a list of previously-executed commands.
The History command is similar to the Korn shell (ksh) history command in UNIX. By default,
this command displays a list of all previously-executed commands, including all arguments
associated with each command, starting with the oldest.
Note
The HISTFILE and HISTSIZE ksh environment variables do not control the command
history of the tool. The Save History command controls where the tool stores the history
file.

You can perform command line editing if you set the VISUAL or EDITOR ksh environment
variable to either emacs, gmacs, or vi editing. Refer to the ksh(1) man page for specifics on the
various editing modes. Within the tool, you can override the ksh environment variable settings
by issuing the Set Command Editing command.
Each command line in the history list is preceded by a leading number indicating the order in
which the commands were entered.
Arguments
• list_count
An optional integer that specifies for the tool to display only the specified number
(list_count) of the most recently executed commands. If no list_count is specified, the tool
displays all previously-executed commands.
• -Nonumbers
An optional string that specifies for the tool to display the history list without the leading
numbers. This is useful for creating dofiles. The default displays the leading numbers.
• -Reverse
An optional switch that specifies for the tool to display the history list starting with the most
recent command rather than the oldest.
• > file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
creating or replacing the contents of file_pathname.

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History

• >> file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
appending to the contents of file_pathname.
Examples
The following command displays the history list with leading numbers, starting with the oldest
command.
history
1 help hist
2 dof instructor/fault.do
3 set system mode atpg
4 set fault type stuck
5 add faults -all
6 run
7 report statistics
8 report faults -class ATPG_UNTESTABLE
9 analyze fault /I$20/en -stuck_at 1
10 set system mode setup
11 set system mode atpg
12 set fault type iddq
13 add faults -all
14 run
15 report statistics
16 history

Related Commands
Echo Set Command Editing
Save History

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Command Dictionary
Insert Test Logic

Insert Test Logic


Scope: Dft mode
Prerequisites: To use the -Verilog switch, you must have defined a buffer model with the Add
Cell Models command or with a cell_type attribute.
Usage
INSert TEst Logic [filename [-Fixed]] [-Scan {ON | OFf}] [-Test_point {ON | OFf}] [-Ram
{ON | OFf}] {[-NOlimit] | [-MAx_length integer] | [-NUmber [integer]]} [-Clock
{Nomerge | Merge}] [-Edge {Nomerge | Merge}] [-COnnect {ON | OFf | Tied | Loop |
Buffer}] [-Output {Share | New}] [-MOdule {Norename | Rename}] [-Verilog]
[-Hierarchical {OFf | ON} [-Tolerance integer_percent]] [-NEw_scan_po]
[-Keep_original_net]
Description
Inserts the test structures that you define into the netlist to increase the design’s testability.
The purpose of DFTAdvisor is to perform tasks that modify the design to increase the fault
coverage (testability) of the design. There are several ways that it can aid in increasing a
design’s fault coverage. The primary purpose of DFTAdvisor is to identify sequential cells that
DFTAdvisor can replace with corresponding scan cells and then stitch together into a scan
chain.
In addition to scan cell replacement and stitching, DFTAdvisor can also perform two other tasks
with the Insert Test Logic command that can increase the design’s testability. DFTAdvisor
supports the adding of test points (both system-defined and user-defined), and it supports the
automatic adding of test logic. For more information on scan replacement, test points, and test
logic, refer to the Scan and ATPG Process Guide.
For information on test point insertion, refer to “Automatically Choosing Control and Observe
Points” in the Scan and ATPG Process Guide.
For information on handling pre-inserted scan cells, refer to “Specifying Existing Scan Cells” in
the Scan and ATPG Process Guide.
The default behavior of DFTAdvisor is to partition the scan cells over the scan chains without
considering the hierarchical distribution of the sub-modules in the circuit. This is called flat
partitioning and it may cause different instances of a sub-module to have a different number of
scan chains. As a result, when the final scan-inserted netlist is written out, DFTAdvisor
generates unique module definitions for the different instances of the same sub-module.
To decrease, or prevent, the “uniquification” of module definitions that originate from flat scan
cell partitioning, turn on the -Hierarchical switch. Hierarchical partitioning is not deployed
when the “filename [-Fixed]” option is used. Hierarchical partitioning is recommended over flat
partitioning unless the circuit has previously inserted chains and/or test points. These previously
inserted elements can have an arbitrary distribution in the circuit and can therefore cause
uniquification of modules.

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Insert Test Logic

There could be reasons to use flat partitioning, depending on your design. For instance, flat
partitioning places cells that have direct access to primary outputs at the end of the chains. This
can reduce the number of scan output pins that DFTAdvisor creates.
Hierarchical partitioning can cause an increased number of scan inputs and outputs for the sub-
modules, which could be an issue for your design. If this is the case, use the -Tolerance switch.
Specifying an integer percentage of tolerance allows DFTAdvisor to create chain lengths
shorter or longer than their ideal length (total number of cells divided by the specified number
of chains), which can reduce the number of chains per sub-module, and, thus, the
interconnections between sub-modules.
One possible result of using a tolerance other than 0 is a variation of the number of scan chains
at the top level. The differences from the ideal length for each chain accumulate at the last chain
during the insertion process. A specified high tolerance can cause the removal or the unwanted
lengthening of the last chain. To see the before and after effect of the -Tolerance option, use the
Report Scan Chains command.
Arguments
• filename -Fixed
An optional string and associated optional switch that specify the name of the ASCII file
that lists the scan instances that you want DFTAdvisor to stitch together. This file can
contain information regarding scan cell ordering along with which instances are to be in
each scan chain.
Note
If you use this file, it must contain all instances you want stitched. If you do not specify a
filename, DFTAdvisor stitches all non-scan cells that it has identified and mapped to scan
cells into a scan chain using the settings of the other Insert Test Logic arguments.

The -Fixed switch specifies for DFTAdvisor to stitch the scan instances in the fixed order
that is given in the filename. The default scan cell ordering is based on hierarchical rules, but
within a hierarchical block the scan cell ordering is random. When using the -Fixed option,
it also ignores certain scan input/output mapping performed by the Add Scan Pins
command. For more information, refer to “Naming Scan Input and Output Ports” in the
Scan and ATPG Process Guide.
The filename that you specify must list one instance per line and use the following format
(all on one line):
instance_pathname cell_id chain_id [&sub_chain_name]
[{+|-}[lockup_latch_model]]

instance_pathname — A string that specifies the name of the non-scan cell that you
want DFTAdvisor to put in the scan chain.
cell_id — An integer that specifies the placement of the instance_pathname in relation
to other instance_pathnames. DFTAdvisor places the instance having the smallest
cell_id closest to the scan chain output. All instances in the same chain must have
unique cell_ids.

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Insert Test Logic

chain_id — An integer that specifies the scan chain in which you want DFTAdvisor to
place the instance_pathname. DFTAdvisor places instances with the same chain_id
in the same chain.
&sub_chain_name — An optional special character and string that specifies the name of
the sub-scan chain you defined with the Add Sub Chains command. You need to
specify the sub-chain name when more than one sub-chain is defined for a sub-
module or a hierarchical instance. No space is allowed between the ampersand (&)
and the sub_chain_name argument.
{+|-}[lockup_latch_model] — An optional special character and an additional optional
string that specifies the location of the lockup latch. The +|- argument specifies that a
lockup latch is to be added to the scan out of the current instance_pathname. No
space is allowed between the +|- and the lockup_latch_model name. Note that if you
define a lockup latch in this file, you must specify every location that you want to
insert lockup latches. If no lockup latches are defined in this file, DFTAdvisor uses
the settings in the Set Lockup Latch and Insert Test Logic commands. In such case, if
you want DFTAdvisor to automatically insert lockup latches in necessary locations,
you should use the “-Clock/-Edge merge” option(s) with the Insert Test Logic
command. For more information on inserting lockup latches, refer to the Set Lockup
Latch command and “Merging Chains with Different Shift Clocks” in the Scan and
ATPG Process Guide.
+ — Specifies to use the clock used by the instance_pathname with the next lower
cell_id. The next lower cell_id, refers to the a non-scan cell which will be
connected to the scan out of the current instance_pathname.
- — Specifies to use the clock used by the instance_pathname.
lockup_latch_model — Specifies the name of the lockup latch model to use. The
specified lockup latch must be defined by the Add Cell Models command or
defined in the ATPG library using the cell_type attribute. If the
lockup_latch_model is not specified, the first model in the defined latch model list
is used.
• -Scan ON | OFf
An optional switch and literal pair that specifies whether DFTAdvisor replaces the
identified non-scan cells (scan candidates) with the corresponding scan cells. The valid
literals are as follows:
ON — A literal that enables DFTAdvisor to replace the identified non-scan cells (scan
candidates) with the corresponding scan cells. This is the default.
OFf — A literal that disables DFTAdvisor from replacing the identified non-scan cells
(scan candidates) with the corresponding scan cells.
• -Test_point ON | OFf
An optional switch and literal pair that specifies whether DFTAdvisor adds the identified
test logic and test points into the design. The valid literals are as follows:
ON — A literal that enables DFTAdvisor to add the identified test logic and test points
into the design. This is the default.

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OFf — A literal that disables DFTAdvisor from adding the identified test logic and test
points into the design.
• -Ram ON | OFf
An optional switch and literal pair that specifies whether DFTAdvisor adds the identified
test logic gates that are necessary to allow the ATPG tools access to the write control lines
of the RAMs. The valid literals are as follows:
ON — A literal that enables DFTAdvisor to add the identified test logic gates for RAM
write control line access. This is the default.
OFf — A literal that disables DFTAdvisor from adding the identified test logic gates for
RAM write control line access.
• -NOlimit
An optional switch specifying that the scan chain has no limit on the number of scan cells it
contains. This is the default.
• -MAx_length integer
An optional switch and integer pair that specifies the maximum number of scan cells that
DFTAdvisor can stitch into a scan chain. DFTAdvisor evenly divides the scan cells into
scan chains that are smaller than the max_length integer. Final results depend upon the
number of scan candidates.
• -NUmber integer
An optional switch and integer pair that specifies the exact number of scan chains that you
want DFTAdvisor to insert. Final results depend upon the number of scan candidates. The
default number of chains is 1.
• -CLock Nomerge | Merge
An optional switch and literal pair that specifies whether DFTAdvisor uses different clocks
on the same scan chain. If you turn on multiple scan enables using the Set Multiple
Scan_enables command, this argument is also used to determine the number of scan enable
signals. The two valid literals are as follows:
Nomerge — A literal that specifies to not use different clocks on the same scan chain.
This is the default.
Merge — A literal that specifies to use different clocks on the same scan chain.
• -Edge Nomerge | Merge
An optional switch and literal pair that specifies whether DFTAdvisor merges stable high
chains into stable low chains. If you turn on multiple scan enables using the Set Multiple
Scan_enables command, this argument is also used to determine the number of scan enable
signals. The two valid literals are as follows:
Nomerge — A literal that specifies to not merge stable high chains into stable low
chains. This is the default.
Merge — A literal that specifies to merge stable high chains into stable low chains.

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• -COnnect ON | OFf | Tied | Loop | Buffer


An optional switch and literal pair that specifies whether DFTAdvisor stitches the scan cells
together into a scan chain. The valid literals for stitching the scan chain are as follows:
ON — A literal that specifies for DFTAdvisor to replace the identified non-scan cells
with their corresponding scan replacements and to stitch those scan cells together into
a scan chain. This is the default.
OFf — A literal that specifies for DFTAdvisor to replace the identified non-scan cells
with their corresponding scan replacements, but not stitch those scan cells together
into scan chains.
Tied — A literal that specifies for DFTAdvisor to replace the identified non-scan cells
with their corresponding scan replacements, but not stitch those scan cells together
into scan chains. This option has DFTAdvisor tie the input/output scan pins to
ground.
Loop — A literal that specifies for DFTAdvisor to replace the identified non-scan cells
with their corresponding scan replacements, but not stitch those scan cells together
into scan chains. This option has DFTAdvisor connect the scan_out pin to its own
scan_in pin as a self-loop.
Buffer — A literal that specifies for DFTAdvisor to replace the identified non-scan cells
with their corresponding scan replacements, but not stitch those scan cells together
into scan chains. This option has DFTAdvisor connect the scan_out pin to its own
scan_in pin as a self-loop with a buffer in between.
• -Output Share | New
An optional switch and literal pair that specifies how DFTAdvisor creates scan out ports on
modules. The valid literals are as follows:
Share — A literal specifying that DFTAdvisor may use an existing module output port
on modules for scan out, if that port is directly connected to the scan out of a scan
cell. This is the default.
New — A literal specifying that DFTAdvisor should always create a new output port for
scan out.
Note
If you want DFTAdvisor to only create new scan output ports on the top-level module,
use the -NEw_scan_po switch, instead of the -Output switch.

• -MOdule Norename | Rename


An optional switch and literal pair that specifies how to name the modified module. The
valid literals are as follows:
Norename — A literal specifying that DFTAdvisor should use the original module
name, if it uses only one type of module modification, and that the original module is
no longer used in the design. This is the default.
Rename — A literal specifying that DFTAdvisor should always rename a module if it
modifies the module.

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Insert Test Logic

• -Verilog
An optional switch that specifies to DFTAdvisor that the final output netlist format will be
Verilog, so that DFTAdvisor knows to insert a buffer instance for any scan output pin in any
module in the design hierarchy, if that pin also fans out as the module’s functional output.
Without this switch, DFTAdvisor uses the Verilog ‘assign’ statement to generate this scan
output signal from the functional output. However, some layout tools do not support the
Verilog assign statement, thus the -Verilog switch is required so that DFTAdvisor will use a
buffer instantiation and avoid using the assign statement.
Before using this command and switch, you must have defined a buffer model with the Add
Cell Models command or with a cell_type attribute.
• -Hierarchical {OFf | ON} [-Tolerance integer_percent]
An optional switch and literal pair, with an associated optional switch and integer pair, that
specify whether DFTAdvisor considers the design hierarchy when partitioning identified
scan cells across the scan chains, and the allowable percentage variation from the ideal
chain length. The valid arguments are as follows:
OFf — A literal that specifies to not consider hierarchy when performing scan cell
partitioning. This is the invocation default, which implicitly specifies flat partitioning.
Flat partitioning does not guarantee that identical instances will have the same
module definition after scan insertion.
ON — A literal that specifies for DFTAdvisor to perform hierarchical partitioning. The
tool tries to insert the same scan chains into identical sub-module instances in the
design, so that the instances share the same scan-inserted module definition when the
tool generates the scan-inserted netlist.
-Tolerance integer_percent — An optional switch and integer pair that specifies the
percentage deviation that DFTAdvisor can vary from the ideal chain length when
creating the chains. A non-zero percentage allows DFTAdvisor to vary the chain
lengths (shorter or longer), which can also result in fewer chains.
integer_percent — An integer percentage. The default value is 0, which causes
DFTAdvisor to create chains with the ideal length.
• -NEw_scan_po
An optional switch that specifies for DFTAdvisor to create new scan primary output pins
even though existing functional outputs are available to use as scan outputs. The switch is a
special case of the -Output switch used with “New” literal, as it performs new scan output
port creation only on the top-level module, instead of all modules.
• -Keep_original_net
An optional switch that specifies for DFTAdvisor to insert a buffer in the scan path, between
the last scan cell at the top-level and the top-level scan output pin, when the scan cell output
has no connection to top-level but has a functional connection to other logic. The buffer
insertion is done to prevent renaming the original net that the scan cell is connected to the
other logic with. When this switch is not specified, DFTAdvisor renames the original net
same as the primary output pin that it creates as scan output port.

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Insert Test Logic

Examples
The following example identifies 50 percent of the scannable sequential instances during the
Run command, and then uses the Insert Test Logic command to stitch them together into scan
chains with a maximum length of 10 scan cells each:
add clocks 0 clock
set system mode dft
setup scan identification sequential atpg -percent 50
run
insert test logic -scan on -max_length 10

The following example causes the insertion of three scan chains using hierarchical partitioning
with a 5 percent tolerance:
insert test logic -clock merge -edge merge -number 3 -hierarchical on
-tolerance 5

Related Commands
Add Scan Instances Setup Scan Identification
Add Scan Pins Setup Scan Insertion
Add Test Points Setup Test_point Identification
Report Scan Chains Setup Test_point Insertion
Set Test Logic

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Command Dictionary
Printenv

Printenv
Scope: All modes
Usage
PRIntenv
Description
Prints out the values of the UNIX variables in the environment.
The DFTAdvisor Printenv command allows the UNIX printenv command to be available as a
common DFT command, for convenience in displaying UNIX environment variables. UNIX
environment variables are automatically available as variable references within DFTAdvisor.
For information on how to define, reference, and report on a variable’s value, see the Report
Variables command.
Examples
The following example prints out the values of the UNIX variables in the environment:
printenv

Related Commands
Report Variables

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Command Dictionary
Read Procfile

Read Procfile
Scope: All modes except Setup mode
Usage
REAd PRocfile proc_filename
Description
Reads the specified test procedure file.
The Read Procfile command specifies for the tool to read the test procedure file. The tool
merges the new procedure and timing data contained in the file with the existing data loaded
from previously-read test procedure files. Information loaded with this command is used by the
Write Atpg Setup command.
Arguments
• proc_filename
A required path and filename of the test procedure file to read.
Examples
The following example reads the test procedure file specified:
read procfile my_file.proc

Related Commands
Add Scan Groups Write Atpg Setup
Report Procedure Write Procfile
Report Timeplate

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Command Dictionary
Read Scan Order

Read Scan Order


Scope: Dft mode
Usage
REAd SCan Order {-Def | -Fixed} filename
Description
Reads the specified DEF or fixed-order file.
The Read Scan Order command provides the functionality of reading a DEF file or the older
fixed-order file.
Note
Currently, only an ordered scan chain representation is accepted by DFTAdvisor. A
layout-based partitioning algorithm is not included.

Arguments
• -Def | -Fixed
A required switch that provides the functionality of reading a DEF file or a fixed-order file.
• filename
A required string that specifies the name of the file from which DFTAdvisor reads the scan
instances.
Examples
The following example reads in a DEF file:
read scan order -def deffilename
synthesize

Related Commands
Write Scan Order

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Command Dictionary
Report Black Box

Report Black Box


Scope: All modes
Usage
REPort BLack Box -Instance [ins_pathname] | -Module [module_name] | -All | -Undefined
[{> | >>} file_pathname]
Description
Displays information on blackboxes and undefined models.
The Report Black Box command reports on the status of any instance- or module-based
blackboxes, or undefined models that are not yet blackboxed. The report follows the following
format.
MODULE: module_name (default tie value = 0|1|X|Z)
SYSTEM: Inout|Output pin pin_name tied to 0|1|X|Z
USER: Inout|Output pin pin_name tied to 0|1|X|Z
INSTANCE: ins_name (default tie value = 0|1|X|Z)
SYSTEM: Inout|Output pin pin_name tied to 0|1|X|Z
USER: Inout|Output pin pin_name tied to 0|1|X|Z

For module-based blackboxes, the tool displays the string MODULE followed by the name of
the module and the default tie value (0, 1, X, or Z). The tool then displays a list of module pins.
For each pin, the tool displays either SYSTEM or USER followed by the direction type of the
pin (Inout or Output), the name of the pin, and its tied value. SYSTEM declares that the pin is
tied to the default value by the system, while USER declares that you explicitly tied the pin to
the specified value.
For instance-based blackboxes, the report replaces the string MODULE with INSTANCE to
explicitly declare that it is an instance-based blackbox.
Arguments
• -Instance [ins_name]
A switch and optional string that specify for the tool to display information on instance-
based blackboxes. If you do not supply an ins_name, LBISTArchitect displays information
on all instance-based blackboxes. If you specify an instance pathname, it reports on that
single, instance-based blackbox.
• -Module [module_name]
A switch and optional string that specify for the tool to display information on module-
based blackboxes. If you do not supply a module_name, LBISTArchitect displays
information on all module-based blackboxes. If you specify a module_name, it reports on
that single, module-based blackbox.
• -All
A switch that specifies for the tool to display information on all defined blackboxes and
undefined models. This is the default.

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Command Dictionary
Report Black Box

• -Undefined
A switch that specifies for the tool to display information on undefined models which have
not yet been blackboxed. Use this switch to determine whether your design is complete, or is
missing library models. If you intend to blackbox undefined models, this report allows you
to verify that only the intended models are undefined.
• > file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
creating or replacing the contents of file_pathname.
• >> file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
appending to the contents of file_pathname.
Examples
The following example defines module- and instance-based blackboxes, then reports on them.
add black box -module core -pin do1 0 -pin io1 1
add black box -instance core1 1 -pin do0 0 -pin io0 0
report black box -all
MODULE: core (default tie value = X)
SYSTEM: Output pin do0 tied to X
USER: Output pin do1 tied to 0
SYSTEM: Inout pin io0 tied to X
USER: Inout pin io1 tied to 1
INSTANCE: core1 (default tie value = 1)
USER: Output pin do0 tied to 0
SYSTEM: Output pin do1 tied to 1
USER: Inout pin io0 tied to 0
SYSTEM: Inout pin io1 tied to 1

Related Commands
Add Black Box Report Tied Signals
Delete Black Box

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Command Dictionary
Report Buffer Insertion

Report Buffer Insertion


Scope: All modes
Usage
REPort BUffer Insertion
Description
Displays a list of all the different scan test pins and the corresponding fanout limit.
The Report Buffer Insertion command shows either the default setting (infinity) for each type of
scan test pin or the new limit you set with the Add Buffer Insertion command.
Examples
The following example changes the fanout limit with the Add Buffer Insertion command, then
reports the new setting; all the remaining settings are left at the default (infinity):
add buffer insertion 7 sen -model buf1a
report buffer insertion
scan_enable 7 buf1a
scan_clock <infinity>
test_enable <infinity>
test_clock <infinity>
scan_master_clock <infinity>
scan_slave_clock <infinity>
hold_enable <infinity>

Related Commands
Add Buffer Insertion Delete Buffer Insertion

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Command Dictionary
Report Cell Models

Report Cell Models


Scope: All modes
Usage
REPort CEll Models [-All | {-Type cell_model_type}]
Description
Displays a list of either all cell models or the DFT library models associated with the specified
cell type.
The Report Cell Models command displays the cell models that you either added with the Add
Cell Models command, or described in the DFT library with the cell_type attribute.
Arguments
• -All
An optional switch that specifies to display all cell model definitions that you added with
the Add Cell Models command. This is the default.
• -Type cell_model_type
An optional switch and literal pair that specifies to display a listing of all the cell models of
a particular type. The valid cell_model_types are as follows (with the minimum typing
characters shown in uppercase):
INV — A literal that specifies a one-input inverter gate.
And — A literal that specifies a two-input AND gate.
Buf — A literal that specifies a one-input buffer gate.
OR — A literal that specifies a two-input OR gate.
NAnd — A literal that specifies a two-input NAND gate.
NOr — A literal that specifies a two-input NOR gate.
Xor — A literal that specifies an exclusive OR gate.
INBuf — A literal that specifies a primary input buffer gate that DFTAdvisor inserted
whenever the tool added new input pins (such as the scan input or scan enable pins).
OUtbuf — A literal that specifies a primary output buffer gate that DFTAdvisor
inserted whenever the tool added new output pins (such as the scan output pin).
Mux — A literal that specifies a 2-1 multiplexer.
Scancell — A literal that specifies a cell with four input pins (clock, data, scan in, and
scan enable), clocked scan cell with four inputs (clock, data, scan clock, and scan
enable), or LSSD scan cell with five inputs (clock, data, scan in, master clock, and
slave clock).
DFf — A literal that specifies a D flip-flop with two input pins (clock and data).
DLat — A literal that specifies a D latch with two input pins (enable and data).

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Report Cell Models

Examples
The following example displays a list of all added cell models:
add clocks 0 clk
set test Logic -set on -re on -clock on
set system mode dft
report dft check
add cell models and2 -type and
add cell models or2 -type or
add cell models mux21h -type mux s a b
add cell models nor2 -type nor
report cell models
insert test logic

Related Commands
Add Cell Models Set Test Logic
Delete Cell Models

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Command Dictionary
Report Circuit Components

Report Circuit Components


Scope: All modes
Usage
REPort CIrcuit Components {[-INStances] {[-INDent | -Noindent] [-Level integer]}} |
[-Modules] [{> | >>} file_pathname]
Description
Displays information about the components of the circuit as either modules or instances.
Note
Report Circuit Components reports only on components in the circuit; it does not report
on library components.

When you use the -Instances switch, the command prints out instance names, module names,
and the level of hierarchy at which they exist. The default formatting is Indent. Note that the
tool prints the string -top- as the name for the top-level instance.
When you use the -Modules switch, the command prints out the module names and the number
of instantiations of each module.
Arguments
• -INStances [-INDent | -Noindent] [-Level integer]
An optional switch with an optional switch and an optional switch and integer pair that
specify to report on the module instances in the design, based on the design hierarchy. This
is the invocation default.
-INDent — An optional switch that specifies to print the report using code-like
indention. This switch works only with the -Instances switch. -Indent is the default.
-Noindent — An optional switch that specifies to print the report without using
indention. This switch works only with the -Instances switch.
-Level — An optional switch and integer pair that specifies to filter the printing based on
the hierarchy level specified by integer. This switch works only with the -Instances
switch.
integer — An optional integer that specifies the hierarchy level at which you want
the report to start. The report will show all instances whose level number is
greater than integer; that is, levels that are at or lower in the hierarchy than
integer. The default value for integer is 0, the top level.
• -Modules
An optional switch that specifies to report on the modules, listing their names and the
number of instantiations of each module in the design.

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Report Circuit Components

• > file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
creating or replacing the contents of file_pathname.
• >> file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
appending to the contents of file_pathname.
Examples
The following example displays a circuit component report, in indented format, of instances at
and below level 0 in the hierarchy:
report circuit components
------------------------------------------------------------
Output Format: InstanceName (ModuleName) [HierarchyLevel]
------------------------------------------------------------
-top- (m8051) [0]
u10 (m3s018bo) [1]
u11 (m3s019bo) [1]
u5 (m3s006bo) [1]
u4 (m3s005bo) [1]
u3 (m3s004bo) [1]
u14 (m3s025bo) [1]
u13 (m3s023bo) [1]
u9 (m3s015bo) [1]
u4 (m3s016bo) [2]
u3 (m3s016bo) [2]
u2 (m3s016bo) [2]
u1 (m3s016bo) [2]
u12 (m3s020bo) [1]
u1 (m3s014bo) [2]
u7 (m3s008bo) [1]
u2 (m3s039bo) [2]
u1 (m3s009bo) [2]
u6 (m3s007bo) [1]
u2 (m3s003bo) [1]
u15 (m3s028bo) [1]
u8 (m3s010bo) [1]
select_program_source_gt_301 (m3s010bo_DW01_cmp2_8_0) [2]
u2 (m3s013bo) [2]
u1 (m3s011bo) [2]
u1 (m3s001bo) [1]

The following example displays a circuit component report, in non-indented format, of


instances at and below level 1 in the hierarchy:
report circuit components -instance -noindent -level 1
------------------------------------------------------------
Output Format: InstanceName (ModuleName) [HierarchyLevel]
------------------------------------------------------------
u10 (m3s018bo) [1]
u11 (m3s019bo) [1]
u5 (m3s006bo) [1]

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Report Circuit Components

u4 (m3s005bo) [1]
u3 (m3s004bo) [1]
u14 (m3s025bo) [1]
u13 (m3s023bo) [1]
u9 (m3s015bo) [1]
u4 (m3s016bo) [2]
u3 (m3s016bo) [2]
u2 (m3s016bo) [2]
u1 (m3s016bo) [2]
u12 (m3s020bo) [1]
u1 (m3s014bo) [2]
u7 (m3s008bo) [1]
u2 (m3s039bo) [2]
u1 (m3s009bo) [2]
u6 (m3s007bo) [1]
u2 (m3s003bo) [1]
u15 (m3s028bo) [1]
u8 (m3s010bo) [1]
select_program_source_gt_301 (m3s010bo_DW01_cmp2_8_0) [2]
u2 (m3s013bo) [2]
u1 (m3s011bo) [2]
u1 (m3s001bo) [1]

The following example displays a circuit component report of the design’s modules, and the
number of instantiations of each:
report circuit components -module
----------------------------------------------------
Output Format: ModuleName [NumberOfinstantiations]
----------------------------------------------------
m8051 [0]
m3s028bo [1]
m3s025bo [1]
m3s023bo [1]
m3s020bo [1]
m3s014bo [1]
m3s019bo [1]
m3s018bo [1]
m3s015bo [1]
m3s016bo [4]
m3s010bo [1]
m3s010bo_DW01_cmp2_8_0 [1]
m3s013bo [1]
m3s011bo [1]
m3s008bo [1]
m3s039bo [1]
m3s009bo [1]
m3s007bo [1]
m3s006bo [1]
m3s005bo [1]
m3s004bo [1]
m3s003bo [1]
m3s001bo [1]

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Report Circuit Components

Related Commands
Echo

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Report Clock Groups

Report Clock Groups


Scope: Dft mode
Usage
REPort CLock Groups
Description
Displays a list of all clock group definitions.
The Report Clock Groups command displays a list of all clock groups added with the Add
Clock Groups command.
Examples
The following example displays a list of clock groups after they have been added to the clock
list:
add clocks 1 clk1 clk2 clk3
add clocks 0 clr1 clr2 pre1 pre2
set system mode dft
.
.
add clock groups group1 clk1 clr1 pre1
add clock groups group2 clk2 clr2 pre2
report clock groups
group2: clk2 clr2 pre2
group1: clk1 clr1 pre1
all_clocks: clk3

Related Commands
Add Clock Groups Delete Clock Groups

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Command Dictionary
Report Clocks

Report Clocks
Scope: All modes
Usage
REPort CLocks [-Display {DEBug | DESign | DAta | ALl}]
Description
Displays a list of all clock definitions.
The Report Clocks command displays a list of all clocks added with the Add Clocks command.
Arguments
• -Display {DEBug | DESign | DAta | ALl}
A switch and literal that displays the reported information graphically in the specified
DFTVisualizer window(s). The choices are as follows:
DEBug — Debug window
DESign — Design window
DAta — Data window
ALl— A literal that displays the information in all of the preceding windows.
See “Using DFTVisualizer” for more information.
Examples
The following example displays a list of clocks after they have been added to the clock list:
add clocks 1 clk1
add clocks 0 clk0
report clocks
clk1, off_state 1
clk0, off_state 0

Related Commands
Add Clocks Delete Clocks

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Command Dictionary
Report Control Signals

Report Control Signals


Scope: Dft mode
Usage
REPort COntrol Signals {[-All] | {[pin_pathname…] [-Clock] [-Set] [-Reset] [-Write] [-Read]
[-Tristate_enable]} [-Verbose] [-NOSTABLE_High] [-NOSTABLE_Low]
Description
Displays the rules checking results for the specified control signals.
The Report Control Signals command displays the rules checking results for control signals
consisting of clocks added with the Add Clocks command and pins identified for gating
scannable memory elements with test logic.
Arguments
• -All
An optional switch that specifies to report on all control signals. This is the default.
• pin_pathname
An optional, repeatable string that specifies the pathnames of control signal signals for
which you want a report.
• -Clock
An optional switch that specifies to report on all clock control signals.
• -Set
An optional switch that specifies to report on all set control signals.
• -Reset
An optional switch that specifies to report on all reset control signals.
• -Write
An optional switch that specifies to report on all write control signals.
• -Read
An optional switch that specifies to report on all read control signals.
• -Tristate_enable
An optional switch that specifies to report on all tristate enable signals.
• -Verbose
An optional switch that specifies to include all memory elements associated with each
control signal in the report.
• -NOSTABLE_High
An optional switch that specifies not to report on any stable-high memory elements.

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Report Control Signals

• -NOSTABLE_Low
An optional switch that specifies not to report on any stable-low memory elements.
Related Commands
Add Clocks Report Dft Check
Delete Clocks

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Report Dft Check

Report Dft Check


Scope: Dft mode
Usage
REPort DFt Check [-All | instance_pathname] [-FUll | -Scannable | -Nonscannable | {-Defined
{Scan | Nonscan} | -Identified | -Unidentified | {-RUle {S1 | S2 | S3 | S4}} | -Tristate |
-RAm] [{> | >>} file_pathname]
Description
The Report Dft Check command generates scannability check information for all non-scan
instances in the design, or within a specific hierarchical instance. The displayed or written
report includes six columns of information as described here:
• The first column displays whether the DFT Rules Checker identified the non-scan
instance as scannable or non-scannable.
• The second column displays whether the non-scan instance is unidentified, identified by
the scan identification process, or defined as non-scannable or scannable with the Add
Nonscan Instances and Add Scan Instances commands, respectively.
• The third column displays the clock that is associated with the non-scan instance, or
displays “Test-Logic” to specify that test logic will be added to make the instance
scannable. If the non-scan instance is identified as non-scannable, the third column
displays the design rule ID number, where the non-scan instance failed the clock rules.
The gate index number of the non-scannable instance is also shown, as well as the set,
reset or clock primary inputs to the memory element that failed the rules checking.
• The fourth column displays the instance name of the non-scan instance.
• The fifth column displays the library model name associated with the instance.
• The sixth column displays “Stable-high” if the clock inputs of the non-scan instances are
at a one-state, with respect to the clock primary inputs.
An example of the output of this command, along with additional information, is covered in
“Reporting Scannability Information” in the Scan and ATPG Process Guide.
Arguments
• -All
An optional switch that specifies to display all non-scan instances for the entire design. This
is the default.
• instance_pathname
An optional string that specifies to report scannability information for the specified instance.
If the instance pathname specifies a hierarchical instance, DFTAdvisor generates
scannability information for all instances within that hierarchical block. If the instance

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Report Dft Check

pathname specifies a particular sequential instance, DFTAdvisor generates scannability


information for only that instance.
• -Full
An optional switch that specifies to display the full scannability check information for all
non-scan instances. This is the default.
• -Scannable
An optional switch that specifies to display the non-scan instances that DFTAdvisor has
identified during the rules checking process to be scannable.
• -Nonscannable
An optional switch that specifies to display the non-scan instances that DFTAdvisor has
identified during the rules checking process to be non-scannable.
• -Defined Scan | Nonscan
An optional switch and literal pair that specifies whether to display user-defined scan or
non-scan instances. The valid literals are as follows:
Scan — A literal that specifies to display scan instances defined with the Add Scan
Instances command.
Nonscan — A literal that specifies to display non-scan instances defined with the Add
Nonscan Instances command.
• -Identified
An optional switch that displays identified non-scan instances.
• -Unidentified
An optional switch that displays unidentified non-scan instances.
• -RUle S1 | S2 | S3 | S4
An optional switch and literal that specifies which non-scannable cell violations to report.
For more information on S1, S2, S3, and S4 rule violations, refer to “Scannability Rules” in
the Design-for-Test Common Resources Manual.
• -Tristate
An optional switch that displays the enable lines of tri-state gates connected to the outputs of
memory elements.
• -RAm
An optional switch that displays the RAM gates identified to be controllable through test
logic insertion.
• > file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list that
for creates or replaces the contents of file_pathname.

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• >> file_pathname
An optional redirection operator and pathname pair used at the end of the argument list to
append to the contents of file_pathname.
Examples
The following example displays the scannability check for all non-scan instances in the design:
add clocks 1 clk1
add clocks 0 clk0
set system mode dft
report dft check
SCANNABLE DEFINED-NONSCAN /CLK1 /U1 FD1
SCANNABLE IDENTIFIED /CLK1 /U2 FD1
SCANNABLE UNIDENTIFIED /CLK1 /U3 FD1
SCANNABLE DEFINED-SCAN /CLK1 /U4 FD1
SCANNABLE UNIDENTIFIED /CLK2 /U5 FD1
SCANNABLE IDENTIFIED /CLK2 /U6 FD1
NON-SCANNABLE UNIDENTIFIED S1 /U7 FD2 (34)
Clock #1: /CLK3 (11)
Number of non-scannable instances fails on S1 rule = 1
Number of instances found = 1
Number of instances reported = 1

Related Commands
Echo Report Sequential Instances
Report Drc Rules

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Command Dictionary
Report Drc Rules

Report Drc Rules


Scope: All modes
Usage
REPort DRc Rules [-Fails_summary | -Summary | rule_id… | rule_id-occurence#… |
-All_fails] [{> | >>} file_pathname]
Description
Displays either a summary of DRC violations (fails) or violation occurrence message(s).
The Report Drc Rules command displays data about design rules and DRC violations. It can
display a report in one of two formats:
• Summary report — Lists for each reported design rule, one line of data per rule, the
current number of DRC violations (fails), the violation handling, and a brief description
of the rule
• Occurrence report — Lists one or more violation occurrence messages that give details
of specific DRC violations
Table 2-4 summarizes the available information displays and the arguments you use to obtain
them. Refer to the Arguments subsection for complete details about the arguments.
Table 2-4. Available Information Displays and Arguments
Desired Display Rules/Occurrences Covered Argument
Summary Design rules that resulted in violations (fails) during -Fails_summary
report DRC
All design rules -Summary
Occurrence Specific rule, specific occurrence rule_id-occurence#
report
Specific rule, all occurrences rule_id
All occurrences -All_fails

You can use the Set Drc Handling command to change the handling of the C (clock), A (RAM),
D (data), P (procedure), T (trace), and E (extra) rules. For more information on the design rules,
refer to the “Design Rules Checking” section in the Design-for-Test Common Resources
Manual.
Arguments
• -Fails_Summary
A switch that specifies to display the following for each user-controllable rule that resulted
in a violation (fail) during DRC:
o Rule identification (ID)
o Number of failures of the rule

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o Current handling status of the rule


o Brief description of the rule
This is the command default.
Note
This switch does not display anything if there are no rule violations or the tool has not yet
performed DRC.

• -Summary
A switch that specifies to display the following for each user-controllable rule, whether or
not it resulted in a violation (fail) during DRC:
o Rule identification (ID)
o Number of failures of the rule
o Current handling status of the rule
o Brief description of the rule
• rule_id
A repeatable string that specifies the identification literal (ID) of a particular design rule for
which you want to display all violation occurrence messages.
The design rule violations and their identification literals divide into the following six
groups: RAM, Clock, Data, Extra, Scannability, and Trace rules violation IDs.
The following lists the RAM rules violation IDs. For a complete description of these
violations, refer to the “RAM Rules” section in the Design-for-Test Common Resources
Manual.
A1 — When all write control lines are at their off-state, all write, set, and reset inputs of
RAMS must be at their inactive state.
A2 — A defined scan clock must not propagate to a RAM gate, except for its read lines.
A3 — A write or read control line must not propagate to an address line of a RAM gate.
A4 — A write or read control line must not propagate to a data line of a RAM gate.
A5 — A RAM gate must not propagate to another RAM gate.
A6 — All the write inputs of all RAMs and all read inputs of all data_hold RAMs must
be at their off-state during all test procedures, except test_setup.
A7 — When all read control lines are at their off-state, all read inputs of RAMs with the
read_off attribute set to hold must be at their inactive state.
The following lists the Clock rule IDs. For a complete description of these violations, refer
to the “Clock Rules” section in the Design-for-Test Common Resources Manual.
C1 — The netlist contains the unstable sequential element in addition to the backtrace
cone for each of its clock inputs. The pin data shows the value that the tool simulates

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Report Drc Rules

when all the clocks are at their off-states, and when the tool sets all the pin constraints
to their constrained values.
C2 — The netlist contains the failing clock pin and the gates in the path from it to the
nearest sequential element (or primary input if there is no sequential element in the
path). The pin data shows the value that the tool simulates when the failing clock is
set to X, all other clocks are at their off-states, and when the tool sets all pin
constraints to their constrained values.
C3 | C4 — The netlist contains all gates between the source cell and the failing cell, the
failing clock and the failing cell, and the failing clock and the source cell. The pin
data shows the clock cone data for the failing clock.
C5 | C6 — The netlist contains all gates between the failing clock and the failing cell.
The pin data shows the clock cone data for the failing clock.
C7 — The netlist contains all the gates in the backtrace cone of the bad clock input of
the failing cell. The pin data shows the constrained values.
C8 | C9 — The netlist contains all the gates in the backtrace cone of the failing primary
output. The pin data shows the clock cone data for the failing clock.
C10 — For pulse generators and clock procedures in DRC simulation, the netlist
contains an element that is clocked more than once.
The following lists the Data rule IDs. For a complete description of these violations, refer to
the “Scan Cell Data Rules” section in the Design-for-Test Common Resources Manual.
D1 — The netlist contains all the gates in the backtrace cone of the clock inputs of the
disturbed scan cell. The pin data shows the pattern values the tool simulated when it
encountered the error.
D2 — The netlist contains all the gates in the backtrace cone of the failing gate. The pin
data shows the values the tool simulated for all time periods of the shift procedure.
D3 — The netlist contains all the gates in the backtrace cone of the failing gate. The pin
data shows the values the tool simulates for all time periods of the master_observe
procedure.
D4 — The netlist contains all the gates in the backtrace cone of the failing gate. The pin
data shows the values the tool simulates for all time periods of the skew_load
procedure.
D5 — The netlist contains the disturbed gate, and there is no pin data.
D6 | D7 | D8 — The netlist contains all the gates in the backtrace cone of the clock
inputs of the failing gate. The pin data shows the value that the tool simulates when
all clocks are at their off-states.
D9 — The netlist contains all the gates in the backtrace cone of the clock inputs of the
failing gate. The pin data shows the pattern value the tool simulated when it
encountered the error.
The following lists the Extra rule IDs. For a complete description of these violations, refer to
the “Extra Rules” section in the Design-for-Test Common Resources Manual.

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E2 — There must be no inversion between adjacent scan cells, the scan chain input pin
(SCI) and its adjacent scan cell, and the scan chain output pin (SCO) and its adjacent
scan cell.
E3 — There must be no inversion between MASTER and SLAVE for any scan cell.
E4 — Tri-state drivers must not have conflicting values when driving the same net
during the application of the test procedures.
E5 — When constrained pins are at their constrained states, and PIs and scan cells are at
their specified binary states, X states must not be capable of propagating to an
observable point.
E6 — When constrained pins are placed at their constrained states, the inputs of a gate
must not have sensitizable connectivity to more than one memory element of a scan
cell.
E7 — External bidirectional drivers must be at the high-impedance (Z) state during the
application of the test procedure.
E9 — The drivers of wire gates must not be capable of driving opposing binary values.
E10 — Performs bus contention, mutual-exclusivity checking. Similar to E4, but does
not check for this condition during test procedures.
E11 — The ability of a bus gate to attain a Z state.
E12 — The test procedures cannot violate any ATPG constraints.
E13 — Satisfy both ATPG constraints and bus contention prevention (for buses that fail
rule E10).
The following lists the Scannability rule IDs. For a complete description of these violations,
refer to the “Scannability Rules” section in the Design-for-Test Common Resources
Manual:
S1 — Checks all the clock inputs (including sets and resets) of each non-scan memory
element to ensure that these inputs can be turned off.
S2 — Checks all clock inputs (not including sets and resets) of each non-scan memory
element to see whether they can capture data.
S3 — Checks all the clock inputs (not including sets and resets) of each non-scan
memory element to detect any un-initialized (not pin constrained) and non-clock PIs
feeding the clock cones.
S4 — Checks for non-scan memory elements that can be converted to scan elements,
and that are also initialized to a static value during test setup.
The following lists the Trace rule IDs. For a complete description of these violations, refer
to the “Scan Chain Trace Rules” section in the Design-for-Test Common Resources Manual.
T2 — The netlist contains the blocked gate. The pin data shows the values the tool
simulates for all time periods of the shift procedure.
T3 — The netlist contains all the gates in the backtrace cone of the blocked gate. The
pin data shows the values the tool simulates for all time periods of the shift
procedure.

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T4 — The netlist contains all the gates in the backtrace cone of the clock inputs of the
blocked gate. The pin data shows the values the tool simulates for all time periods of
the shift procedure.
T5 | T6 — The netlist contains all the gates in the backtrace cone of the clock inputs of
the blocked gate. The pin data shows the values the tool simulates for all time periods
of the shift procedure.
T11 — A clock input of the memory element closest to the scan chain input must not be
turned on during the shift procedure prior to the time of the force_sci statement.
T16 — When clocks and write control lines are off and pin constraints are set, the gate
that connects to the input of a reconvergent pulse generator sink gate (PGS) in the
long path must be at the non-controlling value of the PGS gate.
T17 — Reconvergent pulse generator sink gates cannot be connected to any of the
following: primary outputs, non-clock inputs of the scan memory elements, ROM
gates, non-write inputs of RAMs, and transparent latches.
• rule_id-occurrence#
A repeatable string that specifies the identification literal (ID) of a particular design rule and
the violation occurrence for which you want to display the occurrence message. This
argument must include the specific design rule ID (rule_id), the specific occurrence number
of the violation, and the hyphen between them. For example, you can analyze the second
violation occurrence of the C3 rule by specifying C3-2. The tool assigns numbers to
occurrences of rule violations as it encounters them; you cannot change the number assigned
to a specific occurrence.
• -All_Fails
A switch that specifies to display all occurrence messages for all occurrences of rule
violations. The displayed information can be quite lengthy, as it is the same information you
would get if you consecutively entered a “report drc rules <rule_id>” command for each
rule that had a violation. Use this switch to output a report of all violation occurrences (most
likely to a log file) for later analysis.
• > file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
creating or replacing the contents of file_pathname.
• >> file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
appending to the contents of file_pathname.
Examples
The following example changes the severity of the data rule 7 (D7) from a warning to an error,
and also specifies execution of a full test generation analysis, when performing the rules
checking for the clock (C) rules. Next, the example generates a display of a specific rule failure:
set drc handling d7 error atpg_analysis
set system mode dft

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Report Drc Rules

//-----------------------------------------------------------
//Begin scan chain identification process, memory elements=8.
//-----------------------------------------------------------
// Reading group test procedure file /user/design/tpf.
// Simulating load/unload procedure in g1 test procedure file.
// Chain = c1 successfully traced with scan_cells = 8.
// Error: Flipflop /FF1 (103) has clock port set to stable high.(D7-1)
// Error: Rules checking unsuccessfule, cannot exit SETUP mode.

report drc rules d7-1

//Error: Flipflop /I$3 (16) has clock port set to stable high (D7-1)
Related Commands
Echo Set Drc Handling

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Report Environment

Report Environment
Scope: All modes
Usage
REPort ENvironment [{> | >>} file_pathname]
Description
Displays the current values of all the “set” commands and the default names of the scan type
pins.
When you first invoke DFTAdvisor, executing the Report Environment command shows all of
the default values of the “set” commands.
Arguments
• > file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
creating or replacing the contents of file_pathname.
• >> file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
appending to the contents of file_pathname.
Examples
The following example reports the DFTAdvisor invocation defaults:
report environment
Top Module = /designs/dft/test_design
Gate Level = design
Gate Report = normal
Net Resolution = wire
System Mode = setup
Tied Signal = x
Dofile Abort = on
Trace Report = off
Scan type = mux_scan
Identification Type = sequential:on scan_sequential:off
partition_scan:off full_scan:off test_point:off
Identification Model = clock:original disturb:on
Scan Identification = automatic Internal Full backtrack=30
cycle=16 time=100 control_coverage = 100
observe_coverage = 100
min_detection = 1
Fault Sampling = 100%
Scan-in Naming = prefix:scan_in initial:1 modifier:1 suffix:
Scan-out Naming = prefix:scan_out initial:1 modifier:1 suffix:
Test Enable Name = test_en active = high
Test Clock Name = test_clk
Scan Enable Name (Core)= scan_en
Scan Enable Name (Input Partition)= scan_en_in
Scan Enable Name (Output Partition)= scan_en_out

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Report Environment

Scan Clock Name = scan_clk


Scan Master Clock Name = scan_mclk
Scan Slave Clock Name = scan_sclk
Hold Enable Name = hold_en
Control Input Name = test_cntl
Observe Output Name = test_obs
Test Logic = set:off reset:off clock:off tristate:off ram:off
Screen Display = on
Lockup Latch = off nolast

Related Commands
Echo Any of the “Set” commands

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Report Feedback Paths

Report Feedback Paths


Scope: Dft mode
Prerequisites: You can only use this command after the tool performs the learning process,
which happens immediately after flattening a design to the simulation model. Flattening
occurs when you first attempt to exit Setup mode.
Usage
REPort FEedback Paths [-All | loop_id#…] [-Display {DEBug | DESign | DAta | ALl}] [{> |
>>} file_pathname]
Description
Displays a textual report of the currently identified feedback paths.
The Report Feedback Paths command displays any feedback paths the tool identified during the
last circuit learning process. By default, the command displays all currently identified feedback
paths and their identification numbers. Issuing the command with the identification numbers of
specific paths of interest will limit the display to just those paths.
Note
Feedback paths include, by default, any duplicated gates.

Arguments
• -ALl
An optional switch that specifies to report all currently identified feedback paths. This is the
default.
• loop_id#
An optional, repeatable, non-negative integer that specifies the identification number of a
particular feedback path to report. The tool assigns the numbers consecutively, starting with
0.
• -Display {DEBug | DESign | DAta | ALl}
A switch and literal that displays the reported information graphically in the specified
DFTVisualizer window(s). The choices are as follows:
DEBug — Debug window
DESign — Design window
DAta — Data window
ALl— A literal that displays the information in all of the preceding windows.
See “Using DFTVisualizer” for more information.

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• > file_pathname
An optional redirection operator and pathname pair for creating or replacing the contents of
file_pathname.
• >> file_pathname
An optional redirection operator and pathname pair for appending to the contents of
file_pathname.
Examples
The following example leaves the Setup mode (which, among other things, flattens the
simulation model and performs the learning process), and displays the identification numbers of
any learned feedback paths:
set system mode dft
report feedback paths
Loop#=0, feedback_buffer=26, #gates_in_network=5
INV /I_956__I_582/ (51)
PBUS /I_956__I_582/N1/ (96)
ZVAL /I_956__I_582/N1/ (101)
INV /I_956__I_582/ (106)
TIEX /I_956__I_582/ (26)
Loop#=1, feedback_buffer=27, #gates_in_network=5
INV /I_962__I_582/ (52)
PBUS /I_962__I_582/N1/ (95)
ZVAL /I_962__I_582/N1/ (100)
INV /I_962__I_582/ (105)
TIEX /I_962__I_582/ (27)

Related Commands
Report Loops Set Multiple Scan_enables

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Command Dictionary
Report Flatten Rules

Report Flatten Rules


Scope: All modes
Usage
REPort FLatten Rules [rule_id [{occurence_id | -Verbose}]] [{> | >>} file_pathname]
Description
Displays either a summary of all the flattening rule violations or the data for a specific violation.
The Report Flatten Rules command displays the following information for a specific violation:
• Rule identification number
• Current number of rule failures
• Violation handling
You can use the Set Flatten Handling command to change the handling of the net, pin, and gate
rules.
Arguments
• rule_id
A literal that specifies the flattening rule violation for which you want to display
information. The flattening rule violations and their identification literals are divided into
the following three groups: net, pin, and gate rules violation IDs.
Following are the net rules:
FN1 — A module net is floating. The default upon invocation is warning.
FN2 — A module net has driver and constant value property. The default upon
invocation is warning and its property is not used.
FN3 — An instance net is floating. The default upon invocation is warning.
FN4 — An instance net is not used. The default upon invocation is warning.
FN5 — A multiple driven wired net. The default upon invocation is warning.
FN6 — A bus net attribute cannot be used. The default upon invocation is warning.
FN7 — Two connected nets have inconsistent net attributes. The default upon
invocation is warning and both attributes are not used.
FN8 — Parallel wired behavior. The default upon invocation is warning.
FN9 — The bus net has multiple different bus keepers. The default upon invocation is
warning and their effects are additive.
Following are the pin rules:
FP1 — The circuit has no primary inputs. The default upon invocation is warning.
FP2 — The circuit has no primary outputs. The default upon invocation is warning.

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Report Flatten Rules

FP3 — The primary input drives logic gates and switch gates. The default upon
invocation is warning.
FP4 — A pin is moved. The default upon invocation is warning.
FP5 — A pin was deleted by merging. The default upon invocation is warning.
FP6 — Merged wired in/out pins. The default upon invocation is warning.
FP7 — Merged wired input and output pins. The default upon invocation is warning
FP8 — A module boundary pin has no name. The default upon invocation is warning.
FP9 — An in/out pin is used as output only. The default upon invocation is ignored.
FP10 — An output pin is used as an in/out pin. The default upon invocation is ignored.
FP11 — An input pin is used as an in/out pin. The default upon invocation is ignored.
FP12 — An output pin has no fan-out. The default upon invocation is ignored.
FP13 — An input pin is floating. The default upon invocation is warning.
Following are the gate rules:
FG1 — The defining model of an instance does not exist. The default upon invocation is
error. If it is not an error condition, this instance is treated as an undefined primitive.
FG2 — The feedback gate is not in feedback loop. The default upon invocation is error.
FG3 — The bus keeper has no functional impact. The default upon invocation is
warning.
FG4 — The RAM/ROM read attribute not supported. The default upon invocation is
warning.
FG5 — The RAM attribute not supported. The default upon invocation is warning.
FG6 — The RAM type not supported. The default upon invocation is error.
FG7 — The netlist module has a primitive not supported. The default upon invocation is
error. If non-error is chosen, this primitive is treated as undefined.
FG8 — The library model has a primitive not supported. The default upon invocation is
error. If non-error is chosen, this primitive is treated as undefined.
• occurence_id
A literal that specifies the identification of the exact flattening rule violation (the
occurrence) for which you want to display information. For example, you can analyze the
second occurrence of the FG4 rule by specifying the rule_id and the occurence_id, FG4 2.
The tool assigns the occurrences of the rules violations as it encounters them; you cannot
change either the rule identification number or the ordering of the specific violations.

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Command Dictionary
Report Flatten Rules

• -Verbose
A switch that displays the following for each flattening rule:
o Rule identification number
o Number of failures of each rule
o Current handling status of that rule
o Brief description of that rule
• > file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
creating or replacing the contents of file_pathname.
• >> file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
appending to the contents of file_pathname.
Example
The following example shows the summary information of the FG3 rule:
report flatten rules fg3
// FG3: fails=2 handling=warning/noverbose

Related Commands
Set Flatten Handling

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Command Dictionary
Report Gates

Report Gates
Scope: All modes
Prerequisites: The netlist must already have been flattened before you can use this command in
either Setup or Dft mode. Netlist flattening happens when you first attempt to exit Setup
mode. The next time you return to Setup mode, you can use the command.
Usage
REPort GAtes {gate_id# | pin_or_net_pathname | instance_name}… | {-Type gate_type}…
Description
Displays the netlist information for the specified gates.
The Report Gates command displays the netlist information for either the design-level or
primitive-level gates that you specify. You can specify the gate by its gate index number, a
pathname of a pin connected to a gate, an instance name (design level only), a gate type, or a net
pathname. You can specify a design cell by a pathname of a pin connected to the design cell. If
you use a gate index number or gate type, the command always reports the primitive-level.
The pin_or_net_pathname and instance_name arguments support regular expressions, which
may include any number of ‘*’ or ‘?’ wildcard characters embedded in the pathname string. The
‘*’ character matches any sequence of characters (including none) in a name, and the ‘?’
character matches any single character. If a wildcard name is specified, the command will
search for matching instance names from the top library cell level, down to the primitive gates.
The format for the design level is:
instance_name cell_type
input_pin_name I (data) pin_pathname...
...
output_pin_name 0 (data) pin_pathname...
...
The format for the primitive level is:
instance_name (gate_ID#) gate_type
input_pin_name I (data) gate_ID#-pin_pathname...
...
output_pin_name O (data) gate_ID#-pin_pathname...
...

The list associated with the input and output pin names indicates the pins to which they are
connected. For the primitive-level, this also includes the gate index number of the connecting
gate and only includes the pin pathname if one exists at that point. There is a limitation on
reporting gates at the design-level. If some circuitry inside the design cell is completely isolated
from other circuitry, the command only reports the circuitry associated with the pin pathname.
You can change the output of the Report Gates command by using the Set Gate Report
command.

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Command Dictionary
Report Gates

Note
You must flatten the netlist before issuing this command.

Reporting on the First Input of a Gate


Report Gates provides a shortcut to display data on the gate connected to the first input of the
previously reported gate. This lets you quickly and easily trace backward through circuitry. To
use Report Gates in this manner, first report on a specific gate and then enter:

SETUP> b

The following example shows how to use Report Gate and B commands to trace backward
through the first input of the previously reported gate.

SETUP> rep gate 26


// /u1/inst__565_ff_d_1__13 (26) BUF
// "I0" I 269-
// "OUT" O 268- 75-
SETUP> b
// /u1/inst__565_ff_d_1__13 (269) LA
// "S" I 14-
// "R" I 145-
// SCLK I 4-/clk
// D I 265-/u1/_g32/X
// ACLK I 2-/scan_mclk
// SDI I 20-/u1/inst__565_ff_d_0__dff/Q2
// "OUT" O 26- 27-

SETUP> b
// /u1/inst__565_ff_d_1__13 (14) TIE0
// "OUT" O 269- 268-

Reporting on the First Fanout of a Gate


Similar to tracing backward through circuitry, you can also use a shortcut to trace forward
through the first fanout of the previously reported gate. To use Report Gates in this manner, first
report on a specific gate, and then enter:
SETUP> f

The following example shows how to use Report Gate and F commands to trace forward
through the first fanout of the previously reported gate.

SETUP> rep ga 269


// /u1/inst__565_ff_d_1__13 (269) LA
// "S" I 14-
// "R" I 145-
// SCLK I 4-/clk
// D I 265-/u1/_g32/X

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Command Dictionary
Report Gates

// ACLK I 2-/scan_mclk
// SDI I 20-/u1/inst__565_ff_d_0__dff/Q2
// "OUT" O 26- 27-
SETUP> f
// /u1/inst__565_ff_d_1__13 (26) BUF
// "I0" I 269-
// "OUT" O 268- 75-
SETUP> f
// /u1/inst__565_ff_d_1__13 (268) LA
// "S" I 14-
// "R" I 145-
// BCLK I 1-/scan_sclk
// "D0" I 26-
// "OUT" O 24- 25-

Arguments
• gate_id#
A repeatable integer that specifies the gate identification numbers of the objects for which
you want to display gate information. The value of the gate_id# argument is the unique
identification number that DFTAdvisor automatically assigns to every gate within the
design during the model flattening process.
• pin_or_net_pathname
A repeatable string that specifies the pathnames of pins or nets in the design netlist. You
may use wildcard characters to match multiple pin or net pathnames.
For a hierarchical pathname, the display will include information describing how that
pathname maps to the driving design level pin(s) and gate(s) for which data is displayed.
• instance_name
A repeatable string that specifies the hierarchical pathname of an instance of a library cell
within the design. If a valid library instance pathname is given when in primitive level, all
pins on that library cell are reported. When in primitive level, instance_name may also be
the pathname of a primitive instance.
• -Type gate_type
A repeatable switch and name pair that specifies the gate types for which you want to
display the gate information. The supported gate_types are listed in Table 2-5.

Table 2-5. Report Gate Types


gate_type Description
BUF buffer
INV inverter
AND and
NAND inverted and

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Command Dictionary
Report Gates

Table 2-5. Report Gate Types (cont.)


gate_type Description
OR or
NOR inverted or
XOR exclusive-or
XNOR inverted exclusive-or
DFF D flip-flop, same as _dff library primitive
LA latch, same as _dlat library primitive
PI primary input
PO primary output
TIE0 tied low
TIE1 tied high
TIEX tied unknown
TIEZ tied high impedance
TLA transparent latch
TSH tri-state driver, first input is active high enable line
TSL tri-state driver, first input is active low enable line
BUS tri-state bus
Z2X Z converter gate, converts Z to X
WIRE undetermined wired gate
MUX 2-way multiplexor, first line is select line
RAM random access memory
ROM read only memory
XDET X detector, gives 1 when input is X
ZDET Z detector, gives 1 when input is Z
Examples
The following example displays the simulated values of the gate and its inputs.
SETUP> set system mode dft
DFT> set gate report error_pattern
DFT> set gate level primitive
DFT> report gates i_1006/o
// /P2.13P (20) NAND
// A I 10-/LD.1
// B I 7-/M1.1

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Report Gates

// Z O 30-/P2.2P/S

The gate report for the design level may look like the following:
// /P2.13P ND2
// A I /LD.1
// B I /M1.1
// Z O /P2.2P/S

This next example demonstrates the use of wildcards:

ATPG> report gates /xscan_0_0_cch_scan_32x/ix15*


// /xscan_0_0_cch_scan_32x/ix151 NOR2XL
// A I /myop1<0> [1]
// B I /myop2[1]
// Y O /xscan_0_0_cch_scan_32x/sum_add_0_ix27/A0
// /xscan_0_0_cch_scan_32x/ix153 NAND2X1
// A I /myop1<0> [0]
// B I /myop2[0]
// Y O /xscan_0_0_cch_scan_32x/sum_add_0_ix1/A \
/xscan_0_0_cch_scan_32x/ sum_add_0_ix23/B \
/xscan_0_0_cch_scan_32x/sum_add_0_ix27/A1
// /xscan_0_0_cch_scan_32x/ix155 NAND2X1
// A I /myop1<0> [1]
// B I /myop2[1]
// Y O /xscan_0_0_cch_scan_32x/ix166/B0 \
/xscan_0_0_cch_scan_32x/ sum_add_0_ix27/B0
// /xscan_0_0_cch_scan_32x/ix157 NAND2X1
// A I /myop1<0> [3]
// B I /myop2[3]
// Y O /xscan_0_0_cch_scan_32x/ix174/B0 \
/xscan_0_0_cch_scan_32x/ sum_add_0_ix55/B0

ATPG> rep ga /xscan_0_0_cch_scan_32x/ix159


// /xscan_0_0_cch_scan_32x/ix159 NAND2X1
// A I /myop1<0> [5]
// B I /myop2[5]
// Y O /xscan_0_0_cch_scan_32x/ix188/B0 \
/xscan_0_0_cch_scan_32x/ sum_add_0_ix83/B0

ATPG> set gate level primitive


ATPG> report gates /xscan_0_0_cch_scan_32x/ix157
// /xscan_0_0_cch_scan_32x/ix157 (43) NAND
// A I 7-/myop1<0> [3]
// B I 17-/myop2[3]
// Y O 60-/xscan_0_0_cch_scan_32x/ix174/B0 \
75-/xscan_0_0_cch_scan_32x/ sum_add_0_ix55/B0
// /xscan_0_0_cch_scan_32x/ix157 (43) NAND
// A I 7-/myop1<0> [3]
// B I 17-/myop2[3]
// Y O 60-/xscan_0_0_cch_scan_32x/ix174/B0 \
75-/xscan_0_0_cch_scan_32x/ sum_add_0_ix55/B0
// /xscan_0_0_cch_scan_32x/ix157 (43) NAND
// A I 7-/myop1<0> [3]

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Command Dictionary
Report Gates

// B I 17-/myop2[3]
// Y O 60-/xscan_0_0_cch_scan_32x/ix174/B0 \
75-/xscan_0_0_cch_scan_32x/ sum_add_0_ix55/B0

The next example demonstrates how the output report will change if the input pathname is a
hierarchical pin or net. In this case an additional line is output at the top of the report, indicating
the mapping that was found:

ATPG> set gate level design


ATPG> report gate /sub3/in2
// Hierarchical pin /sub3/in2 maps to /sub1/gate4/Y
// /sub1/gate4 nand02
// A1 I /in1
// A0 I /sub1/gate2/Y
// Y O /sub3/gate1/A1 /sub3/micro1/gate1/A1 /sub2/gate3/A1
// /sub3/gate3/A1 /sub3/micro1/gate2/A1 /sub2/gate1/A1

ATPG> report gate /w2


// Hierarchical net /w2 maps to /sub1/gate4/Y
// /sub1/gate4 nand02
// A1 I /in1
// A0 I /sub1/gate2/Y
// Y O /sub3/gate1/A1 /sub3/micro1/gate1/A1 /sub2/gate3/A1
// /sub3/gate3/A1 /sub3/micro1/gate2/A1 /sub2/gate1/A1

Related Commands
Set Gate Level Set Gate Report

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Command Dictionary
Report Loops

Report Loops
Scope: Dft mode
Usage
REPort LOops [-All | loop_id#…] [-Display {DESign | DAta}] [{> | >>} file_pathname]
Description
Displays information about circuit loops.
The Report Loops command displays information about currently identified loops in the circuit.
For each loop, the report indicates whether the loop was broken by duplication. Loops that are
not broken by duplication are shown as being broken by a constant value, which means the loop
is either a coupling loop or has a single multiple fanout gate. The report also includes the pin
pathname and gate type of each gate in each loop.
You can write the loops report information to a file by using the command’s redirection
operators or the Write Loops command.
Arguments
• -ALl
An optional switch that specifies to report all the loops in the circuit. This is the default.
• loop_id#
An optional, repeatable, positive integer that specifies the identification number of a
particular loop to report. The tool assigns loop identification numbers consecutively,
starting with 1.
• -Display {DESign | DAta}
A switch and literal that displays the reported information graphically in the specified
DFTVisualizer window(s). The choices are as follows:
DESign — Design window
DAta — Data window
See “Using DFTVisualizer” for more information.
• > file_pathname
An optional redirection operator and pathname pair for creating or replacing the contents of
file_pathname.
• >> file_pathname
An optional redirection operator and pathname pair for appending to the contents of
file_pathname.
Examples
The following example displays a list of all the loops in the circuit:

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Command Dictionary
Report Loops

set system mode dft


report loops
Loop = 1: not_duplicated (coupling loop)
my_design/my_minibus (SBUS)
my_design/PAD (BUF)
my_design/my_minibus (Z2X)
Loop = 2: not_duplicated (coupling loop)
...
Loop = 8: not_duplicated (single multiple fanout)
my_design/al/pl/padx (BUF)
my_design/al/pl/pad (BUF)
my_design/pad (WIRE)

The next example displays loop 8 only:


report loops 8
Loop = 8: not_duplicated (single multiple fanout)
my_design/al/pl/padx (BUF)
my_design/al/pl/pad (BUF)
my_design/pad (WIRE)

The next example writes the display information for loop 8 to a new file named my_loop_file:
report loops 8 > my_loop_file
... writing to file my_loop_file

Related Commands
Report Feedback Paths Write Loops

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Command Dictionary
Report Mapping Definition

Report Mapping Definition


Scope: Setup and DFT modes
Usage
REPort MApping Definition -All | {object_name [-Instance | -Module] [-Nonscan_model
nonscan_model_name] [-Scan_model scan_model_name] [-Output
scan_ouput_pin_name]} [-Filename filename [-Replace]]
Description
Reports the non-scan to scan model mapping defined in the design.
The Report Mapping Definition command reports the mapping of non-scan models to scan
models. You can report the scan and output mapping for an individual instance, all instances
under a hierarchical instance, all instances in all occurrences of a module in the design, all
occurrences of the model in the entire design, or the entire design.
The report is always displayed in the transcript. You can optionally write it to a file using the
-Filename switch.
Arguments
• -All
A switch that specifies to report all scan and output mapping in the entire design.
• object_name
A string that specifies the name of the non-scan model you want to report on. You can also
specify an instance, hierarchical instance, module, or scan model.
o If this argument is the name of an instance or hierarchical instance, the -Instance
switch is required, and you can optionally specify the model with the
-Nonscan_model or -Scan_model switch.
o If this argument is the name of a module, then the -Module switch is required, and
you can optionally specify the model with the -Nonscan_model or -Scan_model
switch.
o If this argument is a scan model, then the -Output switch is required. Because you
specified a scan model, you can only report the scan output pin mapping.
• -Instance | -Module
An optional switch that specifies the type of the object_name argument. If neither switch is
specified, the object_name is a model (the default).
o If you specify -Instance and the instance is primitive, then it reports only the named
instance.
o If you specify -Instance and the instance is hierarchical, then it reports all instances
under that instance. Optionally, you can constrain the report to matching the
-Nonscan_model or (for output mapping) matching the -Scan_model.

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Report Mapping Definition

o If you specify -Module, then for all occurrences of that module, it reports all
instances within that module. Optionally, you can constrain the report to matching
the -Nonscan_model or (for output mapping) matching the -Scan_model.
• -Nonscan_model nonscan_model_name
A switch and string pair that specifies the name of the non-scan model that you want to
report on. This argument is only required if you specify -Instance or -Module switch and
want to constrain the report to objects matching the non-scan model; otherwise, you can
specify the non-scan model in the object_name argument.
• -Scan_model scan_model_name
A switch and string pair that specifies the name of the scan model to report on. This
argument is required when you want to further constrain the report, except when you are
only reporting the mapping of the scan output pin and specify the scan model in the
object_name argument.
• -Output [scan_ouput_pin_name]
An optional switch and string pair that specifies the name of the scan output pin. You can
use this to constrain the report. Specifying just the -Output switch reports all mapped scan
output pins for the specified scan model, while specifying the switch with a pin name,
reports the mapping for only scan models that use that pin for the scan output.
• -Filename filename [-Replace]
An optional switch and string that specifies that DFTAdvisor writes the scan mapping report
to a file. The -Replace switch specifies that the file should be overwritten if it already exists.
Examples
The following example reports the scan and output mapping for all occurrences of the fd1 non-
scan model in the design:
report mapping definition fd1

The following example reports the mapping for each occurrence of the fd1 non-scan model
mapped to the fd1s scan model with the scan output pin mapped to “qn”:
report mapping definition fd1 -scan_model fd1s -output qn

The following example reports the mapping for each occurrence of the fd1s scan model in the
design:

report mapping definition fd1s -output

The following example reports the mapping for all instances under the hierarchical instance
“/top/counter1”:
report mapping definition /top/counter1 -instance

The following example reports the mapping for each occurrence of the fd1s scan model with the
scan output pin mapped to “qn” for all matching instances in the “counter” module and for all
occurrences of that module in the design:

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Command Dictionary
Report Mapping Definition

report mapping definition counter -module -scan_model fd1s -output qn

Related Commands
Add Mapping Definition Delete Mapping Definition

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Report Nofaults

Report Nofaults
Scope: All modes
Usage
REPort NOfaults {pathname… | -All} [-Instance] [-Stuck_at {01 | 0 | 1}] [{> | >>}
file_pathname]
Description
Displays the no-fault settings for the specified pin or instance pathnames.
The Report Nofaults command displays for pin pathnames or pin names of instances the nofault
settings that you previously specified with the Add Nofaults command.
Arguments
• pathname
A repeatable string that specifies the pin pathnames or the instance pathnames for which you
want to display the nofault settings. If you specify an instance pathname, you must also
specify the -Instance switch.
• -All
A switch that specifies to display the nofault settings on either all pin pathnames or, if you
also specify the -Instance switch, all pin names of instances.
• -Instance
An optional switch that specifies that the pathname or -All argument indicates instance
pathnames.
• -Stuck_at 01 | 0 | 1
An optional switch and literal pair that specifies the stuck-at nofault settings that you want
to display. The valid stuck-at literals are as follows:
01 — A literal that specifies to display both the “stuck-at-0” and “stuck-at-1” nofault
settings. This is the default.
0 — A literal that specifies to only display the “stuck-at-0” nofault settings.
1 — A literal that specifies to only display the “stuck-at-1” nofault settings.
• > file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
creating or replacing the contents of file_pathname.
• >> file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
appending to the contents of file_pathname.

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Report Nofaults

Examples
The following example displays all pin names of the instances that have the nofault settings:
add nofaults i_1006 i_1007 i_1008 -instance
report nofaults

Related Commands
Add Nofaults Delete Nofaults

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Command Dictionary
Report Nonscan Models

Report Nonscan Models


Scope: All modes
Usage
REPort NONscan Models [-Class {Full | System | User}]
Description
Displays the sequential non-scan model list.
The Report Nonscan Models command displays sequential models that you added by using the
Add Nonscan Models command, or that have the Dont_touch property in a Genie netlist.
Arguments
• -Class Full | System | User
An optional switch and literal pair that specifies the source (or class) of the sequential non-
scan models that you want to display. The valid literals are as follows:
Full — A literal that specifies to display all the non-scan sequential models in the user
and system class. This is the default.
User — A literal that specifies to only display the non-scan sequential models that are
the result of the Add Nonscan Models command.
System — A literal that specifies to only display the non-scan sequential models that are
a result of the Genie netlist containing the Dont_touch property.
Examples
The following example displays all sequential non-scan models from the non-scan model list:
set system mode dft
add nonscan models d_flip_flop1 d_flip_flop2
report nonscan models

Related Commands
Add Nonscan Models Delete Nonscan Models

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Command Dictionary
Report Notest Points

Report Notest Points


Scope: DFT mode
Usage
REPort Notest Points [-Paths] [-Observe_scan_cell]
Description
Displays all the circuit points for which you do not want DFTAdvisor to insert controllability
and observability.
The Report Notest Points command displays the circuit points added using the Add Notest
Points command and which therefore, DFTAdvisor cannot use for testability insertion. You can
also list the critical path definitions that added notest points by using the -Paths switch, and list
scan cells that are excluded from being used as observation scan cells by using the
-Observe_scan_cell switch.
Arguments
• -Paths
An optional switch that displays the definitions for all currently loaded critical paths that
have marked notest points. If this switch is not specified, the tool reports only the resulting
notest points.
• -Observe_scan_cell
An optional switch that specifies to list the instances that cannot be used as an observation
scan cell.
Examples
The following example displays the list of all circuit points that DFTAdvisor cannot use for
testability insertion:
set system mode dft
add notest points tr_io
add notest points ts_i
report notest points

Related Commands
Add Notest Points Delete Notest Points

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Command Dictionary
Report Output Masks

Report Output Masks


Scope: All modes
Usage
REPort OUtput Masks
Description
Displays a list of the currently masked primary output pins.
The Report Output Masks command displays the primary output pins that you previously
masked by using the Add Output Masks command. When you mask a primary output pin, you
inform DFTAdvisor to mark that pin as an invalid observation point during the scan cell
identification process. DFTAdvisor uses all unmasked primary output pins as possible
observation points to which the effects of all faults propagate for detection.
Examples
The following example masks two primary outputs and then displays the results:
add output masks q1 -hold1
add output masks qb1 -hold 0
report output masks
q1 hold1
qb1 hold0

Related Commands
Add Output Masks Delete Output Masks
Analyze Output Observe Setup Output Masks

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Command Dictionary
Report Partition Cells

Report Partition Cells


Scope: All modes
Usage
REPort PArtition Cells [-Statistics]
Description
Reports the identified partition cells for each I/O pin that is traced for identification.
The Report Partition Cells command can be used in conjunction with the Setup Partition Scan
command to observe which sequential cells in a design are identified per I/O pin. By default, the
output of the Report Partition Cells command includes the following columns: primary I/O pin
name, the type of the I/O (input or output), instance pathname of the cell identified, and the
number of two-input logic gates between the I/O and the identified cell. If the “-Statistics”
option is specified, then the last two columns print the number of cells identified as well as the
percent ratio of the identified cells with respect to the total number of sequential cells in the
design.
Arguments
• -Statistics
An optional switch that specifies for DFTAdvisor to print the number of cells identified for
the corresponding I/O and the percent ratio of the identified cells over the total number of
cells. When this switch is not used, DFTAdvisor prints the instance pathnames of all the
identified cells for the I/O and the number of two-input logic gates between the I/O and the
identified cells.
Examples
The following example illustrates usage of Report Partition Cells as well as command output.
Note that “WRAPCELL” is printed for the I/O registered.
setup partition scan -exclude i[1] o[3]
setup registered IO -include i[1] o[3]
set system mode dft
run
report partition cells
-------------------------------------------------------------------
FORMAT: Primary_I/O Type Cells_identified Logic_levels
-------------------------------------------------------------------
o[1] Output d1 2
d7 2
d8 2
d9 2
o[2] Output d9 0
i[3] Input d10 0
d3 3
d2 3
i[2] Input d1 2
i[1] Input WRAPCELL 0

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Command Dictionary
Report Partition Cells

o[3] Output WRAPCELL 0

report partition cells -statistics


-------------------------------------------------------------------------
FORMAT: Primary_I/O Type Num_cells_identified Percent_cells_identified
-------------------------------------------------------------------------
o[1] Output 4 40.00
o[2] Output 1 10.00
i[3] Input 3 30.00
i[2] Input 1 10.00
i[1] Input 0 0.00 -wrapcell-
o[3] Output 0 0.00 -wrapcell-

Related Commands
Setup Partition Scan Setup Scan Identification
Setup Registered IO

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Command Dictionary
Report Pin Constraints

Report Pin Constraints


Scope: All modes
Usage
REPort PIn Constraints [-All | primary_input_pin…] [-Display {DEBug | DESign | DAta |
ALl}]
Description
Displays the pin constraints of the primary inputs.
The Report Pin Constraints command displays the pin constraints that you previously added to
the primary inputs with the Add Pin Constraints command. You can change the constant value
constraints of the primary inputs by using the Add Pin Constraints or Setup Pin Constraints
commands.
Note
The information this command reports has effects on other commands that relate to fault
simulation, such as simulation-based test point selection.

Arguments
• -All
An optional switch that specifies to display the current constraints for all primary input pins.
This is the default.
• primary_input_pin
An optional repeatable string that specifies a list of primary input pins whose constraints
you want to display.
• -Display {DEBug | DESign | DAta | ALl}
A switch and literal that displays the reported information graphically in the specified
DFTVisualizer window(s). The choices are as follows:
DEBug — Debug window
DESign — Design window
DAta — Data window
ALl— A literal that displays the information in all of the preceding windows.
See “Using DFTVisualizer” for more information.
Examples
The following example displays the cycle behavior constraints of all primary inputs.
add pin constraints ph1 c0
add pin constraints ph2 c1
report pin constraints -all

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Command Dictionary
Report Pin Constraints

Related Commands
Add Pin Constraints Setup Pin Constraints
Delete Pin Constraints Setup Scan Identification

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Command Dictionary
Report Pin Equivalences

Report Pin Equivalences


Scope: All modes
Usage
REPort PIn Equivalences
Description
Displays the pin equivalences of the primary inputs.
The Report Pin Equivalences command displays a list of primary inputs, which you previously
restricted to be at equivalent or complementary values, by using the Add Pin Equivalences
command.
Note
The information this command reports has effects on other commands that relate to fault
simulation, such as simulation-based test point selection.

Examples
The following example displays all pin equivalences that have been added to the primary inputs:
add pin equivalences indata2 indata4
add pin equivalences indata3 -invert indata5
report pin equivalences

Related Commands
Add Pin Equivalences Delete Pin Equivalences

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Command Dictionary
Report Primary Inputs

Report Primary Inputs


Scope: All modes
Usage
REPort PRimary Inputs [-All | primary_input_pin…] [{> | >>} file_pathname]
Description
Displays the specified primary inputs.
The Report Primary Inputs command displays a list of either all the primary inputs of a circuit
or a specific list of primary inputs that you specify.
Arguments
• -All
An optional switch that specifies to display all the primary inputs. This is the default.
• primary_input_pin
An optional repeatable string that specifies a list of primary input pins that you want to
display.
• > file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
creating or replacing the contents of file_pathname.
• >> file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
appending to the contents of file_pathname.
Examples
The following example displays all of the primary inputs:
report primary inputs -all
SYSTEM: /clk
SYSTEM: /datain
Note
The label “system” means that these are primary inputs that DFTAdvisor automatically
recognizes because they were in the netlist. Because there is no Add Primary Inputs
command in DFTAdvisor as there is in FastScan and FlexTest, all primary inputs are of
the system-defined class.

Related Commands
Echo Write Primary Inputs

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Command Dictionary
Report Primary Outputs

Report Primary Outputs


Scope: All modes
Usage
REPort PRimary Outputs [-All | primary_output_pin…] [{> | >>} file_pathname]
Description
Displays the specified primary outputs.
The Report Primary Outputs command displays a list of either all the primary outputs of a
circuit or a specific list of primary outputs that you specify.
Arguments
• -All
An optional switch that specifies to display all the primary outputs. This is the default.
• primary_output_pin
An optional repeatable string that specifies a list of primary output pins that you want to
display.
• > file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
creating or replacing the contents of file_pathname.
• >> file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
appending to the contents of file_pathname.
Examples
The following example displays all of the primary outputs:
report primary outputs -all
SYSTEM: /dataout
SYSTEM: /dataout1
Note
The label “system” means that these are primary outputs that DFTAdvisor automatically
recognizes because they were in the netlist. Because there is no Add Primary Outputs
command in DFTAdvisor as there is in FastScan and FlexTest, all primary outputs are of
the system-defined class.

Related Commands
Echo Write Primary Outputs

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Command Dictionary
Report Procedure

Report Procedure
Scope: All modes except Setup mode
Usage
REPort PRocedure {procedure_name [group_name]} | -All [{> | >>} file_pathname]
Description
Displays the specified procedure.
The Report Procedure command displays all procedures or the specified procedure.
Arguments
• procedure_name
A string that specifies which procedure to display.
• group_name
An optional string that specifies a particular scan group from which to display the specified
procedure.
• -All
A switch that specifies for the tool to display all procedures. This is the default.
• > file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
creating or replacing the contents of file_pathname.
• >> file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
appending to the contents of file_pathname.
Related Commands
Add Scan Groups Write Procfile
Read Procfile
Report Timeplate

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Command Dictionary
Report Read Controls

Report Read Controls


Scope: All modes
Usage
REPort REad Controls
Description
Displays all of the currently defined read control lines.
The Report Read Controls command displays all the read control lines that you previously
specified by using the Add Read Controls command. The display also includes the
corresponding off-state with each read control line.
Examples
The following example displays a list of the current read control lines:
add read controls 0 r1 r3
add read controls 1 r2 r4
report read controls

Related Commands
Add Read Controls Delete Read Controls

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Command Dictionary
Report Scan Cells

Report Scan Cells


Scope: Dft mode
Usage
REPort SCan CElls [-All | chain_name…] [-Filename filename [-Replace]] [-Display DEBug]
[{> | >>} file_pathname]
Description
Displays a report or writes a file on the scan cells that reside in the specified scan chains.
The Report Scan Cells command provides a report on the scan cells within specific scan chains.
The following information is provided in the report for each scan cell:
• Chain cell index number (where 0 is the scan cell closest to the scan-out pin)
• Scan chain in which the scan cell resides (chain1, chain2, and so on, are the default
chain names, if reporting scan cells on inserted scan chains)
• Scan group in which the scan chain resides (dummy is the default group name, if
reporting scan cells on inserted scan chains)
• Instance name of the scan cell
• Library model name of the scan cell (if -Filename is not specified)
• Scan output port name of the scan cell (if -Filename is not specified)
• Global clock for each scan cell (if -Filename is not specified)
• Polarity of the global clock, whether the clock is leading or trailing edge (if -Filename is
not specified)
• Associated lockup latch for each scan cell (if -Filename is not specified)
If you issue the command without specifying any arguments, then DFTAdvisor displays a
report on the scan cells for all scan cells in existing scan chains, and also scan cells from the
inserted scan chains.
If you issue the command with the -Filename switch, then DFTAdvisor writes the scan cells to a
file in the format that can be read by the Insert Test Logic command. The format of the written
file is different than the format of the viewed report. You can optionally edit the scan cell order
in the file before reading the file with the Insert Test Logic command.
Arguments
• -All | chain_name…
An optional switch or repeatable string. The -All switch specifies to display the scan cells
for all scan chains. This is the default. The repeatable string specifies the scan chains whose
scan cells you want to display.

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Command Dictionary
Report Scan Cells

• -Filename filename [-Replace]


An optional switch and string that specifies that DFTAdvisor writes the list of scan cells to a
file. The format of the written file is different than the format of the viewed report. The
-Replace switch specifies that the file should be overwritten if it already exists.
• -Display DEBug
A switch and literal that displays the reported information graphically in the DFTVisualizer
debug window. See “Using DFTVisualizer” for more information.
• > file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
creating or replacing the contents of file_pathname.
• >> file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
appending to the contents of file_pathname.
Examples
The following example displays a list of all scan cells in the DFT system mode:
add scan groups group1 scanfile
add scan chains chain1 group1 indata2 outdata4
set system mode dft
report scan cells
------------------------------------------------------------
CellNo ChainName GroupName Pathname CellName ScanOut Clock
ClockPolarity Lockup
------------------------------------------------------------
0 chain1 group1 /MQ_I400 sffr Q clk2 (-)
1 chain1 group1 /FH_I400 sffr QB clk2 (-)
2 chain1 group1 /FQ_I10 sffr QB clk2 (-)
3 chain1 group1 /RP_I10 sffr Q clk1 (+)
lockup1 FD4SQA
4 chain1 group1 /IS_I10 sffr Q clk1 (+)
5 chain1 group1 /CZ_I400 sffr QB clk1 (+)

The first column displays the chain cell index number, where 0 is the scan cell closest to the
scan-out pin.
The second column displays the chain name where the scan cell resides.
The third column displays the group name where the scan cell resides.
The fourth column displays the gate name of the scan cell.
The fifth column displays the library model name for the scan cell.
The sixth column displays the scan out port of the scan cell.
The seventh column displays the clock for the scan cell.
The eighth column displays the polarity of the clock of the scan cell.

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Command Dictionary
Report Scan Cells

The ninth column displays the word “lockup”, if a lockup latch is inserted in the scan_out of this
scan cell.
There is a difference in the output of the Report Scan Cells command if the scan chain is
existing (rather than added during the DFTAdvisor run). In the following example, DFTAdvisor
reports scan cell information for a pre-existing scan chain:
report scan cells
0 chain1 grp1 /I_2 OLD_SCAN_CELL
1 chain1 grp1 /I_3 OLD_SCAN_CELL
2 chain1 grp1 /I_1 OLD_SCAN_CELL
3 chain1 grp1 /I_4 OLD_SCAN_CELL
4 chain1 grp1 /I_236 OLD_SCAN_CELL
5 chain1 grp1 /I_235 OLD_SCAN_CELL
6 chain1 grp1 /I_237 OLD_SCAN_CELL
7 chain1 grp1 /I_238 OLD_SCAN_CELL
8 chain1 grp1 /I_265 OLD_SCAN_CELL
9 chain1 grp1 /I_268 OLD_SCAN_CELL
10 chain1 grp1 /I_266 OLD_SCAN_CELL
11 chain1 grp1 /I_267 OLD_SCAN_CELL
12 chain1 grp1 /I_295 OLD_SCAN_CELL
13 chain1 grp1 /I_298 OLD_SCAN_CELL
14 chain1 grp1 /I_297 OLD_SCAN_CELL

Related Commands
Add Scan Chains Echo
Add Scan Groups Report Sequential Instances

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Command Dictionary
Report Scan Chains

Report Scan Chains


Scope: All modes
Usage
REPort SCan CHains [{> | >>} file_pathname]
Description
Displays a report on all the current scan chains.
The Report Scan Chains command provides the following information in a report for each scan
chain:
• Name of the scan chain
• Name of the scan chain group
• Scan chain input and output pins
• Length of the scan chain
Arguments
• > file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
creating or replacing the contents of file_pathname.
• >> file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
appending to the contents of file_pathname.
Examples
The following example displays a report of all the scan chains:
add scan groups group1 scanfile
add scan chains chain1 group1 indata2 outdata4
add scan chains chain2 group1 indata3 outdata5
report scan chains

Related Commands
Add Scan Chains Echo
Delete Scan Chains

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Command Dictionary
Report Scan Groups

Report Scan Groups


Scope: All modes
Usage
REPort SCan Groups [{> | >>} file_pathname]
Description
Displays a report on all the current scan chain groups.
The Report Scan Groups command provides the following information in a report for each scan
chain group:
• Name of the scan chain group
• Number of scan chains within the scan chain group
• Number of shifts
• Name of the test procedure file, which contains the information for controlling the scan
chains in the reported scan chain group
Arguments
• > file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
creating or replacing the contents of file_pathname.
• >> file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
appending to the contents of file_pathname.
Examples
The following example displays a report of all the scan groups:
add scan groups group1 scanfile
add scan groups group2 scanfile1
report scan groups

Related Commands
Add Scan Groups Echo
Delete Scan Groups

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Command Dictionary
Report Scan Models

Report Scan Models


Scope: All modes
Usage
REPort SCan Models
Description
Displays the sequential scan models currently in the scan model list.
The Report Scan Models command displays sequential models which you previously added to
the scan model list by using the Add Scan Models command.
Examples
The following example displays all the sequential scan models from the scan model list:
set system mode dft
add scan models d_flip_flop1 d_flip_flop2
report scan models

Related Commands
Add Scan Models Delete Scan Models

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Command Dictionary
Report Scan Partitions

Report Scan Partitions


Scope: All modes
Usage
REPort SCan PArtitions {object_name... | -Default | -All} [-Expand] [{> | >>} file_pathname]
Description
Displays scan partitions.
Report Scan Partitions command reports the user specified and the default scan partitions. The
user specified scan partitions are reported in the same order they are specified with the Add
Scan Partition command. If -expand option is specified, the pathnames of all the sequential
instances placed into the scan partitions are reported. Otherwise, the scan partitions are reported
in the same format they are defined.
Arguments
• object_name
A required repeatable string that specifies the name(s) of the scan partition to report.
• -Default
A required switch that specifies to report the default scan partition.
• -All
A required switch that specifies to report all scan partitions, including the user specified
scan partitions and the default scan partition.
• -Expand
An optional switch that specifies to display the pathnames of all the sequential instances
placed into the scan partitions. Without this switch, DFTAdvisor reports the scan partitions
in the exact format they are declared with the Add Scan Partition command. If the instances
are added to the partition by their container module instance, for example, the sequential
instances are not reported unless this option is used.
• > file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
creating or replacing the contents of file_pathname.
• >> file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
appending to the contents of file_pathname.
Examples
The following example adds two scan partitions. The first partition, partA, is added by using
exact pathnames of the sequential instances and by the container module name; the second

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Command Dictionary
Report Scan Partitions

partition, partB, is added by the container module instance of the sequential instances. The scan
partitions are then reported twice, with and without the expand switch.
add sub chain D subch1 si so 5 mux_scan se -subclock clk
add nonscan instances /umodA/udff1
add scan partition partA -instance udff1 umodA/udff1 umodB/udff1 -module modD
add scan partition partB -instance umodC -number 3

report scan partitions -expand


-----------------------------------------------------
ScanPartitionName Members
-----------------------------------------------------
partA udff1
umodA/udff1
umodB/udff1
umodD/subch1 (subchain)
umodE/umodD/subch1 (subchain)
partB umodC/umodX/udff1
umodC/umodX/udff2
umodC/udff1
umodC/udff2
default_scan_partition udff2
umodA/udff2
umodB/udff2
-----------------------------------------------------

Note that the sub-chain cells are not reported, rather, the entire sub-chain is reported with its
container module instance. Also, the sequential instance /umodA/udff1 is still reported as part
of the scan partition, partA, even though it is declared as a nonscan instance.
report scan partitions
-----------------------------------------------------------------------
ScanPartitionName TotalNumCells/ScannableCells Members
-----------------------------------------------------------------------
partA 13/12 udff1 [instance]
umodA/udff1 [instance]
umodB/udff1 [instance]
modD [module]
partB 4/4 umodC [instance]
default_scan_partition 3/3 <all_remaining_cells>
-----------------------------------------------------------------------

An extra column is printed, TotalNumCells/ScannableCells, when the -expand switch is not


specified. The sub-chain cells are counted based on the length specified with the Add Sub Chain
command. The sequential instances that have S1/S2 scannability rule failure or that are defined
nonscan are not included in the ScannableCells section of this column.
Related Commands
Add Scan Partition Delete Scan Partitions

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Command Dictionary
Report Scan Pins

Report Scan Pins


Scope: All modes
Usage
REPort SCan PIns [{> | >>} file_pathname]
Description
Displays all previously assigned scan input, output, and clock names.
The Report Scan Pins command displays the user-specific names that you have added to the
scan input and scan output pins of the scan chains.
Arguments
• > file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
creating or replacing the contents of file_pathname.
• >> file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
appending to the contents of file_pathname.
Examples
The following example displays all scan input and scan output names for the scan chains and
then inserts the scan chains.
add clocks 0 clk
set system mode dft
run
add scan pins chain1 si so
add scan pins chain2 si1 so1
report scan pins
synthesize

Related Commands
Add Scan Pins Echo
Delete Scan Pins

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Command Dictionary
Report Seq_transparent Constraints

Report Seq_transparent Constraints


Scope: All modes
Usage
REPort SEq_transparent Constraints
Description
Displays the seq_transparent constraints.
The Report Seq_transparent Constraints command displays the constraints that you added to the
DFT library model clock enable pins with the Add Seq_transparent Constraints command. You
can change the constant value constraints of the pins by using the Add Seq_transparent
Constraints command.
Examples
The following example displays all the seq_transparent constraints.
report seq_transparent constraints

Related Commands
Add Seq_transparent Constraints Setup Scan Identification
Delete Seq_transparent Constraints

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Command Dictionary
Report Sequential Instances

Report Sequential Instances


Scope: All modes
Usage
REPort SEquential Instances [-SCannable] [-NONscannable] [-DEFINED_Scan]
[-DEFINED_Nonscan] [-Subchain] [-IDentified] [-Unidentified] [-STitched] [{-
Polarity + | -}] [{-CLock clockname …}] [{-CHain chainname …}] [{-Library_model
modelname …}] [{{-INstance | -Module} object_name …}] [-NOHeader] [-NOFooter]
[-NOVerbose] [{-Format format_code …}] [{> | >>} file_pathname]
Description
Displays information and testability data for sequential instances.
The Report Sequential Instances command displays the sequential instances of the design with
various filtering options. It also displays the total number of the reported instances at the end of
the report.
This command has several filtering options. When you specify multiple filters, the command
prints only the sequential instances that satisfy every filtering condition. If you specify no
filters, the command prints all types of sequential instances in the design.
You can also control the output of the command, such as printing header and footer information,
and formatting the output columns.
Arguments
• -SCannable
An optional switch that specifies DFTAdvisor to print the sequential instances that can be
placed into scan chains.
• -NONscannable
An optional switch that specifies DFTAdvisor to print the sequential instances that cannot
be placed into scan chains. The scannability condition of a sequential instance is determined
by the DRC rule checker.
• -DEFINED_Scan
An optional switch that specifies DFTAdvisor to print the sequential instances that are
defined scannable by the user.
• -DEFINED_Nonscan
An optional switch that specifies DFTAdvisor to print the sequential instances that are
defined non-scannable by the user.
• -Subchain
An optional switch that specifies DFTAdvisor to print the sequential instances that are
contained in user-defined sub-chains. Note that DFTAdvisor marks all the cells under the

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Command Dictionary
Report Sequential Instances

parent module of a sub-chain as sub-chain cells. Therefore, there may be cells that are
marked as sub-chain cells even though they are not physically on the specified sub-chains.
• -IDentified
An optional switch that specifies DFTAdvisor to print the sequential instances that are
identified to be scannable by DFTAdvisor. This is only valid after executing a Run
command.
• -UNidentified
An optional switch that specifies DFTAdvisor to print the sequential instances that are not
identified to be scannable by DFTAdvisor.
• -STitched
An optional switch that specifies DFTAdvisor to print the sequential instances that are
already placed in scan chains. Such instances cannot hold the scannable or non-scannable
conditions.
• -Polarity + | -
An optional switch and a sign character that specify DFTAdvisor to print the sequential
instances that are clocked by stable_low (+) or stable_high (-) clocks.
• -INstance object_name …
An optional switch and a list of strings that specify DFTAdvisor to report the sequential
instances that reside under certain instances. The instances are specified by their pathname
in the list of strings.
• -Module object_name …
An optional switch and a list of strings that specify DFTAdvisor to report the sequential
instances that reside under certain modules. The modules are specified by their name in the
list of strings.
• -NOHeader
An optional switch that specifies DFTAdvisor to not print the header information in the
output.
• -NOFooter
An optional switch that specifies DFTAdvisor to not print the footer information in the
output. The footer information includes the total number of reported instances.
• -NOVerbose
An optional switch that specifies DFTAdvisor to not print the body of the report output,
which is all the information except the header and the footer.
• -Format format_code …
An optional switch and a list of strings that specify DFTAdvisor to print output columns as
specified in the list of format_codes. When this switch is used, only the columns specified

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Command Dictionary
Report Sequential Instances

by their format_codes are printed. Also, they are printed in the order the format_codes are
specified in the list.
The output of the command has possible seven columns of information. A format_code is
associated with each column as follows.
Table 2-6. Output Formatting
Format_code Description
PN Pathname
MN Module Name
GI Gate ID
CN Clock Name
CP Clock Polarity
TY Type
ST Status

The information contained in each column in Table 2-6 is described as follows:


o PN: Holds the instance pathname of the sequential instance.
o MN: Holds the library module name of the sequential instance.
o GI: Holds the flattened netlist gate ID of the sequential instance and therefore works
only in DFT mode while flattened netlist is not freed in the process (before test logic
insertion). This column is by default not included in the output.
o CN: Holds the name of the primary input pin that clocks the sequential instance. If
this pin is not identified by DFTAdvisor this column holds either “Unknown” or
“Test-logic”. The string “Test-logic” is printed if you issue the command “Set Test
Logic -clock ON -reset ON …” and the DRC rule checker determines that test logic
is needed for the sequential element to be scannable.
o CP: Holds the polarity information of the clock of the sequential instance.
o TY: Holds one of following strings for the sequential instance:
• “Unknown”, if in SETUP mode
• “Scannable”
• “Pos-scannable”
• “Non-scannable”
• “Ignored”
• “Trans-latch”
• “Constant”

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Command Dictionary
Report Sequential Instances

• chain name or “DFT”, after test logic insertion. If the sequential instance is part
of a scan chain, its chain name is printed. If the sequential instance is either a test
logic control/observe point or a lockup latch that is inserted by DFTAdvisor, the
string “DFT” is printed.
o ST: Holds either one of the following:
• “None” before scan identification process
• “Unidentified”, before scan identification process
• “Identified”, after scan identification process
• “Defined-scan”
• “Defined-nonscan”
• “Subchain”
• scan cell number, after test logic insertion
• > file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
creating or replacing the contents of file_pathname.
• >> file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
appending to the contents of file_pathname.
Examples
The following example displays all types of sequential instances in the design.
report sequential Instances
-------------------------------------------------------------
FORMAT: PathName ModelName ClockName ClockPolarity Type Status
-------------------------------------------------------------
k1/l1 dffr clk1 (+) Scannable Identified
k2/m2 dffr clk1 (-) NonScannable UserNonScan
-------------------------------------------------------------
Number of instances: 2

This example reports on instances using a specified output format:


report sequental inst -chain chn1 -inst /a1/b1 /a1/b2 -format ST TY PN CN CP
-------------------------------------------------------------
FORMAT: Status Type Pathname ClockName ClockPolarity
-------------------------------------------------------------
23 chn1 a1/b1/c1 clk1 (+)
24 chn1 a1/b1/c2 clk1 (+)
78 chn1 a1/b2/d1 clk1 (+)
96 chn1 a1/b2/d2 clk2 (-)
-------------------------------------------------------------
Number of instances: 4

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Command Dictionary
Report Sequential Instances

Related Commands
Echo Report Scan Cells
Report Circuit Components Run
Report Dft Check

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Command Dictionary
Report Statistics

Report Statistics
Scope: All modes
Usage
REPort STAtistics [{> | >>} file_pathname]
Description
Displays a detailed report of the design’s statistics.
The Report Statistics command displays a detailed statistics report to the screen. The report
includes the following information when in Setup and Dft modes:
• Total number of sequential instances
• Number of defined non-scan instances
• Number of non-scan instances identified by the DRC
• Number of defined scan instances
• Number of scan instances identified by the DRC
• Number of identified scan instances
• Number of scannable instances with test logic
• Number of preexisting scan chains
• The total numbers for the following:
o Total patterns simulated in the preceding fault simulation process. This subgroup
may additionally contain total numbers for the following internal patterns sets:
basic scan patterns
Clock_po patterns
Ram_sequential patterns
Clock_sequential patterns
o Total patterns currently in the test pattern set
o Total CPU time
If a pattern type has no patterns, the report does not display the count for that type. If all patterns
are basic patterns, it will not display any count. And, it counts clock_sequential patterns that are
also clock_po only as clock_sequential patterns.
Arguments
• > file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
creating or replacing the contents of file_pathname.

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Command Dictionary
Report Statistics

• >> file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
appending to the contents of file_pathname.
Examples
The following example displays the statistics report after performing the scan identification
process in Dft mode:
add clocks 0 clock
set system mode dft
run
report statistics
Total number of sequential instances =40
Number of defined nonscan instances =5 (12.50%)
Number of nonscan instances identified by drc =5 (12.50%)
Number of defined scan instances =5 (12.50%)
Number of scan instances identified by drc =5 (12.50%)
Number of identified scan instances =5 (12.50%)
Number of scannable instances =10
Number of scannable instances with test logic =5

Related Commands
Echo

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Command Dictionary
Report Sub Chains

Report Sub Chains


Scope: All modes
Usage
REPort SUb Chains [{> | >>} file_pathname]
Description
Displays a report on the scan sub-chains.
The Report Sub Chains command transcripts the scan sub-chain definition(s), which includes
the scan type, module or instance pathname, name of the sub-chain, defined length of the sub-
chain, scan input of the sub-chain, and the scan output of the sub-chain.
For mux-scan, the report includes the scan enable of the sub-chain.
For clocked-scan, the report includes the scan clock.
For LSSD, the report includes the scan master clock and the scan slave clock.
Arguments
• > file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
creating or replacing the contents of file_pathname.
• >> file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
appending to the contents of file_pathname.
Examples
The following example generates a report for a scan sub-chain:
add sub chains /instA subch1 /si1 /so1 10 mux_scan -sen_core sen -instance
report sub chains
mux_scan: instA subc1 10 si1 so1 sen

Related Commands
Add Sub Chains Echo
Delete Sub Chains

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Command Dictionary
Report Subchain Groups

Report Subchain Groups


Scope: All modes
Usage
REPort Subchain Groups
Description
Displays a report on the sub-chain groups.
The Report Subchain Groups command transcripts the sub-chain group definitions used in Add
Subchain Group command. The definitions include the name of the sub-chain group, the list of
sub-chains, and the type of the sub-chain group.
Examples
The following example illustrates the usage and the output format of the Report Subchain
Groups command.
add subchain group subchaingroup1 subchain1 subchain2 -fixed
add subchain group subchaingroup2 subchain3 subchain4 -flexible
report subchain groups
-----------------------------------------------
SubchainGroupName Type ListOfSubchains ----------------------------
-------------------
subchaingroup1 fixed subchain1
subchain2
subchaingroup2 flexible subchain3
subchain4

Related Commands
Add Subchain Group Delete Subchain Groups
Add Sub Chains Report Sub Chains
Delete Sub Chains

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Command Dictionary
Report Test Logic

Report Test Logic


Scope: All modes
Prerequisites: Test logic or test points must be added with the Insert Test Logic command.
Usage
REPort TEst Logic [-Instance | -Module | -Summary | -Location] [{> | >>} file_pathname]
Description
Displays the test logic that DFTAdvisor added during the scan insertion process.
The Report Test Logic command displays information about the test logic that DFTAdvisor
added during the scan insertion process as a result of the Set Test Logic and Add Test Points
commands.
Arguments
• -Instance
An optional switch that displays the list of instance pathnames and the corresponding DFT
library model that DFTAdvisor inserted as test logic and test points. This option also
includes a summary of the number of each instance-based DFT library model that
DFTAdvisor inserted. This is the default.
• -Module
An optional switch that displays the list of module names, the list of instance pathnames,
and the corresponding DFT library models that DFTAdvisor inserted as test logic and test
points. This option also includes a summary of the number of each module-based DFT
library model that DFTAdvisor inserted.
• -Summary
An optional switch that displays a summary that contains the number of each module and
instance-based DFT library model that DFTAdvisor inserted.
• -Location
An optional switch that displays the pin pathname where DFTAdvisor inserted test logic and
identifies whether it was a result of the test logic settings or test points that you specified.
• > file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
creating or replacing the contents of file_pathname.
• >> file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
appending to the contents of file_pathname.

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Command Dictionary
Report Test Logic

Examples
The following example uses both test logic and test points. The report displays the locations
where DFTAdvisor inserted the test logic as a result of both the Add Test Point command and
the Set Test Logic command:
add cell models and2a -type and
add cell models inv1a -type inv
add cell models mux1a -type mux s a b
add test point /I_6_16/cp control and2a control_input
set test logic -set on -reset on
set system mode dft
run
insert test logic
report test logic -location
/I_6_16/reset (test points)
/I_7_16/set (scan cell)

Related Commands
Add Test Points Echo
Delete Test Points Report Test Points

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Command Dictionary
Report Test Points

Report Test Points


Scope: All modes
Usage
REPort TEst Points [-Full | -Control | -Observe | -Lockup] [-Partition_scan_identified] [{> | >>}
file_pathname]
Description
Displays the test point specifications you created with the Add Test Points command and any
test points that you enabled DFTAdvisor to automatically identify.
The Report Test Points command displays both user-defined and system-defined test points.
You can create user-defined test points with the Add Test Points command. You can enable
DFTAdvisor to automatically identify test points by using a combination of the Setup Scan
Identification, Setup Test_point Identification, Setup Test_point Insertion, and Run commands.
However, DFTAdvisor does not actually generate the test point circuitry until you issue the
Insert Test Logic command.
The report marks the system-defined test points with “[Selected]” prior to the test point
information.
Arguments
• -Full
An optional switch that specifies to display all of the information available on both control
and observe test points for both the user-defined and the system-defined test points. This is
the default.
• -Control
An optional switch that specifies to display all the test point definitions (both user- and
system-defined) that are for the purpose of enabling better test coverage in design areas
where, previously, DFTAdvisor could not force certain state values.
• -Observe
An optional switch that specifies to display all the test point definitions (both user- and
system-defined) that are for the purpose of enabling better test coverage by allowing the
tester access to certain fault effects.
• -Lockup
An optional switch that specifies to display all test points (both user- and system-defined)
with added lockup latches.
• -Partition_scan_identified
An optional switch that specifies to display the test points that have been added
automatically by DFTAdvisor during the partition scan identification process. Such test
points may be added only if the -Test_points switch is specified with the Setup Partition

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Command Dictionary
Report Test Points

Scan command. The -Control and -Observe switches can be used along with this switch to
display either control or observe test points of this type. Otherwise, -Full switch is assumed.
• > file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
creating or replacing the contents of file_pathname.
• >> file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
appending to the contents of file_pathname.
Examples
The following example creates one user-defined control point and one user-defined observe
point and then reports their definitions:
add test point /I_7_16/q observe_output
add cell models and2a -type and
add cell models sdff1a -type sdff clk data
add test point /I_6_16/reset control and2a tp_clk -new_scan_cell sdff1a
insert test logic
report test points
Control: /I_6_16/reset and2a tp_clk sdff1a (internal scan)
ctlff1
Observe: /I_7_16/q observe_output

The control point report columns consists of the control point pathname, the library model name
used for the control point, the top-level clock pin specified for the control point scan cell, the
library model name used for the scan cell, the type of scan chain the test point inserted into, and
the instance pathname for the scan cell inserted. The last two columns are not printed if the
command is issued before the Insert Test Logic command.
The observe point report columns consists of the observe point pathname and the primary
output pin created for the observe point.
Related Commands
Add Test Points Run
Delete Test Points Setup Partition Scan
Echo Setup Scan Identification
Insert Test Logic Setup Test_point Identification
Report Test Logic Setup Test_point Insertion

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Command Dictionary
Report Testability Analysis

Report Testability Analysis


Scope: Dft mode
Prerequisites: You must first issue the Analyze Testability command to calculate the values on
which to report.
Usage
REPort TEstability Analysis [pathname] [-Controllability | -OBservability] [{-Number
integer} | {-Percent integer} | {-OVer integer}]
Description
Displays the results of the Analyze Testability command.
The Report Testability Analysis command displays a columnar list of either the controllability
or observability values for each pin in the flattened design. The -Controllability and
-Observability switches determine the column definitions.
Note
When this command is run from within the graphical user interface, the output (which
can be very large) is sent into a separate window. The output is not sent to the session
transcript window for performance reasons.

The Analyze Testability command calculates the controllability and observability values for
each gate in the flattened design. If the design’s fault coverage in FastScan or FlexTest is lower
than you desire, you can re-invoke DFTAdvisor to perform the testability analysis, which
allows you access to the controllability and observability values. You can then generate test
points (either manually or automatically) based on the results of the testability analysis to help
increase the design’s fault coverage.
If you are going to manually investigate the results of the testability analysis and insert user-
defined test points, you need to use the Add Test Points command. If you are going to have
DFTAdvisor automatically identify (system-defined) test points, you need to use a combination
of the Setup Scan Identification, Setup Test_point Identification, and Run commands.

Tip: For more information, see “Setting Up for Test Point Insertion” in the Scan and
ATPG Process Guide.

Arguments
• pathname
An optional string that specifies the instance name whose pins for which you want
DFTAdvisor to display the controllability or observability values. The default is all pins for
all instances.

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Command Dictionary
Report Testability Analysis

• -Controllability
An optional switch that specifies for DFTAdvisor to only display the pin controllability
values. This is the default. The controllability report displays the following information in
columnar format:
o The controllability value for the low logic state
o The controllability value for the high logic state
o The primitive gate type
o The gate identification number
o The pathname to the gate
If DFTAdvisor cannot control the inputs of a gate, the report displays NC (non-controllable)
for the corresponding logic state.
• -OBservability
An optional switch that specifies for DFTAdvisor to only display the pin observability
values. The observability report displays the following information in columnar format:
o The observability value
o The primitive gate type
o The gate identification number
o The pathname to the gate
If DFTAdvisor cannot observe the outputs of a gate at any observation point, the report
displays NO (non-observable).
• -Number integer
An optional switch and integer pair that specifies the maximum number of pins whose
values you want to display. If you specify the -Number switch, you must provide the
associated integer.
• -Percent integer
An optional switch and integer pair that specifies the percentage of the total number of
available design pins whose values you want to display. You determine the total number of
available design pins by whether you specify or do not specify the instance pathname
argument. If you specify the -Percent switch, you must provide the associated integer.
• -OVer integer
An optional switch and integer pair that specifies the minimum controllability or
observability values whose pins you want to display. If you specify the -Over switch, you
must provide the associated integer.

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Command Dictionary
Report Testability Analysis

Examples
The following example displays the controllability values of five percent of all the pins in the
design.
set system mode dft
setup scan identification none
analyze testability -scoap_only
setup test_point identification -control 1
run
// Performing test_point identification ...
// Number of control points to be identified = 1
// Number of observe points to be identified = 0
// 1: CV1=16458417 gate_index=3805 INV /CNTR/U783/ZN

report testability analysis -controllability -percent 5


NC 0 BUF 25 /I_6_16
0 NC INV 27 /I_7_14
100 1 BUF 39 /I_8_21

The report displays the controllability value for the low logic state (where NC means non-
controllable), the controllability value for the high logic state, the primitive gate type, the gate
identification number, and the pathname to the gate.
Related Commands
Analyze Testability

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Command Dictionary
Report Tied Signals

Report Tied Signals


Scope: All modes
Usage
REPort TIed Signals [-Class {Full | User | System}] [{> | >>} file_pathname]
Description
Displays a list of the tied floating signals and pins.
The Report Tied Signals command displays either the user class, system class, or full classes of
tied floating signals and pins. If you do not specify a class, the command displays all the tied
floating signals and pins.
Arguments
• -Class Full | User | System
An optional switch and literal pair that specifies the source (or class) of the tied floating
signals or pins which you want to display. The valid literals are as follows:
Full — A literal that specifies to display all the tied floating signals or pins in the user
and system class. This is the default.
User — A literal that specifies to only display the tied floating signals or pins that you
created by using the Add Tied Signals command. This includes all instance-based
blackbox tied signals.
System — A literal that specifies to only display the tied floating signals or pins
described in the netlist.
• > file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
creating or replacing the contents of file_pathname.
• >> file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
appending to the contents of file_pathname.
Examples
The following example will display the tied signals from the user class.
add tied signals 1 vcc vdd
report tied signals -class user

Related Commands
Add Tied Signals Report Black Box
Delete Tied Signals Setup Tied Signals

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Command Dictionary
Report Timeplate

Report Timeplate
Scope: All modes except Setup mode
Usage
REPort TImeplate timeplate_name | -All [{> | >>} file_pathname]
Description
Displays the specified timeplate.
The Report Timeplate command displays all timeplates or the specified timeplate.
Arguments
• timeplate_name
A string that specifies which timeplate to display.
• -All
A switch that specifies for the tool to display all timeplates. This is the default.
• > file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
creating or replacing the contents of file_pathname.
• >> file_pathname
An optional redirection operator and pathname pair, used at the end of the argument list, for
appending to the contents of file_pathname.
Related Commands
Add Scan Groups Write Procfile
Read Procfile
Report Procedure

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Command Dictionary
Report Variables

Report Variables
Scope: All modes
Usage
REPort VAriables
Description
Displays user-defined variables and values.
The Report Variables command displays the list of user-defined variables and their
corresponding values. This list does not include environment variables defined in the parent
shell environment.
Variables are defined, referenced, and reported on in the following manner:
1. Defining — Use the following syntax to create and set a variable’s value. Define
variables from the tool’s command line, throughout a dofile, or from a startup file.
$variable = value

2. Referencing — To refer to a variable causes its value to be substituted into a command.


Multiple variable references are allowed per tool command. You must define variables
before they are referenced.
${variable}

If a variable is not meant to be concatenated with any other strings, then use the
$variable-name construct as in the following example:
insert test logic -max_length $MAX_SCAN_LEN -scan on

Variables are not expanded if there has been no definition. This condition behaves like
any other syntax error that may be present on the command line or within a dofile.
3. Reporting — Use the Report Variables command to display user-defined variables and
values.
REPort VAriables

Examples
The following example defines four variables, refers to them within tool commands, and
displays a list of all variables:
...
set system mode dft
$design_base_file = scan
$design_base_dir = /$USER/dft_scan_designs
$max_scan_len = 100
$revision = 1.42
run
synthesize
write netlist -verilog ${design_base_dir}/${design_base_file}.v
report variables

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Command Dictionary
Report Variables

design_base_dir /$USER/dft_scan_designs
design_base_file scan
revision 1.42
max_scan_len 100

Note
As $USER is defined in the parent shell environment, it is available for use within the
tool and in other variable definitions.

The next example invokes DFTAdvisor with a parameterized dofile:


A UNIX script file can contain the variable settings:
#!/bin/csh
setenv MY_DESIGN m8051
setenv NUM_SCAN_CHAINS 8
dftadvisor -verilog ${MY_DESIGN}.v -library atpg.lib
-dofile scan.do

And the scan.do file can reference the variables:


echo "... processing $MY_DESIGN "

analyze control signals -auto_fix


set test logic -reset on -set on
set system mode dft
setup scan identification full_scan
run

echo "... insert $NUM_SCAN_CHAINS scan chains"


insert test logic -number $NUM_SCAN_CHAINS

report scan chains > reports/${MY_DESIGN}.chain.report


report test logic -summary >
reports/${MY_DESIGN}.testlogic.report

write netlist netlists/${MY_DESIGN}_scan.v -verilog -rep


write atpg setup scripts/${MY_DESIGN} -rep

exit

Related Commands
Printenv

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Command Dictionary
Report Write Controls

Report Write Controls


Scope: All modes
Usage
REPort WRite Controls
Description
Displays the currently defined write control lines and their off-states.
The Report Write Controls command displays the write control lines, with corresponding off-
states, that you previously added by using the Add Write Controls command.
Examples
The following example adds four write control lines and then displays a list of the control line
definitions:
add write controls 0 w1 w3
add write controls 1 w2 w4
report write controls

Related Commands
Add Write Controls Delete Write Controls

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Command Dictionary
Reset State

Reset State
Scope: All modes
Usage
RESet STate
Description
Removes all instances from both the scan identification and test point identification lists that
DFTAdvisor identified during a run.
The Reset State command removes scan instances or test points identified with the Run
command. If, however, you have stitched the scan chain or inserted test points, this command
has no effect on these.
Examples
The following example performs a full scan identification process, then removes the identified
scan instances and performs a 75 percent ATPG scan identification process:
set system mode dft
setup scan identification full_scan
run
report sequential instances
.
.
.

reset state
setup scan identification sequential atpg -percent 75
run
report sequential instances
.
.
.

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Command Dictionary
Ripup Scan Chains

Ripup Scan Chains


Scope: Dft mode
Usage
RIPup SCan Chains {-All | chain_name…} [-Output] [-Keep_scancell [Off | Tied | Loop |
Buffer]] [-Model model_name]
Description
Removes the specified scan chains from the design.
The Ripup Scan Chains command removes scan chains that DFTAdvisor placed during the scan
insertion process. You can remove (rip up) either all the scan chains or individual scan chains.
You can also rip up the scan chain output pin.
If you only want to remove a scan chain definition that you previously created with the Add
Scan Chains command, use the Delete Scan Chains command.
This command removes any inserted lockup latch under the following conditions:
a.) The latch is an instance of a cell library model previously defined as a DLAT model.
b.) After chain removal, the instance has only one connected port and that port was
declared as the clock/enable port.
Note that lockup latch insertion is optional. Normally, you would not allow lockup latch
insertion during the DFTAdvisor session(s) before layout. Lockup latch insertion should be
activated during the DFTAdvisor session after placement.
Note
If the design contains test logic in addition to scan circuitry, this command only removes
the scan circuitry, not the test logic.

Arguments
• -All
A switch that specifies to remove all scan chains.
• chain_name
A repeatable string that specifies the names of the scan chains that you want to remove.
• -Output
An optional switch that specifies that the existing scan chain output pins are to be ripped up
together with the scan chains.
• -Keep_scancell [Off | Tied | Loop | Buffer]
An optional switch and literal pair that specifies to remove the connection between the scan
input/output ports of each scan cell. The connections of all other ports are not altered and the
scan cells are not mapped to their non-scan models. If this switch is not specified, the default

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Command Dictionary
Ripup Scan Chains

is to remove the connections of all test ports and map the scan cells back to their original
non-scan model.
Off — DFTAdvisor disconnects the scan_out pin and scan_in pin and leaves them
dangling. This is the default.
Tied — DFTAdvisor disconnects the scan_out pin and scan_in pin and ties them to
ground.
Loop — DFTAdvisor disconnects the scan_out pin and scan_in pin and connects them
to each other as a self-loop for each scan cell.
Buffer —DFTAdvisor disconnects the scan_out pin and scan_in pin and connects them
to each other as a self-loop with a buffer in between for each scan cell.
• -Model model_name
An optional switch and string pair that specifies the name of a buffer in the ATPG library for
DFTAdvisor to insert in the self-loop. This option is only valid if you specify the
“-Keep_scancell Buffer”. You must first identify the buffer with either the Add Cell Models
command or with the cell_type library attribute. If you do not specify the -Model switch, by
default, DFTAdvisor uses the first buffer model in the buffer cell model list—see the Report
Cell Models command.
Examples
The following example illustrates usage of the Ripup Scan Chains command.
add clocks 0 clock
add scan groups group1 scan.testproc
add scan chains chain1 group1 scan_in1 scan_out1
set system mode dft
report scan chains
ripup scan chains -all

Related Commands
Add Scan Chains Report Scan Chains

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Command Dictionary
Run

Run
Scope: Dft mode
Usage
RUN
Description
Runs the scan or test point identification process.
The Run command performs the scan or test point identification process in Dft mode depending
on the identification type you set with the Setup Scan Identification command. The Run
command performs the scan identification process, as indicated by the Setup Scan Identification
command (if the identification type is set to -Sequential), and the test point identification
process as indicated by the Setup Test_point Identification command.
During the identification run, DFTAdvisor displays progress messages. The first number
indicates the number of instances currently identified for scan (added to the scan candidate list).
During the controllability phase, the second number indicates the estimated percentage of
toggle coverage. During the observability phase, this number indicates the estimated
observability coverage of stuck-at faults. For example, if you set the identification type to
sequential, the tool may display the following for the controllability phase:
// Sequential instances identified = 238 (Controllability = 97.31%)

Examples
The following example runs a scan identification process:
set system mode dft
setup scan identification sequential atpg
run
report sequential instances

Related Commands
Setup Scan Identification Setup Test_point Identification

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Command Dictionary
Save History

Save History
Scope: All modes
Usage
SAVe HIstory filename [-Replace]
Description
Saves the command line history file to the specified file.
The Save History command saves the list of previously executed commands in the file that you
specify. You can then execute the file using the Dofile command.
Arguments
• filename
A required string that specifies the name of the file in which the tool saves the command line
history list.
• -Replace
An optional switch that specifies for the tool to overwrite the contents of filename, if a file
by that name already exists.
Examples
The following example displays the current history list, then saves it in a file called my_history,
which already exists.
history -nonumbers
add clocks 0 clock
set system mode dft
setup scan identification sequential atpg -percent 50
run
setup scan insertion -seb MY_SEN
insert test logic -nolimit
report scan chains
ripup scan chains -all
set system mode setup
set system mode dft
reset state
setup scan identification sequential atpg -percent 50
run
insert test logic -max_length 100
report scan chains
history -nonumbers

save history my_history -replace

Related Commands
Dofile Set Command Editing
History

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Command Dictionary
Set Capture Clock

Set Capture Clock


Scope: All modes
Usage
SET CApture Clock primary_input_pin [-Atpg]
Description
Specifies the capture clock name for random pattern simulation.
The Set Capture Clock command specifies the name of the capture clock that the tool uses
during random pattern simulation. You can specify the name of either a specific pin or a clock
procedure in a test procedure file that identifies the pin. In either case, the pin must be a
currently defined clock pin. Also, the capture clock that you specify cannot have a pin
constraint.
If you do not specify a capture clock with this command, DFTAdvisor sets the capture clock to
none. If there is no capture clock and there is only one clock in the circuit that is not a set or
reset line, DFTAdvisor sets that clock as the capture clock during rules checking and displays a
warning message that identifies the capture clock.
You can use the Report Environment command to list the capture clock and the Report Clocks
command to identify the current list of clocks.
Arguments
• primary_input_pin
A string that specifies the name of the primary input pin that you want to assign as the
capture clock.
• clock_procedure_name
A string that specifies the name of the clock procedure in the test procedure file that
identifies the primary input pin that you want to assign as the capture clock.
• -Atpg
An optional switch that specifies for the tool to use the capture clock for all scan patterns it
creates during the ATPG process, and places in the internal pattern set.
Examples
The following example specifies a capture clock:
add clocks 1 clock1
set capture clock clock1
set system mode dft

Related Commands
Add Clocks Report Clocks
Delete Clocks Report Environment

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Command Dictionary
Set Command Editing

Set Command Editing


Scope: All modes
Usage
SET COmmand Editing -Off | -Vi | -Emacs | -Gmacs
Description
Sets the command line editing mode.
The Set Command Editing command lets you override the command line editing mode set in the
UNIX environment. You can perform command line editing if you set the VISUAL or EDITOR
ksh environment variable to either vi, emacs, or gmacs editing. Please see the ksh(1) man page
for specifics on the various editing modes.
When you issue this command, the tool uses the editing mode that you select without affecting
your UNIX environment variables or settings. Valid editing modes are vi, emacs, and gmacs.
You can also turn off command line editing.
Note
If your VISUAL or EDITOR ksh environment variable is not set to a valid editing mode,
or is not set at all, the tool behaves as if the Set Command Editing command is set to -Off.

Arguments
• -Off | -Vi | -Emacs | -Gmacs
A required switch that specifies the command line editing mode.
-Off — Turns command line editing off.
-Vi — Sets vi as the command line editing mode, overriding your UNIX setting.
-Emacs — Sets emacs as the command line editing mode, overriding your UNIX setting.
-Gmacs — Sets gmacs as the command line editing mode, overriding your UNIX
setting.
Examples
The following example displays the VISUAL ksh environment variable, and then sets the
command line editing mode to vi within the tool.
system echo $VISUAL
emacs
set command editing -vi

Related Commands
History Save History

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Command Dictionary
Set Contention Check

Set Contention Check


Scope: All modes
Usage
SET COntention Check OFf | {ON [-ATpg] [-Start frame#]} [-Bus | -Port | -ALl]
Description
Specifies whether DFTAdvisor checks the gate types that you determine for contention.
The Set Contention Check command specifies whether contention checking is on and the
conditions under which the tool performs the checks. When contention checking is on,
DFTAdvisor checks for contention during the ATPG-based identification run. Contention
checking is set to On upon invocation of the tool.
Arguments
• OFf | ON
A literal that specifies whether the tool should perform contention checking, during
simulation, without propagating captured data effects. The invocation default behavior is
On.
• -ATpg
An optional switch that specifies for DFTAdvisor to use deterministic fault simulation when
identifying non-scan cells.
• -Start frame#
An optional switch and integer pair that specifies the number of timeframes after design
initialization when DFTAdvisor begins the contention check. The default is time frame 0.
Due to sequential initialization, the initial states on a bus may be unknown, and possible
contention may be unavoidable. Thus, this switch allows you to begin the contention
checking after the design has initialized.
• -Bus
An optional switch that specifies for DFTAdvisor to perform contention checking tri-state
driver buses. This is the default.
Tri-state logic allows several bus drivers to time share a bus. However, if the circuit enables
two bus drivers of opposite logic to drive the bus, physical damage can happen. This switch
allows the tool to identify these conditions and notify you of their existence.
• -Port
An optional switch that specifies for DFTAdvisor to perform contention checking for
multiple-port flip-flops and latches. The tool identifies any multiple-port latch or flip-flop
that has more than one clock, set, or reset input active (or at X).

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Command Dictionary
Set Contention Check

• -ALl
An optional switch that specifies for DFTAdvisor to perform contention checking for both
tri-state driver buses and multiple-port flip-flops and latches.
Examples
The following example performs contention checking on both multiple-port sequential gates
and tri-state buses, stops the simulation if any bus contention occurs, and displays an error
message that will indicate the gate on which the contention occurred:
set system mode dft
set contention check on -all
run

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Command Dictionary
Set Control Threshold

Set Control Threshold


Scope: All modes
Usage
SET COntrol Threshold integer
Description
Specifies the controllability value for simulation-based pseudorandom pattern test point
identification.
The Set Control Threshold command specifies the minimum number of times a gate must be at
a zero and a one state during simulation. The simulation is a set of pseudorandom patterns
defined for test point insertion using the Setup Test_point Identification command. Gates that
do not meet the threshold are candidates for test points.
Arguments
• integer
A required integer, greater than or equal to 0, that specifies the controllability value. The
default upon DFTAdvisor invocation is 4.
Examples
The following example sets the threshold number to determine the controllability effects during
pseudorandom pattern test point identification:
set control threshold 2
set observe threshold 4
setup test_point identification -control 9 -obs 20 -patterns 32000
setup test_point insertion -cshare 10 -oshare 10
set system mode dft
setup scan identification none
run

Related Commands
Set Observe Threshold Setup Test_point Identification
Setup Scan Identification

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Command Dictionary
Set Display

Set Display
Scope: All modes
Usage
SET DIsplay display_name
Description
Sets the DISPLAY environment variable from the tool’s command line.
The Set Display command sets the DISPLAY environment variable to display_name without
exiting the currently running application. If you invoke the tool using the -Nogui invocation
switch, the DISPLAY variable is not required in order to use most commands successfully.
Note
This command effects the DISPLAY setting within the currently running application
only. When you exit the tool, the setting in the invocation shell will be what it was when
you invoked the tool.

Arguments
• display_name
A required string that specifies a valid display setting for the machine on which the tool is
running.
Examples
The following example sets the DISPLAY variable. The example also uses the System
command to pass a UNIX “echo $DISPLAY” command to the shell in order to check the
variable’s setting.
system echo $DISPLAY

set display my_workstation:0.0


system echo $DISPLAY
my_workstation:0.0

Related Commands
System

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Command Dictionary
Set Dofile Abort

Set Dofile Abort


Scope: All modes
Usage
SET DOfile Abort ON | OFf | Exit
Description
Lets you specify that the tool complete processing of all commands in a dofile regardless of an
error detection.
By default, if an error occurs during the execution of a dofile, processing stops, and the line
number of the error in the dofile is reported. The Set Dofile Abort command lets you turn this
functionality off so that the tool continues to process all commands in the dofile.
Arguments
• ON
A required literal that halts execution of a dofile upon detection of an error. This is the
default upon invocation of the tool.
• OFf
A required literal that forces dofile processing to complete all commands in a dofile
regardless of error detection.
• Exit
A required literal that directs the tool to exit if it detects an error while executing a dofile.
Use this setting to prevent a batch job from hanging at the application prompt when an error
occurs in a dofile.
Examples
The following example sets the Set Dofile Abort command off to ensure that all commands in
test1.dofile are executed.
set system mode dft
set dofile abort off
dofile test1.dofile

Related Commands
Dofile

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Command Dictionary
Set Drc Handling

Set Drc Handling


Scope: Setup and Dft modes
Usage
SET DRc Handling rule_id [Error | Warning | NOTe | Ignore] [NOVerbose | Verbose]
[NOAtpg_analysis | Atpg_analysis] [-Mode {Sequential | Combinational}]
Description
Specifies how DFTAdvisor globally handles design rule violations.
The Set Drc Handling command specifies the handling of the messages for the scan cell RAM
rules checking, Clock rules checking, Data rules checking, Extra rules checking, procedure file
checking, and Trace rules checking. You can specify that the violation messages for these
checks be either error, warning, note, or ignore.
Note
The Set Drc Handling command does not support the scannability (S) rules, except for
the S3 rule. Unlike the other DRC rules, setting the handling type to “Error” does not turn
on the transcript verbosity for the S3 rule. The verbosity can only be turned on via the
optional literal “verbose”.

Each rules violation has an associated occurrence message and summary message. The tool
displays the occurrence message only for either error conditions or if you specify the Verbose
option for that rule. The tool displays the rule identification number in all rules violation
messages.
The Atpg_analysis option provides full test generation analysis when performing rules checking
for some clock (C) rules, for some data (D) rules, and for some extra (E) rules. For example, if
you specify Atpg_analysis for clock rule C1 and the tool simulates a clock input to be X, the
rule violation occurs when it is possible for the test generator to create a test pattern while that
clock input is on, all defined clocks are set off, and constrained pins are set to their constrained
state.
Note
When you specify Atpg_analysis, the tool requires some additional CPU time and
memory to perform the full test generation analysis. (The Atpg_analysis option is enabled
by default for rules C1, E4, E10, E11 and E13; you can disable it for these rules by
specifying the Noatpg_analysis option.)

Arguments
• rule_id
A required literal that specifies the identification of the exact design rule violations whose
message handling you want to change.

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Command Dictionary
Set Drc Handling

The design rule violations and their identification literals are divided into the following six
groups: RAM, Clock, Data, Extra, Procedure, and Trace rules violation IDs.
The following lists the RAM rules violation IDs. For a complete description of these
violations, refer to the “RAM Rules” section in the Design-for-Test Common Resources
Manual.
A1 — When all write control lines are at their off-state, all write, set, and reset inputs of
RAMS must be at their inactive state.
A2 — A defined scan clock must not propagate to a RAM gate, except for its read lines.
A3 — A write or read control line must not propagate to an address line of a RAM gate.
A4 — A write or read control line must not propagate to a data line of a RAM gate.
A5 — A RAM gate must not propagate to another RAM gate.
A6 — All the write inputs of all RAMs and all read inputs of all data_hold RAMs must
be at their off-state during all test procedures, except test_setup.
A7 — When all read control lines are at their off-state, all read inputs of RAMs with the
read_off attribute set to hold must be at their inactive state.
The following lists the Clock rules violation IDs. For a complete description of these
violations, refer to the “Clock Rules” section in the Design-for-Test Common Resources
Manual.
C1 — The netlist contains the unstable sequential element in addition to the backtrace
cone for each of its clock inputs. The pin data shows the value that the tool simulates
when all the clocks are at their off-states and when the tool has set all the pin
constraints to their constrained values.
C2 — The netlist contains the failing clock pin and the gates in the path from it to the
nearest sequential element (or primary input if there is no sequential element in the
path). The pin data shows the value that the tool simulates when the failing clock is
set to X, all other clocks are at their off-states, and when the tool has set all pin
constrains to their constrained values.
C3 | C4 — The netlist contains all gates between the source cell and the failing cell, the
failing clock and the failing cell, and the failing clock and the source cell. The pin
data shows the clock cone data for the failing clock.
C5 | C6 — The netlist contains all gates between the failing clock and the failing cell.
The pin data shows the clock cone data for the failing clock.
C7 — The netlist contains all the gates in the backtrace cone of the bad clock input of
the failing cell. The pin data shows the constrained values.
C8 | C9 — The netlist contains all the gates in the backtrace cone of the failing primary
output. The pin data shows the clock cone data for the failing clock.
The following lists the Data rules violation IDs. For a complete description of these
violations, refer to the “Scan Cell Data Rules” section in the Design-for-Test Common
Resources Manual.

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Command Dictionary
Set Drc Handling

D1 — The netlist contains all the gates in the backtrace cone of the clock inputs of the
disturbed scan cell. The pin data shows the pattern values the tool simulated when it
encountered the error.
D2 — The netlist contains all the gates in the backtrace cone of the failing gate. The pin
data shows the values the tool simulated for all time periods of the shift procedure.
D3 — The netlist contains all the gates in the backtrace cone of the failing gate. The pin
data shows the values the tool simulates for all time periods of the master_observe
procedure.
D4 — The netlist contains all the gates in the backtrace cone of the failing gate. The pin
data shows the values the tool simulates for all time periods of the skew_load
procedure.
D5 — The netlist contains the disturbed gate, and there is no pin data.
D6 | D7 | D8 — The netlist contains all the gates in the backtrace cone of the clock
inputs of the failing gate. The pin data shows the value that the tool simulates when
all clocks are at their off-states.
D9 — The netlist contains all the gates in the backtrace cone of the clock inputs of the
failing gate. The pin data shows the pattern value the tool simulated when it
encountered the error.
The following lists the Extra rules violation IDs. For a complete description of these
violations, refer to the “Extra Rules” section in the Design-for-Test Common Resources
Manual.
E1 — All scan cells must be LSSD scan cells that contain a master and slave latch.
E2 — There must be no inversion between adjacent scan cells, the scan chain input pin
(SCI) and its adjacent scan cell, and the scan chain output pin (SCO) and its adjacent
scan cell.
E3 — There must be no inversion between MASTER and SLAVE for any scan cell.
E4 — Tri-state drivers must not have conflicting values when driving the same net
during the application of the test procedures.
E5 — When constrained pins are placed at their constrained states, and binary states are
placed on PIs and scan cells, X states must not be capable of propagating to an
observable point.
E6 — When constrained pins are placed at their constrained states, the inputs of a gate
must not have sensitizable connectivity to more than one memory element of a scan
cell.
E7 — External bidirectional drivers must be at the high impedance (Z) state during the
application of the test procedure.
E8 — All masters of all scan cells of a scan chain must use a single shift clock.
E9 — The drivers of wire gates must not be capable of driving opposing binary values.
E10 — Performs bus contention mutual-exclusivity checking. Similar to E4, but does
not check for this condition during test procedures.

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Command Dictionary
Set Drc Handling

E11 — The ability of a bus gate to attain a Z state.


E12 — The test procedures cannot violate any ATPG constraints.
E13 — Satisfy both ATPG constraints and bus contention prevention (for buses that fail
rule E10).
The following lists the Procedure rules violation IDs for which you can change their
handling to “ignore”. Otherwise these are errors. For a complete description of these
violations, refer to the “Procedure Rules” section in the Design-for-Test Common Resources
Manual:
P30 — A procedure may not place a clock at its on-state at the same time it forces a non-
clock pin to a value or place another clock at its off-state.
P31 — A procedure may not force a non-clock pin to a value at the same time it forces a
clock pin to a value.
P32 — A procedure may not place a clock at its off-state at the same time it places
another clock at its on-state.
P33 — When a pattern places a clock at its off-state, all clocks must be at their off-state.
The following lists the Scannability rules violation IDs. For a complete description of these
violations, refer to the “Scannability Rules” section in the Design-for-Test Common
Resources Manual:
S1 — Checks all the clock inputs (including sets and resets) of each non-scan memory
element to ensure that these inputs can be turned off.
S2 — Checks all clock inputs (not including sets and resets) of each non-scan memory
element to see whether they can capture data.
S3 — Checks all the clock inputs (not including sets and resets) of each non-scan
memory element to detect any un-initialized (not pin constrained) and non-clock PIs
feeding the clock cones.
S4 — Checks for non-scan memory elements that can be converted to scan elements,
and that are also initialized to a static value during test setup.
The following lists the Trace rules violation IDs. For a complete description of these
violations, refer to the “Scan Chain Trace Rules” section in the Design-for-Test Common
Resources Manual:
T1 — All defined scan chains must contain at least one scan cell.
T2 — The netlist contains the blocked gate. The pin data shows the values the tool
simulates for all time periods of the shift procedure.
T3 — The netlist contains all the gates in the backtrace cone of the blocked gate. The
pin data shows the values the tool simulates for all time periods of the shift
procedure.
T4 — The netlist contains all the gates in the backtrace cone of the clock inputs of the
blocked gate. The pin data shows the values the tool simulates for all time periods of
the shift procedure.

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Command Dictionary
Set Drc Handling

T5 | T6 — The netlist contains all the gates in the backtrace cone of the clock inputs of
the blocked gate. The pin data shows the values the tool simulates for all time periods
of the shift procedure.
T9 — The traced scan chain input pin must be the same as the entered scan chain input
pin.
T11 — A clock input of the memory element closest to the scan chain input must not be
turned on during the shift procedure prior to the time of the force_sci statement.
T12 — If a scan cell contains a SLAVE, the MASTER is not directly observable.
T16 — When clocks and write control lines are off and pin constraints are set, the gate
that connects to the input of a reconvergent pulse generator sink gate (PGS) in the
long path must be at the non-controlling value of the PGS gate.
T17 — Reconvergent pulse generator sink gates cannot be connected to any of the
following: primary outputs, non-clock inputs of the scan memory elements, ROM
gates, non-write inputs of RAMs, and transparent latches.
T18 — The maximum traced number of cells in the longest scan chain of a group must
equal the entered number of repetitions in the apply shift statement in the
load_unload procedure.
T19 — If a scan cell has a SLAVE, then all scan cells must have a SLAVE.
T20 — The number of shifts specified using the Set Number Shifts command must be at
least equal to the length of the longest scan chain,
• Error
An optional literal that specifies for the tool to both display the error occurrence message
and immediately terminate the rules checking.
• Warning
An optional literal that specifies for the tool to display the warning summary message
indicating the number of times the rule was violated. If you also specify the Verbose option,
the tool also displays the occurrence message for each occurrence of the rules violation.
• NOTe
An optional literal that specifies for the tool to display the summary message indicating the
number of times the rule was violated. If you also specify the Verbose option, the tool also
displays the occurrence message for each occurrence of the rules violation.
• Ignore
An optional literal that specifies for the tool to not display any message for the rule’s
violations. The tool must still check some rules and they must pass to allow certain
functions to be performed later.
• NOVerbose
An optional literal that specifies for the tool to display the occurrence message only once for
the rules violation. This is the default.

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Command Dictionary
Set Drc Handling

• Verbose
An optional literal that specifies for the tool to display the occurrence message for each
occurrence of the rules violation.
• NOAtpg_analysis
An optional literal that specifies for the tool to not use full test generation analysis when
performing rules checking. This is the default.
• Atpg_analysis
An optional literal that specifies for the tool to use full test generation analysis when
performing rules checking for clock rules (like C1, C3, C4, and C5), some D rules (like D6
and D9), and some E rules (like E4, E5, E8, E10, E11, and E12).
Note
If you want the tool to use the constraint values during the D6 rule analysis, you need to
use the Atpg_analysis option.

• -Mode {Combinational | Sequential}


An optional switch and literal for the tool to use with the E10 rule. The Combination option
is the default upon invocation of DFTAdvisor. It performs bus contention mutual-
exclusivity checking. This checking differs from rule E4 in that it does not check for this
condition during test procedures.
The Sequential option considers the inputs to a single level of sequential cells behaving as
“staging” latches in the enable lines of tri-state drivers. All of the latches found in a back
trace must share the same clock. There must also be only a single clocked data port on each
cell, and both set and reset inputs must be tied (not pin constrained) to the inactive state.
This check ensures that there is no connectivity from the cells in the input cone of the
sequential cells and enables of the tri-state devices except through the sequential cells.
Examples
The following example specifies rule checking E4 to be an error:
add scan groups group1 scanfile
add scan chains chain1 group1 indata2 outdata4
add clocks 1 clock1
add clocks 0 clock2
set drc handling e4 error
set system mode dft

Related Commands
Report Drc Rules Set Flatten Handling

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Command Dictionary
Setup EDT

Setup EDT
Scope: All modes
Usage
SETup EDt -Location {External | Internal}
Description
The Setup EDT command identifies a design that uses the internal flow and enables the Write
ATPG Setup command to write out EDT-specific commands for the internal flow to the ATPG
setup files.
Arguments
• -Location -Internal | -External
A required switch and literal pair that specifies whether the location of the EDT logic is
internal or external to an existing chip. The default is external flow.
Examples
The following example writes out EDT-specific commands for an internal flow to the ATPG
setup files.
setup edt -location internal
write atpg setup -edt

Related Commands
Write Atpg Setup

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Command Dictionary
Set Fault Sampling

Set Fault Sampling


Scope: All modes
Usage
SET FAult Sampling percentage
Description
The Set Fault Sampling command specifies the fault sampling percentage used for scan
identification. By default, all faults (100 percent) in the internally generated fault list for scan
identification are used.
Fault sampling allows you to use a fraction of the total faults and decrease processing time for
large circuits. Once a percentage is specified, a sample is randomly selected.
Arguments
• percentage
A required positive integer from 1 to 100 that specifies the fault sampling percentage that
you want DFTAdvisor to use for scan identification. The invocation default is 100 percent.
Examples
The following example performs scan identification with only 50 percent of the internally
generated fault list.
add clocks 0 clock
set system mode dft
set fault sampling 50
run
report sequential instances

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Command Dictionary
Set File Compression

Set File Compression


Scope: All modes
Usage
SET FIle Compression [ON | OFf]
Description
Controls whether the tools read and write files with .Z or .gz extensions as compressed files (the
default).
Files that contain large pattern sets consume a very large amount of disk space. Fault lists and
the design data itself also take up a lot of disk space. To conserve this space, the tools normally
store files in one of two compressed formats when you provide a filename with the appropriate
extension, as follows:
• “.Z” specifies to compress the file using the UNIX compress command.
• “.gz” specifies to compress the file using the GNU gzip command. You can control the
type of GNU compression with the Set Gzip Options command.
When compressed file handling is enabled and you provide a filename with either of the above
extensions, a tool will automatically decompress (for reading) or compress (for writing) the
specified file.
The Set File Compression command allows you to turn off the tool’s normal compressed file
handling functionality. This is useful in rare cases where files have either of the compressed file
extensions, but should not be saved or read as compressed files.
Arguments
• ON
An optional literal that enables compressed file handling. This is the default.
• OFf
An optional literal that disables compressed file handling. When set to off, the tools process
.Z or .gz files without using compression.
Examples
Suppose the file testpat.ascii.gz is not a compressed file. The following example disables
compressed file handling so the tool will read testpat.ascii.gz as a normal file rather than as a
compressed file:
set file compression off

The next example re-enables compressed file handling, then saves the file fault.pat in GNU
format:
set file compression on
write netlist verilog.scan.gz -verilog

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Command Dictionary
Set File Compression

Related Commands
Set Gzip Options

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Command Dictionary
Set Flatten Handling

Set Flatten Handling


Scope: All modes
Usage
SET FLatten Handling rule_id [Error | Warning | NOTe | Ignore] [Verbose | NOVerbose]
Description
Specifies how DFTAdvisor globally handles flattening violations.
The Set Flatten Handling command specifies the handling of the messages for net checking, pin
checking, and gate checking. You can specify that the violation messages for these checks be
either error, warning, note, or ignored.
Each rules violation has an associated occurrence message and summary message. The tool
displays the occurrence message for error conditions, or if you specify the Verbose option for
that rule. The tool displays the rule identification number in all rules violation messages.
Arguments
• rule_id
A required literal that specifies the identification of the exact flattening rule violations
whose message handling you want to change.
The flattening rule violations and their identification literals divide into the following three
groups: net, pin, and gate rules violation IDs.
Following are the net rules:
FN1 — A module net is floating. The default upon invocation is warning.
FN2 — A module net has driver and constant value property. The default upon
invocation is warning and its property is not used.
FN3 — An instance net is floating. The default upon invocation is warning.
FN4 — An instance net is not used. The default upon invocation is warning.
FN5 — A multiple driven wired net. The default upon invocation is warning.
FN6 — A bus net attribute cannot be used. The default upon invocation is warning.
FN7 — Two connected nets have inconsistent net attributes. The default upon
invocation is warning and both attributes are not used.
FN8 — Parallel wired behavior. The default upon invocation is warning.
FN9 — The bus net has multiple different bus keepers. The default upon invocation is
warning and their effects are additive.
Following are the pin rules:
FP1 — The circuit has no primary inputs. The default upon invocation is warning
FP2 — The circuit has no primary outputs. The default upon invocation is warning.

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Command Dictionary
Set Flatten Handling

FP3 — The primary input drives logic gates and switch gates. The default upon
invocation is warning.
FP4 — A pin is moved. The default upon invocation is warning.
FP5 — A pin was deleted by merging. The default upon invocation is warning.
FP6 — Merged wired in/out pins. The default upon invocation is warning
FP7 — Merged wired input and output pins. The default upon invocation is warning.
FP8 — A module boundary pin has no name. The default upon invocation is warning.
FP9 — An in/out pin is used as output only. The default upon invocation is ignored.
FP10 — An output pin is used as in/out pin. The default upon invocation is ignored.
FP11 — An input pin is used as in/out pin. The default upon invocation is ignored.
FP12 — An output pin has no fan-out. The default upon invocation is ignored.
FP13 — An input pin is floating. The default upon invocation is warning
Following are the gate rules:
FG1 — The defining model of an instance does not exist. The default upon invocation is
error. If it is not an error condition, this instance is treated as an undefined primitive.
FG2 — The feedback gate is not in the feedback loop. The default upon invocation is
error.
FG3 — The bus keeper has no functional impact. The default upon invocation is
warning
FG4 — The RAM/ROM read attribute is not supported. The default upon invocation is
warning.
FG5 — The RAM attribute not supported. The default upon invocation is warning.
FG6 — The RAM type not supported. The default upon invocation is error.
FG7 — The netlist module has a primitive not supported. The default upon invocation is
error. If non-error is chosen, this primitive is treated as undefined.
FG8 — The library model has a primitive not supported. The default upon invocation is
error. If non-error is chosen, this primitive is treated as undefined.
• Error
An optional literal that specifies for the tool to both display the error occurrence message
and immediately terminate the rules checking.
• Warning
An optional literal that specifies for the tool to display the warning summary message
indicating the number of times the rule was violated. If you also specify the Verbose option,
the tool also displays the occurrence message for each occurrence of the rules violation.

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Set Flatten Handling

• NOTe
An optional literal that specifies for the tool to display the summary message indicating the
number of times the rule was violated. If you also specify the Verbose option, the tool also
displays the occurrence message for each occurrence of the rules violation.
• Ignore
An optional literal that specifies for the tool to not display any message for the rule’s
violations. The tool must still check some rules and they must pass to allow certain
functions to be performed later.
• NOVerbose
An optional literal that specifies for the tool to only display the occurrence message once for
the rules violation and to give a summary of the number of violations. This is the default.
• Verbose
An optional literal that specifies for the tool to display the occurrence message for each
occurrence of the rules violation.
Example
The following example changes the handling of the FG7 flattening rule to warning and specifies
that each occurrence should be listed:
set flatten handling fg7 warning verbose

Related Commands
Report Flatten Rules Set Drc Handling

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Command Dictionary
Set Gate Level

Set Gate Level


Scope: All modes
Usage
SET GAte Level Primitive | Design | Low_design
Description
Specifies the hierarchical level of gate reporting and displaying.
The Set Gate Level command specifies the hierarchical gate level at which the tool reports.
Once you set the gate level, the tool processes all subsequent report and display commands
using the new gate level.
Whenever you issue a command that invalidates the flattened model, the tool also invalidates
the hierarchical gate display structure. You can rebuild the hierarchical gate structure by
creating a new, flattened model. To do so, enter and exit the Setup mode.
Arguments
• Primitive
A literal that specifies to display gate information at the built-in primitive gate level.
• Design
A literal that specifies to display gate information at the design library hierarchical gate
level. These are the top level cells of the design library which are instantiated in your design.
This is the default upon invocation of the tool.
• Low_design
A literal that specifies to display gate information at the pseudo-hierarchical gate level. A
pseudo-hierarchical gate is a cluster gate that contains primitive gates and is at the lowest
hierarchy level in the design library. These gates only differ from design-level gates if the
library contains macro cells.
Examples
The following example sets the gate report level so that simulated values of the gate and its
inputs are shown (assuming a rules checking error occurred when exiting the Setup system
mode):
add clocks 0 clock
set system mode dft
set gate level primitive
set gate report error_pattern
report gates i_1006/o

Related Commands
Report Gates Set Gate Report

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Command Dictionary
Set Gate Report

Set Gate Report


Scope: All modes
Usage
SET GAte REport {Normal | Trace | Error_pattern | TIe_value | Constrain_value |
{Drc_pattern {{Test_setup [{{-Cycle | -Time} n1} [n2 | End]]} | Load_unload | SHIft |
SKew_load | SHADOW_Control | Master_observe | SHADOW_Observe |
STate_stability} [-All | time]}
Description
Specifies the additional display information for the Report Gates command.
The Set Gate Report command controls the type of additional information that the Report Gates
command displays. Each Set Gate Report option causes the Report Gates command to provide
different details regarding the gates on which it reports.
When you exit the Setup system mode, the trace and any rules-checking error pattern results
will not be available with the usage of this command.
Arguments
• Normal
A literal that specifies for the Report Gates command to only display its standard
information. This is the default mode upon invocation of the tool.
• Trace
A literal that specifies for the Report Gates command to display the simulated values of the
gates for the shift patterns. Use the Trace option to determine why a scan chain was not
properly sensitized during the shift procedure.
• Error_pattern
A literal that specifies for the Report Gates command to display the simulated value of the
gates and its inputs for the pattern at which an audit error occurred.
• TIe_value
A literal that specifies for the Report Gates command to display the simulated values that
result from all natural tied gates and learned constant value non-scan cells.
• Constrain_value
A literal that specifies for the Report Gates command to display the simulated values that
result from all natural tied gates, learned constant value non-scan cells, constrained pins,
and constrained cells.
The Report Gates command displays three values which are separated by a slash (/). These
values are the gate constrained value (0, 1, X, or Z), the gate forbidden values (-, 0, 1, Z, or
any combination of 01Z), and the fault blockage status (- or B, where B indicates all fault
effects of this gate are blocked).

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Command Dictionary
Set Gate Report

• Drc_pattern procedure_name [-All | time]


Two literals and an optional time triplet that specifies the name of the procedure and the
time in the test procedure file that the Report Gates command uses to display a gates-
simulated value.
The valid options for use with Drc_pattern are as follows:
procedure_name — A literal that specifies a procedure in the test procedure file that
you want the Report Gates command to use when displaying the value of a gate. The
valid literals for the procedure_name option are as follows:
Test_setup — A literal that specifies the use of the test_setup procedure. In the test
procedure file, this procedure sets non-scan elements to the state you desire for
the load_unload procedure. The tool uses the entire test_setup procedure unless
you restrict the report to a certain portion using the -Cycle or -Time switch. In
order to conserve screen width, time values are listed vertically in Test_setup gate
reports.
-Cycle | -Time n1 — A switch and integer pair that specifies to use the part of the
test_setup procedure that begins either at a particular cycle or at a particular time.
The following describes each of the arguments in more detail:
-Cycle — A switch that indicates n1 is a cycle number and specifies to
start the report at cycle n1.
-Time — A switch that indicates n1 is a time and specifies to start the
report at time n1. The time units are based on the timescale defined in the
test procedure file, which by default is 1 nanosecond.
n1 — An integer that specifies a cycle or time at which to start
reporting. When used with the -Time switch, n1 specifies a time.When
used with the -Cycle switch, n1 specifies a cycle. The tool numbers cycles
beginning with 0; so, for example, to specify the second cycle, you would
use “-cycle 1”.
n2 — An optional integer that specifies to report from cycle (or time) n1 to cycle (or
time) n2 and stop reporting.
End — An optional literal that specifies to report from cycle (or time) n1 to the end
of the test_setup procedure.
Note
When using the -Cycle or -Time switch, if you do not include either the n2 or End
argument, gate reports will show data for only the n1 cycle (or time).

Load_unload — this required procedure describes how to load and unload data in
the scan chains.
SHIft — this required procedure describes how to shift data one position down the
scan chain.

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Set Gate Report

SKew_load — this optional procedure describes how to propagate the output value
of the preceding scan cell into the master memory element of the current cell
(without changing the slave) for all scan cells.
SHADOW_Control — this optional procedure describes how to load the contents
of a scan cell into the associated shadow.
Master_observe — this procedure describes how to place the contents of a master
into the output of its scan cell.
SHADOW_Observe — this optional procedure describes how to place the contents
of a shadow into the output of its scan cell.
-All — An optional switch that specifies to use all times in the test procedure file. This is
the default.
time — An optional positive integer greater than 0 that specifies a time in the test
procedure file.
Examples
The following example sets the gate report so that simulated values of the gate and its inputs are
shown (assuming a rules checking error occurred when exiting the setup system mode):
set gate report trace
set system mode dft
report gates I_1006/O

Related Commands
Report Gates Set Gate Level

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Command Dictionary
Set Gzip Options

Set Gzip Options


Scope: All modes
Usage
SET GZip Options [-Path gzip_path] [-Fast | -Best | -integer]
Description
Specifies GNU gzip options to use with the GNU gzip command.
The Set Gzip Options command specifies GNU gzip options the tool will use when compressing
or decompressing files using the GNU gzip command. When file compression handling is
enabled (as described under the Set File Compression command), the tool uses GNU gzip when
processing files have a .gz extension.
Arguments
• -Path gzip_path
An optional literal that specifies the full path gzip_path to a gzip executable file. You need
to provide this pathname only if gzip is not in your normal UNIX search path. If you have
specified a pathname with this option, you can restore the default behavior of using your
UNIX path to find gzip by issuing the command with the -Path gzip option.
The following switches all control the speed of compression:
• -Fast
An optional switch that specifies to use the fastest compression method, which yields the
least compression, and corresponds to the gzip -1 option. This is the default.
• -Best
An optional switch that specifies to use the slowest compression method, which yields the
most compression. This corresponds to the gzip -9 option.
The default compression is -6.
• -digit
An optional switch that specifies an integer from 1 to 9 that the tool passes to gzip to control
the rate of compression. You obtain the least amount of compression with -1, the greatest
amount of compression with -9.
Examples
The following example ensures file compression is enabled, sets gzip compression to the fastest
method, then saves a file using the .gz file naming extension in order to activate gzip file
compression handling:
set file compression on
set gzip options -fast
write netlist verilog.scan.gz -verilog

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Command Dictionary
Set Gzip Options

Related Commands
Set File Compression

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Command Dictionary
Set Identification Model

Set Identification Model


Scope: Setup mode
Usage
SET IDentification Model [-Clock {Original | None | Extra}] [-Disturb {ON | OFf}]
Description
Specifies the simulation model that DFTAdvisor uses to imitate the scan operation during the
scan identification process.
The Set Identification Model command specifies a simulation model needed to imitate scan
operation during scan identification, before real scan chains are inserted.
In normal scan operation, after DFTAdvisor loads values into the scan cells, a scan memory
element should not change its scan-in value until the loaded value is used. To achieve this scan
cell stability, all the clocks of a scan cell should be at their off-state. However, because the
implementation of scan chains is not done yet, DFTAdvisor does not yet know its ability to
control all the clocks. Therefore, the Set Identification Model command allows you three -Clock
options, along with the -Disturb argument, to specify how DFTAdvisor is to handle scan
operation during the scan identification process.
The scan identification process is performed with the Run command and this is the time when
DFTAdvisor selects the non-scan cells that are to be replaced with the corresponding scan cell.
If you want to display the current settings for the scan identification model, you can use the
Report Environment command.
During the scan identification process, DFTAdvisor automatically decides which non-scan cells
require extra logic to fix their clock behavior. When DFTAdvisor performs the scan
identification, it processes each non-scan cell separately. By default, the scan identification
model specifies for DFTAdvisor to use the -Clock Original option for non-scan cells that do not
require the extra logic to control its clocks, and the -Clock Extra option for the non-scan cells
that do require the extra logic for clock controllability.
Arguments
• -Clock Original | None | Extra
An optional switch and literal pair that determines the effect of the clocks on scan memory
elements values. The three -Clock options are as follows:
Original — A literal specifying that scan memory elements operate as their current clock
configuration. This is the default for non-scan cells that DFTAdvisor determines do
not require extra logic for controllability of that non-scan cell’s clocks. If you specify
this option, then DFTAdvisor does not add any extra logic, and uses the original clock
configuration for each non-scan cell on a global design-wide basis.
None — A literal specifying that after scan loading, scan memory elements can hold
their value for one time frame, regardless of their clock values.

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Command Dictionary
Set Identification Model

Extra — A literal specifying that external controllable clocks replace the original clocks
so that the scan cells are capable of holding their scan values right after scan loading.
This option is the default for non-scan cells that DFTAdvisor determines do require
extra logic for controllability of that non-scan cell’s clocks. If you specify this option,
then DFTAdvisor adds extra logic to every non-scan cell on a global design-wide
basis.
• -Disturb ON | OFf
An optional switch and literal pair that determines the effect of scan loading on non-scan
memory elements. The two -Disturb options are as follows.
ON — A literal specifying that the value of the non-scan memory elements can be
disturbed by scan loading operations. This is the default. If the disturb option is on,
DFTAdvisor sets the states of non-scan memory elements to the unknown (X) state
after the scan loading operation.
OFf — A literal specifying that the value of non-scan memory elements cannot be
disturbed by scan loading. When the disturb option is off, the states of the non-scan
memory elements are the same as before the scan loading operation.
Examples
The following example forces DFTAdvisor to add extra primary input pins to replace the
original clocks on a global design-wide basis:
set identification model -clock extra
set system mode dft
setup scan identification full_scan
run

Related Commands
Report Environment

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Command Dictionary
Set Internal Fault

Set Internal Fault


Scope: Setup mode
Usage
SET INternal Fault ON | OFf
Description
Specifies whether the tool allows faults within or on the boundary of library models.
The Set Internal Fault command specifies whether the tool will allow faults on internal nodes of
library models or only on the library model boundary. The default upon invocation of the tool is
to allow faults on the internal nodes of library models.
Arguments
• ON
A literal that specifies to allow faults on the internal nodes of library models. This is the
default upon invocation of the tool.
• OFf
A literal that specifies to allow faults only on the boundary of the library models.
Examples
The following example invokes the scan identification process such that DFTAdvisor does not
take into consideration any internal faults when in calculating the efficiency percentage:
set internal fault off
set system mode dft
setup scan identification full_scan
run

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Command Dictionary
Set Io Insertion

Set Io Insertion
Scope: All modes
Prerequisites: Input and output buffers must be defined in either the ATPG library or by using
the Add Cell Models command.
Usage
SET IO Insertion ON | OFf | {[TEn] [Ram] [SEn] [TClks] [SIns] [SOuts] [Control]
[OBserve] [-Model model_name]}
Description
Specifies whether to insert I/O buffers.
The Set IO Insertion command specifies whether DFTAdvisor should insert I/O buffers
automatically during scan insertion. By having automatic I/O buffer insertion turned off (the
default), you can perform scan insertion at the block level, or insert the I/O buffers manually
after inserting scan at the design level.
If you defined I/O buffers in the ATPG library or used the Add Cell Models command to define
them, when you set this command to ON, DFTAdvisor will automatically insert the I/O buffers
during scan insertion.
You can specify which test control signals should have I/O buffers added. You can specify one
or more of the test signal literal arguments. The specified signals can be internal signals (output
port of a library cell) or new pins generated by DFTAdvisor.
The Set IO Insertion command is additive. This means that each time you issue the command, it
adds any new options to those already defined.
Arguments
• ON | OFf
A required literal that specifies whether to insert I/O buffers for all test signals. If you are
not turning On or Off all test signals, you must specify at least one of the test signal
arguments. If you want to remove any existing I/O buffer signals from the list of signals to
buffer, you turn off I/O buffer insertion (Set IO Insertion off). The default upon invocation
is off.
• TEn
A literal that specifies to buffer the test_enable pin.
• Ram
A literal that specifies to buffer the ram_write_control and ram_read_control pins.
• SEn
A literal that specifies to buffer the scan_enable pin(s).
• TClks
A literal that specifies to buffer all test clock pins, including clock, set, and reset.

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Command Dictionary
Set Io Insertion

• SIns
A literal that specifies to buffer all scan_in pins of inserted scan chains.
• SOuts
A literal that specifies to buffer all scan_out pins of inserted scan chains. No buffer is
inserted unless a buffer has been defined with the “-Type outbuf” option of the Add Cell
Models command, or if you have used the -Model switch, and specified a buffer as part of
this command.
• Control
A literal that specifies to buffer all test point control pins, if no scan cell is requested with
the Setup Test_point Insertion command.
• OBserve
A literal that specifies to buffer all test point observe pins, if no scan cell is requested with
the Setup Test_point Insertion command.
• -Model model_name
An optional switch and string pair that specifies the name of a buffer in the ATPG library for
DFTAdvisor to insert on the test pins. You must first identify the buffer with either the Add
Cell Models command or with the cell_type library attribute. The specified model should be
the OUTBUF type for scan outputs and the INBUF type for all scan inputs and test signals.
If you do not use the -Model switch, by default, DFTAdvisor uses the first buffer model in
the buffer cell model list (which you can see with the Report Cell Models command).
Examples
The following example shows how to enable the adding of I/O buffers automatically to all test
control signals:
set io insertion on

To enable the adding of I/O buffers to only the scan in, scan out, control, and observe signals,
enter:

set io insertion sins souts control observe

Related Commands
Add Buffer Insertion Add Cell Models

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Command Dictionary
Set Latch Handling

Set Latch Handling


Scope: Setup mode
Usage
SET LAtch Handling None | Scan
Description
Specifies whether the tool considers non-transparent latches for scan insertion while test logic is
turned on.
The Set Latch Handling command specifies whether the tool can consider non-transparent
latches as candidates for scan insertion. If you determine that the tool is to consider non-
transparent latches as candidates for scan insertion, you must turn on the appropriate Set Test
Logic command settings before DFTAdvisor performs the rules checking process.
If you use the Set Drc Handling command to set the D6 rule to error or warning, D6 checks the
non-scannable latches for transparency. By default, if they are not transparent and you turned
test logic insertion on, DFTAdvisor does not consider the non-transparent latches for scan
insertion. However, if you use the Scan argument with the Set Latch Handling command,
DFTAdvisor will consider the non-transparent latches for scan insertion.
If you use the Set Drc Handling command to ignore the D6 rule, then rules checking does not
check the non-scannable latches for transparency and DFTAdvisor will automatically consider
all non-scannable latches, whose test logic you turned on, for scan insertion.
Arguments
• None
A literal that specifies to give no consideration to non-transparent latches for scan insertion.
This is the default upon invocation of DFTAdvisor.
• Scan
A literal that specifies to consider non-transparent latches for scan insertion when test logic
is turned on.
Related Commands
Set Drc Handling Set Test Logic

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Command Dictionary
Set Lockup Latch

Set Lockup Latch


Scope: Dft mode
Prerequisites: You must first specify for DFTAdvisor which latch model(s) and inverters to
insert, using the Add Cell Models command.
Usage
SET LOckup Latch {OFf | ON} [-Nolast | -Last] [-First_clock | -SEcond_clock]
Description
Specifies for DFTAdvisor to automatically insert latches between different clock/edge domains
to synchronize the clocks within a scan chain.
If you specify for DFTAdvisor to merge scan cells with different shift clocks into the same scan
chain with the Insert Test Logic command, then you can synchronize the clock edges by
inserting latches between the scan cells that are in different clock domains. The lockup latches
are inserted only on the scan path, so they do not interfere with the functional operation of the
design.
This command turns on the automatic lockup latch insertion mechanism, which inserts a latch at
each transition of different clock domains and active-high to active-low edge domains. The
edge domain of a scan cell is determined by the combined effect of the following parameters.
1. The off-state value of the feeding top-level clock, which is defined by the Add Clocks
command.
2. The overall inversions along the clock path, from the clock pin of the scan cell to the top
level clock pin.
3. The inversions on the clock path within the scan cell library model, which is defined by
using the clock input attribute statement and/or _inv primitives in the library model
definition.

Note
If you define any lockup latches in the cell order file, this command is not used to turn on
automatic lockup latch insertion. Instead, it is used to turn on the reporting mechanism
that warns the user for the transitions where a lockup definition is required but not
specified in the cell order file. For more information on the cell order file, refer to the
Insert Test Logic command.

Before you can issue the Set Lockup Latch command, you must identify the latch model(s) and
inverters you want DFTAdvisor to use with the -Type DLAT and INV arguments, respectively,
to the Add Cell Models command. For a latch model, the Add Cell Models command should be
used as follows.
ADD CEll Models latch_model -Type DLat enable data -Active {High | Low}
DFTAdvisor does not examine or simulate the implementation of the latch model to determine
if it is an active high or active low cell, before inserting as a lockup cell. Therefore, you must

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Command Dictionary
Set Lockup Latch

use the correct edge parameter with the -Active switch to allow correct clock signal inversion
for the enable pin of the latch when inserting the lockup cell. When defining the latch library
model, the enable pin of the latch may be inverted using the clock attribute as “clock =
fall_edge”, using library primitives (i.e _inv), or both. The edge parameter of the -Active switch
then has to reflect the overall inversion on the enable pin, inside the library model.
Table 2-7 summarizes how DFTAdvisor inserts lockup latches at different clock/edge
transitions. In the table, the first column lists different transitions in a chain.
Table 2-7. Latch Use for Different Clock/Edge Domains
Clock/Edge Transition Latch Models Added Latch Inserted
c1+ --> c2+ lat1+ c1+ --> (lat1+ + inv) --> c2+
c1+ --> c2+ lat2- c1+ --> (lat2-) --> c2+
c1+ --> c2+ lat1+, lat2- c1+ --> (lat2-) --> c2+
c1- --> c2- lat1+ c1- --> (lat1+) --> c2-
c1- --> c2- lat2- c1- --> (lat2- + inv) --> c2-
c1+ --> c2- lat1+, lat2- c1+ --> (lat2-) --> c2-
c1- --> c2+ lat1+, lat2- c1- --> c2+ (no lockup)

For example, a transition from an active high-clock to an active-low clock is shown as “c1+ -->
c2-”, where c1 and c2 are scan cells from two different clock domains in the circuit. The second
column lists the latch models defined. In the above table, lat1+ and lat2- are the active-high and
active-low latch models, respectively. The third column lists the transitions after lockup latch
insertion, illustrating which lockup model is chosen for the corresponding transition. A lockup
labeled as “(lat1+ + inv)” in the table indicates that a model is inserted in the scan path and an
inverter is inserted on the clock line of the lockup to ensure a half a cycle delay. Such inverter is
not required where an active low latch model is available. DFTAdvisor chooses the latch model
to give the least amount of hardware, eliminating the need for inserting an extra inverter.
For more information on inserting lockup latches, refer to “Merging Chains with Different Shift
Clocks” in the Scan and ATPG Process Guide.
Arguments
• OFf | ON
A literal that specifies whether DFTAdvisor should insert latches between different clock
groups within a scan chain. The default behavior upon invocation is OFf.
• -Nolast | -Last
An optional switch that specifies whether DFTAdvisor should insert a latch between the last
scan cell and the scan out pin of a scan chain. The default behavior upon invocation of
DFTAdvisor is -Nolast.

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Command Dictionary
Set Lockup Latch

• -First_clock | -SEcond_clock
An optional switch that specifies for DFTAdvisor to connect either the clock of the first set
of scan cells or the clock of the second set of scan cells to the clock input of the lockup latch.
The default behavior upon invocation of DFTAdvisor is -First_clock.
Examples
The following example defines two different groups of clocks, identifies the latch and inverter
that DFTAdvisor is to insert if the clocks need synchronization, enables lockup latch insertion,
and performs the insertions. The -Clock Merge option informs DFTAdvisor to combine the scan
cells that are associated with the clocks (that are in the same clock group) together into a single
scan chain.
add clocks 0 clk1 clk2 clk3
add clocks 1 clk4 clk5 clk6
add clock groups group1 clk1 clk2 clk3
add clock groups group2 clk4 clk5 clk6
add cell model dlat1a -type dlat enable data
add cell model inv -type inv
set lockup latch on
run
insert test logic -scan on -clock merge

In this example, DFTAdvisor creates two scan chains because there are two clock groups. Also,
it inserts lockup latches between clk1 and clk2, clk2 and clk3, clk4 and clk5, and clk5 and clk6.
Insert Test Logic is the command that actually causes DFTAdvisor to substitute the identified
non-scan cells with the scan replacements and also place the lockup latches into the design.
Related Commands
Add Cell Models Delete Test Points
Add Clock Groups Insert Test Logic
Add Test Points Report Test Points

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Command Dictionary
Set Logfile Handling

Set Logfile Handling


Scope: All modes
Usage
SET LOgfile Handling {[filename] [-Replace | -Append]}
Description
Specifies for DFTAdvisor to direct the transcript information to a file.
The Set Logfile Handling command causes DFTAdvisor to write the transcript information,
which includes the commands and the corresponding output (if any), into the file you specify.
You can execute the Set Logfile Handling command at any time within DFTA, and you can also
execute it multiple times.
In the logfile, all commands that DFTAdvisor executes are preceded with the command
keyword. You can easily search for the commands you executed, and then you can generate a
separate dofile containing those commands which you can re-run within DFTAdvisor.
When you set the logfile handling, DFTAdvisor still writes the same information to the session
transcript window in addition to the logfile. However, you can disable the writing of the
information to the transcript window with the Set Screen Display command.
If you want DFTAdvisor to stop writing to a logfile, issue the Set Logfile Handling command
with no options, which closes the appropriate files.
Arguments
• filename
An optional string that specifies the name of the file where you want DFTAdvisor to write
the transcript output. This string can be a full pathname or a leafname. If you only specify a
leafname, the tool creates the file in the directory from which you invoked the tool.
• -Replace
An optional switch that forces DFTAdvisor to overwrite the file, if a file by that name
already exists.
• -Append
An optional switch that causes DFTAdvisor to begin writing the transcript at the end of the
specified file.
Examples
The following example specifies for DFTAdvisor to write a logfile and to disable the writing of
the transcript:
set logfile handling /user/designs/setup_logfile
set screen display off
add clocks 0 clk
add clocks 1 pre clr
report clocks

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Command Dictionary
Set Logfile Handling

The following information shows what the logfile contains after running the preceding set of
commands:
// command: set scr d off
// command: add clocks 0 clk
// command: add clocks 1 pre clr
// command: report clocks
PRE, off_state 1
CLR, off_state 1
CLK, off_state 0

Related Commands
Set Screen Display

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Command Dictionary
Set Multiple Scan_enables

Set Multiple Scan_enables


Scope: Setup and DFT modes
Prerequisites: You must be using mux-DFF scan type to enable this command.
Usage
SET MUltiple Scan_enables {OFf | ON}
Description
Specifies to create multiple scan_enables.
The Set Multiple Scan_enables command specifies to create an independent scan_enable for
each scan chain associated with a different clock ID/edge domain. Clock ID/edge domains are
created with the “-Clock {Nomerge | Merge}” and “-Edge {Nomerge | Merge}” options of the
Insert Test Logic command and the Add Clock Groups command. The invocation default is to
create one scan enable to control all scan chains. The name of the scan enable signals is
determined by the Setup Scan Insertion command with the -Sen, -Sen_in, and -Sen_out options.
Note
You can only use multiple scan enable signals with the mux-DFF scan type. Also, all
multiple scan enable signals must be external pins.

DFTAdvisor’s multiple scan enable creation mechanism behaves differently in a user specified
fixed-order stitching flow (where you specify the order of stitching in a fixed-order file) than in
an automated partitioning and stitching flow (where user does not specify a stitching order). The
effects of the Set Multiple Scan_enables, Insert Test Logic, and Add Clock Groups commands
on how different scan enables are created in these two flows are explained in the following
example.
This command is useful for an at-speed scan test where a dedicated scan enable may be required
for each clock domain.
Arguments
• OFf
A literal that specifies for DFTAdvisor to only create one scan enable (of each type SEN,
SEN_IN, and SEN_OUT, where applicable) to control all scan chains. This is the invocation
default.
• ON
A literal that specifies for DFTAdvisor to create multiple scan enables (if possible), under
each scan enable type (SEN, SEN_IN, and SEN_OUT) where applicable. For more details
on different scan enable types refer to the sections that describe the Setup Scan Insertion and
Setup Partition Scan commands.

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Command Dictionary
Set Multiple Scan_enables

Examples
Let us assume that a design has three clocks, {clkA, clkB, clkC}. Both rising (+) and falling (-)
edges of each clock are used to clock a total of 12 sequential elements, labeled as {A+, A+, A-,
A-, B+, B+, B-, B-, C+, C+, C-, C-}, where the first and the second alphanumericals in each
label represent a clock domain and its edge, respectively.
Table 2-8 shows how scan enables are distributed over the sequential elements when the user
specifies 12 scan chains with -number option of Insert Test Logic command in an automated
stitching flow (auto), and when the user defines 12 scan chains in a fixed-order file in a manual
stitching flow (manual). The created scan enable signals are in the form of “sen{i}”.
Table 2-8. Multiple Scan Enables
Set Insert Test Add
Stitchi Multiple Logic Clock Scan Enable
ng Scan_enab -edge -clock Groups Distribution
Flow les
sen1: {A+, A+}
sen2: {A-, A-}
auto ON Nomer Nomer no-effect sen3: {B+, B+}
ge ge sen4: {B-, B-}
sen5: {C+, C+}
sen6: {C-, C-}
none (default group to sen1: {A+, A+, B+,
include all clocks) B+, C+, C+}
auto ON Nomer Merge or sen2: {A-, A-, B-, B-,
ge grp1: {clkA, clkB, clkC} C-, C-}
sen1: {A+, A+, B+,
grp1: {clkA, clkB} B+}
auto ON Nomer Merge grp2: {clkC} sen2: {A-, A-, B-, B-}
ge sen3: {C+, C+}
sen4: {C-, C-}
grp1: {clkA, clkB} sen1: {A+, A+, A-, A-
auto ON Merge Merge grp2: {clkC} , B+, B+, B-, B-}
sen2: {C+, C+, C-, C-
}
none (default group to sen1: {A+, A+, A-, A-
auto ON Merge Merge include all clocks) , B+, B+, B-, B-, C+,
or C+, C-, C-}
all_clocks: {clkA, clkB,
clkC}
sen1: {A+, A+, A-, A-
manual OFF - - no-effect , B+, B+, B-, B-, C+,
C+, C-, C-}

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Command Dictionary
Set Multiple Scan_enables

Table 2-8. Multiple Scan Enables (cont.)


Set Insert Test Add
Stitchi Multiple Logic Clock Scan Enable
ng Scan_enab -edge -clock Groups Distribution
Flow les
sen1: {A+, A+}
sen2: {A-, A-}
auto ON Nomer Nomer no-effect sen3: {B+, B+}
ge ge sen4: {B-, B-}
sen5: {C+, C+}
sen6: {C-, C-}
none (default group to sen1: {A+, A+, B+,
include all clocks) B+, C+, C+}
auto ON Nomer Merge or sen2: {A-, A-, B-, B-,
ge grp1: {clkA, clkB, clkC} C-, C-}
sen1: {A+, A+, B+,
grp1: {clkA, clkB} B+}
auto ON Nomer Merge grp2: {clkC} sen2: {A-, A-, B-, B-}
ge sen3: {C+, C+}
sen4: {C-, C-}
grp1: {clkA, clkB} sen1: {A+, A+, A-, A-
auto ON Merge Merge grp2: {clkC} , B+, B+, B-, B-}
sen2: {C+, C+, C-, C-
}
grp1: {clkA, clkB} sen1: {A+, A+, A-, A-
manual ON - - grp2: {clkC} , B+, B+, B-, B-}
sen2: {C+, C+, C-, C-
}
sen1: {A+}
sen2: {A+}
sen3: {A-}
sen4: {A-}
sen5: {B+}
manual ON - - none (default group to sen6: {B+}
include all clocks) sen7: {B-}
sen8: {B-}
sen9: {C+}
sen10: {C+}
sen11: {C-}
sen12: {C-}
sen1: {A+, A+, A-, A-
manual ON - - grp1: {clkA, clkB, clkC} , B+, B+, B-, B-, C+,
C+, C-, C-}

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Command Dictionary
Set Multiple Scan_enables

Note
Note in the above table that DFTAdvisor creates a separate scan enable for every clock
group defined by the user when a fixed-order file is specified for stitching the scan cells.
You must ensure that the cells from different clock groups will not be mixed in the same
scan chain in the fixed-order file. Otherwise, a non-functional scan chain may be created
unless the scan enables of different clock groups are activated simultaneously.

Related Commands
Add Clock Groups Setup Scan Insertion
Insert Test Logic

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Command Dictionary
Set Net Resolution

Set Net Resolution


Scope: Setup mode
Usage
SET NEt Resolution Wire | And | Or
Description
Specifies the behavior of multi-driver nets.
The Set Net Resolution command specifies the behavior of non tri-state multi-driver nets. The
default upon invocation of the tool is Wire, which requires all inputs be at the same value to
achieve a value. If possible, you should specify the And or Or option; otherwise, some loss of
test coverage results.
Arguments
• Wire
A literal that specifies for the tool to use unknown behavior for non tri-state multi-driver
nets. This requires all inputs to be at the same value to achieve a value other than X. This is
the default upon invocation of the tool.
• And
A literal that specifies for the tool to use wired-AND behavior.
• Or
A literal that specifies for the tool to use wired-OR behavior.
Examples
The following example specifies that the behavior of non tri-state multi-driver nets is wired-
AND during the scan identification process.
set net resolution and
add clocks 0 clock
set system mode dft
run
report sequential instances

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Command Dictionary
Set Nonscan Handling

Set Nonscan Handling


Scope: Setup modes
Usage
SET NOnscan Handling {Check | Nocheck}
Description
Specifies whether to check the non-scan instances for scannability.
The Set Nonscan Handling command specifies whether the added non-scan instances are
checked for scannability. Nonscan instances are defined by the Add Nonscan Instances
command, Add Nonscan Models command, or the non-scan models due to no scan equivalents.
These non-scan instances are not checked because the instances cannot be selected for scan
insertion.
You can enable checking on non-scan instances by using this command with the Check option.
Arguments
• Check | Nocheck
A required literal that specifies whether to check the non-scan instances for scannability.
The default upon invocation is Nocheck.
Examples
The following example shows how to check all added non-scan instances:
set nonscan handling Check

Related Commands
Add Nonscan Instances Set Drc Handling
Add Nonscan Models

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Command Dictionary
Set Observe Threshold

Set Observe Threshold


Scope: All modes
Usage
SET OBserve Threshold integer
Description
Specifies the observability value for simulation-based test point identification.
The Set Observe Threshold command specifies the minimum number of times a gate must be
observed at a zero and a one state during simulation. The simulation is a set of pseudorandom
patterns defined for test point insertion using the Setup Test_point Identification command.
Gates that do not meet the threshold are candidates for test points.
Arguments
• integer
A required integer, greater than or equal to 0, that specifies the minimum number of
observations that you consider adequate during pseudorandom pattern test point
identification. The default value upon invocation is 4.
Examples
The following example sets the threshold number to determine the observability effects during
pseudorandom pattern test point identification:
set control threshold 2
set observe threshold 4
setup test_point identification -control 9 -obs 20 -patterns 32000
setup test_point insertion -cshare 10 -oshare 10
set system mode dft
setup scan identification none
run

Related Commands
Set Control Threshold Setup Test_point Identification
Setup Scan Identification

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Command Dictionary
Set Scan Type

Set Scan Type


Scope: Setup mode
Usage
SET SCan Type {Mux_scan | Lssd | Clocked_scan}
Description
Specifies the scan style design.
The Set Scan Type command specifies the scan style of a design which the scan insertion will
create. If this command is not used, then during the scan insertion process, DFTAdvisor will use
the mux-DFF scan style.
Arguments
• Mux_scan
A literal that specifies for DFTAdvisor to insert mux-DFF type scan elements during the
scan insertion process. This is the default behavior upon invocation.
• Lssd
A literal that specifies for DFTAdvisor to insert LSSD type scan elements during the scan
insertion process.
• Clocked_scan
A literal that specifies for DFTAdvisor to insert clocked-signal type scan elements during
the scan insertion process.
Examples
The following example uses a mux-DFF scan type design during scan insertion:
set scan type mux_scan
add clocks 0 clock
set system mode dft
setup scan identification sequential atpg -percent 50
run
insert test logic -max_length 10

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Command Dictionary
Set Screen Display

Set Screen Display


Scope: All modes
Usage
SET SCreen Display ON | OFf
Description
Specifies whether DFTAdvisor writes the transcript to the session window.
If you create a logfile with the Set Logfile Handling command, you may want to disable
DFTAdvisor from writing the same information to the session transcript window.
Arguments
• ON
A literal that specifies to enable the tool to write the session information to the transcript
window. This is the default behavior upon invocation.
• OFf
A literal that specifies to disable the tool from writing any of the session information to the
transcript window, including error messages.
Examples
The following example shows how to use the logfile functionality to capture the transcript in a
file and then disable DFTAdvisor from writing to the display:
set logfile handling /user/design/setup_file
set screen display off

Related Commands
Report Environment Set Logfile Handling

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Command Dictionary
Set Sensitization Checking

Set Sensitization Checking


Scope: All modes
Usage
SET SEnsitization Checking OFf | ON
Description
Specifies whether DRC checking attempts to verify a suspected C3 rules violation.
The Set Sensitization Checking command specifies whether the DRC verifies that the path from
the source and sink of a suspected C3 violation exists when the source and sink clocks are on
and all other clocks are off. If sensitization checking is on and the paths associated with the
violation meet these conditions, the DRC reports the C3 violation.
Arguments
• OFf
A literal that disables the C3 DRC sensitization check. This is the default behavior upon
invocation.
• ON
A literal that enables the C3 DRC sensitization check.
Related Commands
Set Drc Handling

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Command Dictionary
Set Shadow Check

Set Shadow Check


Scope: All modes.
Usage
SET SHadow Check OFf | ON
Description
Specifies whether DFTAdvisor will identify sequential elements as “shadow” elements when
tracing existing scan chains.
You can use the Set Shadow Check command to disable the checking and avoid corresponding
error messages. This will prevent identification of any non-scan sequential element as a shadow
element.
Arguments
• OFf
A literal that disables shadow checking.
• ON
A literal that enables shadow checking. This is the initial state upon invocation of
DFTAdvisor.
Examples
The following example disables shadow checking.
set shadow check off

Related Commands
Set Drc Handling Report Environment

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Command Dictionary
Set Stability Check

Set Stability Check


Scope: Setup mode, before design rule checking
Usage
SET STability Check All_shift
Description
Specifies how the tool checks the effect of applying the shift procedure on non-scan cells.
When non-scan state elements control scan chain operation, DFTAdvisor needs to understand
the values of these elements in order to perform scan chain tracing. For example, a control
register in a test controller, such as a JTAG TAP, needs to be checked to see that the TAP
register holds state during the shift procedure. Or, for a design containing BIST (that was
implemented using LBISTArchitect), a shift counter -- composed of non-scan elements --
controls the scan chain shifting. This counter counts from zero to a predetermined number and
then resets to zero. This predetermined number is related to the number of shifts applied by the
load_unload procedure.
By default, DFTAdvisor only simulates one shift of the scan chain, which does not provide
enough information about the non-scan elements and how they control scan shifting. Therefore,
you should specify this command with the All_shift option to simulate all applications of the
shift procedure or rules checking will not succeed.
Arguments
• All_shift
A literal that enables the tool to perform the most detailed level of checking. The shift
procedure is simulated for as many applications as the load_unload procedure calls for.
When you specify this option, it can significantly increase your run time. This option should
be used with BIST.
Examples
The following example shows how to enable the detail checking which simulates the shift
procedure more than once.
set stability check all_shift

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Command Dictionary
Set System Mode

Set System Mode


Scope: All modes
Usage
SET SYstem Mode Setup | Dft
Description
Specifies the next system mode for the tool to enter.
The Set System Mode command directs DFTAdvisor to a specific system mode, which includes
scan insertion (Dft) or the default system mode of Setup.
When switching from the Setup mode to the Scan Insertion system mode, DFTAdvisor builds a
flat, gate-level simulation model. After the initial building of the flat, gate-level simulation
model, if you return to Setup mode, issue any of the following commands and then switch to Dft
mode; or DFTAdvisor builds a new simulation model:
• Add Nofaults
• Add Tied Signals
• Delete Nofaults
• Delete Tied Signals
• Set Internal Fault
• Set Internal Name
• Setup Tied Signals
Arguments
• Setup
A literal that specifies for the tool to enter the Setup system mode.
• Dft
A literal that specifies for the tool to enter the Scan Insertion system mode.
Examples
The following example will change the system mode so you can perform a scan identification
run.
add tied signals 1 vcc
add tied signals 0 vss
add clocks 0 clock
set system mode dft
run
report sequential instances

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Command Dictionary
Set Test Logic

Set Test Logic


Scope: Setup mode
Usage
SET TEst Logic {-Set {ON | OFf} | -REset {ON | OFf} | -Clock {ON | OFf} | -Tristate {ON
| OFf | Decoded} | -Bidi {ON | Scan | OFf} | -RAm {ON | OFf}}…
Description
Specifies which types of control lines DFTAdvisor makes controllable during the DFT rules
checking.
The Set Test Logic command specifies whether DFTAdvisor makes set, reset, clock, enable, or
write control lines controllable. This, in turn, makes them scannable by inserting test logic to
those lines when you insert scan chains. Before inserting scan chains, you must specify the cell
models with the Add Cell Models command. You can use the Report Dft Check command to
display the lines where you can insert test logic to make the lines controllable.
The default behavior upon invocation of DFTAdvisor is for all the Set Test Logic command
switches to be Off. You can use the Report Environment command to display the current test
logic settings.
If all enable lines of a bus are driven purely by combinational logic, then no additional test logic
is added, because there will not be a problem of contention due to scan shifting.
Arguments
• -Set ON | OFf
A switch and literal pair that specifies whether DFTAdvisor makes the set lines controllable
during the DFT rules checking. The default upon invocation of DFTAdvisor is Off.
• -REset ON | OFf
A switch and literal pair that specifies whether DFTAdvisor makes the reset lines
controllable during the DFT rules checking. The default upon invocation of DFTAdvisor is
Off.
• -Clock ON | OFf
A switch and literal pair that specifies whether DFTAdvisor makes the clock lines
controllable during the DFT rules checking. The default upon invocation of DFTAdvisor is
Off.
• -Tristate ON | OFf | Decoded
A switch and literal pair that specifies whether DFTAdvisor makes the tri-state enable lines
controllable during the DFT rules checking. This test logic is only active during scan chain
shifting. The default upon invocation of DFTAdvisor is Off.
ON — If you set the -Tristate option On, DFTAdvisor uses the scan enable (of SEN
type), with test logic, to turn on one of the tri-state gates driving the bus, and turns off

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Command Dictionary
Set Test Logic

the rest of the tri-state gates. If tri-state gates driving the same bus already have one-
hot logic controlling the enable lines of these gates, no additional test logic is added.
OFf — Do not make the tri-state enable lines controllable during DFT rules checking.
This is the invocation default.
Decoded — Adds test logic to prevent bus contention by guaranteeing that exactly one
driver is on at a time. In addition:
— The drivers are randomly ordered.
— The order decides which drive can be turned on. The ith driver can be turned on
only if the first (i-1) drivers are all off. Additional logic also guarantees that all the
drivers from (i+1) to n are off.
— Use of the test_enable pin ensures that the new test logic structures are valid only
in test mode.
• -Bidi ON | Scan | OFf
A switch and literal pair that specifies whether to make the enable lines of bidirectional pins
controllable during scan shifting to prevent a potential bus contention in the circuit. If the
enable line of the bidirectional pin is directly controlled by a primary input, then no gating is
necessary, but DFTAdvisor will add a “force” statement for the enable pin in the
load_unload procedure of the new procedure file.
This test logic is only active during scan chain shifting. For more information, refer to the
“Enabling Test Logic Insertion” in the Scan and ATPG Process Guide.
ON — A literal that specifies for DFTAdvisor to gate all bidirectional pins. The
bidirectional pins that are used as scan output pins are gated such that they will be in
output mode while all other bidirectional pins are gated to be in input mode (Z state
on the tester). You will need to specify AND and OR models through the cell_type
keyword in the ATPG library or use the Add Cell Model command.
Scan — A literal that specifies for DFTAdvisor to gate the bidirectional pins that are
used only as scan I/O pins. This gating controls the direction of the bidirectional pin
for scan shifting, thus ensuring the success of scan chain tracing. The bidirectional
pins that are used as scan output pins are gated such that they will be in output mode
while the bidirectional pins that are used as scan input pins are gated to be in input
mode (Z state on the tester). You will need to specify AND and OR models through
the cell_type keyword in the ATPG library or use the Add Cell Model command.
OFf — A literal that specifies for DFTAdvisor to not gate any bidirectional pin enable
signals. Because this is the invocation default, be certain the inserted scan chains will
be functional by properly sensitizing the enable lines of any bidirectional ports in the
scan path. If you want DFTAdvisor to automatically perform this sensitization, then
use the “Scan” option with this switch.
• -RAm ON | OFf
A switch and literal pair that specifies whether DFTAdvisor makes the read and write
control lines controllable during the DFT rules checking. This option does not handle the set
and reset lines of the RAM. You should also use the edge_trigger attribute in the library
definition of the RAM in order for DFTAdvisor to insert the control logic. For information

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Command Dictionary
Set Test Logic

on this attribute, refer to the “Attributes of RAM/ROM Primitives” section of the Design-
for-Test Common Resources Manual. The default upon invocation of DFTAdvisor is Off.
Examples
The following example checks the set and clock lines of uncontrollable memory elements and
makes them controllable with the addition of test logic:
add clocks 0 clk
set test logic -set on -clock on
set system mode dft
report dft check
add cell models and2 -type and
add cell models or2 -type or
add cell models mux21h -type mux s a b
add cell models nor2 -type nor
report cell models
insert test logic

Related Commands
Add Cell Models Report Cell Models
Delete Cell Models Set Latch Handling

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Command Dictionary
Set Trace Report

Set Trace Report


Scope: All modes
Usage
SET TRace Report OFf | ON
Description
Specifies whether the tool displays gates in the scan chain trace.
The Set Trace Report command controls whether the tool displays all of the gates in the scan
chain trace during rules checking.
Arguments
• OFf
A literal that specifies for the tool to not display gates in the scan chain trace. This is the
default behavior upon invocation.
• ON
A literal that specifies for the tool to display gates in the scan chain trace during rules
checking.
Examples
The following example displays the gates in the scan chain trace during rules checking:
add clocks 0 clock
add scan groups group1 scanfile
add scan chains chain1 group1 indata2 outdata4
set trace report on
set system mode dft

Related Commands
Add Scan Chains Report Scan Chains

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Command Dictionary
Set Transient Detection

Set Transient Detection


Scope: All modes
Usage
SET TRansient Detection OFf | {ON [-Verbose | -NOVerbose]}
Description
Specifies whether the tool detects all zero width events on the clock lines of state elements.
The Set Transient Detection command sets the simulator to detect all zero width events on the
clock lines of state elements. If the zero width event causes a change of state in the state
element, then the tool sets that state element to X.
If Off is specified, DRC simulation treats all events on state elements as valid. Because the
simulator is a zero-delay simulator, it is possible for DRC to simulate zero width, monostable
circuits with ideal behavior which is rarely matched in silicon. The resulting zero width output
pulse from the monostable circuit is also treated as a valid clocking event for other state
elements.
Arguments
• OFf
A literal that specifies for the tool to set transient detection off.
• ON
A literal that specifies for the tool to set transient detection on. This is the invocation default.
• -Verbose
An optional switch that specifies the tool to display a message identifying each time a state
element is set to X due to transient detection. This is the invocation default and is only valid
when transient detection is enabled.
• -NOVerbose
An optional switch that specifies the tool not to display a message identifying each time a
state element is set to X due to transient detection. This switch is only valid when transient
detection is enabled.
Example
To remove the verbose messages during DRC checking, enter:
set transient detection on -noverbose

Related Commands
Report Environment

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Command Dictionary
Setup Naming

Setup Naming
Scope: All modes
Usage
SETup NAming [{-Net prefix_name} | {-Instance {[Tristate | Xbound | Lockup |
CONTROL_Flop | CONTROL_Point | OBSERVE_Flop | OBSERVE_Point | IN_register |
OUt_register] prefix_name}…}]
Description
Explicitly defines the default names for nets and instances, and reports current or modified
settings.
The Setup Naming command serves two purposes. You can use it to change the default prefix
that DFTAdvisor uses to name certain types of added test logic, and you can change the default
the tool uses to name nets.
If you invoke the command without an argument, it automatically reports on the current settings
for all prefixes. If you make any changes, it reports the modified settings. Table 2-9 shows the
invocation defaults for particular logic instance types:
Table 2-9. Instance Type Prefix Defaults
Object Type Default Prefix Name Instance Literal
Tri-state control tcntl Tristate
X bounding xbnd Xbound
Lockup latches lckup Lockup
Control point flip-flop ctlff CONTROL_Flop
Control point logic ctlpt CONTROL_Point
Observe point flip-flop obsff OBSERVE_Flop
Observe point logic obspt OBSERVE_Point
Input partition flip-flop inreg IN_register
Output partition flip-flop outreg OUt_register
Other logic uu

Arguments
• -Net prefix_name
An optional switch and string pair that specifies the prefix_name you want as the default
prefix for naming nets. The invocation default prefix is net

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Command Dictionary
Setup Naming

• -Instance [Tristate | Xbound | Lockup | CONTROL_Flop | CONTROL_Point |


OBSERVE_Flop | OBSERVE_Point] prefix_name
An optional switch, with an optional, repeatable literal and string pair, that specifies the
prefix_name you want as the default prefix for the object type specified by the literal. If you
do not specify an object type literal, prefix_name applies to all added test logic not covered
by one of the object type literals. The default prefix for this other logic is uu.
Tristate — An optional literal that specifies to apply the prefix_name as the default for
the logic object type tri-state control. The default prefix is tcntl.
Xbound — An optional literal that specifies to apply the prefix_name as the default for
the logic object type X bound control. The default prefix is xbnd.
Lockup — An optional literal that specifies to apply the prefix_name as the default for
the logic object type lockup latch. The default prefix is lckup.
CONTROL_Flop — An optional literal that specifies to apply the prefix_name as the
default for the logic object type control-point flip-flop. The default prefix is ctlff.
CONTROL_Point — An optional literal that specifies to apply the prefix_name as the
default for the logic object type control-point logic. The default prefix is ctlpt.
OBSERVE_Flop — An optional literal that specifies to apply the prefix_name as the
default for the logic object type observe-point flip-flop. The default prefix is obsff.
OBSERVE_Point — An optional literal that specifies to apply the prefix_name as the
default for the logic object type observe-point logic. The default prefix is obspt.
IN_register — An optional literal that specifies to apply the prefix_name as the default
for the logic object type input partition flip-flop. The default prefix is inreg.
OUt_register — An optional literal that specifies to apply the prefix_name as the default
for the logic object type output partition flip-flop. The default prefix is outreg.
Examples
The following example resets the default prefix name for tri-state control logic to “tric” and for
lockup latches to “lockl”:
setup naming -instance tristate tric lockup lockl

DFTAdvisor will change the prefix names and issue the following report:
// Setup naming prefixes:
// nets : net
// tristates : tric
// xbounding : xbnd
// lockup latches : lockl
// observe flops : obsff
// observe points : obspt
// control flops : ctlff
// control points : ctlpt
// input registers : inreg
// output registers : outreg
// other instances : uu

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Setup Naming

Related Commands
Insert Test Logic Setup Registered IO
Set Test Logic

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Command Dictionary
Setup Output Masks

Setup Output Masks


Scope: Setup mode
Usage
SETup OUtput Masks OFf | {ON [-Bidi_exclude] [-Lbist_exclude]
[-Exclude primary_output_pin…]}
Description
Sets the default mask for all output and bidirectional pins.
The Setup Output Masks command masks all the output and bidirectional pins specified. This
default mask is present on the output pin, unless overridden by the Add Output Masks
command.
DFTAdvisor uses primary output pins as the observe points during the scan and test point
identification process. When you mask a primary output pin, you inform DFTAdvisor to mark
that pin as an invalid observation point during the scan and test point identification process.
You can exclude bidirectional pins, LBISTArchitect scan output pins, and any specified pins.
You use the Off literal to remove all default masks defined with this command.
You can add a hold value to a default mask with the Add Output Masks command, or remove a
hold value using the Delete Output Masks command. You can also use the Add Output Masks
command to add a mask to any of the output pins excluded with the Setup Output Masks
command.
Arguments
• OFf | ON
A required string that specifies to set or remove the current default mask setting for all
primary output pins. When turning masking on, you can exclude pins from the mask. The
tool invocation default setting is no masks.
• -Bidi_exclude
An optional switch that specifies to exclude bidirectional pins from the mask setting.
• -Lbist_exclude
An optional switch that specifies to exclude LBISTArchitect scan output pins from the mask
setting.
• -Exclude primary_output_pin
An optional switch and repeatable string that specifies to exclude the specified primary
output pins from the mask setting.
Examples
The following example defines the default mask for all but the LBISTArchitect scan output
pins, then adds two additional pin masks with a hold value of 1:

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Setup Output Masks

setup output masks on -lbist_exclude


add output masks out1 out2 -hold 1

Related Commands
Add Output Masks Report Output Masks
Delete Output Masks

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Command Dictionary
Setup Partition Scan

Setup Partition Scan


Scope: Setup mode
Usage
SETup PArtition Scan [-EXClude pin_names…] [{-INPUT_NUMber integer} |
{-INPUT_MAX_length integer}] [{-OUTPUT_NUMber integer} |
{-OUTPUT_MAX_length integer}] [-INPUT_SEN name] [-OUTPUT_SEN name]
[-INPUT_Threshold {integer | Nolimit}] [-OUTPUT_Threshold {integer | Nolimit}]
[{-No_internal_feedback | -Allow_internal_feedback | -Test_points}] [-Verbose]
Description
Specifies a partition scan run.
The Setup Partition Scan command issues the following commands internally, without user
input.
• Setup Scan Insertion -Sen_in <name> -active high
• Setup Scan Insertion -Sen_out <name> -active high
• Set Lockup Latch On
• Setup Pin Constraints CX -Lbist_exclude
• Setup Output Masks On -Lbist_exclude
• Set Scan Type mux_scan
• Setup Scan Identification Partition_scan
The Setup Partition Scan command also sets certain scan insertion parameters. In particular, the
following Delete Test Points command switches are set. If the Insert Test Logic command is to
be used, then these parameters are overridden by the same switches.
• -Number 1
• -Clock merge
• -Scan ON
In partition-scan identification, DFTAdvisor identifies the sequential elements that are used as
input/output registration cells (the cells that are accessed only via combinational logic from
primary inputs or primary outputs).
The identified sequential elements are then distributed over to the user-specified number of scan
chains. If you specify either “-Input_number”, “-Input_max_length”, “-Input_sen”, “-
Output_number”, “-Output_max_length” or “-Output_sen” arguments with this command, the
identified cells are first divided into two domains as input registration cells and output
registration cells, and then the two domains are distributed over to scan chains separately
(namely, input partition scan chains and output partition scan chains). This is referred to as
partitioning by I/O type.

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Setup Partition Scan

When partitioning by I/O type is turned on by any one of the above six arguments, the -Number,
-max_length, and -Nolimit arguments of the Insert Test Logic command are ignored.
DFTAdvisor also inserts separate and dedicated scan enable signals; SEN_IN type for input and
SEN_OUT type for output partition scan chains. The base names (without the suffix) for these
signals can be specified using the Setup Scan Insertion command, or the -Input_sen and
-Output_sen switches of this command, which in turn calls the corresponding Setup Scan
Insertion commands internally. When they are specified via the -Input_sen and -Output_sen
switches, an active high value is assumed as shown above, in the list of auto-executed
commands. If partitioning by I/O type is not turned on, DFTAdvisor uses the regular scan
enable signal (SEN type) inserted for non-partition scan cells (core cells), the base name of
which is set by the -SEN_Core switch of the Setup Scan Insertion command.
You can select three different modes of partition scan identification using the switches
-No_internal_feedback, -Allow_internal_feedback, and -Test_points. To identify the I/O
registration cells, DFTAdvisor structurally traces forward from the primary inputs until it
reaches the first level of memory cells and traces backward from the primary outputs until it
reaches the last level of memory cells. This is the default tracing mode which can also be
activated using the -No_internal_feedback switch. Figure 2-3 illustrates such tracing where the
traced logic and identified partition cells are shown highlighted.

Figure 2-3. I/O Identification Default Tracing Mode

If you want to have control on all the inputs of the combinational logic traced from the primary
inputs, you can use the -Allow_internal_feedback switch. Figure 2-4 shows the gate inputs with
feedback connections marked as a and b. Tracing backward from these inputs identifies one
additional cell from the second level of memory cells to be included in the input partition
chains.

Figure 2-4. All Input Logic Tracing

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Setup Partition Scan

Depending on the circuit topology, tracing such internal feedback may include an impractical
number of core cells (not first or last level memory cells). In that case, you can control the
feedback inputs on the logic gates by means of control points. In the above circuit, only the gate
input b requires a control point because gate input a can still be controlled from its driver gate
which is an identified input partition cell. In a separated testing of partition cells and core cells
(i.e. hierarchical at-speed testing at a higher level of the design), the gate output marked as c
cannot be observed when the testing of core cells is active and the testing of input partition cells
is inactive. In that case, an observe point may be necessary at the gate output c.
The automatic insertion of such control and observe points can be specified using the
-Test_points switch. Upon issuing the Run command, the test point locations are identified
along with the partition cell candidates. The identified test points are scheduled for insertion by
automatically issuing the Add Test Points commands. At this point, you can examine the
scheduled test points using the command “Report Test Points -Partition_scan_identified”;
delete them using “Delete Test Points -Partition_scan_identified”; or add new test points,
modifying the existing ones. The actual insertion of the test points occurs later, upon issuing the
Insert Test Logic command.
Figure 2-5 shows the highlighted logic DFTAdvisor adds as the control and observe points.
DFTAdvisor uses SEN_OUT type scan enable (sen_out) for the control points and SEN_IN
type scan enable (sen_in) for the observe points, where possible.

Figure 2-5. Control and Observe Point Insertion

Further descriptions of the arguments are given in the following section.


Arguments
• -Exclude pin_names
An optional switch and a repeatable string that specifies the primary input/output pins that
you want to exclude from the partition scan identification process. Partition cells are
identified by structurally tracing the netlist from the I/O towards the circuit internals. The
system clock pins (set, reset, clock, etc.) and test-related pins such as scan I/O, scan enable
and test enable pins are excluded from the identification process automatically by the
implicit call to the commands “Setup Pin Constraints CX -Lbist_exclude” and “Setup
Output Masks On -Lbist_exclude”.

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• -INPUT_NUMber integer
An optional switch and an integer that specifies the number of scan chains for input partition
cells. When specified, the scan cell partitioning by I/O type is turned on, that is,
DFTAdvisor places the input registration cells and output registration cells in different
domains and does not mix them in the same scan chain. The “-Number”, “-Max_length”,
and “-Nolimit” arguments of the Insert Test Logic command are then ignored. The default
value for the number of input partition chains is 1.
• -INPUT_MAX_length integer
An optional switch and an integer that specifies the maximum length of scan chains for
input partition cells. When specified, the scan cell partitioning by I/O type is turned on, that
is, DFTAdvisor places the input registration cells and output registration cells in different
domains and does not mix them in the same scan chain. The “-Number”, “-Max_length”,
and “-Nolimit” arguments of the Insert Test Logic command are then ignored. The default
value for the maximum length of the input partition chains is unlimited.
• OUTPUT_NUMber integer
An optional switch and an integer that specifies the number of scan chains for output
partition cells. When specified, the scan cell partitioning by I/O type is turned on, that is,
DFTAdvisor places the input registration cells and output registration cells in different
domains and does not mix them in the same scan chain. The “-Number”, “-Max_length”,
and “-Nolimit” arguments of the Insert Test Logic command are then ignored. The default
value for the number of output partition chains is 1.
• -OUTPUT_MAX_length integer
An optional switch and an integer that specifies the maximum length of scan chains for
output partition cells. When specified, the scan cell partitioning by I/O type is turned on,
that is, DFTAdvisor places the input registration cells and output registration cells in
different domains and does not mix them in the same scan chain. The “-Number”,
“-Max_length”, and “-Nolimit” arguments of the Insert Test Logic command are then
ignored. The default value for the maximum length of the output partition chains is
unlimited.
• -INPUT_SEN name
An optional switch and a string pair that specifies the name of the global SEN_IN type scan
enable pin to be inserted for the input partition chains. DFTAdvisor automatically issues a
Setup Scan Insertion command to change the global base name for input partition scan
enable, and it assumes an active high value for the off state. When specified, the scan cell
partitioning by I/O type is turned on. That is, DFTAdvisor places the input registration cells
and output registration cells in different domains and does not mix them in the same scan
chain. The -Number, -Max_length, and -Nolimit arguments of the Insert Test Logic
command are then ignored.
• -OUTPUT_SEN name
An optional switch and a string pair that specifies the name of the global SEN_OUT type
scan enable pin to be inserted for the output partition chains. DFTAdvisor automatically

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Setup Partition Scan

issues a Setup Scan Insertion command to change the global base name for output partition
scan enable and it assumes an active high value for the off state. When specified, the scan
cell partitioning by I/O type is turned on, that is, DFTAdvisor places the input registration
cells and output registration cells in different domains and does not mix them in the same
scan chain. The -Number, -Max_length, and -Nolimit arguments of the Insert Test Logic
command are then ignored.
• -INPUT_Threshold {integer | Nolimit}
An optional switch and integer or literal pair that specifies the maximum number of partition
scan cells to be identified from primary inputs. The default is Nolimit.
• -OUTPUT_Threshold {integer | Nolimit}
An optional switch and integer or literal pair that specifies the maximum number of partition
scan cells to be identified from primary outputs. The default is Nolimit.
• {-No_internal_feedback | -Allow_internal_feedback | -Test_points}
An optional switch that specifies the identification mode for input partition cells. The
default mode, which is invoked by the -No_internal_feedback switch, identifies the first
level of registration cells by forward tracing from the primary inputs. The
-Allow_internal_feedback switch identifies additional cells that are not reached by forward
tracing from primary inputs but their outputs are fed back into the combinational logic
between the primary inputs and the first level of registration cells. The -Test_points switch
inserts control and observe points at these feedback connections, instead of identifying
additional registration cells.
• -Verbose
An optional switch that specifies for DFTAdvisor to print a detailed session transcript
during partition scan identification upon issuing the Run command. When specified, the
instance pathnames of all identified partition cells are printed per I/O basis.
Examples
In the following example, the Setup Partition Scan command usage is illustrated. The command
specifies that the primary I/O pins “a” and “b” are to be excluded from partition scan
identification; there will be four input partition scan chains and eight output partition scan
chains; “sen1” and “sen2” will be used for the scan enable pin name of the input and output
partition chains, respectively. The Report Partition Cells command is used to observe which
sequential cells are identified per I/O pin. Also, the “-Number” or “-Max_length” switch is not
used since it is overridden by the “-Input_num” and “-Output_num” switches of the Setup
Partition Scan command.
add cell model LATX -type dlat G D
add cell model INVX -type inv
setup partition scan -input_num 4 -output_num 8 -input_sen sen1 -output_sen sen2
-exclude a b
set system mode dft
run
report partition cells
insert test logic -clock merge -edge merge

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Command Dictionary
Setup Partition Scan

Related Commands
Add Test Points Setup Output Masks
Delete Test Points Setup Registered IO
Report Partition Cells Setup Scan Identification
Report Test Points Setup Scan Insertion
Run Write Netlist
Set Lockup Latch

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Command Dictionary
Setup Pin Constraints

Setup Pin Constraints


Scope: Setup mode
Usage
SETup PIn Constraints None | {{C0 | C1 | CZ | CX} [-Bidi_exclude] [-Lbist_exclude]
[-Exclude primary_input_pin…]}
Description
Sets the default pin constraint value for all input and bidirectional pins.
The Setup Pin Constraints command constrains all input and bidirectional pins to the specified
default value. This default value is present on the input pin, unless overridden by the Add Pin
Constraints command.
You can exclude bidirectional pins, LBISTArchitect-related control and data pins, and any
specified pin.
You use the None literal to remove all default settings defined with this command.
Arguments
• None
A required string that specifies to remove all the current default constraints for all primary
input and bidirectional pins. You must specify this literal or one of the “C” literals. This is
the tool invocation default.
• C0 | C1 | CZ | CX
A literal that specifies the default constant value constraint for the primary_input pins,
except for any pins excluded by the specified exclude options. You must specify one of
these literals or the None literal. The constraint choices are as follows:
C0 — A literal that specifies application of the constant 0 to the chosen primary input
pins.
C1 — A literal that specifies application of the constant 1 to the chosen primary input
pins.
CZ — A literal that specifies application of the constant Z (high-impedance) to the
chosen primary input pins.
CX — A literal that specifies application of the constant X (unknown) to the chosen
primary input pins.
• -Bidi_exclude
An optional switch that specifies to exclude bidirectional pins from the setup setting.
• -Lbist_exclude
An optional switch that specifies to exclude LBISTArchitect-related input pins from the
setup setting. These pins include clocks, RAM/ROM read signals, RAM/ROM write
signals, sets, resets, and known scan inputs.

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• -Exclude primary_input_pin
An optional switch and repeatable string that specifies to exclude the specified primary
input pins from the setup setting.
Examples
The following example defines the default pin constraints for all but the LBISTArchitect related
control and data pins, then adds two additional pin constraints that override the default:
setup pin constraints c0 -lbist_exclude
add pin constraints kgmt c1
add pin constraints ckgmt c1

Related Commands
Add Pin Constraints Delete Pin Constraints
Add Seq_transparent Constraints Report Pin Constraints
Analyze Input Control

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Setup Registered IO

Setup Registered IO
Scope: All modes
Prerequisites: You must first identify model_name with the Add Cell Models command before
using either the -Input_model or -Output_model switch.
Usage
SETup REgistered IO {{[-COmbinational | -All] [-Exclude pin_names…]} | [-INClude
pin_names...]} [-INPUT_Model model_name] [-OUTPUT_Model model_name]
[-INPUT_Clock pin_pathname] [-OUTPUT_Clock pin_pathname] [-Test_point_based]
Description
Registers the primary inputs and outputs of a core design.
The Setup Registered IO command turns on the automatic registration of the primary I/O pins of
the design. The registered cells are also placed into scan chains. The user-defined clocks and
scan related I/O pins are automatically excluded from registration. There are two different I/O
registration mechanisms that can be deployed with this command, as described below.
1. Scan-based
This default behavior of the command is deployed when the “-Test_point_based” switch
is not specified. The specified I/O pins are registered with regular scan cells, and the
inserted scan cells can be included in the same scan chains along with the existing cells
of the design. If input and output registration cells are desired in separate scan chains,
the Setup Partition Scan command can be used in conjunction with this command to
specify different number of chains and scan enable pins for the input and output
registration cells. If the Run command is also used, DFTAdvisor identifies partition
cells from the I/O that are not specified to be registered. The input registration cells and
the input partition cells are then placed in the same scan chains. Similarly, the output
registration cells and the output partition cells are placed in the same scan chains. In
scan-based I/O registration, specific clock pins can be specified for the registration cells
by using the
“-Input_clock” and “-Output_clock” switches. The “-Include” switch can only be used
with scan-based I/O registration, and cannot be used along with the “-Combinational”,
“-All”, and “-Exclude” switches.
2. Testpoint-based
This behavior can be invoked by using the “-Test_point_based” switch. The I/O pins are
registered using a generic wrapper cell defined via the Add Cell Models command with
WRAPCELL cell type. The wrapper cell has the same I/O as a scan cell in addition to a
test enable pin. The registration cells are inserted by DFTAdvisor’s test point insertion
mechanism (as control points for primary inputs and observe points for primary outputs)
and cannot be mixed with any other scan cells in the same scan chain. In addition, input
and output registration cells cannot be partitioned into separate scan chains. A test clock
pin is created to clock the registration cells. The “-Include”, “-Input_clock”, and
“-Output_clock” switches cannot be used when testpoint-based registration is selected.

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Setup Registered IO

Note
This feature does not address stitching of multiple cores, but rather the insertion of a scan
partition in a single core.

Arguments
• -Combinational
An optional switch that specifies to register the inputs and outputs that are not directly
connected to the existing sequential cells of the design through buffers, inverters, or wires.
Such sequential cells are considered as existing registration cells and therefore are not
registered again. If the “-Test_point_based” switch is specified, connections to the
sequential cells via buffers and inverters are not considered as direct connections. Clock and
scan-related I/O pins are automatically excluded from registration. This switch cannot be
used with the “-Include” switch. This is the default behavior.
• -All
An optional switch that specifies to register all inputs and outputs, regardless of whether a
registering sequential cell described above already exists. Clock and scan-related pins are
automatically excluded from registration. This switch cannot be used with the “-Include”
switch.
• -Input_model model_name
An optional switch and string pair that specifies to use model_name cells for registering
primary inputs. You must first define model_name with the Add Cell Models command.
• -Output_model model_name
An optional switch and string pair that specifies to use model_name cells for registering
primary outputs You must first define model_name with the Add Cell Models command.
• -Exclude pin_names
An optional switch and repeatable string that specifies which primary I/O pins you do not
want registered. Note that clock and scan-related pins are automatically excluded. This
switch cannot be used with the “-Include” switch.
• -Include pin_names
An optional switch and repeatable string that specifies which primary I/O pins you want
registered. Clock and scan-related pins are automatically excluded from registration. This
switch cannot be used with the “-Exclude”, “-Combinational”, “-All”, or
“-Test_point_based” switches.
• -Input_clock pin_pathname
An optional switch and string pair that specifies to use pin_pathname for the clock pin of the
registration cells that are inserted for input pins. The specified pin pathname should either
be a primary input or a top-level instance output pin. If this switch is not specified,
DFTAdvisor uses the clock of the neighboring cell in the input partition chain (when

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Setup Registered IO

partition chains inserted) or a test clock (when neighboring cell does not exist). This switch
cannot be used with the “-Test_point_based” switch.
• -Output_clock pin_pathname
An optional switch and string pair that specifies to use pin_pathname for the clock pin of the
registration cells that are inserted for output pins. The specified pin pathname should either
be a primary input or a top-level instance output pin. If this switch is not specified,
DFTAdvisor uses the clock of the neighboring cell in the output partition chain (when
partition chains inserted) or a test clock (when neighboring cell does not exist). This switch
cannot be used with the “-Test_point_based” switch.
• -Test_point_based
An optional switch that specifies for DFTAdvisor to perform testpoint-based I/O
registration. When not used, scan-based I/O registration is performed. More details are
given in the command description section above. This switch cannot be used with the
“-Include”, “-Input_clock”, or “-Output_clock” switches.
Examples
The following is a simple example that illustrates a testpoint-based I/O registration. Note that it
does not require identifying any existing sequential cells with the Run command because the
registration is done via testpoint insertion.
add cell model FD1SQA -type scancell CLK D
add cell model MUX21HA -type mux S A B
setup registered IO -test_point_based
set system mode dft
insert test logic

DFTAdvisor registers the primary inputs and outputs that are not connected to existing scan
cells and creates control testpoints (for input pins) and observe testpoints (for output pins). It
inserts a single scan cell per testpoint and places them in a single scan chain. The inserted

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Setup Registered IO

testpoints look like the following. Note that only the delay of a single mux is added per I/O
during the functional mode of operation.

If your design requires more sophisticated logic, you can define a wrapper cell with the Add
Cell Models command’s wrapcell type as shown below.
add cell model SC1_A -type wrapcell CLK D

If you define a scan cell model and a wrapper cell model, DFTAdvisor uses the wrapper model
to register the I/O. The architecture is now flexible because you can define the scan cell

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Setup Registered IO

architecture in the library. The following is an example of a wrapcell used as control and
observe point.

Note that the wrapper cell model in this example can capture data by means of the feedback
connection when used as an observe point. The scan definition section of the wrapper cell
model should include both the scan_enable and test_enable attributes defined as shown below.
model SC1_A(DOUT, SO, DIN, CLK, SI, SE, TE) (
scan_definition(
type = mux_scan;
scan_out = SO;
scan_in = SI;
scan_enable = SE;
test_enable = TE;
non_scan_model = DFF(DOUT, DIN, CLK);
)
input(DIN, CLK, SI, SE, TE) ()
intern(tied1) (primitive = _tie1 UT1 (tied1);)
intern(QQ) (primitive = _buf UP1 (SO, QQ);)
output(SO) (instance = FF_Q UD1 (SO, Y, CLK);)
intern(Y) (instance = MUX21 UD2 (Y, DOUT, SI, SE);)
output(DOUT) (instance = MUX21 UD3 (DOUT, DIN, QQ, TE);)
)

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The following example illustrates how scan-based I/O registration can be used along with
partition scan insertion.
add cell model FDSQ -type scancell CLK D
setup partition scan -exclude in1 in2 out1 out2 -input_sen seni -output_sen seno
setup registered IO -include in1 in2 out1 out2
set system mode dft
run
report partition cells
insert test logic

In this example, DFTAdvisor identifies the input and output partition cells upon issuing the Run
command. Four I/O pins are excluded from identification by the Setup Partition Scan command
and explicitly included for I/O registration by the Setup Registered IO command.
The input registration cells are placed into the input partition chains and output registration cells
are placed into the output partition chains. Please see the Setup Partition Scan command section
for more details. Note that the scan-based I/O registration allows inserting registration cells
along with the identified partition cells.
The scan-based I/O registration inserts only scan cells for registration and does not support
routing a test enable signal. The scan cell used for registration can however be modeled in many
ways as long as it has the same pins as a scan cell externally. The following figure shows a scan
cell modeled similar to the wrapper cell illustrated in the previous example. The cell can capture
data as an observe point by means of the feedback connection. Also, note that the input

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registration cell uses the input partition chain scan enable signal, whereas the output registration
cell uses the output partition chain scan enable signal.

Related Commands
Add Cell Models Setup Naming
Report Partition Cells Setup Partition Scan

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Setup Scan Identification

Setup Scan Identification


Scope: All modes
Usage
SETup SCan Identification
Full_scan |
{Clock_sequential [-Depth integer]} |
{SEQ_transparent [-Reconvergence {ON | OFf}]} |
{Partition_scan [-Input_threshold {integer | Nolimit}]
[-Output_threshold {integer | Nolimit}]} |
{SEQUential
{Atpg [{-Percent integer} | {-Number integer}] [-Internal |
-External filename] [-COntrollability integer] [-Observability integer]
[-Backtrack integer] [-CYcle integer] [-Time integer]
[-Min_detection floating_point]} |
{AUtomatic [{-Percent integer} | {-Number integer}]
{SCoap [-Percent integer | -Number integer]} |
{STructure [-Percent integer | -Number integer] [-Loop {ON | OFf}]
[-Self_loop {integer | Nolimit}] [-Depth {integer | Nolimit}]}} |
None |
{[-MAx_length integer] | [-NUmber [integer]]}
Description
Specifies the scan identification methodology and amount of scan that DFTAdvisor is to
consider during the identification run.
The Setup Scan Identification command controls the scan identification run. You can choose
from many scan identification methods. After you choose a method, you can specify the options
that apply to that method.
Full Scan Arguments
• Full_scan
A literal that specifies to use full scan for scan identification. Full scan is the fastest
identification method, converting all scannable sequential elements to scan. You can use
FastScan for ATPG on full scan designs. This is the default upon invocation of the tool. For
more information on full scan, refer to “Understanding Full Scan” in the Scan and ATPG
Process Guide.
Clock Sequential Arguments
• Clock_sequential
A literal that specifies to use clock sequential techniques for scan identification. This
method selects scannable cells by cutting sequential loops and limiting sequential depth
based on the -Depth switch. Typically, this method is used to create structured partial scan
designs that can use the FastScan clock sequential ATPG algorithm. For more information

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on clock sequential scan, refer to “FastScan Handling of Non-Scan Cells” in the Scan and
ATPG Process Guide.
• -Depth integer
An optional switch and integer pair that specifies the maximum sequential depth on any
sequential path. The maximum depth is 255. The default depth is 16.
Sequential Transparent Arguments
• SEQ_transparent
A literal that specifies to use the sequential transparency identification method for scan.
Note that this technique is useful for data path circuits. Scan cells are selected such that all
sequential loops, including self loops, are cut. For more information on sequential
transparent scan, refer to “FastScan Handling of Non-Scan Cells” in the Scan and ATPG
Process Guide.
• -Reconvergence {ON | OFf}
An optional switch and literal pair that specifies to remove sequential reconvergent paths by
selecting a scannable instance on the sequential path for scan. The default is ON.
Partition Scan Arguments
• Partition_scan
A literal that specifies to use partition scan for controllability and observability of embedded
blocks. You can also set threshold limits to control the overhead sometimes associated with
partition scan identification. For example, overhead extremes may occur when DFTAdvisor
identifies a large number of partition cells for a given uncontrollable primary input or
unobservable primary output. By setting the partition threshold limit for primary inputs
(-Input_threshold switch) and primary outputs (-Output_threshold switch), you maintain
control over the trade-off of whether to scan these partitioned cells or, instead, insert a
controllability/observability scan cell.
When DFTAdvisor reaches the specified threshold for a given primary input or primary
output, it terminates the partition scan identification process on that primary input or
primary output and unmarks any partition cell identified for that pin. For more information
on partition scan, refer to “Understanding Partition Scan” in the Scan and ATPG Process
Guide.
• -Input_threshold {integer | Nolimit}
An optional switch and integer or literal pair that specifies the maximum number of partition
scan cells for any given uncontrollable input. The default is nolimit.
• -Output_threshold {integer | Nolimit}
An optional switch and integer or literal pair that specifies the maximum number of partition
scan cells for any given unobservable output. The default is nolimit.

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Sequential Using ATPG Arguments


• SEQUential
A literal that specifies to use partial scan for scan identification. Partial scan (sequential)
results in a subset of scannable sequential elements being converted to scan. Partial scan
requires that you choose which algorithm to use (ATPG, Automatic, SCOAP, or Structure)
and how many scan elements to identify. You can use FlexTest for ATPG on partial scan
designs. For more information on partial scan, refer to “Understanding Partial Scan” in the
Scan and ATPG Process Guide.
• Atpg
An optional literal that specifies for DFTAdvisor to use the ATPG-based technique for
partial scan selection. This method selects scan cells using the sequential ATPG algorithm
of FlexTest. This is the default partial scan method.
• {-Percent integer} | {-Number integer}
An optional switch and integer pair that specifies the maximum percentage of scan (based
on the total number of sequential elements in the design) or absolute number of sequential
instances that you want to identify as scan. By default, the number of scan cells the tool can
select is 100 percent (which means that there is no limit). When specifying the percentage,
you are providing DFTAdvisor an absolute maximum percentage of scan cells it can choose.
Often, it will choose less than you specify (if it can do so and still meet the other criteria of
selection).
• -Internal
An optional switch that specifies for DFTAdvisor to base scan identification on the
internally-generated fault list. This is the default.
• -External filename
An optional switch and string pair that specifies the fault file on which you want
DFTAdvisor to base scan identification. The file must contain the user-defined fault list for
identifying critical flip-flops that you want to convert to scan flip-flops.
• -COntrollability integer
An optional switch and integer pair that specifies the desired percentage of controllability
test coverage. DFTAdvisor continues the scan identification process until it either reaches
the desired test coverage or no productive scan candidates are available. The default upon
invocation of DFTAdvisor is 100 percent.
• -Observability integer
An optional switch and integer pair that specifies the desired percentage of observability test
coverage. DFTAdvisor continues the scan identification process until it either reaches the
desired test coverage or no productive scan candidates are available. The default upon
invocation of DFTAdvisor is 100 percent.

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Setup Scan Identification

• -Backtrack integer
An optional switch and integer pair that specifies the number of conflicts DFTAdvisor
encounters before aborting the target fault. The default upon invocation of DFTAdvisor is
30 conflicts.
• -CYcle integer
An optional switch and integer pair that specifies the number of test cycles DFTAdvisor
encounters before aborting the target fault. The default upon invocation of DFTAdvisor is
16 test cycles.
• -Time integer
An optional switch and integer pair that specifies the CPU time in seconds that DFTAdvisor
uses before aborting the target fault. The default upon invocation of DFTAdvisor is 100
seconds of CPU time.
• -Min_detection floating_point
An optional switch and floating point pair that specifies the minimum percentage of test
coverage that a scan cell must provide. If a scan cell does not detect at least the specified
minimum percentage of faults, DFTAdvisor does not select the cell for scan. The default
upon invocation of DFTAdvisor is 0.01 percent.
Sequential Using Automatic Arguments
• SEQUential
A literal that specifies to use partial scan for scan identification. Partial scan (sequential)
results in a subset of scannable sequential elements being converted to scan. Partial scan
requires that you choose which algorithm to use (ATPG, Automatic, SCOAP, or Structure)
and how many scan elements to identify. You can use FlexTest for ATPG on partial scan
designs. For more information on partial scan, refer to “Understanding Partial Scan” in the
Scan and ATPG Process Guide.
• AUtomatic
An optional literal that specifies for DFTAdvisor to use the automatic technique for partial
scan selection. This method selects scan cells using a combination of several scan selection
techniques. The goal is to select the minimum set of best scan candidates needed to achieve
high fault coverage.
• {-Percent integer} | {-Number integer}
An optional switch and integer pair that specifies the maximum percentage of scan (based
on the total number of sequential elements in the design) or absolute number of sequential
instances that you want to identify as scan. By
default, automatic scan selection analyzes the circuit and attempts to identify the minimum
amount of scan needed to achieve high fault coverage. However, if a limit is set using either
of those two switches, DFTAdvisor attempts to select the best scan cells within the limit.
It is recommended that during the first scan selection and ATPG iteration, you use the
default to allow the tool to determine the amount of scan needed. Then based on the ATPG

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Setup Scan Identification

results and how they compare to the required test coverage criteria, you can specify the
exact amount of scan to select. The amount of scan selected in the first (default) iteration
can be used as a reference point for determining how much more or less scan to select in
subsequent iterations (such as what limit to specify).
Sequential Using SCOAP Arguments
• SEQUential
A literal that specifies to use partial scan for scan identification. Partial scan (sequential)
results in a subset of scannable sequential elements being converted to scan. Partial scan
requires that you choose which algorithm to use (ATPG, Automatic, SCOAP, or Structure)
and how many scan elements to identify. You can use FlexTest for ATPG on partial scan
designs. For more information on partial scan, refer to “Understanding Partial Scan” in the
Scan and ATPG Process Guide.
• SCoap
An optional literal that specifies for DFTAdvisor to use the SCOAP-based technique for
partial scan selection. SCOAP-based selection is typically faster than ATPG-based
selection, and produces an optimal set of scan candidates.
• {-Percent integer} | {-Number integer}
An optional switch and integer pair that specifies the percentage of scan (based on the total
number of sequential elements in the design) or absolute number of sequential instances that
you want to treat as scan instances. By default, the number of scan cells the tool selects is 50
percent.
Sequential Using Structure Arguments
• SEQUential
A literal that specifies to use partial scan for scan identification. Partial scan (sequential)
results in a subset of scannable sequential elements being converted to scan. Partial scan
requires that you choose which algorithm to use (ATPG, Automatic, SCOAP, or Structure)
and how many scan elements to identify. You can use FlexTest for ATPG on partial scan
designs. For more information on partial scan, refer to “Understanding Partial Scan” in the
Scan and ATPG Process Guide.
• STructure
An optional literal that specifies for DFTAdvisor to use structure-based scan selection
techniques. These techniques include loop breaking, self-loop breaking, and limiting the
design’s sequential depth.
• {-Percent integer} | {-Number integer}
An optional switch and integer pair that specifies the maximum percentage of scan (based
on the total number of sequential elements in the design) or absolute number of sequential
instances that you want to identify as scan. By default, the number of scan cells the tool can
select is 100 percent (which means that there is no limit). When specifying the percentage,
you are providing DFTAdvisor an absolute maximum percentage of scan cells it can choose.

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Often, it will choose less than you specify if it can do so and still meet the other criteria of
selection.
• -Loop {ON | OFf}
An optional switch and literal pair that specifies to cut global loops by inserting scan
instances. The default is ON.
• -Self_loop {integer | Nolimit}
An optional switch and integer or literal pair that specifies the maximum number of
consecutive self-loops allowed to remain on any sequential path. The default is 8.
• -Depth {integer | Nolimit}
An optional switch and integer or literal pair that specifies the maximum sequential depth
allowed to remain on any sequential path. The default is 16.
No Scan Identification Argument
• None
A literal that specifies to not perform scan identification. You use this option in combination
with the Add Test Points or Setup Test_point Identification command if you only want to
insert test points (and not scan) in your design. If you want to insert both test points and
scan, you should always do the scan identification before the test point identification to
ensure an optimal test point selection. For more information on test points, refer to
“Understanding Test Points” in the Scan and ATPG Process Guide.
General Arguments
• -MAx_length integer | -NUmber integer
Two optional, mutually-exclusive switch and integer pairs that specify one of the following:
-MAx_length integer
Specifies the maximum number of scan cells that DFTAdvisor can stitch into a
scan chain. DFTAdvisor evenly divides the scan cells into scan chains that are
smaller than the max_length integer. Final results depend upon the number of
scan candidates.
-NUmber integer
Specifies the exact number of scan chains that you want DFTAdvisor to insert.
Final results depend upon the number of scan candidates. The default number of
chains is 1.
Examples
The following example sets up scan identification to identify a maximum of 50 percent of the
design’s total number of sequential instances for scan:
set system mode dft
setup scan identification sequential atpg -percent 50
run

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Setup Scan Identification

The following example sets up for full scan:


setup scan identification full_scan
run

The following example sets up for a test point only run:


setup scan identification none
setup test_point identification -control 10 -observe 5
run

Related Commands
Add Test Points Setup Test_point Identification
Report Sequential Instances Write Scan Identification
Run
Setup Partition Scan

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Command Dictionary
Setup Scan Insertion

Setup Scan Insertion


Scope: Setup
Usage
SETup SCan INsertion
[-SEN name [-Isolate]] [-SEN_In name] [-SEN_Out name] [-TEn name] [-TClk name]
[-SClk name] [-SMclk name] [-SSclk name] [-SET name] [-RESet name] [-Write name]
[-REAd name] [-Muxed | -Disabled | -Gated] [-Active {High | Low}]
Description
Sets up the parameters for the Insert Test Logic command.
The Setup Scan Insertion command allows you to set the pin names (or change those with
default names) that DFTAdvisor assigns during the Insert Test Logic command. Table 2-10 lists
the default pin names.

Table 2-10. Scan Insertion Invocation Default Pin Names


Switch Description Default Name
-SEN Scan Enable for mux-DFF type (SEN type) scan_en
-SEN_In Scan Enable for mux-DFF type (SEN_IN type) scan_en_in
-SEN_Out Scan Enable for mux-DFF type (SEN_OUT type) scan_en_out
-TEn Test Enable for all scan types test_en
-TClk New Scan Clock for all scan types test_clk
-SClk Scan Clock for clock-scan type scan_clk
-SMclk Scan Master Clock for LSSD type scan_mclk
-SSclk Scan Slave Clock for LSSD type scan_sclk
-SET Global Set scan_set
-RESet Global Reset scan_reset
-Write RAM Write Control write_clk
-REAd RAM Read Control read_clk

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Setup Scan Insertion

DFTAdvisor inserts three types of scan enable signals: one for the regular/non-partition scan
cells (SEN type), one for input partition cells (SEN_IN type), and one for output partition cells
(SEN_OUT type), for which default base names can be specified with the -SEN, -SEN_In, and -
SEN_Out switches, respectively. For more details on partition scan enables, refer to the
descriptions for the Setup Partition Scan command.
DFTAdvisor uses the set and reset names when gating the set and reset pins of flip-flops or
latches. Furthermore, you can use the -Disabled or -Muxed switches to specify whether
DFTAdvisor uses an AND gate or MUX gate when performing the gating. If you specify the
-Disabled option, then for gating purposes, DFTAdvisor uses the test enable signal to disable
the set and reset inputs of flip-flops. If you specify the -Muxed option, then for muxing
purposes, DFTAdvisor uses any set and reset pins (which are defined as clocks) to multiplex
with the original signal.
DFTAdvisor uses the write control and read control pins when inserting test logic for RAMs.
After you have added the write control lines in the Setup system mode and switched to the DFT
system mode, the Design Rules Checker checks whether the RAMs can be held off when the
write control pin is off. Those RAMs that cannot be held off are candidates for inserting test
logic.
If the new scan design is intended for FastScan, and if the write clock input of the RAM is not
controllable, it will be muxed out by a new write clock and the selector to the mux will be the
test enable pin.
If the new scan design is intended for FlexTest, and if the original write clock is not to be muxed
and the RAM is just to hold during the shifting of the scan chain data, you need to specify the
-Disabled option. Thus, DFTAdvisor will use the scan enable pin of SEN type to gate the
original write clock input of the RAM.
The -Muxed/-Disabled/-Gated switches can be used only with the -Set, -Reset, -Write, and
-Read switches. Also, -Active switch can be used only with the -Sen, -Sen_in, -Sen_out, -Ten,
-Set, and -Reset switches.
In addition, you can use instance pin pathnames to define the scan enables (all three types), test
enable, and clock pin names. If you specify an internal pin pathname and the tool cannot trace
through a simple path (inverters or buffers only) back to a primary input/output of the design,
DFTAdvisor cannot generate the test procedure file and the dofile when you use the Write Atpg
Setup command. In this case, you must manually develop these two files before running ATPG
with either FastScan or FlexTest.
Currently, the -Isolate option can be used only for the scan enable signal of SEN type (inserted
for regular/non-partition cells). If you specify this option, DFTAdvisor checks the global scan
enable signal to determine if it already has fanouts. If this is true, then an AND or NOR gate is
inserted with the second input controlled by the global test enable signal. The output of this gate
is connected to all the new fanouts of the scan enable pin (scan enable pins of scan cells). The
output of this gate is active for test mode and inactive for system mode. In test mode (whenever
the global test enable pin is active), the output of this gate is identical to the scan enable signal;
the gate acts as a buffer. Depending on the active state of the global scan enable and test enable

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Setup Scan Insertion

signals, the isolation gating is performed during specific states—Table 2-11 identifies these
states.

Table 2-11. Isolation Gating Based on Scan and Test Enable Active States
Scan Enable Test Enable Available in Isolation Gating
Library
Active-High Active-High AND, NOR AND
Active-High Active-High NOR Error - Need AND
Active-High Active-Low AND, NOR AND
(TEN inverted)
Active-High Active-Low NOR NOR
(SEN inverted)
Active-Low Active-High AND, NOR AND
(SEN inverted)
Active-Low Active-High NOR NOR
(TEN inverted)
Active-Low Active-Low AND, NOR NOR
Active-Low Active-Low AND Error - Need NOR

Arguments
• -SEN name
An optional switch and string pair specifying the leading scan enable pin name that you
want the scan insertion process to use when creating the SEN type scan enable for
regular/non-partition scan cells and test logic. The default scan enable pin name upon
invocation of DFTAdvisor is “scan_en”. If you create multiple scan enables (using the Set
Multiple Scan_enables command), then DFTAdvisor uses this name as the prefix for each
scan enable name (nameN).
Use the -Active switch to specify whether the scan enable pin is active low or active high.
Use the -Isolate switch to isolate any newly added fanouts of this signal.
• -SEN_In name
An optional switch and string pair specifying the leading scan enable pin name that you
want the scan insertion process to use when creating the SEN_IN type scan enable for input
partition scan cells. The default scan enable pin name upon invocation of DFTAdvisor is
“scan_en_in”. If you create multiple scan enables (using the Set Multiple Scan_enables
command), then DFTAdvisor uses this name as the prefix for each scan enable name
(nameN).
Use the -Active switch to specify whether the scan enable pin is active low or active high.

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• -SEN_Out name
An optional switch and string pair specifying the leading scan enable pin name that you
want the scan insertion process to use when creating the SEN_OUT type scan enable for
output partition scan cells. The default scan enable pin name upon invocation of
DFTAdvisor is “scan_en_out”. If you create multiple scan enables (using the Set Multiple
Scan_enables command), then DFTAdvisor uses this name as the prefix for each scan
enable name (nameN).
Use the -Active switch to specify whether the scan enable pin is active low or active high.
• -Isolate
An optional switch to the -Sen switch that specifies to isolate all new fanouts of the
scan_enable signal specified by the -Sen option. DFTAdvisor inserts an additional AND or
NOR gate during scan insertion, with the output connected to all the new fanouts of the
scan_enable pin. The inputs of this new gate are the scan enable and the global test enable
signals. The default is to not isolate the new fanouts.
• -TEn name
An optional switch and string pair specifying the leading test enable pin name that you want
the scan insertion process to use when creating the test enable. The default test enable pin
name upon invocation of DFTAdvisor is “test_en”.
Use the -Active switch to specify whether the test enable pin is active low or active high.
• -TClk name
An optional switch and string pair that specifies a scan clock pin to use during scan
insertion. If no scan clock pin exists, one is created using the specified name. By default, the
new scan clock pin is named test_clk.
If an internal pin is specified as the test clock pin, it is traced back to a predefined scan
clock. If a predefined scan clock is found, its off-state value is used for test logic insertion.
This tracing can only be performed along a single path that consists of only straight wire,
inverters, and buffers.
• -SClk name
An optional switch and string pair specifying the leading scan clock pin name that you want
the scan insertion process to use when creating the scan clock. DFTAdvisor only creates the
scan clock pin for the scan clock port in the dual-port type mux scan. The default scan clock
pin name upon invocation of DFTAdvisor is “scan_clk”.
• -SMclk name
An optional switch and string pair specifying the leading scan master clock pin name that
you want the scan insertion process to use when creating the scan master clock. The default
scan master clock pin name upon invocation of DFTAdvisor is “scan_mclk”.

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• -SSclk name
An optional switch and string pair specifying the leading scan slave clock pin name that you
want the scan insertion process to use when creating the scan slave clock. The default scan
slave clock pin name upon invocation of DFTAdvisor is “scan_sclk”.
• -SET name
An optional switch and string pair specifying the set pin name that you want DFTAdvisor to
use for the flip-flop or latch when inserting test logic. The default set pin name upon
invocation of DFTAdvisor is “scan_set”.
• -RESet name
An optional switch and string pair specifying the reset pin name that you want DFTAdvisor
to use for the flip-flop or latch when inserting test logic. The default reset pin name upon
invocation of DFTAdvisor is “scan_reset”.
• -Write name
An optional switch and string pair specifying the write control pin name that you want
DFTAdvisor to use for the RAM when inserting test logic. The default write control pin
name upon invocation of DFTAdvisor is “write_clk”.
• -REAd name
An optional switch and string pair specifying the read control pin name that you want
DFTAdvisor to use for the RAM when inserting test logic. The default read control pin
name upon invocation of DFTAdvisor is “read_clk”.
The next three switches apply only to the -Set, -Reset, -Write, and -Read switches, and
whichever one you choose— -Muxed, -Disabled, or -Gated—applies to whatever combination
of -Set, -Reset, -Write, and -Read you choose. For instance, you cannot apply -Muxed to -Set
and then apply -Disabled to -Write within the same command instance. To accomplish the
previous combination, use the command twice. In addition, within a single command, you can
only use the -Muxed, -Disabled, or -Gated switch once. If you apply the chosen switch more
than once, DFTAdvisor issues an error.
• -Muxed
An optional switch that specifies for DFTAdvisor to mux the set, reset, write control, or read
control lines. This is the invocation default. If you specify the -Muxed option, then for
muxing purposes, DFTAdvisor will multiplex any set and reset pins that are defined as
clocks with the original signal.
• -Disabled
An optional switch that specifies for DFTAdvisor to gate the set, reset, write clock, or read
clock lines. If you specify the -Disabled option, then for gating purposes, DFTAdvisor will
use the test enable signal to disable set and reset inputs of flip-flops, and the scan enable
signal of SEN type to disable the write and read clocks.

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• -Gated
An optional switch that specifies for DFTAdvisor to gate the set, reset, write control, or read
control lines. If you specify the -Gated option, then for gating purposes, DFTAdvisor will
use any set and reset pins defined as clocks, or use the write and read clocks, to disable the
set and reset inputs of flip-flops.
• -Active High | Low
An optional switch and literal pair that determines whether the scan clock activates the test
enable, set, or reset pin on high or low. Within a single command, you can only use the -
Active switch once. The -Active switch applies to any of the following pins specified in the
command when this switch is used: -Sen, -Sen_in, -Sen_out, -Ten, -Set, and -Reset. By
default, all these signals are set to be active on high.
Examples
The following example renames the test enable pin name to test_en_L and specifies for the pin
to be active low during the scan insertion process:
add clocks 0 clock
set system mode dft
run
setup scan insertion -ten test_en_L -active low
insert test logic -number 8

The following example shows how to set different controls using successive Setup Scan
Insertion commands:

setup scan insertion -ten TEST_MODE -active high


setup scan insertion -sen SCAN_MODE -active low -isolate
setup scan insertion -reset RESET_L -active low
setup scan insertion -write ATPG_WRT_INH -read ATPG_READ_INH
setup scan insertion -set ATPG_SET -disabled

Related Commands
Insert Test Logic Set Multiple Scan_enables
Report Partition Cells

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Command Dictionary
Setup Scan Pins

Setup Scan Pins


Scope: All modes
Usage
SETup SCan Pins {Input | Output} [-INDexed | -Bused] [-Prefix base_name] [-INItial index#]
[-Modifier incr_index#] [-Suffix suffix_name]
Description
Changes the scan-in or scan-out pin naming parameters to index or bus format.
The Setup Scan Pins command specifies the index or bus naming conventions for scan-in or
scan-out pins. The Report Environment command displays the names and values that
DFTAdvisor uses for scan-in and scan-out pins when inserting scan chains. Once you have
inserted scan chains, you can use the Report Scan Chains command to display the chosen index
or bus naming convention for the scan-in pins and/or scan-out pins.
Indexed names are in the form:
base_name + index# + suffix_name

Bused names are in the form:


base_name + [index#]

Arguments
• Input
A literal specifying that DFTAdvisor apply the index or bus format on the scan-in pins.
• Output
A literal specifying that DFTAdvisor apply the index or bus format on the scan-out pins.
• -INDexed
An optional switch specifying that DFTAdvisor apply the index format to the scan-in or
scan-out pin names. This is the default.
• -Bused
An optional switch specifying that DFTAdvisor apply the bus format to the scan-in or scan-
out pin names.
• -Prefix base_name
An optional switch and string pair that specifies the root name of the scan-in or scan-out pin.
The default name is scan_in.
• -INItial index#
An optional switch and integer pair that specifies the initial index value of the scan-in or
scan-out pin name. The default value is 1.

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• -Modifier incr_index#
An optional switch and integer pair that specifies the incremental value that to add to the
index# when creating additional names with the same base_name. The default is 1.
• -Suffix suffix_name
An optional switch and string pair that specifies the name that you want to place after the
index#. DFTAdvisor only uses this for indexed naming. The default is null.
Examples
The following example configures scan insertion to use bus names for the scan-in pins and scan-
out pins, with the index number starting at 5 and incrementing by 2 for scan-in pins, and the
index number starting at 4 and incrementing by 2 for scan-out pins:
add clocks 0 clock
set system mode dft
run
setup scan pins input -bused -prefix scin -initial 5 -modifier 2
setup scan pins output -bused -prefix scout -initial 4 -modifier 2
insert test logic -number 7

Related Commands
Insert Test Logic

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Command Dictionary
Setup Test_point Identification

Setup Test_point Identification


Scope: Setup and Dft modes
Prerequisites: If you only want test points (and not scan) identified, use the Setup Scan
Identification command’s None option.
Usage
SETup TEst_point IDentification [-COntrol integer] [-OBserve integer [-Primary_outputs
[-EXClude pins…]]] [-Verbose | -NOVerbose] [-Internal | {-External filename}]
Description
Specifies the number of control and observe test points that DFTAdvisor flags during the
identification run.
Test points allow you to gain access into the design to aid in detecting the undetectable faults,
which increases the design’s fault coverage. Test points may translate into additional input or
output pins or scan cells at the chip level.
Control test points allow you to gain access to the inputs of a gate (or multiple gates) where
faults are undetectable. Usually the reason these faults are undetectable is because the ATPG
tool cannot simultaneously force the correct combination of values onto the inputs. By creating
a test point at that location, you give the ATPG tool direct control over the input values of that
gate, which then gives the tool the ability to force (control) the necessary combination of input
values to detect the previously undetectable faults.
Observe test points allow you to gain access to the outputs of a gate (or multiple gates) where
faults are undetectable. With observability problems, usually the reason these faults are
undetectable is because the effects of this fault never propagate to a primary output or other
observation point. A fault cannot be detected unless one or more primary outputs shows the
fault effect. By creating a test point at that location, you allow direct access to the fault effect,
which changes the fault from an unobservable (undetected) fault to a detected fault.
Once you enable DFTAdvisor to identify the optimum test point locations (with the Setup Scan
Identification command) and set the number of each type of test point that DFTAdvisor is to
locate (with the Setup Test_point Identification command), you need to enter Dft mode (with
the Set System Mode command). After successfully entering Dft mode, you perform the test
point analysis, based on the SCOAP pin selection technique, with the Run command. While
performing the analysis, DFTAdvisor lists the test point locations that it identifies.

Tip: See “Analyzing the Design for Controllability and Observability of Gates” in the
Scan and ATPG Process Guide.

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Setup Test_point Identification

Arguments
• -COntrol integer
An optional switch and integer pair that specifies how many test points you want
DFTAdvisor to identify to aid in increasing the controllability of the design. The default
upon invocation of DFTAdvisor for identifying test points for controllability is 0.
• -OBserve integer [-Primary_outputs [-EXClude pins…]]
An optional switch and integer pair that specifies how many test points you want
DFTAdvisor to identify to aid in increasing the observability of the design. The default upon
invocation of DFTAdvisor for identifying test points for observability is 0.
-Primary_outputs — An optional switch that specifies to add an observe point to
primary outputs. The implementation of this option depends on the settings in the
Setup Test_point Insertion command.
-EXClude pins — An optional switch and repeatable string that excludes the
specified primary output pins from use as observe points.
• -Verbose | -NOVerbose
An optional switch that specifies the amount of information that DFTAdvisor displays
during test point generation.
• -Internal | {-External filename}
An optional switch or switch and string that specifies which faults to use when performing
SCOAP-based test point selection.
-Internal — A switch that specifies to consider all faults. This is the default.
-External filename — A switch and string that specifies to use only those faults listed in
the specified faults list file for evaluating the benefit of a test point. Detected,
redundant, and unused fault found in the file are ignored. Any other faults previously
loaded are discarded. Typically, this fault list file is saved after running ATPG. This
file only needs to be set once, and it is used by all SCOAP test point selection
methods until it is changed (with -Internal or -External).
Examples
The following example shows the flow of having DFTAdvisor automatically identify and insert
two test points for controllability:
set system mode dft
setup scan identification none
setup test_point identification -control 2
run
// Performing test_point identification ...
// Number of control points to be identified = 2
// Number of observe points to be identified = 0

insert test logic -test_point on


report test points

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Setup Test_point Identification

Control [Selected]: /CNTR/U783/ZN or2a test_cntl1


Control [Selected]: /ADDR/U23/D1 or2a test_cntl2

Related Commands
Add Cell Models Setup Scan Identification
Add Test Points Setup Scan Insertion
Insert Test Logic
Report Test Points

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Command Dictionary
Setup Test_point Insertion

Setup Test_point Insertion


Scope: All modes
Prerequisites: You must identify model_name, and the models for use with the -New_scan_cell
option, with the Add Cell Models command before using the -Model or -New_scan_cell
switch.
Usage
Control Point Usage
SETup TEst_point INsertion [-Control [{pin_pathname -None} | -New_scan_cell | {-Model
model_name}]] [-REconvergence {OFf | ON}] [-CShare integer]
Observe Point Usage
SETup TEst_point INsertion [-Observe [{pin_pathname -None} | {observe_enable
-Existing_scan_cell} | -New_scan_cell | {-Model model_name}]] [-REconvergence {OFf |
ON}] [-OShare integer]
Description
Specifies how DFTAdvisor configures the inputs for the control test points and the outputs for
the observe test points.
The Setup Test_point Insertion command modifies how the Insert Test Logic command inserts
test points. By default, the Insert Test Logic command creates a primary input for the control
test points named “test_cntrl” and a primary output for the observe test points named
“test_obs”. You can change these default names with the pin_pathname argument.
When you specify that you want new scan cells inserted for test points (-Model or -
New_scan_cell switch), DFTAdvisor inserts these new scan cells locally on the module where
the test point resides. If you specify that you want an XOR tree, DFTAdvisor analyzes the list of
new observe points and groups them based on hierarchical information. The tool then inserts the
resulting observe scan cell in the module where the XOR tree emerges.
Each of the new scan cells is fitted into nearby existing scan chains that do not exceed the chain
length limit. The clock for each new scan cell is the same as the clock of the scan cell it feeds in
the chain. If DFTAdvisor cannot find a nearby chain, it drops the test point.
If you want DFTAdvisor to automatically identify test points, you can use the Setup Scan
Identification command in combination with the Setup Test_point Identification and Run
commands. After DFTAdvisor identifies the optimum test points, you then insert those test
points with the Insert Test Logic command.
Arguments
• -Control
An optional switch that specifies how to configure the inputs for control test points.

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Setup Test_point Insertion

If you use the -None switch (the default) in combination with this switch, DFTAdvisor does
not use a scan cell, instead controlling the test point it inserts with the pin specified by the
“prefix” name, pin_pathname, as shown in Figure 2-6.

Figure 2-6. Control Point Example for -None and -Model

If you use the -Model switch in combination with the -Control switch, DFTAdvisor controls
the test point by adding an additional scan cell, defined by model_name, when the test logic
is synthesized (Figure 2-6). Each of the new scan cells is fitted into a nearby existing scan
chain that does not exceed the chain length limit. The clock for each new scan cell is the
same as the scan cell it feeds in the chain. If DFTAdvisor cannot find a nearby chain, it
drops the control point.
If you use the -New_scan_cell switch in combination with the -Control switch, DFTAdvisor
controls the test point by adding an additional scan cell when the test logic is synthesized
(Figure 2-7). The new scan cell is fitted into a nearby existing scan chain that does not
exceed the chain length limit. DFTAdvisor chooses the new cell to be edge-compatible with
the existing scan cells in the chain. The clock for each new scan cell is the same as the scan
cell it feeds in the chain. If DFTAdvisor cannot find a nearby chain, it drops the control
point.

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Setup Test_point Insertion

Figure 2-7. Control Point Example for -New_scan_cell

• -Observe
An optional switch that specifies how to configure the outputs for observe test points.
If you use the -None switch (the default) in combination with this switch, DFTAdvisor
controls the test point it inserts with the pin specified by the “prefix” name, pin_pathname,
as shown in Figure 2-8.

Figure 2-8. Observe Point Example for -None and -Model

If you use the -Model switch in combination with the -Observe switch, DFTAdvisor
controls the test point by adding an additional scan cell when the test logic is synthesized, as
shown in Figure 2-8. Each of the new scan cells is fitted into a nearby existing scan chain

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Command Dictionary
Setup Test_point Insertion

that does not exceed the chain length limit. The clock for each new scan cell is the same as
the scan cell it feeds in the chain. If DFTAdvisor cannot find a nearby chain, it drops the
observe point.
If you use the -New_scan_cell switch in combination with -Observe, it behaves much the
same as when using -Model, except DFTAdvisor will choose the new cell to be edge-
compatible with the existing scan cells in the target scan chain when the test logic is
synthesized (Figure 2-9). This matching of the rising/falling edge attribute will prevent D7
type DRC violations. Each of the new scan cells is fitted into nearby existing scan chains
that do not exceed the chain length limit. The clock for each new scan cell is the same as the
scan cell it feeds in the chain. If DFTAdvisor cannot find a nearby chain, it drops the
observe point.

Figure 2-9. Observe Point Example with -New_scan_cell

If you use the -Existing_scan_cell switch in combination with the -Observe switch,
DFTAdvisor controls the test point by adding multiplexing to an existing nearby scan cell
when the test logic is synthesized, as shown in Figure 2-10. The observe_enable specifies
the name of the observe enable signal that controls the input to the scan cell.

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Setup Test_point Insertion

Figure 2-10. Observe Point Example with -Existing_scan_cell

• pin_pathname -None
An optional string and switch pair that specifies for DFTAdvisor to only insert the test point
without inserting an additional scan cell, as shown in Figure 2-6 and Figure 2-8. This is the
default.
• -Existing_scan_cell observe_enable
An optional switch and string pair that specifies for DFTAdvisor to use nearby scan cells for
observation points, as shown in Figure 2-10. The observe point is propagated to a nearby
scan cell and multiplexed with the functional path D input of the cell. In this case, you must
specify the “data_in” parameter in the scan_definition section of the model for all scan cells
used in the design. This option is only valid with the -Observe switch.
observe_enable — The observe_enable specifies the name of the observe enable signal
that controls the input to the scan cell.
• -New_scan_cell — An optional switch that specifies for DFTAdvisor to determine the
rising/falling edge of scan cells in use in the nearby target scan chain, and to use an edge-
compatible scan cell model for the new scan cell. See Figure 2-7 and Figure 2-9. You must
identify the type of the scan cell models with the Add Cell Models command or have the
type assigned in the library models before using this switch.
• -Model modelname
An optional switch and string pair that specifies for DFTAdvisor to insert a cell along with
the test point, as shown in Figure 2-6 and Figure 2-8. The specified model must be of type
SCANCELL. You must identify the type of the modelname with the Add Cell Models
command or have the type assigned in the library model before using this switch.

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Setup Test_point Insertion

• -REconvergence {OFf | ON}


An optional switch and literal pair that enables the sharing of test points based on
reconvergence analysis. DFTAdvisor performs reconvergence analysis to determine which
test points can share the same pin and scan cell. If the backward cones of observe points or
the forward cones of control points intersect, the test points are not shared. When this option
is On, the amount of sharing is limited, which guarantees that no fault masking can occur
due to sharing (often a negligible phenomenon). The sharing is also influenced by the
existence of scan chains inside of modules when new scan cells are used for testpoints. In
this case, a nearby scan chain may be used for the new scan cell created by the shared tree of
test points. The default is Off.
• -CShare integer
An optional switch and integer pair that specifies the maximum number of control points
that can share a primary input or a single scan cell. When you issue the Setup Test_point
Insertion command, the default maximum number of control points that DFTAdvisor will
allow to share a single scan cell or primary input is 16.
Not all control points can share a single scan cell. If you enable the -Reconvergence option
and the forward trace of any two control points intersect, they must use separate scan cells.
This may result in less than the maximum number of control points sharing any given scan
cell.
• -OShare integer
An optional switch and integer pair that specifies the maximum number of observe points
you want DFTAdvisor to share with a primary output or a single scan cell. When you issue
the Setup Test_point Insertion command, the default maximum number of observe points
that DFTAdvisor will allow to share a single scan cell or primary output is 16.
Not all observe points can share a single scan cell. If you enable the -Reconvergence option
and the backward trace of any two observe points intersect, they must use separate scan
cells. This may result in less than the maximum number of observe points sharing any given
scan cell.

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Setup Test_point Insertion

Examples
The following example shows the flow of having DFTAdvisor automatically identify and insert
two test points for controllability:
set system mode dft
setup scan identification none
setup test_point identification -control 2
run
// Performing test_point identification ...
// Number of control points to be identified = 2
// Number of observe points to be identified = 0
// 1: CV1=16458424 gate_index=3805 INV /CNTR/U783/ZN
// 2: CV1=16458417 gate_index=1058 BUF /ADDR/U23/D1

add cell models dffslp -type scancell CK D SDI SE


add cell models or2a -type Or
add cell models and2a -type and
setup test_point insertion -control test_cntrl1 -model dffslp
insert test logic -test_point on
report test points
Control [Selected]: /CNTR/U783/ZN and2a test_cntl1
Control [Selected]: /ADDR/U23/D1 or2a test_cntl1

Related Commands
Add Cell Models Setup Scan Identification
Insert Test Logic Setup Test_point Identification

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Command Dictionary
Setup Tied Signals

Setup Tied Signals


Scope: Setup mode
Usage
SETup TIed Signals 0 | 1 | X | Z
Description
Changes the default value for floating pins and floating nets that do not have assigned values.
The Setup Tied Signals command specifies the default value that the tool ties to all floating nets
and floating pins that are not specified with the Add Tied Signals command. Upon invocation of
the tool, if you do not assign a specific value, the tool assumes the default value is unknown.
If the model is already flattened and then you use this command, you must delete and recreate
the flattened model.
Arguments
• 0
A literal that specifies to tie the floating nets or pins to logic 0 (low to ground).
• 1
A literal that specifies to tie the floating nets or pins to logic 1 (high to voltage source).
• X
A literal that specifies to tie the floating nets or pins to unknown.
• Z
A literal that specifies to tie the floating nets or pins to high-impedance.
Examples
The following example ties floating net vcc to logic 1 and ties the remaining unspecified
floating nets and pins to logic 0, then performs a scan identification run.
setup tied signals 0
add tied signals 1 vcc
set system mode dft
run

Related Commands
Add Tied Signals Report Tied Signals
Delete Tied Signals

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Command Dictionary
System

System
Scope: All modes
Usage
SYStem os_command
Description
Passes the specified command to the operating system for execution.
The System command executes one operating system command without exiting the currently
running application.
Arguments
• os_command
A required string that specifies any legal operating system command.
Examples
The following example performs a scan identification run, then displays the current working
directory without exiting DFTAdvisor:
set system mode dft
run
system pwd

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Command Dictionary
Verify Scan

Verify Scan
Scope: Dft mode
Usage
Verify Scan
Description
Verifies that newly inserted scan can pass DRC.
The Verify Scan command is issued to test the conformity of clocking, scan, and pin
constraints.This command encompasses several verification steps often added by users at the
end of their runs. Users frequently write out an ATPG setup file, followed by returning to Setup
mode. They then delete the pin constraints, clocks, and scan information. The ATPG setup file
is then read back in and DFT mode entered to perform DRC checking. At this point, a Report
Dft Check -Nonscan is usually performed. This step validates that the ATPG setup file contains
correct clocking, scan, and pin constraint information for tools later in the flow.
The Verify Scan command encompasses all of the steps listed previously. During its operation,
DRC failures and DFT checking information is displayed. The temporary file that is used for
writing and subsequently reading the ATPG setup information is removed after completion of
this command.
Examples
This is an example of a typical usage for the Verify Scan command:
analyze control signals -auto_fix
set system mode dft
run
insert test logic -number 8
write netlist scan.v -verilog -replace
write atpg setup setup -replace
verify scan

Use of the Verify Scan command replaced the following commands typically utilized at the end
of a script:
analyze control signals -auto_fix
set system mode dft
run
insert test logic -number 8
write netlist scan.v -verilog -replace
write atpg setup setup -replace

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Command Dictionary
Verify Scan

write atpg setup /tmp/verify_setup.pid -rep


set system mode setup
delete clocks -all
delete pin constraints -all
delete scan groups -all
delete scan chains -all
dofile /tmp/verify_setup.pid verify_setup.dofile
set system mode dft
report drc rules -fails -verbose
report dft check -nonscan

Related Commands
Report Dft Check

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Write Atpg Setup

Write Atpg Setup


Scope: Dft mode
Prerequisites: Scan chains must be inserted.
Usage
WRIte ATpg Setup basename [-Replace] [-Procfile] [-NO_merge] [-Edt]
Description
The Write Atpg Setup command writes a test procedure file and the dofile file for the existing
scan chains. You can use these files to identify the scan chains when loading the scan design
into FastScan or FlexTest. By default, the test procedure and the dofile for newly inserted scan
chains are merged with those for existing scan chains.
The order of the commands in the test procedure file determine the different levels of test
procedure file information produced by this command.
• If you execute Write ATPG Setup without first using the Read Procfile command, a test
procedure file that contains default timeplates and the procedures needed for ATPG
setup (for example, shift, load_unload, and test_setup) are created.
• If you run Read Procfile and load a test procedure file that contains timeplate
definitions, non-scan procedure definitions (capture, ram_sequential, and others), and
empty or template scan procedures, and then execute the Write Atpg Setup command, a
more complete test procedure file is created.

Note
If the test procedure file loaded with the Read Procfile command contains scan
procedures (for example, shift and load_unload), they are replaced by ones generated
with the Write Atpg Setup command based on test logic inserted during the current
session. DFTAdvisor issues a W14 warning each time it replaces a procedure. However,
it uses timeplates specified in the original procedure file for the newly-generated
procedures. The only exceptions are for the test_setup procedure. Instead of being
replaced, the events created by the Write Atpg Setup command are appended to the end
of the test_setup procedure.

Arguments
• basename
A required string that specifies the root name for the test procedure and dofile. The files
produced are basename.testproc and basename.dofile.
• -Replace
An optional switch that replaces the contents of a file that already exists. By default, files are
not replaced.

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Write Atpg Setup

• -Procfile
An optional switch that creates the test procedure file. By default, a test procedure file is
created.
• -No_merge
An optional switch that prevents merging the test procedure and the dofile of the newly
inserted scan chains with those of the existing scan chains. By default, the test procedures
and dofiles are merged.
• -Edt
An optional switch that writes EDT-specific commands to the ATPG setup files. For more
information, see the Setup EDT command.
Examples
The following example writes the test procedure, the dofile, and the new netlist for the inserted
scan chains to the specified filenames:
add clocks 1 clk1
add clocks 0 clk0
set system mode dft
run
insert test logic
write atpg setup scan -replace
write netlist scan.v -verilog

Related Commands
Insert Test Logic Write Netlist
Read Procfile Write Procfile
Setup EDT

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Command Dictionary
Write Formal_verification Setup

Write Formal_verification Setup


Scope: Dft mode
Usage
WRIte FOrmal_verification Setup constraint_filename [-Replace]
Description
Writes a constraints driver file for the formal verification tool, FormalPro.
You can use the constraints file with FormalPro to verify that any DFTAdvisor additions have
not functionally changed the design. The output file describes the DFTAdvisor changes that
FormalPro needs to ignore when comparing against the non-scan (reference) design. The
constraints file will contain the following constraints:

• Force all scan inputs to 1


• Ignore all scan outputs (including scan-outs shared with primary output pins)
• Force scan enables to be in functional mode
• Constrain test_en, lbist_en, and test_obs to their inactive states
When you enable observe point sharing and sink the tree into a new scan cell, FormalPro
automatically ignores the extra registers (observe point registers) found in the modified design.

You can perform formal verification after any DFTAdvisor step. FormalPro always compares
the original non-scan design to the current output of DFTAdvisor.

Arguments
• constraint_filename
A required string that specifies the name of the file to which DFTAdvisor writes the formal
verification constraints file.
• -Replace
An optional switch that specifies for DFTAdvisor to replace the contents of the file,
constraint_filename, if the file already exists.
Examples
The following example writes out a constraints file named scan.constraints and also includes a
shell script to invoke FormalPro:
//scan dofile
//perform scan analysis and test logic synthesis
write netlist m8051_scan.v -replace
write formal_verification setup scan.constraints -replace
exit -d

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Write Formal_verification Setup

#shell script to run FormalPro


<mgcdft_tree>/bin/formalpro -a -verilog m8051_core.v \
-b -verilog m8051_scan.v -common -lib lcbg10p_atpg.lib \
-constraintfile scan.constraints -overwrite

Related Commands
Write Netlist

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Command Dictionary
Write Loops

Write Loops
Scope: Dft mode
Usage
WRIte LOops filename [-Replace]
Description
Writes a list of all loops to the specified file.
The Write Loops command writes all loops in a circuit to a file. For each loop, the report
indicates whether the loop was broken by duplication. Loops that are not broken by duplication
are shown as being broken by a constant value, which means the loop is either a coupling loop,
or has a single multiple fanout gate. The report also includes the pin pathname and gate type of
each gate in each loop.
You can display the loops report information to the transcript by using the Report Loops
command.
Arguments
• filename
A required string that specifies the name of the file to which DFTAdvisor writes the loop
report information.
• -Replace
An optional switch that specifies for DFTAdvisor to replace the contents of the file, if the
file already exists.
Examples
The following example writes a list of all loops to a file:
set system mode dft
write loops loop.info -replace

Related Commands
Report Loops

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Command Dictionary
Write Netlist

Write Netlist
Scope: All modes
Usage
WRIte NEtlist filename [-Edif | -Tdl | -Verilog | -VHdl | -Genie | -Ndl] [-Replace] [-User_setup]
[-Partition] [-Split_bus]
Description
Writes the current design in the specified netlist format to the specified file.
The Write Netlist command writes the netlist which is either the one read into the system when
you invoked DFTAdvisor, or the one created by the scan insertion process. If you do not specify
one of the netlist format options, then by default, DFTAdvisor uses the format that you specified
when you invoked DFTAdvisor. For more information about the DFTAdvisor invocation
options, refer to “Shell Commands” on page 377.
Note
It is recommended that you write the same netlist format as you read in, as DFTAdvisor is
not intended to be a robust netlist translation tool.

Arguments
• filename
A required string that specifies the name of the file to which DFTAdvisor writes the netlist.
• -Edif
An optional switch that specifies to write the netlist in the EDIF format.
• -Tdl
An optional switch that specifies to write the netlist in the TDL format.
• -Verilog
An optional switch that specifies to write the netlist in the Verilog format.
• -VHdl
An optional switch that specifies to write the netlist in the VHDL format as supported by
DFTAdvisor and described under “Understanding Supported VHDL” in the Design-for-Test
Common Resources Manual.
• -Genie
An optional switch that specifies to write the netlist in the Genie format.
• -Ndl
An optional switch that specifies to write the netlist in the NDL format.

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Command Dictionary
Write Netlist

• -Replace
An optional switch that specifies for DFTAdvisor to replace the contents of the file, if the
file already exists.
• -User_setup
An optional switch that specifies for DFTAdvisor to write the design netlist based on the
current state of the design in the tool, with respect to Add Black Box and Delete Black Box
commands.
• -Partition
An optional switch that causes a skeletal netlist to be written. Only logic between the
primary inputs/outputs and the partition scan cells is written out. Any empty modules are
not written out.
• -Split_bus
An optional switch that causes DFTAdvisor to write out mapped buses as individual pins in
the port mapping. When the switch is absent, the tool will aggregate the listing of pins if
possible.
Consider the following part of a design:
ex_mod ex_inst (.ex_bport ({a[3], a[2], a[1], a[0]}), ...

When the Write Netlist command is invoked without the “-Split_bus” switch, DFTAdvisor
will write the netlist as follows:
ex_mod ex_inst (.ex_bport (a[3:0]), ...

If the “-Split_bus” switch is used, DFTAdvisor will write out the above as follows:
ex_mod ex_inst (.ex_bport ({a[3], a[2], a[1], a[0]}), ...

Examples
The following example writes the modified netlist in Verilog format to a file:
add clocks 0 clock
set system mode dft
setup scan identification sequential atpg -percent 50
run
insert test logic -max_length 10
write netlist verilog.scan -verilog

Related Commands
Write Atpg Setup Delete Black Box
Add Black Box

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Command Dictionary
Write Primary Inputs

Write Primary Inputs


Scope: All modes
Usage
WRIte PRimary Inputs filename [-Replace] [-All | primary_input_pin…]
Description
Writes primary inputs to the specified file.
The Write Primary Inputs command writes a list of either all the primary inputs of a circuit or a
specific list of primary inputs that you specify into a file where it can be reviewed.
This command is identical to the Report Primary Inputs command except the data is written into
a file.
Arguments
• filename
A required string that specifies the name of the file to which DFTAdvisor writes the primary
inputs.
• -Replace
An optional switch that specifies for DFTAdvisor to replace the contents of the file, if the
file already exists.
• -All
An optional switch that specifies to write all the primary inputs to the file. This is the
default.
• primary_input_pin
An optional repeatable string that specifies a list of primary input pins that you want to write
to the file.
Examples
The following example writes all primary inputs to a file:
write primary inputs inputfile

Related Commands
Report Primary Inputs

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Command Dictionary
Write Primary Outputs

Write Primary Outputs


Scope: All modes
Usage
WRIte PRimary Outputs filename [-Replace] [-All | primary_output_pin…]
Description
Writes primary outputs to the specified file.
The Write Primary Outputs command writes a list of either all the primary outputs of a circuit or
a specific list of primary outputs that you specify into a file where it can be reviewed.
This command is identical to the Report Primary Outputs command except the data is written
into a file.
Arguments
• filename
A required string that specifies the name of the file to which DFTAdvisor writes the primary
outputs.
• -Replace
An optional switch that specifies for DFTAdvisor to replace the contents of the file, if the
file already exists.
• -All
An optional switch that specifies to write all the primary outputs to the file. This is the
default.
• primary_input_pin
An optional repeatable string that specifies a list of primary output pins that you want to
write to the file.
Examples
The following example writes all primary outputs to a file:
write primary outputs outputfile

Related Commands
Report Primary Outputs

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Command Dictionary
Write Procfile

Write Procfile
Scope: All modes
Usage
WRIte PRocfile proc_filename [-Replace] [-Full]
Description
Writes existing procedure and timing data to the named test procedure file.
The Write Procfile command writes out existing procedure and timing data to the named test
procedure file.
Arguments
• proc_filename
A required string that specifies the name of the file to which you want to write existing
procedure and timing data.
• -Replace
An optional switch that replaces the contents of the file if the proc_filename already exists.
• -Full
An optional switch that causes the tool to parse the ATPG pattern list (if any) and create all
needed non-scan procedures before writing the procedure file data.
Note
The -Full option can cause the Write Procfile command to take more time if there are a
large number of ATPG-generated patterns in the internal pattern list.

Examples
The following example writes the existing procedure and timing data to the specified file:
write procfile myprocfile.proc

Related Commands
Add Scan Groups Report Timeplate
Read Procfile
Report Procedure

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Command Dictionary
Write Scan Identification

Write Scan Identification


Scope: All modes
Usage
WRIte SCan Identification filename [-Replace] [-Full | -Identified | -Defined] [-DOfile |
-Backannotation]
Description
Writes a list of the scan instances that DFTAdvisor has identified or you have defined as scan
cells.
The Write Scan Identification command writes scan cell instances that either DFTAdvisor
identified during the identification process or that you defined by using the Add Scan Instances
or Add Scan Models commands. The Write Scan Identification command lists the scan
instances in descending order, with the first instance being the most critical scan instance.
If you are identifying scan sequential, the Write Scan Identification command displays the
sequential loops that DFTAdvisor cuts after you perform the identification process with the Run
command.
If you are identifying partition scan, the Write Scan Identification command displays the
partition cells that DFTAdvisor flagged during the identification process that you perform with
the Run command.
If you issue the command without specifying -Backannotation or -Dofile options, the command
writes out both identified and defined scan instances.
Arguments
• filename
A required string that specifies the name of the file to which DFTAdvisor writes the scan
instances.
• -Replace
An optional switch that specifies for DFTAdvisor to replace the contents of the file, if the
file already exists.
• -Full | -Identified | -Defined
An optional switch that specifies at what level to write the file. The -Full option specifies to
write both identified and defined scan instances. This is the default. The -Identified option
specifies to write only scan instances that DFTAdvisor identified during the identification
process. The -Defined option specifies to only write scan instances that you defined by
using the Add Scan Instances or Add Scan Models commands.
• -DOfile | -Backannotation
An optional switch that specifies to write the scan instances in dofile or back annotation
format. In dofile format the file is written as a list of lines that can be executed by the Dofile
command. For example:

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Command Dictionary
Write Scan Identification

add scan instances instance_pathname

Examples
The following example writes all scan instances to a file after performing a full scan
identification run:
set system mode dft
setup scan identification full_scan
run
write scan identification scanfile -identified

The following is an example of the files contents:


Type Instance
-------------------------------------
defined /I_1_16
identified /I_1_16
identified /I_6_16
identified /I_8_16

Related Commands
Report Sequential Instances

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Command Dictionary
Write Scan Order

Write Scan Order


Scope: All modes
Usage
WRIte SCan Order {-Scandef | -Def} filename [-Replace] [-No_segmentation] [-Endpoints]
Description
Creates specified DEF file.
After DFTAdvisor performs scan chains insertion, the Write Scan Order command can be used
to create a DEF representation. DFTAdvisor can generate either the entire netlist or only the
scan definition part of the netlist in DEF format.
Note
As DEF is a flat format, a hierarchical circuit is automatically flattened when the Write
Scan Order command is executed. Therefore, if the complete netlist DEF file is specified
(-Def), the output file can be quite large. If the scan chain subset of DEF is written (-
Scandef), no flattening step is necessary. The resulting DEF output file includes only the
SCANCHAIN definitions.

The usage of the Add Scan Pins command affects the scan definitions in the DEF file. If the user
specifies existing/non-existing scan I/O with this command, DFTAdvisor uses those names in
the scan chain START and STOP point definitions.
Arguments
• -Scandef | -Def
An optional switch that specifies for a subset DEF (including only scan chain definitions) or
a complete DEF file to be produced. The subset DEF format, -Scandef, is the default.
• -Endpoints
An optional switch will cause only the start and stop scan cells in each chain to be
represented. It would be up to the Place and Route tool to analyze the topology between
these scan cells to identify the remaining scan cells in the chain.
• filename
A required string that specifies the name of the file to which DFTAdvisor writes the scan
instances.
• -Replace
An optional switch that specifies DFTAdvisor to replace the specified file, filename, if it
exists.
• -No_segmentation
An optional switch that specifies for DFTAdvisor not to perform segmentation of scan
chains. This argument prevents scan chains from being segmented into several chains.

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Command Dictionary
Write Scan Order

DFTAdvisor breaks chains with different clocks/edges into multiple chains if this argument
is not used. DFTAdvisor defines each clock/edge domain with separate scan chain
definitions in the DEF file. This behavior allows preserving the location of the first and the
last scan cells of different domains in the scan chain, should the scan inserted netlist be fed
through a placement-and-route tool for scan chain reordering. As a results of using default
behavior (not using the -No_segmentation option), scan chain reordering is not performed
across different clock/edge domains.
The segmentation of scan chains can be turned off by using this switch. However, you need
to be aware that the reordering can change the order of clock/edge domains in the chain, as it
might be destructive to the operation of the scan chain. For example, when -
No_segmentation switch is used, if DFTAdvisor inserts lockup latches between the cells of
different domains, their position in the chain may not be correct after reordering. This is
because the placement-and-route tool may not recognize the lockup latches in the chains.
The different output formats with/without using this switch are illustrated in the examples
below.
Example 1
Assume the following in this example:
1. The design has two sub-modules, subA and subB, each having three D-type flip-flops.
2. All flip-flops in the design will be included in a single scan chain at the top level.
3. The flip-flops in subA and the flops in subB are clocked with clockA and clockB
respectively.
4. The user turns on lockup latch insertion between clock domains in a chain.
5. The user specifies internal scan input/output pins using the Add Scan Pins command;
pad/buf1/Z and pad/buf2/A being the scan input and output pins, respectively.
If the user issues the following command to generate a scan DEF file,
write scan order -scandef deffile

DFTAdvisor generates the following output file. Notice how DFTAdvisor divides the single
scan chain in the design into two scan chains in order to preserve the location of the first and last
scan cells in each clock domain. Note that the design still has one scan chain since the last cell
in the first clock domain is still connected to the first cell of the second clock domain, even after
a possible scan chain reordering by a downstream placement-and-route tool.
VERSION 5.2 ;
NAMESCASESENSITIVE ON ;
DIVIDERCHAR "/" ;
BUSBITCHARS "[]" ;
DESIGN top ;

SCANCHAINS 2 ;

- chain1_sub0
+ START pad/buf1 Z

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Command Dictionary
Write Scan Order

+ FLOATING
subA/flop1 ( IN SI ) ( OUT QN )
subA/flop2 ( IN SI ) ( OUT QN )
subA/flop3 ( IN SI ) ( OUT QN )
+ STOP subA/lockup D ;

- chain1_sub1
+ START subB/flop1 QN
+ FLOATING
subB/flop2 ( IN SI ) ( OUT QN )
subB/flop3 ( IN SI ) ( OUT QN )
+ STOP pad/buf2 A ;

END SCANCHAINS

END DESIGN

Example 2
Assume the following in this example:
1. The design has two sub-modules, subA and subB, each having three D-type flip-flops.
2. All flip-flops in the design will be included in a single scan chain at the top level.
3. The flip-flops in subA and the flip-flops in subB are clocked with clockA and clockB
respectively.
If the user issues the following command to generate a scan DEF file,
write scan order -scandef deffile -no_segmentation

DFTAdvisor generates the following output file. Note that the -No_segmentation option
prevents DFTAdvisor from dividing the scan chain into multiple scan chains in the DEF file. It
is assumed that there is no race condition between the two clock domains. Therefore the chain
will still be operational after a possible scan chain reordering done by a placement-and-route
tool. Also notice the usage of top-level scan I/O pins due to the absence of the user’s internal
scan I/O specifications.
VERSION 5.2 ;
NAMESCASESENSITIVE ON ;
DIVIDERCHAR "/" ;
BUSBITCHARS "[]" ;
DESIGN top ;

SCANCHAINS 1 ;

- chain1
+ START PIN scan_in1
+ FLOATING
subA/flop1 ( IN SI ) ( OUT QN )
subA/flop2 ( IN SI ) ( OUT QN )
subA/flop3 ( IN SI ) ( OUT QN )
subB/flop1 ( IN SI ) ( OUT QN )
subB/flop2 ( IN SI ) ( OUT QN )
subB/flop3 ( IN SI ) ( OUT QN )
+ STOP PIN scan_out1 ;

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Command Dictionary
Write Scan Order

END SCANCHAINS

END DESIGN

Related Commands
Add Scan Pins Read Scan Order

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Command Dictionary
Write Subchain Setup

Write Subchain Setup


Scope: Dft mode
Usage
WRIte Subchain Setup filename -Replace
Description
Writes the appropriate Add Sub Chains commands to a file so that DFTAdvisor can understand
the preexisting scan sub-chains at the top-level of this module.
The Write Subchain Setup command is useful if you are performing a block-by-block test
synthesis at the lower design level. By using this command to specify for DFTAdvisor to write
the sub-chain setup information at the lower-level and then reading in the setup file as part of
the scan sub-chain setup, you can avoid having to define the preexisting scan sub-chain at the
higher design level with the Add Sub Chains command.
Arguments
• filename
A required string that specifies the name of the file to which DFTAdvisor writes the scan
sub-chain setup information. For information on this file format, refer to the Insert Test
Logic command.
• -Replace
An optional switch that specifies for DFTAdvisor to replace the contents of the file, if the
file already exists.
Examples
The following example writes the scan chain setup information for this module so that you can
later use the module1.setup file at the top-level to define the pre-existing scan sub-chain:
insert test logic
write subchain setup /user/designs/module1.setup

The following example shows the contents of the module1.setup file:


add sub chains /user/designs/sub1 subc1 scan_in1 scan_out1 7
mux_scan scan_en

Related Commands
Add Sub Chains Report Sub Chains
Insert Test Logic

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Command Dictionary
Write Subchain Setup

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Chapter 3
Shell Commands

Shell Command Descriptions


The following subsections document the shell commands that you use to invoke DFTAdvisor
and the STP-to-MGC conversion script.

The notational conventions used here are the same as those used in other parts of the manual.
Do not enter any of the special notational characters (such as, {}, [], or |) when typing the
command.

Shell Command Summary


Table 3-1 contains a summary of the invocation commands described in this chapter.

Table 3-1. Command Summary


Command Description
dftadvisor An invocation command for DFTAdvisor that can start
either a graphical session or a command-line session.
stil2mgc The stil2mgc tool translates STIL Test Procedure (STP)
files into FastScan, FlexTest, and DFTAdvisor dofiles and
test procedure files.

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Shell Commands
dftadvisor

dftadvisor
Prerequisites: You must have a netlist in one of the required formats and a cell library
containing descriptions of all the cells used in the design. The valid netlist formats are:
EDIF, TDL, VHDL, Verilog, and Genie.
Usage
dftadvisor
OR
dftadvisor {design_name {-LIBrary filename} [-INCDIR include_directory...] [-VERIlog |
-VHdl | -TDl | -Genie | -Edif] [-INSENsitive | -SENsitive] [-LOg filename [-Replace]]
[-TOp module_name] [-Dofile dofile_name [-HIstory]] [-LICense retry_limit] [-NOGui]
[-32 | -64]} | [-Load_warnings] [-HElp | -MANUAL | -VERSion]
Note
Shell commands do not follow the minimum typing rule. Capitalized letters indicate
accepted abbreviations.

Description
An invocation command for DFTAdvisor that can start either a graphical session or a
command-line session.
For a graphical session, enter just the application name on the shell command line. After the
tool invokes, a dialog box prompts you for the required argument (design_name and library).
The interface provides browser buttons for navigating to the design and library. After loading
the design and library, the tool is in Setup mode, ready for you to begin working on your design.
For a command line session, you enter all required arguments at the shell command line, and
include the -Nogui switch. The tool will load the design and library and enter the Setup mode,
ready for you to begin working on your design. If you forget the -Nogui switch, you will enter a
graphical session, the design and library will load, the tool will enter Setup mode, and again,
you are ready to begin working on your design.
Arguments
• design_name
A required string that specifies the pathname of the design on which to invoke. The design
format is derived either from a supplied format switch (-Edif, -Tdl, -Vhdl, -Verilog, or
-Genie) or from the design_name suffix. The following table shows the rules for deriving
the netlist format:

Table 3-2. Format Suffixes


Suffix Format
.v | .ver | .verilog | .vlg | .vlog Verilog
.vhd | .vhdl VHDL

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Shell Commands
dftadvisor

Table 3-2. Format Suffixes


Suffix Format
.gn | .genie GENIE
.e | .ed | .edi | .edif EDIF
.tdl TDL
If you do not supply a format switch or if you use a suffix other than those listed in
Table 3-2, DFTAdvisor assumes the format is Verilog.
Note
For Verilog and VHDL formats only, this argument’s usage is {design_name…}. That
is, the argument is repeatable, enabling you to invoke on more than one netlist file.
Multiple files must be in the same format, either all Verilog or all VHDL. If you do not
supply a format switch, multiple files must also have the same filename suffix.

• -LIBrary filename
A required switch and repeatable string pair that specifies the names of the files containing
the ATPG library descriptions for all cell models in design_name. You can use wildcarding
as supported by the invocation shell to specify multiple library files.
This argument is not required if the specified netlist fully defines all the primitives in the
design (which can occur in Verilog and TDL formats). If the library does not contain scan
models for any of the sequential element your design uses, DFTAdvisor issues a warning
message stating this when you switch from Setup mode to Dft mode during the session.
• -INCDIR include_directory
An optional switch and repeatable string that lists directories relative to which the tool
should search for files included in a Verilog design with the ‘include compiler directive.
This enables you to use simple filenames in ‘include directives and, when invoking
DFTAdvisor, use the -Incdir switch to specify the pathnames of the directories containing
the files. Each include_directory in the list should be either a relative directory pathname,
relative to the current (tool invocation) directory, or an absolute directory pathname.
The tool searches for include files relative to the following locations in the following order
of precedence:
1. Absolute pathnames specified by ‘include directives in the Verilog design
2. Directories specified with the -Incdir invocation switch, if used
When locating ‘include file targets that are a relative paths, the tool appends the target
path to each specified include_directory to obtain the pathname of the include file. The
tool searches these directories in the same order they are listed, left to right, in the
command. If identically named files exist in multiple directories, the tool reads in the
first file it finds and ignores others with the same name.

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Shell Commands
dftadvisor

A search path may contain the asterisk (*) and other wildcard characters supported by
the invocation shell. For example, if you specify “-incdir sp*”, the tool recognizes every
directory within the current directory that starts with “sp” as a search path.
3. Directory where the calling file is located
4. Directory from which the tool was invoked (current directory)
• -VERIlog
An optional switch that specifies that design_name is a netlist in Verilog format. This is the
invocation default.
• -VHdl
An optional switch that specifies that design_name is a netlist in VHDL format as supported
by DFTAdvisor. If you use non-standard packages in the design, you may need to include a
dft.map file in the same directory as the VHDL netlist. For information on the format of the
dft.map file and the supported VHDL constraints, see “Understanding Supported VHDL” in
the Design-for-Test Common Resources Manual.

• -TDl
An optional switch specifying that design_name is a netlist in TDL format.
• -Genie
An optional switch specifying that design_name is a netlist in GENIE format. When reading
in a directory-based GENIE netlist (netlist hierarchy corresponds to UNIX directories),
DFTAdvisor first tries to access the directory based on an uppercase directory name. If it is
not successful in finding the directory, it then tries the original case of the instance names in
the design.
• -Edif
An optional switch specifying that design_name is a netlist in EDIF format.
• -INSENsitive | -SENsitive
Optional switches that specify for DFTAdvisor to consider pin, instance, and net pathnames
case-insensitive or case-sensitive. The default is case-insensitive for all netlist formats
except Verilog, which the tool treats as case-sensitive.
Regardless of the use of this switch, command names are always case-insensitive.
• -LOg filename
An optional switch and string pair that specifies the name of the file to which you want
DFTAdvisor to write all session information. The default is to display session information
to the standard output.
• -Replace
An optional switch that specifies to overwrite the -Log filename if one by the same name
already exists.

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Shell Commands
dftadvisor

• -TOp model_name
An optional switch and string pair that specifies the name of the top-level model in the
netlist. If the netlist describes multiple top modules and you do not use this argument,
DFTAdvisor assumes the first top to be the top module.
• -Dofile dofile_name
An optional switch and string pair that specifies the name of the dofile that you want
DFTAdvisor to execute upon invocation.
• -HIstory
An optional switch that specifies for the tool to add the commands from a dofile to the
command line history list. By default, the commands in a dofile are not inserted into the
history list, but the dofile command itself is added to the list. The tool ignores this switch if
you issue it without the -Dofile switch.
• -LICense retry_limit
An optional switch that specifies DFTAdvisor is invoked in batch mode and if no license is
available, to check for a license every minute until the specified retry_limit is reached. If no
license is found within the specified retry_limit, the invocation process stops, unless the
value 0 (zero) is specified indicating unlimited retries, in which case DFTAdvisor continues
checking for a license until one is obtained.
• -NOGui
An optional switch that invokes the tool in command-line mode. The default is to invoke the
graphical user interface (GUI).
• -32 | -64
An optional switch that invokes the 32- or 64-bit version of the software. If the
MGC_PREFER_64 environment variable is not set, the default is 32-bit. If the platform
does not support the specified version, the tool issues a warning message and then ignores
the switch.
• -LOAd_warnings
An optional switch which specifies that warnings and notes discovered while loading the
netlist and library should be reported. By default, only a summary message for most
warnings and notes is reported.
• -HElp
An optional switch that only displays the version and usage line for DFTAdvisor. No other
arguments can be specified with this switch.
• -MANUAL
An optional switch that opens the bookcase of DFT documentation in the PDF viewer.
• -VERSion
An optional switch that only displays the version of the DFTAdvisor software that you
currently have available. No other arguments can be specified with this switch.

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Shell Commands
dftadvisor

Examples
The following example invokes DFTAdvisor in command-line mode on an EDIF netlist named
design1.edif. This design contains library parts that are specified in a file called mitsu_lib10. A
session log is kept in a file called design1_scan.log, whose content is replaced if it already
exists.
<mgcdft_tree>/bin/dftadvisor design1.edif -edif -library
mitsu_lib10 -log design1_scan.log -replace -nogui

The next example also invokes DFTAdvisor, but then has you use the invocation dialog box to
enter the same arguments. This method invokes DFTAdvisor in graphical mode.
<mgcdft_tree>/bin/dftadvisor

Design: design1.edif
Format: EDIF
ATPG Library: mitsu_lib10
Log File: design1_scan.log
Overwrite Existing File: ON

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Shell Commands
stil2mgc

stil2mgc
Scope: This tool will produce dofiles and test procedure files for FastScan, FlexTest,
TestKompress, and DFTAdvisor.
Usage
stil2mgc {-STil stil_filename [-TPf tpf_filename] [-DOfile dofile_name] [-FLex_dofile
dofile_name] [-ALias Min | All] [-CApture NOne | Single | NAmed] [-LOgfile logfile_name
[-REplace]]} | -Version | -Help | -Usage
Description
The stil2mgc tool translates STIL Test Procedure (STP) files into FastScan, FlexTest, and
DFTAdvisor dofiles and test procedure files.
This tool produces a FastScan, FlexTest, TestKompress, and DFTAdvisor dofile, which defines
clocks, scan chains, scan groups, and pin constraints. This tool also creates test procedure files
with a timeplate and the following standard scan procedures — test_setup, load_unload, and
shift.
The tool translates STIL signal groups, which are used in timeplates or procedures into “alias”
statements in the test procedure file. It also produces a test procedure file timeplate definition
for each WaveformTable in the STIL file, exactly matching the timing specified in the STIL
file.
Any procedure or macro whose name matches a Mentor Graphics procedure type (load_unload,
master_observe) will be translated into that Mentor Graphics procedure. Also, any procedure or
macro in the STIL file that has “capture” in its name will be translated into a named capture
procedure if the “-Capture named” switch is used. Any other macro whose name does not match
anything that Mentor Graphics uses will be translated into an unused sub-procedure.
Arguments
• -STil stil_filename
A required switch and string pair that specifies the name of the input STIL Test Procedure
(STP) file.
• -TPf tpf_filename
An optional switch and string pair that specifies the name of the test procedure file to
generate. If not specified, the tpf_filename will be named by appending “.proc” to the STIL
Test Procedure file name.
• -DOfile dofile_name
An optional switch and string pair that specifies the name of the dofile to generate. If not
specified, the dofile_name will be named by appending “.dof” to the STIL Test Procedure
file name

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Shell Commands
stil2mgc

• -FLex_dofile dofile_name
An optional switch and string pair that causes the tool to produce an additional dofile
targeted at the FlexTest tool.
• -ALias Min | All
An optional switch and literal pair that specifies for the tool to produce the minimum
required alias statements in the MGC Procedure file or to produce alias statements for all
signal groups found in the STIL Test Procedure file. The default is to produce the minimum
required alias statements.
• -CApture NOne | Single | NAmed
An optional switch and literal pair that specifies for the tool to add information to the MGC
Procedure file. This switch will either produce no capture procedures, a single unnamed
capture procedure, or multiple named capture procedures for each capture Macro found in
the STIL Test Procedure File. The default is to produce no capture procedures.
• -LOgfile logfile_name
An optional switch and string pair that specifies the name of the file to write all session
information.
• -REplace
An optional switch that overwrites the -Logfile logfile_name if one by the same name
already exists.
• -Version
An optional switch that displays the version of the stil2mgc tool that you currently have
available.
• -Help
An optional switch that displays a message that contains all the stil2mgc switches and a
brief description of each.
• -Usage
An optional switch that displays the usage syntax for the stil2mgc command.
Examples
The following example executes the stil2mgc tool on design.stp.
shell> stil2mgc -stil design.stp -tpf new_design.tpf
-dofile new_dofile.do

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Appendix A
Using DFTVisualizer

DFTVisualizer™ is a graphical debugging and analysis schematic viewing tool you can use with
DFTAdvisor.

Tip: For complete DFTVisualizer documentation, see “Getting Started with


DFTVisualizer” in the Design-for-Test Common Resources Manual.

Table A-1 lists the DFTVisualizer-related DFTAdvisor commands available for your use.

Table A-1. DFTVisualizer-Related Commands


Command Description
Add Browser Data Adds data columns to the Browser window of
DFTVisualizer.
Add Display Data Adds data columns to the Data window of DFTVisualizer.
Add Display Instances Displays instances in DFTVisualizer and enables you to
trace visually through the design using the Debug or Design
window.
Analyze Drc Violation Generates a netlist of the portion of the design involved with
the specified rule violation number.
Close Visualizer Closes the DFTVisualizer window.
Delete Browser Data Removes data columns from the Browser window of
DFTVisualizer.
Delete Display Data Removes a data column from the Data window of
DFTVisualizer.
Delete Display Instances Removes the specified design instances from a
DFTVisualizer display window.
Load Visualizer Preferences Reads a DFTVisualizer preferences file and sets current
preferences as described in the file.
Mark Applies a different color to instances in the Debug window.
Open Visualizer Opens the DFTVisualizer main window.
Report Display Instances Lists netlist information for specified instances displayed in
the Debug window.

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Using DFTVisualizer

Table A-1. DFTVisualizer-Related Commands


Command Description
Save Visualizer Dofile Writes a dofile containing commands needed to recreate
current instance and data displays.
Save Window Saves a screen capture of a DFTVisualizer window.
Select Object Selects the specified objects in the Debug and/or Design
window.
Set Visualizer Preferences Controls a subset of DFTVisualizer preferences for the
Debug, and Design, Browser, and Data windows.
Unmark Removes color highlighting and/or marking from instances
in the Debug window.
Write Visualizer Preferences Writes the current DFTVisualizer preference settings to a
file.

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Appendix B
Getting Help

There are several ways to get help when setting up and using DFT software tools. Depending on
your need, help is available from the following sources:

• Documentation
• Online Command Help
• Mentor Graphics Support
• Examples and Solutions

Documentation
A comprehensive set of reference manuals, user guides, and release notes is available in two
formats:

• HTML for searching and viewing online


• PDF for printing
The documentation is available from each software tool and online at:

http://supportnet.mentor.com

For more information on setting up and using DFT documentation, see the “Using DFT
Documentation” chapter in the Managing Mentor Graphics DFT Software manual

Online Command Help


Online command usage information is available from the command line in all DFT tools. You
can use the Help command to display a list of available commands, the syntax usage, or the
entire reference page for a command.

Mentor Graphics Support


Mentor Graphics software support includes software enhancements, access to comprehensive
online services with SupportNet, and the optional On-Site Mentoring service. For details, see:

http://supportnet.mentor.com/about/

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Getting Help
Examples and Solutions

If you have questions about a software release, you can log in to SupportNet and search
thousands of technical solutions, view documentation, or open a Service Request online at:

http://supportnet.mentor.com

If your site is under current support and you do not have a SupportNet login, you can register for
SupportNet by filling out the short form at:

http://supportnet.mentor.com/user/register.cfm

All customer support contact information can be found on our web site at:

http://supportnet.mentor.com/contacts/supportcenters/index.cfm

Examples and Solutions


If you have a current SupportNet login, then you can access the SupportNet Design-for-Test
Circuits and Solutions site, which contains a variety of example circuits and dofiles specific to
DFT. You can access this site at the following URL:

http://supportnet.mentor.com/reference/other-info/dft_circuits/index.cfm

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A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

Index

—B— B, 195
B command, 195 Delete Black Box, 101
Delete Buffer Insertion, 102
—C— Delete Cell Models, 104
Command Dictionary, 15 Delete Clock Groups, 106
Commands Delete Clocks, 107
Add Black Box, 28 Delete Mapping Definition, 108
Add Buffer Insertion, 30 Delete Nofaults, 111
Add Cell Library, 32 Delete Nonscan Instances, 113
Add Cell Models, 33 Delete Nonscan Models, 115
Add Clock Groups, 36 Delete Notest Points, 117
Add Clocks, 38 Delete Output Masks, 119
Add Mapping Definition, 40 Delete Pin Constraints, 120
Add Nofaults, 43 Delete Pin Equivalences, 122
Add Nonscan Instances, 45 Delete Primary Inputs, 123
Add Nonscan Models, 47 Delete Primary Outputs, 125
Add Notest Points, 48 Delete Read Controls, 127
Add Output Masks, 50 Delete Scan Chains, 128
Add Pin Constraints, 52 Delete Scan Groups, 129
Add Pin Equivalences, 54 Delete Scan Instances, 130
Add Primary Inputs, 55 Delete Scan Models, 132
Add Primary Outputs, 57 Delete Scan Partitions, 133
Add Read Controls, 58 Delete Scan Pins, 134
Add Scan Chains, 59 Delete Seq_transparent Constraints, 135
Add Scan Group, 61 Delete Sub Chains, 136
Add Scan Instances, 63 Delete Subchain Groups, 137
Add Scan Models, 65 Delete Test Points, 138
Add Scan Partition, 67 Delete Tied Signals, 140
Add Scan Pins, 71 Delete Write Controls, 142
Add Seq_transparent Constraints, 75 Dofile, 143
Add Sub Chains, 77 Echo, 144
Add Subchain group, 81 Exit, 146
Add Test Points, 84 F, 195
Add Tied Signals, 88 Find Design Names, 147
Add Write Controls, 90 Help, 152
Alias, 91 History, 153
Analyze Control Signals, 94 Insert Test Logic, 155
Analyze Input Control, 96 Printenv, 162
Analyze Output Observe, 97 Read Procfile, 163
Analyze Testability, 98 Read Scan Order, 164

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A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

Report Black Box, 165 Ripup Scan Chains, 251


Report Buffer Insertion, 167 Run, 253
Report Cell Models, 168 Save History, 254
Report Circuit Components, 170 Set Capture Clock, 255
Report Clock Groups, 174 Set Command Editing, 256
Report Clocks, 175 Set Contention Check, 257
Report Control Signals, 176 Set Control Threshold, 259
Report Dft Check, 178 Set Dofile Abort, 261
Report Drc Rules, 181 Set Drc Handling, 262
Report Environment, 187 Set Fault Sampling, 268, 269
Report Feedback Paths, 189 Set File Compression, 270
Report Flatten Rules, 191 Set Flatten Handling, 272
Report Gates, 194 Set Gzip Options, 279
Report Loops, 200 Set Identification Model, 281
Report Mapping Definition, 202 Set Internal Fault, 283
Report Nofaults, 205 Set Io Insertion, 284
Report Nonscan Models, 207 Set Latch Handling, 286
Report Notest Points, 208 Set Lockup Latch, 287
Report Output Masks, 209 Set Logfile Handling, 290
Report Partition Cells, 210 Set Loop Duplication, 292
Report Pin Constraints, 212 Set Multiple Scan_enables, 292
Report Pin Equivalences, 214 Set Net Resolution, 296
Report Primary Inputs, 215 Set Nonscan Handling, 297
Report Primary Outputs, 216 Set Observe Threshold, 298
Report Procedure, 217 Set Random Patterns, 299
Report Read Controls, 218 Set Scan Type, 299
Report Scan Cells, 219 Set Screen Display, 300
Report Scan Chains, 222 Set Sensitization Checking, 301
Report Scan Groups, 223 Set Shadow Checking, 302
Report Scan Models, 224 Set Stability Check, 303
Report Scan Partitions, 225 Set System Mode, 304
Report Scan Pins, 227 Set Test Logic, 305
Report Seq_transparent Constraints, 228 Set Trace Report, 308
Report Sequential Instances, 229 Set Transient Detection, 309
Report Statistics, 234 Setup Naming, 310
Report Sub Chains, 236 Setup Output Masks, 313
Report Subchain Groups, 237 Setup Pin Constraints, 321
Report Test Logic, 238 Setup Registered Io, 323
Report Test Points, 240 Setup Scan Identification, 330
Report Testability Analysis, 242 Setup Scan Insertion, 337
Report Tied Signals, 245 Setup Scan Pins, 343
Report Timeplate, 246 Setup Test_point Identification, 345
Report Variables, 247 Setup Test_point Insertion, 348
Report Write Controls, 249 Setup Tied Signals, 355
Reset State, 250 Stil2mgc, 383

390 DFTAdvisor Reference Manual, V8.2007_2


May 2007
A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

System, 356
Verify Scan, 357
Write Atpg Setup, 359
Write Formal_verification Setup, 361
Write Loops, 363
Write Netlist, 364
Write Primary Inputs, 366
Write Primary Outputs, 367
Write Procfile, 368
Write Scan Identification, 369
Write Scan Order, 371
Write Subchain Setup, 375
—E—
Environment variables
MGC_PREFER_64, 381
—F—
F command, 195
—I—
Inputs of DFTAdvisor, 11
Invocation 64-bit mode, 381
—O—
Outputs of DFTAdvisor, 11
—R—
Reporting report gate format, 194
—S—
stil2mgc script, 383
—T—
TIE0, scannable, 45
TIE1, scannable, 45

DFTAdvisor Reference Manual, V8.2007_2 391


May 2007
A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

392 DFTAdvisor Reference Manual, V8.2007_2


May 2007
Third-Party Information
This section provides information on open source and third-party software that may be included in Design-for-Test software
products.

• •This software application may include GTK 2.6.1 third-party software and may be subject to the following copyright(s)
and/or use terms:

Copyright (c) 1998, 1999, 2000 Thai Open Source Software Center Ltd and Clark Cooper

Copyright (c) 2001, 2002 Expat maintainers.

Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify,
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OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
DEALINGS IN THE SOFTWARE.

**********************************************************************

Copyright (c) 1998, 1999 Henry Spencer. All rights reserved.

Development of this software was funded, in part, by Cray Research Inc.,

UUNET Communications Services Inc., Sun Microsystems Inc., and Scriptics

Corporation, none of whom are responsible for the results. The author

thanks all of them.

Redistribution and use in source and binary forms -- with or without

modification -- are permitted for any purpose, provided that

redistributions in source form retain this entire copyright notice and


indicate the origin and nature of any modifications.

I'd appreciate being given credit for this package in the documentation

of software which uses it, but that is not a requirement.

THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,

INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY

AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL

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EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,

PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;

OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,

WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR

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ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

**********************************************************************

wxWindows adopted the code out of Tcl 8.4.5. Portions of regc_locale.c

and re_syntax.n were developed by Tcl developers other than Henry Spencer;

these files bear the Tcl copyright and license notice:

**********************************************************************

This software is copyrighted by the Regents of the University of

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permission to use and distribute the software in accordance with the

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**********************************************************************

The wxWindows license applies to further modifications to regcustom.h

and regc_locale.c.

****************************************************************************

-----------------------------------------------------

License for Scintilla and SciTE

Copyright 1998-2003 by Neil Hodgson <neilh@scintilla.org>

All Rights Reserved

Permission to use, copy, modify, and distribute this software and its

documentation for any purpose and without fee is hereby granted,

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NEIL HODGSON DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS

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WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS,

WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER

TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE

OR PERFORMANCE OF THIS SOFTWARE.


-----------------------------------------------------

Copyright (c) 1988-1997 Sam Leffler

Copyright (c) 1991-1997 Silicon Graphics, Inc.

Permission to use, copy, modify, distribute, and sell this software and

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THE SOFTWARE IS PROVIDED "AS-IS" AND WITHOUT WARRANTY OF ANY KIND,

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-----------------------------------------------------

(C) 1995-2004 Jean-loup Gailly and Mark Adler

This software is provided 'as-is', without any express or implied

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If you use the zlib library in a product, we would appreciate *not*

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This software application may include GTK 2.6.1 third-party software and may be subject to the following copyrights.

wxWindows Library Licence, Version 3

====================================
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