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UW-Madison: ECE 555/755 Cadence Tutorial-I Prepared By: Ranjith Kumar
UW-Madison: ECE 555/755 Cadence Tutorial-I Prepared By: Ranjith Kumar
ECE 555
To have all your cadence related work in a folder, create a new folder “cadence” using
the command “mkdir”.
Change your working directory to the folder created using the “cd” command.
To set-up the cadence working environment, run the command “fixcadence”
o If you already have a cadence environment set, skip this step. All your cadence
environment settings will have to be reactivated after executing this command.
o Setting of cadence working environment includes adding additional library paths.
o You don’t need to add any additional library paths for this course. NCSU
libraries are already set for you to use in this course
To invoke a cadence, type “icfb &” at the command prompt.
o This opens a command interface window (CIW) as shown in Fig. 1.
We will use the NCSU CDK which automatically starts the library manager and you
should see the NCSU libraries as shown in Fig. 2.
o Then a new window opens to configure the new library with a technology file.
The window is shown in Fig. 4.
o Select “Attach to an existing techfile” and press OK.
For a PMOS, select model name as ‘tsmc18dP’ and define its length and
width. Press OK.
For a NMOS, select model name as ‘tsmc18dN’ and define its length and
width. Press OK.
The minimum length for the devices in this technology is 18 0nm.
After defining the devices, you should have schematic as Fig. 10.
Creating a Symbol:
o Select Design --> Create Cellview --> From Cell view in the Virtuoso
Schematic Editing Window. A new symbol creation window will open as shown
in Fig. 13. Press OK to create a symbol for the schematic you created.
o A new Virtuoso Symbol editing window then appears as shown in Fig. 14.
o If you want to name the part, then select “@partName” with a single left mouse
click. A white box appears over the “@partName” indicating that it is selected.
o Press ‘Q’ in the keyboard. An “Edit Object Properties” window opens as shown
in Fig. 15.
o Change the “partname” to the name of your interest.
o Don't forget to save by selecting Design --> Check and Save in Symbol Editing
menu.
Place two instances of the inverter in parallel. Draw wires and connect
them as shown in Fig. 18.
A thick blue line indicates a wide wire (used for multiple bits).
A thin blue line indicates a narrow wire.
o After wiring, you need to create pins for input and output nodes. In order to do this,
From Composer-Schematic menu, select Add --> Pin.
An Add Pin form appears.
Type in "A<1:0>” as the pin name, and make sure the Direction is "input".
Move cursor to schematic window. Then, click left mouse button to place pin.
Move cursor back to Add Pin form, change "Direction" to "output". Type in
"B<1:0>” as the pin name. Then, repeat above step.
Final schematic view of inverter will be similar as Fig. 21.
Since the global sources namely, VDD and GND are not in the schematic, we
can add them to the schematic.
The initialization of the global sources in the schematic would enable us to
control the voltage sources when simulating the circuit. The new schematic is
shown in Fig. 22.
Don't forget to save by selecting Design --> Check and Save in Composer-
Schematic menu.
Fig. 22. Complete Schematic for two inverters with global sources.
Close all the windows and open the schematic of a single inverter.
From Composer-Schematic menu, select Tools --> Analog Environment. This brings
out Virtuoso Environment window as Fig. 23.
Then, in Virtuoso Environment window, select Analyses --> Choose and fill it as
shown in Fig. 26.
o This is the setting to run a transient analysis for 20ns.
To calculate the propagation delay using the calculator tool provided in Cadence
o In the waveform window, select Tools -> Calculator.
o Double-click on “delay” to find the propagation delay between two signals. The
calculator window looks as shown in Fig. 29.
Fig. 29. Calculator Tools set to calculate the propagation delay between two signals
Fig. 30. Indicating the High-to-Low Propagation delay of the designed inverter
The circuit simulation set-up illustrates a step-by step procedure for doing a transient analysis.
A similar procedure with a change in the analysis type can be used to perform a “dc” analysis.
Technique I:
The easiest option is to save the stimuli values that were entered once and reuse the state
values when needed consequently.
After all the stimuli values are entered for the first time in the Virtuoso Environment
window, select Session -> Save State. A save state window appears as shown in Fig. 31.
The stimuli values along with the analysis type, waveforms to plot, technology file path
and other settings gets saved under the specified name.
When needed later, the state can be retrieved by selecting Session -> Load State in the
Virtuoso Environment window after selecting the corresponding simulator.
V1 vdd! 0 DC 1.8
V2 gnd! 0 0
VIN in 0 pulse (0 1.8 0 0.05n 0.05n 2n 4n)
The above commands can be stored in a file and can be added used during simulation.
In the Virtuoso Environment window, select Setup -> Simulation Files. A simulation
file setup window appears as shown in Fig. 32.
In the Stimulus File enter the exact location of the file with all the stimulus values and
press OK.
Run the simulation as before.
o Note: You still have to setup the analysis, technology file selection, and the
output waves to be plotted.
Produces a pulse from 0V to 1.8V with 0 offset and 0.05n rise and fall time with a duty
cycle of 2n and a period of 4n
Produces a signal that stays at 0v from time 0s to 2ns and then rises to 1.8volts in the time
interval 2ns to 2.1ns and stays at 1.8v from 2.1n to 4ns and goes from 1.8v to 0v in the time
interval 4ns to 4.1ns and remains stationary afterwards.