3-Sample Quiz FSM - Solution

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Faculty of Electrical Engineering UTM

SEE 3243/SEE4243 Digital System

Answer all questions in the space provided.

1. Complete the block diagram in Figure (a) to compute next state and output for
Moore and Mealy machine. Label correctly the present state (PS), next state (NS)
and output (Z) in the block diagram. ( / 8 marks)

NS PS
Moore Input, X Logic Logic Z
Memory
gates gates

Input, X
NS
Mealy Logic Logic Z
Memory
gates gates

PS

Figure (a)
2. Given the state diagram of a FSM in Figure (b).

1/0 1/0

0/0
1/0 0/0 1/0
A B C D

0/0 0/1

Figure (b)

(a) Determine the state diagram whether it is Moore or Mealy machine.


Mealy
( /2 marks)

(b) Complete the state table in Table (a). (Assume A=00) ( /6 marks)

Present State Input Next State Output


Q1
1 Q00 I Q1+ Q0+ Z
0 0 0 0 0 0
0 0 1 0 1 0
0 1 0 1 0 0
0 1 1 0 1 0
1 0 0 0 0 0
1 0 1 1 1 0
1 1 0 1 0 1
1 1 1 0 1 0
Table (a)

(c) Let asssume D flipp-flop’s are uused, derive the equationn for next staate and
outputt. ( /6 marks)
m

D1 =Q0I’ + Q1Q0’I

D0 =I

Z (Q1, Q0, X) =Q1Q0I’

(d) Draw the circuit for


f the FSM. ( /6 markks)

Q0
I’ Q1
SET
D Q

Q1
Q0' CLR Q
I Z
I’
I D
SET
Q Q0

CLR Q
3. Complete the State Diagram in Figure (c) for strings that must be recognized. The
output is asserted whenever the input sequence ..010.. has been observed as long
as the sequence 100 has never been seen. ( /9 marks)

Reset
S0
[0] Sample input/output behavior

S1 S4 X : 00101010010…
[0] Z : 00010101000…
[0]

S2 S5
[0] [0]

S3 S6
[1] [0]

Figure (c)

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