Unit 1: MPI (CST-282, ITT-282) SUBMISSION DATE: 14.02.2020

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MPI (CST-282, ITT-282) UNIT 1 SUBMISSION DATE: 14.02.

2020

ASSIGNMENT 1 – A
(2 marks each)
Q1. Write instructions to
a) load 00H to accumulator
b) Decrement the accumulator
c) Display the answer at 3004H
Q2. List out the machine control operations used in 8085 microprocessor?
Q3. Add two 8 bit numbers using assembly language program
Q4. Give a brief discussion on Program Status Word (PSW)?
Q5. How many address lines are required for a microprocessor having total addressable memory
of 1 MB? (EC-Engg. Services Exam.)
Q6. For 8085 microprocessor, the following program is executed. (EC-GATE- 2013).
MVI A, 05H;
MVIB, 05H;
PTR: ADD B;
DCR B;
JNZ PTR;
ADI 03H;
HLT;
At the end of program, accumulator contains
(A) 17 H (B) 20 H (C) 23 H (D) 05 H

ASSIGNMENT 1 – B
(2 marks each)
Q 1.How many address lines are required for a microprocessor having total addressable memory
of 4 Mb?
Q 2.Identify the addressing mode in the following instructions:
MOV A, B MVI, 05H
LHLD, 3000H XCHG
RST 4.5 CMP, B
Q 3. Write a program to add two 8 bit numbers stored at 2500H and 2501H resp. stored at 2500H
and 2501H.Result should be at 2550H. (EC-Engg. Services Exam.)
Q 4. How the following interrupts work?
a.) Vectored interrupts
b.) RST 7.5, 5.5& 6.5
Q 5. Differentiate between data transfer and logical instructions with example.
Q 6. In an 8085 microprocessor, the shift registers which store the result of an addition and the
overflow bit are, respectively. (EC-GATE- 2015-01)
(A) B and F (B) A and F (C) H and F (D) A and C

ASSIGNMENT 1 – C
(2 marks each)
Q1. Consider a system in which the full memory space 64kb is utilized for EPROM memory.
Interface the EPROM with 8085 processor.
Q 2.Illustrate the flag register of 8085 with a suitable diagram.
Q 3. Enumerate control and status signals present in 8085 microprocessor.
Q 4. Place the content of memory location FC50H in register B and that of FC51H in register C.
The contents of FC50H and FC51H are 11H and 12H respectively. (EC-Engg. Services Exam.)
Q5.How many memory locations can be addressed by a microprocessor with 12 address lines?
Q6. In an 8085 microprocessor, which one of the following instructions changes the content of
the accumulator? (EC-GATE-2015-02)
(A) MOV B, M (B) PCHL (C) RNZ (D) SBI BEH

ASSIGNMENT 1 – D
(2 marks each)
Q1. State the function and range of address bus?
Q2. Identify the addressing mode used in the following instructions:
i) ADI 47H
ii) RRC
iii) LXI D, 2FFF H
Q3. How STA works in data transfer instructions?
Q4. How these registers work in 8085 microprocessor?
a) Program Counter
b) Stack Pointer
Q5. Write a program to add two16 bit numbers stored at memory locations 2007H and 3003H
respectively. Store the result at 2904H.
Q6. Which one of the following 8085 microprocessor programs correctly calculates the product
of two 8-bit numbers stored in registers B and C?(Options) (EC-GATE-2015-3)
(A) MVI A, 00 H (B) MVI, A, 00H
JNZ LOOP CMP C
CMP C LOOP DCR B
LOOP DCR B JNZ LOOP
HLT HLT
(C) MVI A, 00H (D) MVI A, 00H
LOOP ADD C ADD C
DCR B JNZ LOOP
JNZ LOOP LOOP INR B
HLT HLT

ASSIGNMENT 1 – E
(2 marks each)
Q 1.In what way interrupts are classified in 8085 microprocessor?
Q 2. Place the content of memory location 3000H in register B and that of 3050H in register C.
The contents of 3055H and 3057H are 20H and 30H respectively. (EC-Engg. Services Exam.)
Q 3.Consider a system in which the full memory space 64kb is utilized for EPROM memory.
Interface the EPROM with 8085 processor.
Q 4.How many address lines in a 4096 x 8 EPROM CHIP?
Q 5. Add two 8 bit numbers stored at 2500H and 2501H in assembly language program. Result
should be at 2550H.
Q6. In an 8085 system, a PUSH operation requires more clock cycles than a POP operation.
Which one of the following options is the correct reason for this? (EC-GATE-16-1)
(A) For POP, the data transceivers remain in the same direction as for instruction fetch (memory
to processor), whereas for PUSH their direction has to be reversed.
(B) Memory write operations are slower than memory read operations in an 8085 based system.
(C) The stack pointer needs to be pre-decremented before writing registers in a PUSH, whereas a
POP operation uses the address already in the stack pointer.
(D) Order of registers has to be interchanged for a PUSH operation, whereas POP uses their
natural order.
ASSIGNMENT 1 – F
(2 marks each)
Q1. Interface 6k byte EPROM with 8085 microprocessor from the address space 4054H.
Q2.Which addressing mode has been used in the following instructions?
i. ADD 20H
ii. LXI H, 2050H
iii. LHLD 3000
iv. RAL
v. LDA 3000.
vi. CMA
Q3. Interface 8K*8 EPROM with 8085, available ICs are 4K * 4.
Q4. List out instructions to load the hexadecimal numbers 65H in register C.
Q5. Identify the addressing mode used in the following instructions. (EC-IES)
(i) ADI 47H
(ii) RRC
(iii) LXI D, 2FFF H
Q6. An 8 Kbyte ROM with an active low Chip Select input is to be used in an 8085
microprocessor based system. The ROM should occupy the address range 1000H to 2FFFH. The
address lines are designated as A15 to A0, where A15is the most significant address bit. Give the
logic expressions which will generate the correct signal for this ROM? (EC-GATE-2016-2)
ASSIGNMENT 1 – G
(2 marks each)
Q1. How many memory locations can be addressed by a ROM chip with 12 address lines?
Interface this with 8085 microprocessor. (EC-Engg. Services Exam.)
Q2. Write a program to add two 8 bit numbers stored at 2006H and 2010H. Store the
result at 3060H.
Q3. Interface 4KB EPROM with 8085 whose starting address is 2000H. Also find the final
address.
Q4. Interface 8K*8 EPROM with 8085, available ICs are 4K * 4.
Q5. Write instructions to
(i) load 00H to accumulator
(ii) Decrement the accumulator
Q6. In an 8085 microprocessor, the contents of the accumulator and the carry flag are A7 (in
hex) and 0, respectively. If the instruction RLC is executed, then the contents of the accumulator
(in hex) and the carry flag, respectively, will be (EC-GATE-2016-3)
(A) 4E and 0 (B) 4E and 1 (C) 4F and 0 (D) 4F and 1

ASSIGNMENT 1 -H

(2 marks each)

Q1. Why EPROM is mapped at the beginning of memory space in 8085 system?

Q2. Why the number of output ports in the peripheral-mapped I/O is restricted to 256 parts.

Q3. Write the instructions to display 7 using seven segment display device with device address
F5H. The common anode seven segments LED works on logic 0 to turn on. Also explain the
logic for address lines A7-A0 with address F5H.

Q4. (i) Write an instruction to load 00H in the accumulator, then decrement the accumulator and
display the answer on the output port 01H.

(ii) Write a program to a) clear the accumulator b) Add 48H c) Subtract 93H d) Add 68 H e)
Display the result after subtracting 93H and after adding 68H (EC-Engg. Services Exam.)

Q5. Assume the accumulator contents are 0AH and CY=1. Illustrate the accumulator contents
after the execution of the instruction RAL twice.
Q6. The clock frequency of an 8085 microprocessor is 5 MHz. If the time required executing an
instruction is 1.4 then what is the number of T-states needed for executing the instruction? (EC-
GATE-2017-02)

Assignment 1-I
(2 marks each)

Q1. Write the instruction to load the number 2050H in the register pair HL. Increment the
number using the instruction INX H and illustrate whether INR H instruction is equivalent to the
instruction INR L.

Q2. The memory location C050H holds the data byte F8H. Write the instructions to transfer the
data byte to the accumulator using three different opcodes: MOV, LDAX and LDA.

Q3. Following set of instructions are executed in microprocessor 8085 to set up a delay using
register. T-States MVI C, FFH 7 LOOP DCR C 4 JNZ LOOP 10/7 Calculate total delay of all
instructions using 2 MHz clock frequency of the system. (EC-Engg. Services Exam.)

Q4. Write a program to count from 0 to 9 using delay between each count using HL register pair.
At the count of 9, the counter should reset itself to 0 and repeat the sequence continuously.
Display each count at one of the output ports.

Q5. Specify the output of the PORT # if the following program is executed and specify the
contents of the register before and after execution. Explain the program using flowchart. MVI B,
02H MOV A, B MOV C, A MVI D, 17H OUT PORT # HLT

Q6. An 8085 assembly language program is given below. Assume that the carry flag is initially
unset. What is the content of the accumulator after the execution of the program? (EC-GATE-
2011)

MVI A, 07
RLC
MOV B, A
RLC
RLC
ADD B
RRC
Assignment 1-J
(2 marks each)

Q1. What do you mean by maskable and non-maskable interrupts? Differentiate between RIM
and SIM.

Q2. Assuming the microprocessor is completing an RST 7.5 interrupt request, check to see if
RST 6.5 is pending. If it is pending, enable RST 6.5 without affecting any other interrupts;
otherwise, return to the main program.

Q3. What are the two different techniques used for interfacing I/O devices using microprocessor
8085? Differentiate between them and also write the instructions used to execute them.

Q4. Assume the accumulator contents are 61H and CY=1. Illustrate the accumulator contents
after the execution of the instruction RRC and RAR. (EC-Engg. Services Exam.)

Q5. Which instructions are used to enable and disable the interrupt? Describe the steps 8085 uses
when any interrupt occurs.

Q6. For the 8085 assembly language program given below, what is the content of the
accumulator after the execution of the program is (EC-GATE-2010)

3000 MVI A, 45H


3001 MOV B, A
3003 STC
3004 CMC
3005 RAR
3006 XRA B

Assignment 1-K
(2 marks each)

Q1. Draw the flowchart for hexadecimal counter to count from FFH to 00H.

Q2. Write a program to generate a continuous wave with the period of 500 micro sec. Assume
the system clock period is 325 ns and use bit D0 to output the square wave.

Q3. Differentiate between (1) POP and PUSH (2) CALL and Return.

Q4. Describe the operands for the opcodes PUSH, PULL, CALL, RET using various examples.

Q5. (i) What is the need to use a subroutine in a program?


(ii) Which command is used to load a stack pointer?

Q6. In a microprocessor, the service routine for a certain interrupt starts from a fixed location of
memory which cannot be externally set, but the interrupt can be delayed or rejected, such an
interrupt is: (EC-GATE-2009)
(A) non-maskable and non-vectored
(B) maskable and non-vectored
(C) non-maskable and vectored
(D) maskable and vectored

Assignment 1-L
(2 marks each)

Q1. List all the conditional call and conditional return instructions and describe in detail.

Q2. (i) What do you mean by nesting?

(ii) Can an input port and output port have the same port address?

(iii) If high order lines are partially decoded, how can one determine whether it is peripheral I/O
or memory mapped I/O?

Q3. Write a program to add two hex numbers 7A and 46 and to store the sum at memory location
XX98H and the flag status at location XX97H.

Q4. (i) Specify the control signals necessary in the peripheral mapped I/O technique.

(ii) How many machine cycles are used to execute OUT instruction? Explain briefly.

(iii) What is the need for STACK register?

Q5. Write a program to count continuously in hexadecimal from FFH to 00H in a system with a
delay register C with the count 8CH and display the number on one of the output ports. (EC-
Engg. Services Exam.)
Q6. An 8085 executes the following instructions
2710 LXI H, 30A0 H
2713 DAD H
2414 PCHL
All address and constants are in Hex. Let PC be the contents of the program counter and HL be
the contents of the HL register pair just after executing PCHL. Which of the following
statements is correct? (EC-GATE-2008)

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