DIGITAL DESIGN COURSE SYLLABUS

COURSE TITLE:  Digital Design (EGR3331)

(15 weeks lectures, 4 tutorials and 2 class projects)
TEXTBOOK:  Charles H.Roth,Jr, "Fundamentals of Logic Design",ISBN 0-534-37804-8
INSTRUCTOR:  Dr. A.Doumar
Office:  Room 113, Building 7
Phone: Ext. 2154
e-mail:  A.Doumar@aui.ma
OFFICE HOURS: MWF: 09:00-10:00, 16:00-18:00  OR BY APPOINTMENT

COURSE DESCRIPTION:
This course presents the introductory concepts that are needed in order to design digital systems.
Classical methods, including Boolean algebra, combinational and sequential logic design methods.
Additionally this course will present an introduction of the Hardware description language (VHDL)
and introduce students to design combinational and sequential circuits using VHDL and simulators.

INTENDED LEARNING OUTCOMES:

On successful completion of this course student should be able to design the basic logic functions,
simplification of expressions, Karnaugh maps,, flip flops, simple sequential systems, fan-out, propagation
delay, speed, power consumption of logic families. Programmable Logic Devices: architecture and
programming using VHDL. Implementing a simple MSI functions using VHDL : multiplexers, decoders,
registers and counters.

ABSENTEEISM:
The University's official attendance policy is stated as: "class attendance is compulsory for all students.
A student exceeding three unexcused absences may be dropped form the course and assigned the grade
of "F"... Any absentee must present a valid excuse to the instructor, and would hold responsible for all
assignments, quizzes and examinations held during their absence".

TESTS:
Two exams will be given during the semester; their dates will be announced in class.
A comprehensive final examination will be held at the end of the semester as scheduled by the University.

QUIZZES: 
Quizzes may be assigned by the professor if it is deemed necessary.
Home work will be assigned from the textbook.

GRADING POLICIES: 
The course grade will be determined from the percentage of the students' earned grades over the total
possible points. The percentiles for the different course assignments are:

Term exam 20%

Project 20%
Final Exam 40%
Quizzes/Homeworks 20%

Course Calendar
EGR 3331 Course Outline/Schedule  

WEEK Topic REFERENCECHAPTERS

1 Introduction, Logic Gates  2
2  Boolean Algebra, Logic Gates 2, 3
3 Boolean Algebra, Logic Gates 2, 3
4 Simplification/Karnaugh maps 5, 6
5 Simplification/Karnaugh maps 5, 6
6 Combinational Logic Design 8, 9
7 Introdution Logic Design using VHDL 8, 9, 10
8 Flip-Flops, Sequential Logic Design 11, 12
9 Spring break
10 Flip-Flops, Sequential Logic Design (counters) 11, 12
11 Flip-Flops, Sequential Logic Design (registers) 12, 13, 14
12 Other examples of sequential design 16, 17, 20
Class Project1--Design of a simple market
13 Lecture notes
clock
14 Class Project 2--Design of Trafic light controller Lecture notes
15 FINAL EXAM

Recommended books

Authors Titles, edition Publisher Year ISBN Cost Code

J F Wakerly Digital Design Prentice Hall 2000 0130825999 ｣37 C

Th. L. Floyd Digital Fundamentals Prentice Hall 2003 0130464112 ｣50 C

Codes : A = compulsory ; B = strongly recommended ; C = recommended ; D = wider reading

 

Study times

Type  Details

Lectures and tutorials 45 hours

Tutorial Sheets 10 hours
Review and consolidation of course material 30 hours
Final revision and examination 15 hours

These times are an estimate of the work required by a typical student. There will be variations between
individuals, but you will run the risk of failure if you spend significantly less time on this course than these
guidelines suggest.